Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:21:37.992674 lava-dispatcher, installed at version: 2024.01
2 01:21:37.993440 start: 0 validate
3 01:21:37.993906 Start time: 2024-09-06 01:21:37.993877+00:00 (UTC)
4 01:21:37.994437 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:21:37.994976 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:21:38.035592 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:21:38.036176 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 01:21:38.064942 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:21:38.065553 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:21:38.096230 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:21:38.096690 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:21:38.127829 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:21:38.128316 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6-75-gad618736883b8%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 01:21:38.164939 validate duration: 0.17
16 01:21:38.165793 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:21:38.166140 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:21:38.166448 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:21:38.167066 Not decompressing ramdisk as can be used compressed.
20 01:21:38.167539 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:21:38.167825 saving as /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/ramdisk/initrd.cpio.gz
22 01:21:38.168149 total size: 5628140 (5 MB)
23 01:21:38.204287 progress 0 % (0 MB)
24 01:21:38.211907 progress 5 % (0 MB)
25 01:21:38.219714 progress 10 % (0 MB)
26 01:21:38.226725 progress 15 % (0 MB)
27 01:21:38.233317 progress 20 % (1 MB)
28 01:21:38.236985 progress 25 % (1 MB)
29 01:21:38.241052 progress 30 % (1 MB)
30 01:21:38.244962 progress 35 % (1 MB)
31 01:21:38.248510 progress 40 % (2 MB)
32 01:21:38.252420 progress 45 % (2 MB)
33 01:21:38.255938 progress 50 % (2 MB)
34 01:21:38.259830 progress 55 % (2 MB)
35 01:21:38.263744 progress 60 % (3 MB)
36 01:21:38.267278 progress 65 % (3 MB)
37 01:21:38.271340 progress 70 % (3 MB)
38 01:21:38.274858 progress 75 % (4 MB)
39 01:21:38.278761 progress 80 % (4 MB)
40 01:21:38.282273 progress 85 % (4 MB)
41 01:21:38.286130 progress 90 % (4 MB)
42 01:21:38.289876 progress 95 % (5 MB)
43 01:21:38.293153 progress 100 % (5 MB)
44 01:21:38.293807 5 MB downloaded in 0.13 s (42.72 MB/s)
45 01:21:38.294373 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:21:38.295299 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:21:38.295613 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:21:38.295904 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:21:38.296420 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/kernel/Image
51 01:21:38.296680 saving as /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/kernel/Image
52 01:21:38.296903 total size: 37407232 (35 MB)
53 01:21:38.297127 No compression specified
54 01:21:38.332521 progress 0 % (0 MB)
55 01:21:38.355383 progress 5 % (1 MB)
56 01:21:38.378275 progress 10 % (3 MB)
57 01:21:38.400797 progress 15 % (5 MB)
58 01:21:38.423260 progress 20 % (7 MB)
59 01:21:38.445703 progress 25 % (8 MB)
60 01:21:38.468476 progress 30 % (10 MB)
61 01:21:38.491001 progress 35 % (12 MB)
62 01:21:38.513554 progress 40 % (14 MB)
63 01:21:38.536142 progress 45 % (16 MB)
64 01:21:38.559047 progress 50 % (17 MB)
65 01:21:38.581680 progress 55 % (19 MB)
66 01:21:38.604136 progress 60 % (21 MB)
67 01:21:38.626939 progress 65 % (23 MB)
68 01:21:38.649302 progress 70 % (25 MB)
69 01:21:38.672011 progress 75 % (26 MB)
70 01:21:38.694492 progress 80 % (28 MB)
71 01:21:38.717068 progress 85 % (30 MB)
72 01:21:38.739551 progress 90 % (32 MB)
73 01:21:38.762481 progress 95 % (33 MB)
74 01:21:38.784617 progress 100 % (35 MB)
75 01:21:38.785270 35 MB downloaded in 0.49 s (73.05 MB/s)
76 01:21:38.785769 end: 1.2.1 http-download (duration 00:00:00) [common]
78 01:21:38.786625 end: 1.2 download-retry (duration 00:00:00) [common]
79 01:21:38.786925 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:21:38.787211 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:21:38.787691 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:21:38.787977 saving as /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:21:38.788230 total size: 53173 (0 MB)
84 01:21:38.788450 No compression specified
85 01:21:38.828897 progress 61 % (0 MB)
86 01:21:38.829745 progress 100 % (0 MB)
87 01:21:38.830273 0 MB downloaded in 0.04 s (1.21 MB/s)
88 01:21:38.830729 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:21:38.831535 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:21:38.831797 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:21:38.832097 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:21:38.832555 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:21:38.832798 saving as /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/nfsrootfs/full.rootfs.tar
95 01:21:38.833003 total size: 474398908 (452 MB)
96 01:21:38.833212 Using unxz to decompress xz
97 01:21:38.869837 progress 0 % (0 MB)
98 01:21:39.961509 progress 5 % (22 MB)
99 01:21:41.403436 progress 10 % (45 MB)
100 01:21:41.839247 progress 15 % (67 MB)
101 01:21:42.601509 progress 20 % (90 MB)
102 01:21:43.148664 progress 25 % (113 MB)
103 01:21:43.508451 progress 30 % (135 MB)
104 01:21:44.105775 progress 35 % (158 MB)
105 01:21:45.013699 progress 40 % (181 MB)
106 01:21:45.851421 progress 45 % (203 MB)
107 01:21:46.563949 progress 50 % (226 MB)
108 01:21:47.306516 progress 55 % (248 MB)
109 01:21:48.528010 progress 60 % (271 MB)
110 01:21:50.045130 progress 65 % (294 MB)
111 01:21:51.720211 progress 70 % (316 MB)
112 01:21:54.817838 progress 75 % (339 MB)
113 01:21:57.249548 progress 80 % (361 MB)
114 01:22:00.120242 progress 85 % (384 MB)
115 01:22:03.257191 progress 90 % (407 MB)
116 01:22:06.420253 progress 95 % (429 MB)
117 01:22:09.560489 progress 100 % (452 MB)
118 01:22:09.573169 452 MB downloaded in 30.74 s (14.72 MB/s)
119 01:22:09.574041 end: 1.4.1 http-download (duration 00:00:31) [common]
121 01:22:09.575672 end: 1.4 download-retry (duration 00:00:31) [common]
122 01:22:09.576246 start: 1.5 download-retry (timeout 00:09:29) [common]
123 01:22:09.576779 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 01:22:09.577834 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6-75-gad618736883b8/arm64/defconfig/clang-15/modules.tar.xz
125 01:22:09.578320 saving as /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/modules/modules.tar
126 01:22:09.578738 total size: 11642308 (11 MB)
127 01:22:09.579166 Using unxz to decompress xz
128 01:22:09.620930 progress 0 % (0 MB)
129 01:22:09.691150 progress 5 % (0 MB)
130 01:22:09.769349 progress 10 % (1 MB)
131 01:22:09.856799 progress 15 % (1 MB)
132 01:22:09.937374 progress 20 % (2 MB)
133 01:22:10.012339 progress 25 % (2 MB)
134 01:22:10.095348 progress 30 % (3 MB)
135 01:22:10.174223 progress 35 % (3 MB)
136 01:22:10.252749 progress 40 % (4 MB)
137 01:22:10.326301 progress 45 % (5 MB)
138 01:22:10.406835 progress 50 % (5 MB)
139 01:22:10.484901 progress 55 % (6 MB)
140 01:22:10.569260 progress 60 % (6 MB)
141 01:22:10.650647 progress 65 % (7 MB)
142 01:22:10.732509 progress 70 % (7 MB)
143 01:22:10.824885 progress 75 % (8 MB)
144 01:22:10.921857 progress 80 % (8 MB)
145 01:22:11.003268 progress 85 % (9 MB)
146 01:22:11.073769 progress 90 % (10 MB)
147 01:22:11.151004 progress 95 % (10 MB)
148 01:22:11.227591 progress 100 % (11 MB)
149 01:22:11.238429 11 MB downloaded in 1.66 s (6.69 MB/s)
150 01:22:11.239146 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:22:11.240856 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:22:11.241399 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 01:22:11.241932 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 01:22:26.473959 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/713172/extract-nfsrootfs-rv99c31i
156 01:22:26.474567 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 01:22:26.474853 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 01:22:26.475489 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8
159 01:22:26.475958 makedir: /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin
160 01:22:26.476331 makedir: /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/tests
161 01:22:26.476651 makedir: /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/results
162 01:22:26.476983 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-add-keys
163 01:22:26.477508 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-add-sources
164 01:22:26.478005 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-background-process-start
165 01:22:26.478505 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-background-process-stop
166 01:22:26.479056 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-common-functions
167 01:22:26.479557 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-echo-ipv4
168 01:22:26.480068 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-install-packages
169 01:22:26.480565 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-installed-packages
170 01:22:26.481043 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-os-build
171 01:22:26.481516 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-probe-channel
172 01:22:26.481990 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-probe-ip
173 01:22:26.482476 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-target-ip
174 01:22:26.482940 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-target-mac
175 01:22:26.483410 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-target-storage
176 01:22:26.483883 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-case
177 01:22:26.485075 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-event
178 01:22:26.485561 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-feedback
179 01:22:26.486062 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-raise
180 01:22:26.486533 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-reference
181 01:22:26.486998 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-runner
182 01:22:26.487471 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-set
183 01:22:26.487935 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-test-shell
184 01:22:26.488462 Updating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-install-packages (oe)
185 01:22:26.488990 Updating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/bin/lava-installed-packages (oe)
186 01:22:26.489525 Creating /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/environment
187 01:22:26.489912 LAVA metadata
188 01:22:26.490167 - LAVA_JOB_ID=713172
189 01:22:26.490379 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:22:26.490734 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 01:22:26.491704 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:22:26.492041 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 01:22:26.492257 skipped lava-vland-overlay
194 01:22:26.492498 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:22:26.492751 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 01:22:26.492967 skipped lava-multinode-overlay
197 01:22:26.493206 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:22:26.493453 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 01:22:26.493702 Loading test definitions
200 01:22:26.493978 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 01:22:26.494198 Using /lava-713172 at stage 0
202 01:22:26.495386 uuid=713172_1.6.2.4.1 testdef=None
203 01:22:26.495687 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:22:26.495948 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 01:22:26.497744 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:22:26.498535 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 01:22:26.500753 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:22:26.501591 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 01:22:26.503691 runner path: /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 713172_1.6.2.4.1
212 01:22:26.504717 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:22:26.505485 Creating lava-test-runner.conf files
215 01:22:26.505686 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/713172/lava-overlay-l814hca8/lava-713172/0 for stage 0
216 01:22:26.506020 - 0_v4l2-decoder-conformance-h265
217 01:22:26.506355 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:22:26.506625 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 01:22:26.528280 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:22:26.528678 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 01:22:26.528935 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:22:26.529200 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:22:26.529460 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 01:22:27.159268 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:22:27.159741 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 01:22:27.160058 extracting modules file /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713172/extract-nfsrootfs-rv99c31i
227 01:22:28.516892 extracting modules file /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/modules/modules.tar to /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk
228 01:22:29.913888 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:22:29.914375 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 01:22:29.914667 [common] Applying overlay to NFS
231 01:22:29.914895 [common] Applying overlay /var/lib/lava/dispatcher/tmp/713172/compress-overlay-if5mp__a/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/713172/extract-nfsrootfs-rv99c31i
232 01:22:29.944978 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:22:29.945399 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 01:22:29.945700 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 01:22:29.945947 Converting downloaded kernel to a uImage
236 01:22:29.946271 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/kernel/Image /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/kernel/uImage
237 01:22:30.352463 output: Image Name:
238 01:22:30.352887 output: Created: Fri Sep 6 01:22:29 2024
239 01:22:30.353107 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:22:30.353313 output: Data Size: 37407232 Bytes = 36530.50 KiB = 35.67 MiB
241 01:22:30.353515 output: Load Address: 01080000
242 01:22:30.353714 output: Entry Point: 01080000
243 01:22:30.353911 output:
244 01:22:30.354250 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:22:30.354518 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:22:30.354787 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 01:22:30.355039 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:22:30.355296 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 01:22:30.355549 Building ramdisk /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk
250 01:22:32.594829 >> 171799 blocks
251 01:22:40.245814 Adding RAMdisk u-boot header.
252 01:22:40.246542 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk.cpio.gz.uboot
253 01:22:40.495528 output: Image Name:
254 01:22:40.495958 output: Created: Fri Sep 6 01:22:40 2024
255 01:22:40.496496 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:22:40.496953 output: Data Size: 23958695 Bytes = 23397.16 KiB = 22.85 MiB
257 01:22:40.497419 output: Load Address: 00000000
258 01:22:40.497862 output: Entry Point: 00000000
259 01:22:40.498304 output:
260 01:22:40.499418 rename /var/lib/lava/dispatcher/tmp/713172/extract-overlay-ramdisk-_qm07sg3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
261 01:22:40.500224 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:22:40.500833 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 01:22:40.501419 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:58) [common]
264 01:22:40.501922 No LXC device requested
265 01:22:40.502473 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:22:40.503030 start: 1.8 deploy-device-env (timeout 00:08:58) [common]
267 01:22:40.503574 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:22:40.504073 Checking files for TFTP limit of 4294967296 bytes.
269 01:22:40.507013 end: 1 tftp-deploy (duration 00:01:02) [common]
270 01:22:40.507643 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:22:40.508267 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:22:40.508821 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:22:40.509374 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:22:40.509948 Using kernel file from prepare-kernel: 713172/tftp-deploy-v5ayuzrz/kernel/uImage
275 01:22:40.510634 substitutions:
276 01:22:40.511081 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:22:40.511518 - {DTB_ADDR}: 0x01070000
278 01:22:40.511957 - {DTB}: 713172/tftp-deploy-v5ayuzrz/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:22:40.512429 - {INITRD}: 713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
280 01:22:40.512868 - {KERNEL_ADDR}: 0x01080000
281 01:22:40.513301 - {KERNEL}: 713172/tftp-deploy-v5ayuzrz/kernel/uImage
282 01:22:40.513732 - {LAVA_MAC}: None
283 01:22:40.514202 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/713172/extract-nfsrootfs-rv99c31i
284 01:22:40.514640 - {NFS_SERVER_IP}: 192.168.6.2
285 01:22:40.515068 - {PRESEED_CONFIG}: None
286 01:22:40.515497 - {PRESEED_LOCAL}: None
287 01:22:40.515922 - {RAMDISK_ADDR}: 0x08000000
288 01:22:40.516377 - {RAMDISK}: 713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
289 01:22:40.516805 - {ROOT_PART}: None
290 01:22:40.517231 - {ROOT}: None
291 01:22:40.517657 - {SERVER_IP}: 192.168.6.2
292 01:22:40.518084 - {TEE_ADDR}: 0x83000000
293 01:22:40.518512 - {TEE}: None
294 01:22:40.518938 Parsed boot commands:
295 01:22:40.519351 - setenv autoload no
296 01:22:40.519776 - setenv initrd_high 0xffffffff
297 01:22:40.520263 - setenv fdt_high 0xffffffff
298 01:22:40.520694 - dhcp
299 01:22:40.521121 - setenv serverip 192.168.6.2
300 01:22:40.521545 - tftpboot 0x01080000 713172/tftp-deploy-v5ayuzrz/kernel/uImage
301 01:22:40.521972 - tftpboot 0x08000000 713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
302 01:22:40.522398 - tftpboot 0x01070000 713172/tftp-deploy-v5ayuzrz/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:22:40.522824 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/713172/extract-nfsrootfs-rv99c31i,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:22:40.523268 - bootm 0x01080000 0x08000000 0x01070000
305 01:22:40.523808 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:22:40.525466 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:22:40.525922 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:22:40.542489 Setting prompt string to ['lava-test: # ']
310 01:22:40.544105 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:22:40.544764 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:22:40.545358 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:22:40.545925 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:22:40.547165 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:22:40.600877 >> OK - accepted request
316 01:22:40.602920 Returned 0 in 0 seconds
317 01:22:40.704143 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:22:40.705903 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:22:40.706529 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:22:40.707093 Setting prompt string to ['Hit any key to stop autoboot']
322 01:22:40.707607 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:22:40.709353 Trying 192.168.56.21...
324 01:22:40.709872 Connected to conserv1.
325 01:22:40.710334 Escape character is '^]'.
326 01:22:40.710787
327 01:22:40.711248 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:22:40.711714
329 01:22:47.570554 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:22:47.571221 bl2_stage_init 0x01
331 01:22:47.571689 bl2_stage_init 0x81
332 01:22:47.576139 hw id: 0x0000 - pwm id 0x01
333 01:22:47.576646 bl2_stage_init 0xc1
334 01:22:47.577088 bl2_stage_init 0x02
335 01:22:47.577525
336 01:22:47.581769 L0:00000000
337 01:22:47.582277 L1:00000703
338 01:22:47.582722 L2:00008067
339 01:22:47.583167 L3:15000000
340 01:22:47.583596 S1:00000000
341 01:22:47.587371 B2:20282000
342 01:22:47.587852 B1:a0f83180
343 01:22:47.588326
344 01:22:47.588764 TE: 70597
345 01:22:47.589193
346 01:22:47.592945 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:22:47.593431
348 01:22:47.598471 Board ID = 1
349 01:22:47.598951 Set cpu clk to 24M
350 01:22:47.599387 Set clk81 to 24M
351 01:22:47.604162 Use GP1_pll as DSU clk.
352 01:22:47.604644 DSU clk: 1200 Mhz
353 01:22:47.605080 CPU clk: 1200 MHz
354 01:22:47.605507 Set clk81 to 166.6M
355 01:22:47.615272 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:22:47.615758 board id: 1
357 01:22:47.621755 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:22:47.632379 fw parse done
359 01:22:47.638470 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:22:47.680904 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:22:47.692054 PIEI prepare done
362 01:22:47.692534 fastboot data load
363 01:22:47.692974 fastboot data verify
364 01:22:47.697467 verify result: 266
365 01:22:47.703060 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:22:47.703531 LPDDR4 probe
367 01:22:47.703963 ddr clk to 1584MHz
368 01:22:47.711080 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:22:47.748438
370 01:22:47.748917 dmc_version 0001
371 01:22:47.754997 Check phy result
372 01:22:47.760918 INFO : End of CA training
373 01:22:47.761388 INFO : End of initialization
374 01:22:47.766482 INFO : Training has run successfully!
375 01:22:47.766944 Check phy result
376 01:22:47.772274 INFO : End of initialization
377 01:22:47.772742 INFO : End of read enable training
378 01:22:47.777684 INFO : End of fine write leveling
379 01:22:47.783248 INFO : End of Write leveling coarse delay
380 01:22:47.783714 INFO : Training has run successfully!
381 01:22:47.784183 Check phy result
382 01:22:47.788834 INFO : End of initialization
383 01:22:47.789297 INFO : End of read dq deskew training
384 01:22:47.794416 INFO : End of MPR read delay center optimization
385 01:22:47.800082 INFO : End of write delay center optimization
386 01:22:47.805640 INFO : End of read delay center optimization
387 01:22:47.806101 INFO : End of max read latency training
388 01:22:47.811238 INFO : Training has run successfully!
389 01:22:47.811702 1D training succeed
390 01:22:47.820423 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:22:47.868037 Check phy result
392 01:22:47.868543 INFO : End of initialization
393 01:22:47.890372 INFO : End of 2D read delay Voltage center optimization
394 01:22:47.909518 INFO : End of 2D read delay Voltage center optimization
395 01:22:47.961406 INFO : End of 2D write delay Voltage center optimization
396 01:22:48.010585 INFO : End of 2D write delay Voltage center optimization
397 01:22:48.016154 INFO : Training has run successfully!
398 01:22:48.016630
399 01:22:48.017070 channel==0
400 01:22:48.021709 RxClkDly_Margin_A0==88 ps 9
401 01:22:48.022169 TxDqDly_Margin_A0==98 ps 10
402 01:22:48.025052 RxClkDly_Margin_A1==88 ps 9
403 01:22:48.025525 TxDqDly_Margin_A1==98 ps 10
404 01:22:48.030538 TrainedVREFDQ_A0==74
405 01:22:48.030998 TrainedVREFDQ_A1==75
406 01:22:48.036170 VrefDac_Margin_A0==24
407 01:22:48.036631 DeviceVref_Margin_A0==40
408 01:22:48.037061 VrefDac_Margin_A1==23
409 01:22:48.041792 DeviceVref_Margin_A1==39
410 01:22:48.042254
411 01:22:48.042687
412 01:22:48.043120 channel==1
413 01:22:48.043551 RxClkDly_Margin_A0==78 ps 8
414 01:22:48.047463 TxDqDly_Margin_A0==98 ps 10
415 01:22:48.047936 RxClkDly_Margin_A1==88 ps 9
416 01:22:48.053040 TxDqDly_Margin_A1==88 ps 9
417 01:22:48.053510 TrainedVREFDQ_A0==78
418 01:22:48.053942 TrainedVREFDQ_A1==75
419 01:22:48.058531 VrefDac_Margin_A0==22
420 01:22:48.058992 DeviceVref_Margin_A0==36
421 01:22:48.064184 VrefDac_Margin_A1==23
422 01:22:48.064649 DeviceVref_Margin_A1==39
423 01:22:48.065078
424 01:22:48.069778 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:22:48.070288
426 01:22:48.097805 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000016 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 01:22:48.103354 2D training succeed
428 01:22:48.108964 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:22:48.109443 auto size-- 65535DDR cs0 size: 2048MB
430 01:22:48.114568 DDR cs1 size: 2048MB
431 01:22:48.115036 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:22:48.120215 cs0 DataBus test pass
433 01:22:48.120676 cs1 DataBus test pass
434 01:22:48.121108 cs0 AddrBus test pass
435 01:22:48.125765 cs1 AddrBus test pass
436 01:22:48.126227
437 01:22:48.126659 100bdlr_step_size ps== 478
438 01:22:48.127097 result report
439 01:22:48.131363 boot times 0Enable ddr reg access
440 01:22:48.138995 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:22:48.152815 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:22:48.806917 bl2z: ptr: 05129330, size: 00001e40
443 01:22:48.814156 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:22:48.814645 MVN_1=0x00000000
445 01:22:48.815078 MVN_2=0x00000000
446 01:22:48.825602 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:22:48.826079 OPS=0x04
448 01:22:48.826513 ring efuse init
449 01:22:48.831209 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:22:48.831683 [0.017318 Inits done]
451 01:22:48.832160 secure task start!
452 01:22:48.839085 high task start!
453 01:22:48.839550 low task start!
454 01:22:48.840008 run into bl31
455 01:22:48.847673 NOTICE: BL31: v1.3(release):4fc40b1
456 01:22:48.855506 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:22:48.856010 NOTICE: BL31: G12A normal boot!
458 01:22:48.870998 NOTICE: BL31: BL33 decompress pass
459 01:22:48.876683 ERROR: Error initializing runtime service opteed_fast
460 01:22:50.120424 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:22:50.120851 bl2_stage_init 0x01
462 01:22:50.121069 bl2_stage_init 0x81
463 01:22:50.125911 hw id: 0x0000 - pwm id 0x01
464 01:22:50.126313 bl2_stage_init 0xc1
465 01:22:50.131494 bl2_stage_init 0x02
466 01:22:50.131886
467 01:22:50.132449 L0:00000000
468 01:22:50.132907 L1:00000703
469 01:22:50.133323 L2:00008067
470 01:22:50.133728 L3:15000000
471 01:22:50.137126 S1:00000000
472 01:22:50.137567 B2:20282000
473 01:22:50.137975 B1:a0f83180
474 01:22:50.138377
475 01:22:50.138776 TE: 71005
476 01:22:50.139174
477 01:22:50.142742 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:22:50.143192
479 01:22:50.148321 Board ID = 1
480 01:22:50.148763 Set cpu clk to 24M
481 01:22:50.149169 Set clk81 to 24M
482 01:22:50.153910 Use GP1_pll as DSU clk.
483 01:22:50.154364 DSU clk: 1200 Mhz
484 01:22:50.154776 CPU clk: 1200 MHz
485 01:22:50.159497 Set clk81 to 166.6M
486 01:22:50.165108 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:22:50.165562 board id: 1
488 01:22:50.172381 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:22:50.183249 fw parse done
490 01:22:50.189181 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:22:50.232402 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:22:50.243426 PIEI prepare done
493 01:22:50.243893 fastboot data load
494 01:22:50.244367 fastboot data verify
495 01:22:50.249933 verify result: 266
496 01:22:50.254585 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:22:50.255038 LPDDR4 probe
498 01:22:50.255447 ddr clk to 1584MHz
499 01:22:51.618975 Load ddrfw from SPI, src: 0x00018000, de SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 01:22:51.619424 bl2_stage_init 0x01
501 01:22:51.619649 bl2_stage_init 0x81
502 01:22:51.624748 hw id: 0x0000 - pwm id 0x01
503 01:22:51.625176 bl2_stage_init 0xc1
504 01:22:51.630176 bl2_stage_init 0x02
505 01:22:51.630586
506 01:22:51.630803 L0:00000000
507 01:22:51.631005 L1:00000703
508 01:22:51.631211 L2:00008067
509 01:22:51.631414 L3:15000000
510 01:22:51.635712 S1:00000000
511 01:22:51.636078 B2:20282000
512 01:22:51.636303 B1:a0f83180
513 01:22:51.636506
514 01:22:51.636703 TE: 68655
515 01:22:51.636907
516 01:22:51.641321 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 01:22:51.641673
518 01:22:51.646946 Board ID = 1
519 01:22:51.647322 Set cpu clk to 24M
520 01:22:51.647536 Set clk81 to 24M
521 01:22:51.652646 Use GP1_pll as DSU clk.
522 01:22:51.653048 DSU clk: 1200 Mhz
523 01:22:51.653263 CPU clk: 1200 MHz
524 01:22:51.658218 Set clk81 to 166.6M
525 01:22:51.663758 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 01:22:51.664131 board id: 1
527 01:22:51.670934 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 01:22:51.681926 fw parse done
529 01:22:51.687821 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 01:22:51.733059 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 01:22:51.742100 PIEI prepare done
532 01:22:51.742514 fastboot data load
533 01:22:51.742737 fastboot data verify
534 01:22:51.747722 verify result: 266
535 01:22:51.757221 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 01:22:51.757647 LPDDR4 probe
537 01:22:51.757860 ddr clk to 1584MHz
538 01:22:51.761235 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 01:22:51.798990
540 01:22:51.799415 dmc_version 0001
541 01:22:51.806069 Check phy result
542 01:22:51.812377 INFO : End of CA training
543 01:22:51.812804 INFO : End of initialization
544 01:22:51.818224 INFO : Training has run successfully!
545 01:22:51.818668 Check phy result
546 01:22:51.823196 INFO : End of initialization
547 01:22:51.823738 INFO : End of read enable training
548 01:22:51.829147 INFO : End of fine write leveling
549 01:22:51.834942 INFO : End of Write leveling coarse delay
550 01:22:51.835338 INFO : Training has run successfully!
551 01:22:51.835550 Check phy result
552 01:22:51.840082 INFO : End of initialization
553 01:22:51.840460 INFO : End of read dq deskew training
554 01:22:51.845687 INFO : End of MPR read delay center optimization
555 01:22:51.851746 INFO : End of write delay center optimization
556 01:22:51.857290 INFO : End of read delay center optimization
557 01:22:51.857716 INFO : End of max read latency training
558 01:22:51.862567 INFO : Training has run successfully!
559 01:22:51.863175 1D training succeed
560 01:22:51.871565 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 01:22:51.919820 Check phy result
562 01:22:51.920274 INFO : End of initialization
563 01:22:51.947312 INFO : End of 2D read delay Voltage center optimization
564 01:22:51.971319 INFO : End of 2D read delay Voltage center optimization
565 01:22:52.028247 INFO : End of 2D write delay Voltage center optimization
566 01:22:52.084280 INFO : End of 2D write delay Voltage center optimization
567 01:22:52.089820 INFO : Training has run successfully!
568 01:22:52.090412
569 01:22:52.090685 channel==0
570 01:22:52.094685 RxClkDly_Margin_A0==78 ps 8
571 01:22:52.095207 TxDqDly_Margin_A0==88 ps 9
572 01:22:52.104943 RxClkDly_Margin_A1==88 ps 9
573 01:22:52.105567 TxDqDly_Margin_A1==88 ps 9
574 01:22:52.105818 TrainedVREFDQ_A0==74
575 01:22:52.106516 TrainedVREFDQ_A1==74
576 01:22:52.106797 VrefDac_Margin_A0==22
577 01:22:52.107029 DeviceVref_Margin_A0==40
578 01:22:52.109958 VrefDac_Margin_A1==23
579 01:22:52.110323 DeviceVref_Margin_A1==40
580 01:22:52.110546
581 01:22:52.110759
582 01:22:52.110958 channel==1
583 01:22:52.121706 RxClkDly_Margin_A0==88 ps 9
584 01:22:52.122116 TxDqDly_Margin_A0==98 ps 10
585 01:22:52.122341 RxClkDly_Margin_A1==78 ps 8
586 01:22:52.122552 TxDqDly_Margin_A1==88 ps 9
587 01:22:52.133532 TrainedVREFDQ_A0==78
588 01:22:52.133944 TrainedVREFDQ_A1==77
589 01:22:52.134154 VrefDac_Margin_A0==22
590 01:22:52.134358 DeviceVref_Margin_A0==36
591 01:22:52.134560 VrefDac_Margin_A1==22
592 01:22:52.134758 DeviceVref_Margin_A1==37
593 01:22:52.138392
594 01:22:52.138752 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 01:22:52.138973
596 01:22:52.171384 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 01:22:52.171791 2D training succeed
598 01:22:52.177127 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 01:22:52.182806 auto size-- 65535DDR cs0 size: 2048MB
600 01:22:52.183341 DDR cs1 size: 2048MB
601 01:22:52.188439 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 01:22:52.189001 cs0 DataBus test pass
603 01:22:52.194009 cs1 DataBus test pass
604 01:22:52.194546 cs0 AddrBus test pass
605 01:22:52.195000 cs1 AddrBus test pass
606 01:22:52.195444
607 01:22:52.199612 100bdlr_step_size ps== 471
608 01:22:52.200196 result report
609 01:22:52.205201 boot times 0Enable ddr reg access
610 01:22:52.210307 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 01:22:52.224112 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 01:22:52.882700 bl2z: ptr: 05129330, size: 00001e40
613 01:22:52.891098 0.0;M3 CHK:0;cm4_sp_mode 0
614 01:22:52.891681 MVN_1=0x00000000
615 01:22:52.892207 MVN_2=0x00000000
616 01:22:52.902767 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 01:22:52.903353 OPS=0x04
618 01:22:52.903825 ring efuse init
619 01:22:52.905724 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 01:22:52.911567 [0.017354 Inits done]
621 01:22:52.912154 secure task start!
622 01:22:52.912626 high task start!
623 01:22:52.913086 low task start!
624 01:22:52.915836 run into bl31
625 01:22:52.924466 NOTICE: BL31: v1.3(release):4fc40b1
626 01:22:52.932340 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 01:22:52.932672 NOTICE: BL31: G12A normal boot!
628 01:22:52.947801 NOTICE: BL31: BL33 decompress pass
629 01:22:52.953552 ERROR: Error initializing runtime service opteed_fast
630 01:22:54.168267 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 01:22:54.168689 bl2_stage_init 0x01
632 01:22:54.168923 bl2_stage_init 0x81
633 01:22:54.173884 hw id: 0x0000 - pwm id 0x01
634 01:22:54.174171 bl2_stage_init 0xc1
635 01:22:54.179343 bl2_stage_init 0x02
636 01:22:54.179628
637 01:22:54.179848 L0:00000000
638 01:22:54.180118 L1:00000703
639 01:22:54.180331 L2:00008067
640 01:22:54.180536 L3:15000000
641 01:22:54.185789 S1:00000000
642 01:22:54.186074 B2:20282000
643 01:22:54.186285 B1:a0f83180
644 01:22:54.186492
645 01:22:54.186697 TE: 68987
646 01:22:54.186904
647 01:22:54.191233 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 01:22:54.191501
649 01:22:54.196939 Board ID = 1
650 01:22:54.197266 Set cpu clk to 24M
651 01:22:54.197483 Set clk81 to 24M
652 01:22:54.200389 Use GP1_pll as DSU clk.
653 01:22:54.200669 DSU clk: 1200 Mhz
654 01:22:54.206379 CPU clk: 1200 MHz
655 01:22:54.206657 Set clk81 to 166.6M
656 01:22:54.211543 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 01:22:54.211849 board id: 1
658 01:22:54.217077 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 01:22:54.231042 fw parse done
660 01:22:54.237003 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 01:22:54.280960 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 01:22:54.291371 PIEI prepare done
663 01:22:54.291721 fastboot data load
664 01:22:54.291944 fastboot data verify
665 01:22:54.296938 verify result: 266
666 01:22:54.302469 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 01:22:54.302750 LPDDR4 probe
668 01:22:54.302965 ddr clk to 1584MHz
669 01:22:54.311084 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 01:22:54.348267
671 01:22:54.348647 dmc_version 0001
672 01:22:54.355482 Check phy result
673 01:22:54.361554 INFO : End of CA training
674 01:22:54.361853 INFO : End of initialization
675 01:22:54.367913 INFO : Training has run successfully!
676 01:22:54.368241 Check phy result
677 01:22:54.372537 INFO : End of initialization
678 01:22:54.372828 INFO : End of read enable training
679 01:22:54.376176 INFO : End of fine write leveling
680 01:22:54.381329 INFO : End of Write leveling coarse delay
681 01:22:54.387383 INFO : Training has run successfully!
682 01:22:54.387701 Check phy result
683 01:22:54.387920 INFO : End of initialization
684 01:22:54.392557 INFO : End of read dq deskew training
685 01:22:54.395833 INFO : End of MPR read delay center optimization
686 01:22:54.402433 INFO : End of write delay center optimization
687 01:22:54.406998 INFO : End of read delay center optimization
688 01:22:54.407292 INFO : End of max read latency training
689 01:22:54.414586 INFO : Training has run successfully!
690 01:22:54.414887 1D training succeed
691 01:22:54.420937 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 01:22:54.469153 Check phy result
693 01:22:54.469561 INFO : End of initialization
694 01:22:54.496533 INFO : End of 2D read delay Voltage center optimization
695 01:22:54.520670 INFO : End of 2D read delay Voltage center optimization
696 01:22:54.577369 INFO : End of 2D write delay Voltage center optimization
697 01:22:54.631295 INFO : End of 2D write delay Voltage center optimization
698 01:22:54.636906 INFO : Training has run successfully!
699 01:22:54.637341
700 01:22:54.637627 channel==0
701 01:22:54.642425 RxClkDly_Margin_A0==78 ps 8
702 01:22:54.642853 TxDqDly_Margin_A0==98 ps 10
703 01:22:54.648027 RxClkDly_Margin_A1==78 ps 8
704 01:22:54.648335 TxDqDly_Margin_A1==98 ps 10
705 01:22:54.648542 TrainedVREFDQ_A0==75
706 01:22:54.653617 TrainedVREFDQ_A1==74
707 01:22:54.653928 VrefDac_Margin_A0==23
708 01:22:54.654141 DeviceVref_Margin_A0==39
709 01:22:54.659202 VrefDac_Margin_A1==23
710 01:22:54.659502 DeviceVref_Margin_A1==40
711 01:22:54.659711
712 01:22:54.659924
713 01:22:54.665314 channel==1
714 01:22:54.665739 RxClkDly_Margin_A0==78 ps 8
715 01:22:54.666071 TxDqDly_Margin_A0==88 ps 9
716 01:22:54.670439 RxClkDly_Margin_A1==88 ps 9
717 01:22:54.670730 TxDqDly_Margin_A1==88 ps 9
718 01:22:54.676395 TrainedVREFDQ_A0==75
719 01:22:54.676712 TrainedVREFDQ_A1==75
720 01:22:54.676934 VrefDac_Margin_A0==23
721 01:22:54.681626 DeviceVref_Margin_A0==39
722 01:22:54.682063 VrefDac_Margin_A1==22
723 01:22:54.687710 DeviceVref_Margin_A1==39
724 01:22:54.688066
725 01:22:54.688285 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 01:22:54.688500
727 01:22:54.721112 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000018 00000019 00000015 00000018 00000015 00000015 00000018 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 01:22:54.721689 2D training succeed
729 01:22:54.726615 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 01:22:54.732545 auto size-- 65535DDR cs0 size: 2048MB
731 01:22:54.732873 DDR cs1 size: 2048MB
732 01:22:54.738195 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 01:22:54.738635 cs0 DataBus test pass
734 01:22:54.743208 cs1 DataBus test pass
735 01:22:54.743501 cs0 AddrBus test pass
736 01:22:54.743713 cs1 AddrBus test pass
737 01:22:54.743923
738 01:22:54.748890 100bdlr_step_size ps== 471
739 01:22:54.749198 result report
740 01:22:54.754413 boot times 0Enable ddr reg access
741 01:22:54.759585 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 01:22:54.773491 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 01:22:55.433230 bl2z: ptr: 05129330, size: 00001e40
744 01:22:55.442637 0.0;M3 CHK:0;cm4_sp_mode 0
745 01:22:55.443143 MVN_1=0x00000000
746 01:22:55.443401 MVN_2=0x00000000
747 01:22:55.453646 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 01:22:55.454018 OPS=0x04
749 01:22:55.454233 ring efuse init
750 01:22:55.456472 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 01:22:55.462773 [0.017354 Inits done]
752 01:22:55.463100 secure task start!
753 01:22:55.463307 high task start!
754 01:22:55.463506 low task start!
755 01:22:55.467078 run into bl31
756 01:22:55.475710 NOTICE: BL31: v1.3(release):4fc40b1
757 01:22:55.483493 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 01:22:55.483821 NOTICE: BL31: G12A normal boot!
759 01:22:55.499083 NOTICE: BL31: BL33 decompress pass
760 01:22:55.504709 ERROR: Error initializing runtime service opteed_fast
761 01:22:56.300242
762 01:22:56.300675
763 01:22:56.305521 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 01:22:56.305849
765 01:22:56.308995 Model: Libre Computer AML-S905D3-CC Solitude
766 01:22:56.456104 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 01:22:56.471419 DRAM: 2 GiB (effective 3.8 GiB)
768 01:22:56.572375 Core: 406 devices, 33 uclasses, devicetree: separate
769 01:22:56.578501 WDT: Not starting watchdog@f0d0
770 01:22:56.603314 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 01:22:56.615568 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 01:22:56.620534 ** Bad device specification mmc 0 **
773 01:22:56.630587 Card did not respond to voltage select! : -110
774 01:22:56.638226 ** Bad device specification mmc 0 **
775 01:22:56.638553 Couldn't find partition mmc 0
776 01:22:56.646559 Card did not respond to voltage select! : -110
777 01:22:56.652143 ** Bad device specification mmc 0 **
778 01:22:56.652442 Couldn't find partition mmc 0
779 01:22:56.657123 Error: could not access storage.
780 01:22:56.953662 Net: eth0: ethernet@ff3f0000
781 01:22:56.954255 starting USB...
782 01:22:57.198353 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 01:22:57.198973 Starting the controller
784 01:22:57.205302 USB XHCI 1.10
785 01:22:58.761649 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 01:22:58.769877 scanning usb for storage devices... 0 Storage Device(s) found
788 01:22:58.821050 Hit any key to stop autoboot: 1
789 01:22:58.821785 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 01:22:58.822233 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 01:22:58.822505 Setting prompt string to ['=>']
792 01:22:58.822769 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 01:22:58.835917 0
794 01:22:58.836672 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 01:22:58.937934 => setenv autoload no
797 01:22:58.938627 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
798 01:22:58.942704 setenv autoload no
800 01:22:59.044253 => setenv initrd_high 0xffffffff
801 01:22:59.044801 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 01:22:59.049016 setenv initrd_high 0xffffffff
804 01:22:59.150091 => setenv fdt_high 0xffffffff
805 01:22:59.150850 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 01:22:59.155181 setenv fdt_high 0xffffffff
808 01:22:59.256738 => dhcp
809 01:22:59.257467 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 01:22:59.261649 dhcp
811 01:23:00.167655 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 01:23:00.168326 Speed: 1000, full duplex
813 01:23:00.168739 BOOTP broadcast 1
814 01:23:00.416200 BOOTP broadcast 2
815 01:23:00.917306 BOOTP broadcast 3
816 01:23:01.918215 BOOTP broadcast 4
817 01:23:03.919206 BOOTP broadcast 5
818 01:23:03.949760 DHCP client bound to address 192.168.6.12 (3781 ms)
820 01:23:04.050983 => setenv serverip 192.168.6.2
821 01:23:04.051760 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
822 01:23:04.056285 setenv serverip 192.168.6.2
824 01:23:04.157771 => tftpboot 0x01080000 713172/tftp-deploy-v5ayuzrz/kernel/uImage
825 01:23:04.158445 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 01:23:04.165074 tftpboot 0x01080000 713172/tftp-deploy-v5ayuzrz/kernel/uImage
827 01:23:04.165553 Speed: 1000, full duplex
828 01:23:04.165961 Using ethernet@ff3f0000 device
829 01:23:04.170649 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
830 01:23:04.176096 Filename '713172/tftp-deploy-v5ayuzrz/kernel/uImage'.
831 01:23:04.180070 Load address: 0x1080000
832 01:23:16.667928 Loading: *#########T T ######################################### 35.7 MiB
833 01:23:16.668344 2.9 MiB/s
834 01:23:16.668577 done
835 01:23:16.672256 Bytes transferred = 37407296 (23aca40 hex)
837 01:23:16.773331 => tftpboot 0x08000000 713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
838 01:23:16.774045 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
839 01:23:16.780814 tftpboot 0x08000000 713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot
840 01:23:16.781116 Speed: 1000, full duplex
841 01:23:16.781347 Using ethernet@ff3f0000 device
842 01:23:16.786262 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
843 01:23:16.796019 Filename '713172/tftp-deploy-v5ayuzrz/ramdisk/ramdisk.cpio.gz.uboot'.
844 01:23:16.796375 Load address: 0x8000000
845 01:23:18.294676 Loading: *################################################# UDP wrong checksum 00000005 0000413e
846 01:23:23.295023 T UDP wrong checksum 00000005 0000413e
847 01:23:33.297107 T T UDP wrong checksum 00000005 0000413e
848 01:23:53.301308 T T T T UDP wrong checksum 00000005 0000413e
849 01:24:13.306141 T T T
850 01:24:13.306816 Retry count exceeded; starting again
852 01:24:13.308414 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
855 01:24:13.310485 end: 2.4 uboot-commands (duration 00:01:33) [common]
857 01:24:13.312057 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
859 01:24:13.313246 end: 2 uboot-action (duration 00:01:33) [common]
861 01:24:13.314914 Cleaning after the job
862 01:24:13.315509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/ramdisk
863 01:24:13.316901 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/kernel
864 01:24:13.359658 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/dtb
865 01:24:13.360996 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/nfsrootfs
866 01:24:13.677935 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/713172/tftp-deploy-v5ayuzrz/modules
867 01:24:13.698931 start: 4.1 power-off (timeout 00:00:30) [common]
868 01:24:13.699608 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
869 01:24:13.737211 >> OK - accepted request
870 01:24:13.739283 Returned 0 in 0 seconds
871 01:24:13.840059 end: 4.1 power-off (duration 00:00:00) [common]
873 01:24:13.841029 start: 4.2 read-feedback (timeout 00:10:00) [common]
874 01:24:13.841692 Listened to connection for namespace 'common' for up to 1s
875 01:24:14.842640 Finalising connection for namespace 'common'
876 01:24:14.843139 Disconnecting from shell: Finalise
877 01:24:14.843424 =>
878 01:24:14.944132 end: 4.2 read-feedback (duration 00:00:01) [common]
879 01:24:14.944569 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/713172
880 01:24:18.343504 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/713172
881 01:24:18.344163 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.