Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:45:37.228929 lava-dispatcher, installed at version: 2024.01
2 09:45:37.229720 start: 0 validate
3 09:45:37.230202 Start time: 2024-09-01 09:45:37.230170+00:00 (UTC)
4 09:45:37.230754 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:45:37.231299 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:45:37.269361 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:45:37.269904 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 09:45:37.298386 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:45:37.299051 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:45:37.330935 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:45:37.331478 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:45:37.362509 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:45:37.363007 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 09:45:37.400937 validate duration: 0.17
16 09:45:37.401839 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:45:37.402214 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:45:37.402568 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:45:37.403204 Not decompressing ramdisk as can be used compressed.
20 09:45:37.403681 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:45:37.403964 saving as /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/ramdisk/initrd.cpio.gz
22 09:45:37.404326 total size: 5628182 (5 MB)
23 09:45:37.442991 progress 0 % (0 MB)
24 09:45:37.447177 progress 5 % (0 MB)
25 09:45:37.451518 progress 10 % (0 MB)
26 09:45:37.455179 progress 15 % (0 MB)
27 09:45:37.459246 progress 20 % (1 MB)
28 09:45:37.462939 progress 25 % (1 MB)
29 09:45:37.466887 progress 30 % (1 MB)
30 09:45:37.470992 progress 35 % (1 MB)
31 09:45:37.474729 progress 40 % (2 MB)
32 09:45:37.478708 progress 45 % (2 MB)
33 09:45:37.482455 progress 50 % (2 MB)
34 09:45:37.486535 progress 55 % (2 MB)
35 09:45:37.490577 progress 60 % (3 MB)
36 09:45:37.494239 progress 65 % (3 MB)
37 09:45:37.498413 progress 70 % (3 MB)
38 09:45:37.502081 progress 75 % (4 MB)
39 09:45:37.506099 progress 80 % (4 MB)
40 09:45:37.509732 progress 85 % (4 MB)
41 09:45:37.513918 progress 90 % (4 MB)
42 09:45:37.517881 progress 95 % (5 MB)
43 09:45:37.521248 progress 100 % (5 MB)
44 09:45:37.521934 5 MB downloaded in 0.12 s (45.64 MB/s)
45 09:45:37.522493 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:45:37.523390 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:45:37.523686 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:45:37.523956 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:45:37.524449 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 09:45:37.524699 saving as /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/kernel/Image
52 09:45:37.524906 total size: 66032128 (62 MB)
53 09:45:37.525115 No compression specified
54 09:45:37.559131 progress 0 % (0 MB)
55 09:45:37.610800 progress 5 % (3 MB)
56 09:45:37.661584 progress 10 % (6 MB)
57 09:45:37.714624 progress 15 % (9 MB)
58 09:45:37.763907 progress 20 % (12 MB)
59 09:45:37.815089 progress 25 % (15 MB)
60 09:45:37.865126 progress 30 % (18 MB)
61 09:45:37.906948 progress 35 % (22 MB)
62 09:45:37.948397 progress 40 % (25 MB)
63 09:45:37.989148 progress 45 % (28 MB)
64 09:45:38.029976 progress 50 % (31 MB)
65 09:45:38.070909 progress 55 % (34 MB)
66 09:45:38.112591 progress 60 % (37 MB)
67 09:45:38.153299 progress 65 % (40 MB)
68 09:45:38.194908 progress 70 % (44 MB)
69 09:45:38.236142 progress 75 % (47 MB)
70 09:45:38.277527 progress 80 % (50 MB)
71 09:45:38.318367 progress 85 % (53 MB)
72 09:45:38.359537 progress 90 % (56 MB)
73 09:45:38.400794 progress 95 % (59 MB)
74 09:45:38.441486 progress 100 % (62 MB)
75 09:45:38.442053 62 MB downloaded in 0.92 s (68.66 MB/s)
76 09:45:38.442537 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:45:38.443413 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:45:38.443704 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:45:38.444002 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:45:38.444476 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:45:38.444751 saving as /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:45:38.444959 total size: 54667 (0 MB)
84 09:45:38.445169 No compression specified
85 09:45:38.477276 progress 59 % (0 MB)
86 09:45:38.478191 progress 100 % (0 MB)
87 09:45:38.478802 0 MB downloaded in 0.03 s (1.54 MB/s)
88 09:45:38.479315 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:45:38.480575 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:45:38.480885 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:45:38.481212 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:45:38.481701 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:45:38.481981 saving as /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/nfsrootfs/full.rootfs.tar
95 09:45:38.482197 total size: 107552908 (102 MB)
96 09:45:38.482425 Using unxz to decompress xz
97 09:45:38.530803 progress 0 % (0 MB)
98 09:45:39.175841 progress 5 % (5 MB)
99 09:45:39.906889 progress 10 % (10 MB)
100 09:45:40.626677 progress 15 % (15 MB)
101 09:45:41.384280 progress 20 % (20 MB)
102 09:45:41.955615 progress 25 % (25 MB)
103 09:45:42.581394 progress 30 % (30 MB)
104 09:45:43.361704 progress 35 % (35 MB)
105 09:45:43.729175 progress 40 % (41 MB)
106 09:45:44.176564 progress 45 % (46 MB)
107 09:45:44.871655 progress 50 % (51 MB)
108 09:45:45.553104 progress 55 % (56 MB)
109 09:45:46.304253 progress 60 % (61 MB)
110 09:45:47.053757 progress 65 % (66 MB)
111 09:45:47.778586 progress 70 % (71 MB)
112 09:45:48.537105 progress 75 % (76 MB)
113 09:45:49.212661 progress 80 % (82 MB)
114 09:45:49.916453 progress 85 % (87 MB)
115 09:45:50.685613 progress 90 % (92 MB)
116 09:45:51.427931 progress 95 % (97 MB)
117 09:45:52.178365 progress 100 % (102 MB)
118 09:45:52.190577 102 MB downloaded in 13.71 s (7.48 MB/s)
119 09:45:52.191222 end: 1.4.1 http-download (duration 00:00:14) [common]
121 09:45:52.192166 end: 1.4 download-retry (duration 00:00:14) [common]
122 09:45:52.192754 start: 1.5 download-retry (timeout 00:09:45) [common]
123 09:45:52.193321 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 09:45:52.194435 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 09:45:52.194964 saving as /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/modules/modules.tar
126 09:45:52.195407 total size: 16062372 (15 MB)
127 09:45:52.195868 Using unxz to decompress xz
128 09:45:52.243114 progress 0 % (0 MB)
129 09:45:52.343828 progress 5 % (0 MB)
130 09:45:52.460267 progress 10 % (1 MB)
131 09:45:52.568835 progress 15 % (2 MB)
132 09:45:52.685131 progress 20 % (3 MB)
133 09:45:52.794717 progress 25 % (3 MB)
134 09:45:52.908221 progress 30 % (4 MB)
135 09:45:53.015742 progress 35 % (5 MB)
136 09:45:53.126266 progress 40 % (6 MB)
137 09:45:53.236192 progress 45 % (6 MB)
138 09:45:53.368154 progress 50 % (7 MB)
139 09:45:53.497490 progress 55 % (8 MB)
140 09:45:53.637170 progress 60 % (9 MB)
141 09:45:53.758380 progress 65 % (9 MB)
142 09:45:53.876394 progress 70 % (10 MB)
143 09:45:54.005258 progress 75 % (11 MB)
144 09:45:54.139919 progress 80 % (12 MB)
145 09:45:54.245527 progress 85 % (13 MB)
146 09:45:54.361439 progress 90 % (13 MB)
147 09:45:54.461936 progress 95 % (14 MB)
148 09:45:54.580761 progress 100 % (15 MB)
149 09:45:54.591281 15 MB downloaded in 2.40 s (6.39 MB/s)
150 09:45:54.592243 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:45:54.593891 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:45:54.594463 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 09:45:54.595010 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 09:46:04.354596 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/684944/extract-nfsrootfs-zqlv5fyz
156 09:46:04.355266 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:46:04.355589 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 09:46:04.356309 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf
159 09:46:04.356809 makedir: /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin
160 09:46:04.357184 makedir: /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/tests
161 09:46:04.357541 makedir: /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/results
162 09:46:04.357959 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-add-keys
163 09:46:04.358557 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-add-sources
164 09:46:04.359255 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-background-process-start
165 09:46:04.359829 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-background-process-stop
166 09:46:04.360529 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-common-functions
167 09:46:04.361157 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-echo-ipv4
168 09:46:04.361703 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-install-packages
169 09:46:04.362338 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-installed-packages
170 09:46:04.362885 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-os-build
171 09:46:04.363508 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-probe-channel
172 09:46:04.364131 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-probe-ip
173 09:46:04.364689 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-target-ip
174 09:46:04.365301 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-target-mac
175 09:46:04.365863 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-target-storage
176 09:46:04.366543 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-case
177 09:46:04.367099 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-event
178 09:46:04.367636 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-feedback
179 09:46:04.368197 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-raise
180 09:46:04.368739 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-reference
181 09:46:04.369282 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-runner
182 09:46:04.369819 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-set
183 09:46:04.370345 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-test-shell
184 09:46:04.370899 Updating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-install-packages (oe)
185 09:46:04.371486 Updating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/bin/lava-installed-packages (oe)
186 09:46:04.372000 Creating /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/environment
187 09:46:04.372439 LAVA metadata
188 09:46:04.372719 - LAVA_JOB_ID=684944
189 09:46:04.373014 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:46:04.373425 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 09:46:04.374436 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:46:04.374765 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 09:46:04.374992 skipped lava-vland-overlay
194 09:46:04.375254 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:46:04.375527 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 09:46:04.375761 skipped lava-multinode-overlay
197 09:46:04.376040 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:46:04.376314 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 09:46:04.376586 Loading test definitions
200 09:46:04.376886 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 09:46:04.377145 Using /lava-684944 at stage 0
202 09:46:04.378432 uuid=684944_1.6.2.4.1 testdef=None
203 09:46:04.378762 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:46:04.379054 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 09:46:04.381014 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:46:04.381857 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 09:46:04.384239 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:46:04.385103 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 09:46:04.387392 runner path: /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/0/tests/0_dmesg test_uuid 684944_1.6.2.4.1
212 09:46:04.388036 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:46:04.388839 Creating lava-test-runner.conf files
215 09:46:04.389052 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/684944/lava-overlay-yqugsfmf/lava-684944/0 for stage 0
216 09:46:04.389438 - 0_dmesg
217 09:46:04.389831 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:46:04.390133 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 09:46:04.413616 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:46:04.414117 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 09:46:04.414455 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:46:04.414753 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:46:04.415035 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 09:46:05.040909 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:46:05.041391 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 09:46:05.041669 extracting modules file /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684944/extract-nfsrootfs-zqlv5fyz
227 09:46:06.636509 extracting modules file /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk
228 09:46:08.267766 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:46:08.268320 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 09:46:08.268636 [common] Applying overlay to NFS
231 09:46:08.268870 [common] Applying overlay /var/lib/lava/dispatcher/tmp/684944/compress-overlay-kcsi4gqr/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/684944/extract-nfsrootfs-zqlv5fyz
232 09:46:08.303511 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:46:08.304028 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 09:46:08.304335 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 09:46:08.304580 Converting downloaded kernel to a uImage
236 09:46:08.304912 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/kernel/Image /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/kernel/uImage
237 09:46:08.958449 output: Image Name:
238 09:46:08.958842 output: Created: Sun Sep 1 09:46:08 2024
239 09:46:08.959067 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:46:08.959282 output: Data Size: 66032128 Bytes = 64484.50 KiB = 62.97 MiB
241 09:46:08.959488 output: Load Address: 01080000
242 09:46:08.959691 output: Entry Point: 01080000
243 09:46:08.959890 output:
244 09:46:08.960265 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 09:46:08.960545 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 09:46:08.960823 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 09:46:08.961086 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:46:08.961352 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 09:46:08.961617 Building ramdisk /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk
250 09:46:12.329982 >> 240420 blocks
251 09:46:22.751008 Adding RAMdisk u-boot header.
252 09:46:22.751456 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk.cpio.gz.uboot
253 09:46:23.075520 output: Image Name:
254 09:46:23.075939 output: Created: Sun Sep 1 09:46:22 2024
255 09:46:23.076352 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:46:23.076760 output: Data Size: 30906713 Bytes = 30182.34 KiB = 29.47 MiB
257 09:46:23.077156 output: Load Address: 00000000
258 09:46:23.077549 output: Entry Point: 00000000
259 09:46:23.077939 output:
260 09:46:23.079073 rename /var/lib/lava/dispatcher/tmp/684944/extract-overlay-ramdisk-kq9bsrjj/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
261 09:46:23.079812 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 09:46:23.080402 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
263 09:46:23.080933 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 09:46:23.081388 No LXC device requested
265 09:46:23.081891 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:46:23.082397 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 09:46:23.082891 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:46:23.083302 Checking files for TFTP limit of 4294967296 bytes.
269 09:46:23.085992 end: 1 tftp-deploy (duration 00:00:46) [common]
270 09:46:23.086585 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:46:23.087112 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:46:23.087609 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:46:23.088137 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:46:23.088668 Using kernel file from prepare-kernel: 684944/tftp-deploy-m6b_anoi/kernel/uImage
275 09:46:23.089298 substitutions:
276 09:46:23.089701 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:46:23.090102 - {DTB_ADDR}: 0x01070000
278 09:46:23.090500 - {DTB}: 684944/tftp-deploy-m6b_anoi/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:46:23.090895 - {INITRD}: 684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
280 09:46:23.091289 - {KERNEL_ADDR}: 0x01080000
281 09:46:23.091679 - {KERNEL}: 684944/tftp-deploy-m6b_anoi/kernel/uImage
282 09:46:23.092099 - {LAVA_MAC}: None
283 09:46:23.092535 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/684944/extract-nfsrootfs-zqlv5fyz
284 09:46:23.092932 - {NFS_SERVER_IP}: 192.168.6.2
285 09:46:23.093322 - {PRESEED_CONFIG}: None
286 09:46:23.093708 - {PRESEED_LOCAL}: None
287 09:46:23.094092 - {RAMDISK_ADDR}: 0x08000000
288 09:46:23.094476 - {RAMDISK}: 684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
289 09:46:23.094861 - {ROOT_PART}: None
290 09:46:23.095244 - {ROOT}: None
291 09:46:23.095629 - {SERVER_IP}: 192.168.6.2
292 09:46:23.096037 - {TEE_ADDR}: 0x83000000
293 09:46:23.096427 - {TEE}: None
294 09:46:23.096814 Parsed boot commands:
295 09:46:23.097188 - setenv autoload no
296 09:46:23.097568 - setenv initrd_high 0xffffffff
297 09:46:23.097950 - setenv fdt_high 0xffffffff
298 09:46:23.098334 - dhcp
299 09:46:23.098711 - setenv serverip 192.168.6.2
300 09:46:23.099089 - tftpboot 0x01080000 684944/tftp-deploy-m6b_anoi/kernel/uImage
301 09:46:23.099469 - tftpboot 0x08000000 684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
302 09:46:23.099850 - tftpboot 0x01070000 684944/tftp-deploy-m6b_anoi/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:46:23.100263 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/684944/extract-nfsrootfs-zqlv5fyz,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:46:23.100662 - bootm 0x01080000 0x08000000 0x01070000
305 09:46:23.101167 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:46:23.102635 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:46:23.103050 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:46:23.117842 Setting prompt string to ['lava-test: # ']
310 09:46:23.119346 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:46:23.119941 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:46:23.120534 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:46:23.121048 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:46:23.122414 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:46:23.161835 >> OK - accepted request
316 09:46:23.163882 Returned 0 in 0 seconds
317 09:46:23.265043 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:46:23.266655 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:46:23.267232 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:46:23.267740 Setting prompt string to ['Hit any key to stop autoboot']
322 09:46:23.268256 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:46:23.269797 Trying 192.168.56.21...
324 09:46:23.270267 Connected to conserv1.
325 09:46:23.270675 Escape character is '^]'.
326 09:46:23.271094
327 09:46:23.271513 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 09:46:23.271938
329 09:46:34.569852 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 09:46:34.570262 bl2_stage_init 0x01
331 09:46:34.570472 bl2_stage_init 0x81
332 09:46:34.575388 hw id: 0x0000 - pwm id 0x01
333 09:46:34.575664 bl2_stage_init 0xc1
334 09:46:34.575868 bl2_stage_init 0x02
335 09:46:34.576245
336 09:46:34.581189 L0:00000000
337 09:46:34.581442 L1:20000703
338 09:46:34.581654 L2:00008067
339 09:46:34.581852 L3:14000000
340 09:46:34.583798 B2:00402000
341 09:46:34.584075 B1:e0f83180
342 09:46:34.584285
343 09:46:34.584486 TE: 58167
344 09:46:34.584685
345 09:46:34.594992 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 09:46:34.595250
347 09:46:34.595454 Board ID = 1
348 09:46:34.595652 Set A53 clk to 24M
349 09:46:34.595851 Set A73 clk to 24M
350 09:46:34.600845 Set clk81 to 24M
351 09:46:34.601099 A53 clk: 1200 MHz
352 09:46:34.601300 A73 clk: 1200 MHz
353 09:46:34.604235 CLK81: 166.6M
354 09:46:34.605209 smccc: 00012abe
355 09:46:34.609779 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 09:46:34.615306 board id: 1
357 09:46:34.620581 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 09:46:34.630899 fw parse done
359 09:46:34.637087 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 09:46:34.679676 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 09:46:34.690622 PIEI prepare done
362 09:46:34.691588 fastboot data load
363 09:46:34.691818 fastboot data verify
364 09:46:34.696175 verify result: 266
365 09:46:34.701829 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 09:46:34.702078 LPDDR4 probe
367 09:46:34.702279 ddr clk to 1584MHz
368 09:46:34.709727 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 09:46:34.747027
370 09:46:34.747308 dmc_version 0001
371 09:46:34.753745 Check phy result
372 09:46:34.759526 INFO : End of CA training
373 09:46:34.759882 INFO : End of initialization
374 09:46:34.765133 INFO : Training has run successfully!
375 09:46:34.765471 Check phy result
376 09:46:34.770712 INFO : End of initialization
377 09:46:34.770961 INFO : End of read enable training
378 09:46:34.776359 INFO : End of fine write leveling
379 09:46:34.782075 INFO : End of Write leveling coarse delay
380 09:46:34.783046 INFO : Training has run successfully!
381 09:46:34.783326 Check phy result
382 09:46:34.787445 INFO : End of initialization
383 09:46:34.787694 INFO : End of read dq deskew training
384 09:46:34.793215 INFO : End of MPR read delay center optimization
385 09:46:34.798783 INFO : End of write delay center optimization
386 09:46:34.804227 INFO : End of read delay center optimization
387 09:46:34.804493 INFO : End of max read latency training
388 09:46:34.809990 INFO : Training has run successfully!
389 09:46:34.810376 1D training succeed
390 09:46:34.818943 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 09:46:34.866742 Check phy result
392 09:46:34.867204 INFO : End of initialization
393 09:46:34.888365 INFO : End of 2D read delay Voltage center optimization
394 09:46:34.908733 INFO : End of 2D read delay Voltage center optimization
395 09:46:34.960624 INFO : End of 2D write delay Voltage center optimization
396 09:46:35.010142 INFO : End of 2D write delay Voltage center optimization
397 09:46:35.015705 INFO : Training has run successfully!
398 09:46:35.016219
399 09:46:35.016638 channel==0
400 09:46:35.021281 RxClkDly_Margin_A0==88 ps 9
401 09:46:35.021738 TxDqDly_Margin_A0==98 ps 10
402 09:46:35.026883 RxClkDly_Margin_A1==88 ps 9
403 09:46:35.027358 TxDqDly_Margin_A1==98 ps 10
404 09:46:35.027774 TrainedVREFDQ_A0==74
405 09:46:35.032490 TrainedVREFDQ_A1==74
406 09:46:35.032954 VrefDac_Margin_A0==24
407 09:46:35.033360 DeviceVref_Margin_A0==40
408 09:46:35.038086 VrefDac_Margin_A1==25
409 09:46:35.038544 DeviceVref_Margin_A1==40
410 09:46:35.038949
411 09:46:35.039355
412 09:46:35.043670 channel==1
413 09:46:35.044146 RxClkDly_Margin_A0==98 ps 10
414 09:46:35.044558 TxDqDly_Margin_A0==98 ps 10
415 09:46:35.049251 RxClkDly_Margin_A1==88 ps 9
416 09:46:35.049706 TxDqDly_Margin_A1==88 ps 9
417 09:46:35.054902 TrainedVREFDQ_A0==77
418 09:46:35.055356 TrainedVREFDQ_A1==77
419 09:46:35.055761 VrefDac_Margin_A0==22
420 09:46:35.060484 DeviceVref_Margin_A0==37
421 09:46:35.060933 VrefDac_Margin_A1==24
422 09:46:35.066113 DeviceVref_Margin_A1==37
423 09:46:35.066561
424 09:46:35.066969 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 09:46:35.067372
426 09:46:35.099643 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 09:46:35.100215 2D training succeed
428 09:46:35.105289 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 09:46:35.110872 auto size-- 65535DDR cs0 size: 2048MB
430 09:46:35.111329 DDR cs1 size: 2048MB
431 09:46:35.116451 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 09:46:35.116906 cs0 DataBus test pass
433 09:46:35.122105 cs1 DataBus test pass
434 09:46:35.122558 cs0 AddrBus test pass
435 09:46:35.122963 cs1 AddrBus test pass
436 09:46:35.123364
437 09:46:35.127684 100bdlr_step_size ps== 420
438 09:46:35.128170 result report
439 09:46:35.133258 boot times 0Enable ddr reg access
440 09:46:35.138665 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 09:46:35.152100 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 09:46:35.725787 0.0;M3 CHK:0;cm4_sp_mode 0
443 09:46:35.726362 MVN_1=0x00000000
444 09:46:35.731271 MVN_2=0x00000000
445 09:46:35.737161 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 09:46:35.737629 OPS=0x10
447 09:46:35.738044 ring efuse init
448 09:46:35.738455 chipver efuse init
449 09:46:35.742656 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 09:46:35.748259 [0.018961 Inits done]
451 09:46:35.748781 secure task start!
452 09:46:35.749219 high task start!
453 09:46:35.752803 low task start!
454 09:46:35.753108 run into bl31
455 09:46:35.759451 NOTICE: BL31: v1.3(release):4fc40b1
456 09:46:35.767291 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 09:46:35.767782 NOTICE: BL31: G12A normal boot!
458 09:46:35.792646 NOTICE: BL31: BL33 decompress pass
459 09:46:35.798345 ERROR: Error initializing runtime service opteed_fast
460 09:46:37.031111
461 09:46:37.031522
462 09:46:37.039635 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 09:46:37.040388
464 09:46:37.040956 Model: Libre Computer AML-A311D-CC Alta
465 09:46:37.248107 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 09:46:37.271391 DRAM: 2 GiB (effective 3.8 GiB)
467 09:46:37.415021 Core: 408 devices, 31 uclasses, devicetree: separate
468 09:46:37.420295 WDT: Not starting watchdog@f0d0
469 09:46:37.452486 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 09:46:37.464985 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 09:46:37.469848 ** Bad device specification mmc 0 **
472 09:46:37.480268 Card did not respond to voltage select! : -110
473 09:46:37.487847 ** Bad device specification mmc 0 **
474 09:46:37.488203 Couldn't find partition mmc 0
475 09:46:37.496198 Card did not respond to voltage select! : -110
476 09:46:37.501667 ** Bad device specification mmc 0 **
477 09:46:37.501942 Couldn't find partition mmc 0
478 09:46:37.506758 Error: could not access storage.
479 09:46:38.770164 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 09:46:38.770797 bl2_stage_init 0x01
481 09:46:38.771257 bl2_stage_init 0x81
482 09:46:38.775645 hw id: 0x0000 - pwm id 0x01
483 09:46:38.776159 bl2_stage_init 0xc1
484 09:46:38.776585 bl2_stage_init 0x02
485 09:46:38.776990
486 09:46:38.781241 L0:00000000
487 09:46:38.781707 L1:20000703
488 09:46:38.782117 L2:00008067
489 09:46:38.782518 L3:14000000
490 09:46:38.786818 B2:00402000
491 09:46:38.787279 B1:e0f83180
492 09:46:38.787686
493 09:46:38.788125 TE: 58159
494 09:46:38.788536
495 09:46:38.792445 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 09:46:38.792908
497 09:46:38.793315 Board ID = 1
498 09:46:38.798018 Set A53 clk to 24M
499 09:46:38.798473 Set A73 clk to 24M
500 09:46:38.798882 Set clk81 to 24M
501 09:46:38.803623 A53 clk: 1200 MHz
502 09:46:38.804105 A73 clk: 1200 MHz
503 09:46:38.804549 CLK81: 166.6M
504 09:46:38.804971 smccc: 00012ab5
505 09:46:38.809247 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 09:46:38.814835 board id: 1
507 09:46:38.820704 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 09:46:38.831441 fw parse done
509 09:46:38.837359 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 09:46:38.879969 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 09:46:38.890864 PIEI prepare done
512 09:46:38.891345 fastboot data load
513 09:46:38.891758 fastboot data verify
514 09:46:38.896641 verify result: 266
515 09:46:38.902183 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 09:46:38.902668 LPDDR4 probe
517 09:46:38.903075 ddr clk to 1584MHz
518 09:46:38.910095 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 09:46:38.947426
520 09:46:38.947957 dmc_version 0001
521 09:46:38.954110 Check phy result
522 09:46:38.960008 INFO : End of CA training
523 09:46:38.960490 INFO : End of initialization
524 09:46:38.965595 INFO : Training has run successfully!
525 09:46:38.966064 Check phy result
526 09:46:38.971166 INFO : End of initialization
527 09:46:38.971655 INFO : End of read enable training
528 09:46:38.976762 INFO : End of fine write leveling
529 09:46:38.982393 INFO : End of Write leveling coarse delay
530 09:46:38.982879 INFO : Training has run successfully!
531 09:46:38.983290 Check phy result
532 09:46:38.988065 INFO : End of initialization
533 09:46:38.988578 INFO : End of read dq deskew training
534 09:46:38.993566 INFO : End of MPR read delay center optimization
535 09:46:38.999145 INFO : End of write delay center optimization
536 09:46:39.004798 INFO : End of read delay center optimization
537 09:46:39.005289 INFO : End of max read latency training
538 09:46:39.010446 INFO : Training has run successfully!
539 09:46:39.010927 1D training succeed
540 09:46:39.019610 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 09:46:39.067160 Check phy result
542 09:46:39.067759 INFO : End of initialization
543 09:46:39.089669 INFO : End of 2D read delay Voltage center optimization
544 09:46:39.108960 INFO : End of 2D read delay Voltage center optimization
545 09:46:39.162025 INFO : End of 2D write delay Voltage center optimization
546 09:46:39.211371 INFO : End of 2D write delay Voltage center optimization
547 09:46:39.216964 INFO : Training has run successfully!
548 09:46:39.217454
549 09:46:39.217893 channel==0
550 09:46:39.222639 RxClkDly_Margin_A0==88 ps 9
551 09:46:39.223125 TxDqDly_Margin_A0==98 ps 10
552 09:46:39.228116 RxClkDly_Margin_A1==88 ps 9
553 09:46:39.228608 TxDqDly_Margin_A1==98 ps 10
554 09:46:39.229175 TrainedVREFDQ_A0==74
555 09:46:39.233768 TrainedVREFDQ_A1==75
556 09:46:39.234260 VrefDac_Margin_A0==24
557 09:46:39.234673 DeviceVref_Margin_A0==40
558 09:46:39.239395 VrefDac_Margin_A1==24
559 09:46:39.239871 DeviceVref_Margin_A1==39
560 09:46:39.240331
561 09:46:39.240742
562 09:46:39.244956 channel==1
563 09:46:39.245417 RxClkDly_Margin_A0==98 ps 10
564 09:46:39.245822 TxDqDly_Margin_A0==98 ps 10
565 09:46:39.250637 RxClkDly_Margin_A1==88 ps 9
566 09:46:39.251108 TxDqDly_Margin_A1==88 ps 9
567 09:46:39.256188 TrainedVREFDQ_A0==76
568 09:46:39.256663 TrainedVREFDQ_A1==77
569 09:46:39.257077 VrefDac_Margin_A0==22
570 09:46:39.261758 DeviceVref_Margin_A0==38
571 09:46:39.262236 VrefDac_Margin_A1==24
572 09:46:39.267400 DeviceVref_Margin_A1==37
573 09:46:39.267874
574 09:46:39.268322 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 09:46:39.268729
576 09:46:39.300914 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 09:46:39.301472 2D training succeed
578 09:46:39.306669 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 09:46:39.312159 auto size-- 65535DDR cs0 size: 2048MB
580 09:46:39.312647 DDR cs1 size: 2048MB
581 09:46:39.317757 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 09:46:39.318237 cs0 DataBus test pass
583 09:46:39.323391 cs1 DataBus test pass
584 09:46:39.323874 cs0 AddrBus test pass
585 09:46:39.324337 cs1 AddrBus test pass
586 09:46:39.324743
587 09:46:39.328935 100bdlr_step_size ps== 420
588 09:46:39.329426 result report
589 09:46:39.334616 boot times 0Enable ddr reg access
590 09:46:39.339875 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 09:46:39.353422 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 09:46:39.927351 0.0;M3 CHK:0;cm4_sp_mode 0
593 09:46:39.927757 MVN_1=0x00000000
594 09:46:39.932663 MVN_2=0x00000000
595 09:46:39.938401 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 09:46:39.938785 OPS=0x10
597 09:46:39.939004 ring efuse init
598 09:46:39.939213 chipver efuse init
599 09:46:39.943927 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 09:46:39.949674 [0.018961 Inits done]
601 09:46:39.949957 secure task start!
602 09:46:39.950162 high task start!
603 09:46:39.953601 low task start!
604 09:46:39.953937 run into bl31
605 09:46:39.960755 NOTICE: BL31: v1.3(release):4fc40b1
606 09:46:39.968597 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 09:46:39.969117 NOTICE: BL31: G12A normal boot!
608 09:46:39.993737 NOTICE: BL31: BL33 decompress pass
609 09:46:39.999597 ERROR: Error initializing runtime service opteed_fast
610 09:46:41.232636
611 09:46:41.233059
612 09:46:41.240905 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 09:46:41.241181
614 09:46:41.241392 Model: Libre Computer AML-A311D-CC Alta
615 09:46:41.449319 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 09:46:41.472832 DRAM: 2 GiB (effective 3.8 GiB)
617 09:46:41.615514 Core: 408 devices, 31 uclasses, devicetree: separate
618 09:46:41.621541 WDT: Not starting watchdog@f0d0
619 09:46:41.653783 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 09:46:41.666270 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 09:46:41.671290 ** Bad device specification mmc 0 **
622 09:46:41.681589 Card did not respond to voltage select! : -110
623 09:46:41.689203 ** Bad device specification mmc 0 **
624 09:46:41.689668 Couldn't find partition mmc 0
625 09:46:41.697584 Card did not respond to voltage select! : -110
626 09:46:41.703211 ** Bad device specification mmc 0 **
627 09:46:41.703731 Couldn't find partition mmc 0
628 09:46:41.708211 Error: could not access storage.
629 09:46:42.050710 Net: eth0: ethernet@ff3f0000
630 09:46:42.051331 starting USB...
631 09:46:42.302350 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 09:46:42.302779 Starting the controller
633 09:46:42.309477 USB XHCI 1.10
634 09:46:44.020533 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 09:46:44.021205 bl2_stage_init 0x01
636 09:46:44.021649 bl2_stage_init 0x81
637 09:46:44.026163 hw id: 0x0000 - pwm id 0x01
638 09:46:44.026873 bl2_stage_init 0xc1
639 09:46:44.027344 bl2_stage_init 0x02
640 09:46:44.027758
641 09:46:44.031687 L0:00000000
642 09:46:44.032228 L1:20000703
643 09:46:44.032644 L2:00008067
644 09:46:44.033046 L3:14000000
645 09:46:44.037414 B2:00402000
646 09:46:44.037921 B1:e0f83180
647 09:46:44.038328
648 09:46:44.038731 TE: 58159
649 09:46:44.039137
650 09:46:44.042815 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 09:46:44.043312
652 09:46:44.043730 Board ID = 1
653 09:46:44.048419 Set A53 clk to 24M
654 09:46:44.048902 Set A73 clk to 24M
655 09:46:44.049309 Set clk81 to 24M
656 09:46:44.054116 A53 clk: 1200 MHz
657 09:46:44.054724 A73 clk: 1200 MHz
658 09:46:44.055149 CLK81: 166.6M
659 09:46:44.055573 smccc: 00012ab4
660 09:46:44.059590 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 09:46:44.065303 board id: 1
662 09:46:44.071180 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 09:46:44.081814 fw parse done
664 09:46:44.086913 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 09:46:44.130345 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 09:46:44.141298 PIEI prepare done
667 09:46:44.141720 fastboot data load
668 09:46:44.141938 fastboot data verify
669 09:46:44.146949 verify result: 266
670 09:46:44.152527 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 09:46:44.152912 LPDDR4 probe
672 09:46:44.153141 ddr clk to 1584MHz
673 09:46:44.160668 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 09:46:44.197850
675 09:46:44.198477 dmc_version 0001
676 09:46:44.204440 Check phy result
677 09:46:44.210355 INFO : End of CA training
678 09:46:44.210919 INFO : End of initialization
679 09:46:44.215918 INFO : Training has run successfully!
680 09:46:44.216498 Check phy result
681 09:46:44.221503 INFO : End of initialization
682 09:46:44.222016 INFO : End of read enable training
683 09:46:44.224777 INFO : End of fine write leveling
684 09:46:44.230400 INFO : End of Write leveling coarse delay
685 09:46:44.235971 INFO : Training has run successfully!
686 09:46:44.236536 Check phy result
687 09:46:44.236955 INFO : End of initialization
688 09:46:44.241638 INFO : End of read dq deskew training
689 09:46:44.244955 INFO : End of MPR read delay center optimization
690 09:46:44.250648 INFO : End of write delay center optimization
691 09:46:44.256282 INFO : End of read delay center optimization
692 09:46:44.256914 INFO : End of max read latency training
693 09:46:44.261744 INFO : Training has run successfully!
694 09:46:44.262300 1D training succeed
695 09:46:44.269029 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 09:46:44.317649 Check phy result
697 09:46:44.318270 INFO : End of initialization
698 09:46:44.339073 INFO : End of 2D read delay Voltage center optimization
699 09:46:44.359290 INFO : End of 2D read delay Voltage center optimization
700 09:46:44.411170 INFO : End of 2D write delay Voltage center optimization
701 09:46:44.460388 INFO : End of 2D write delay Voltage center optimization
702 09:46:44.465881 INFO : Training has run successfully!
703 09:46:44.466484
704 09:46:44.466835 channel==0
705 09:46:44.471591 RxClkDly_Margin_A0==88 ps 9
706 09:46:44.472026 TxDqDly_Margin_A0==98 ps 10
707 09:46:44.474881 RxClkDly_Margin_A1==88 ps 9
708 09:46:44.475216 TxDqDly_Margin_A1==98 ps 10
709 09:46:44.480560 TrainedVREFDQ_A0==74
710 09:46:44.481183 TrainedVREFDQ_A1==74
711 09:46:44.481610 VrefDac_Margin_A0==25
712 09:46:44.486051 DeviceVref_Margin_A0==40
713 09:46:44.486482 VrefDac_Margin_A1==25
714 09:46:44.491738 DeviceVref_Margin_A1==40
715 09:46:44.492360
716 09:46:44.492751
717 09:46:44.493009 channel==1
718 09:46:44.493226 RxClkDly_Margin_A0==98 ps 10
719 09:46:44.495172 TxDqDly_Margin_A0==88 ps 9
720 09:46:44.500629 RxClkDly_Margin_A1==98 ps 10
721 09:46:44.501232 TxDqDly_Margin_A1==88 ps 9
722 09:46:44.501621 TrainedVREFDQ_A0==77
723 09:46:44.506233 TrainedVREFDQ_A1==77
724 09:46:44.506623 VrefDac_Margin_A0==22
725 09:46:44.511902 DeviceVref_Margin_A0==37
726 09:46:44.512479 VrefDac_Margin_A1==24
727 09:46:44.512891 DeviceVref_Margin_A1==37
728 09:46:44.513142
729 09:46:44.520918 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 09:46:44.521343
731 09:46:44.546774 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
732 09:46:44.552450 2D training succeed
733 09:46:44.557952 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 09:46:44.558308 auto size-- 65535DDR cs0 size: 2048MB
735 09:46:44.563435 DDR cs1 size: 2048MB
736 09:46:44.563937 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 09:46:44.569109 cs0 DataBus test pass
738 09:46:44.569464 cs1 DataBus test pass
739 09:46:44.574628 cs0 AddrBus test pass
740 09:46:44.575115 cs1 AddrBus test pass
741 09:46:44.575474
742 09:46:44.575738 100bdlr_step_size ps== 420
743 09:46:44.580349 result report
744 09:46:44.580823 boot times 0Enable ddr reg access
745 09:46:44.588718 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 09:46:44.602174 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 09:46:45.174152 0.0;M3 CHK:0;cm4_sp_mode 0
748 09:46:45.174588 MVN_1=0x00000000
749 09:46:45.179596 MVN_2=0x00000000
750 09:46:45.185368 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 09:46:45.185712 OPS=0x10
752 09:46:45.185938 ring efuse init
753 09:46:45.186147 chipver efuse init
754 09:46:45.193566 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 09:46:45.193900 [0.018961 Inits done]
756 09:46:45.201158 secure task start!
757 09:46:45.201491 high task start!
758 09:46:45.201711 low task start!
759 09:46:45.201922 run into bl31
760 09:46:45.207811 NOTICE: BL31: v1.3(release):4fc40b1
761 09:46:45.215628 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 09:46:45.216021 NOTICE: BL31: G12A normal boot!
763 09:46:45.240997 NOTICE: BL31: BL33 decompress pass
764 09:46:45.246664 ERROR: Error initializing runtime service opteed_fast
765 09:46:46.479652
766 09:46:46.480145
767 09:46:46.488060 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 09:46:46.488568
769 09:46:46.488927 Model: Libre Computer AML-A311D-CC Alta
770 09:46:46.696479 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 09:46:46.719890 DRAM: 2 GiB (effective 3.8 GiB)
772 09:46:46.862879 Core: 408 devices, 31 uclasses, devicetree: separate
773 09:46:46.868705 WDT: Not starting watchdog@f0d0
774 09:46:46.901015 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 09:46:46.913561 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 09:46:46.917448 ** Bad device specification mmc 0 **
777 09:46:46.928778 Card did not respond to voltage select! : -110
778 09:46:46.936440 ** Bad device specification mmc 0 **
779 09:46:46.936804 Couldn't find partition mmc 0
780 09:46:46.944758 Card did not respond to voltage select! : -110
781 09:46:46.950305 ** Bad device specification mmc 0 **
782 09:46:46.950812 Couldn't find partition mmc 0
783 09:46:46.955363 Error: could not access storage.
784 09:46:47.296901 Net: eth0: ethernet@ff3f0000
785 09:46:47.297302 starting USB...
786 09:46:47.549704 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 09:46:47.550283 Starting the controller
788 09:46:47.556540 USB XHCI 1.10
789 09:46:49.720582 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 09:46:49.721206 bl2_stage_init 0x01
791 09:46:49.721636 bl2_stage_init 0x81
792 09:46:49.726195 hw id: 0x0000 - pwm id 0x01
793 09:46:49.726705 bl2_stage_init 0xc1
794 09:46:49.727124 bl2_stage_init 0x02
795 09:46:49.727535
796 09:46:49.731841 L0:00000000
797 09:46:49.732380 L1:20000703
798 09:46:49.732803 L2:00008067
799 09:46:49.733213 L3:14000000
800 09:46:49.734712 B2:00402000
801 09:46:49.735191 B1:e0f83180
802 09:46:49.735601
803 09:46:49.736038 TE: 58159
804 09:46:49.736449
805 09:46:49.745845 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 09:46:49.746375
807 09:46:49.746794 Board ID = 1
808 09:46:49.747193 Set A53 clk to 24M
809 09:46:49.747588 Set A73 clk to 24M
810 09:46:49.751463 Set clk81 to 24M
811 09:46:49.751951 A53 clk: 1200 MHz
812 09:46:49.752401 A73 clk: 1200 MHz
813 09:46:49.754942 CLK81: 166.6M
814 09:46:49.755419 smccc: 00012ab5
815 09:46:49.760499 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 09:46:49.766090 board id: 1
817 09:46:49.771307 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 09:46:49.782012 fw parse done
819 09:46:49.787010 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 09:46:49.830429 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 09:46:49.841377 PIEI prepare done
822 09:46:49.841890 fastboot data load
823 09:46:49.842308 fastboot data verify
824 09:46:49.846953 verify result: 266
825 09:46:49.852556 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 09:46:49.853071 LPDDR4 probe
827 09:46:49.853495 ddr clk to 1584MHz
828 09:46:49.860493 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 09:46:49.897824
830 09:46:49.898360 dmc_version 0001
831 09:46:49.904031 Check phy result
832 09:46:49.910345 INFO : End of CA training
833 09:46:49.910847 INFO : End of initialization
834 09:46:49.916030 INFO : Training has run successfully!
835 09:46:49.916529 Check phy result
836 09:46:49.921551 INFO : End of initialization
837 09:46:49.922035 INFO : End of read enable training
838 09:46:49.927193 INFO : End of fine write leveling
839 09:46:49.932786 INFO : End of Write leveling coarse delay
840 09:46:49.933274 INFO : Training has run successfully!
841 09:46:49.933683 Check phy result
842 09:46:49.938440 INFO : End of initialization
843 09:46:49.938948 INFO : End of read dq deskew training
844 09:46:49.943941 INFO : End of MPR read delay center optimization
845 09:46:49.949566 INFO : End of write delay center optimization
846 09:46:49.955134 INFO : End of read delay center optimization
847 09:46:49.955621 INFO : End of max read latency training
848 09:46:49.960723 INFO : Training has run successfully!
849 09:46:49.961208 1D training succeed
850 09:46:49.969887 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 09:46:50.017573 Check phy result
852 09:46:50.018116 INFO : End of initialization
853 09:46:50.039231 INFO : End of 2D read delay Voltage center optimization
854 09:46:50.059352 INFO : End of 2D read delay Voltage center optimization
855 09:46:50.111228 INFO : End of 2D write delay Voltage center optimization
856 09:46:50.160465 INFO : End of 2D write delay Voltage center optimization
857 09:46:50.166064 INFO : Training has run successfully!
858 09:46:50.166550
859 09:46:50.166972 channel==0
860 09:46:50.171670 RxClkDly_Margin_A0==88 ps 9
861 09:46:50.172193 TxDqDly_Margin_A0==98 ps 10
862 09:46:50.177363 RxClkDly_Margin_A1==88 ps 9
863 09:46:50.177845 TxDqDly_Margin_A1==98 ps 10
864 09:46:50.178274 TrainedVREFDQ_A0==74
865 09:46:50.182857 TrainedVREFDQ_A1==74
866 09:46:50.183379 VrefDac_Margin_A0==25
867 09:46:50.183792 DeviceVref_Margin_A0==40
868 09:46:50.188394 VrefDac_Margin_A1==25
869 09:46:50.188891 DeviceVref_Margin_A1==40
870 09:46:50.189281
871 09:46:50.189671
872 09:46:50.194035 channel==1
873 09:46:50.194513 RxClkDly_Margin_A0==98 ps 10
874 09:46:50.194909 TxDqDly_Margin_A0==98 ps 10
875 09:46:50.199631 RxClkDly_Margin_A1==88 ps 9
876 09:46:50.200133 TxDqDly_Margin_A1==88 ps 9
877 09:46:50.205460 TrainedVREFDQ_A0==77
878 09:46:50.205951 TrainedVREFDQ_A1==77
879 09:46:50.206348 VrefDac_Margin_A0==22
880 09:46:50.210737 DeviceVref_Margin_A0==37
881 09:46:50.211215 VrefDac_Margin_A1==24
882 09:46:50.216484 DeviceVref_Margin_A1==37
883 09:46:50.216963
884 09:46:50.217363 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 09:46:50.217750
886 09:46:50.249838 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000018 00000018 00000016 00000018 00000015 00000018 00000018 00000018 00000018 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
887 09:46:50.250404 2D training succeed
888 09:46:50.255482 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 09:46:50.261145 auto size-- 65535DDR cs0 size: 2048MB
890 09:46:50.261626 DDR cs1 size: 2048MB
891 09:46:50.266620 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 09:46:50.267112 cs0 DataBus test pass
893 09:46:50.272280 cs1 DataBus test pass
894 09:46:50.272748 cs0 AddrBus test pass
895 09:46:50.273142 cs1 AddrBus test pass
896 09:46:50.273529
897 09:46:50.277932 100bdlr_step_size ps== 420
898 09:46:50.278421 result report
899 09:46:50.283509 boot times 0Enable ddr reg access
900 09:46:50.288828 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 09:46:50.302238 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 09:46:50.874183 0.0;M3 CHK:0;cm4_sp_mode 0
903 09:46:50.874619 MVN_1=0x00000000
904 09:46:50.879759 MVN_2=0x00000000
905 09:46:50.885502 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 09:46:50.885941 OPS=0x10
907 09:46:50.886310 ring efuse init
908 09:46:50.886577 chipver efuse init
909 09:46:50.893711 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 09:46:50.894051 [0.018961 Inits done]
911 09:46:50.901301 secure task start!
912 09:46:50.901743 high task start!
913 09:46:50.902102 low task start!
914 09:46:50.902461 run into bl31
915 09:46:50.907922 NOTICE: BL31: v1.3(release):4fc40b1
916 09:46:50.915723 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 09:46:50.916218 NOTICE: BL31: G12A normal boot!
918 09:46:50.941316 NOTICE: BL31: BL33 decompress pass
919 09:46:50.946782 ERROR: Error initializing runtime service opteed_fast
920 09:46:52.179681
921 09:46:52.180333
922 09:46:52.188171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 09:46:52.188549
924 09:46:52.188799 Model: Libre Computer AML-A311D-CC Alta
925 09:46:52.396494 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 09:46:52.419888 DRAM: 2 GiB (effective 3.8 GiB)
927 09:46:52.562878 Core: 408 devices, 31 uclasses, devicetree: separate
928 09:46:52.568755 WDT: Not starting watchdog@f0d0
929 09:46:52.601051 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 09:46:52.613489 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 09:46:52.617506 ** Bad device specification mmc 0 **
932 09:46:52.628823 Card did not respond to voltage select! : -110
933 09:46:52.636471 ** Bad device specification mmc 0 **
934 09:46:52.636813 Couldn't find partition mmc 0
935 09:46:52.644789 Card did not respond to voltage select! : -110
936 09:46:52.650383 ** Bad device specification mmc 0 **
937 09:46:52.650700 Couldn't find partition mmc 0
938 09:46:52.655467 Error: could not access storage.
939 09:46:52.997889 Net: eth0: ethernet@ff3f0000
940 09:46:52.998512 starting USB...
941 09:46:53.249521 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 09:46:53.249940 Starting the controller
943 09:46:53.256589 USB XHCI 1.10
944 09:46:54.810787 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 09:46:54.819076 scanning usb for storage devices... 0 Storage Device(s) found
947 09:46:54.870852 Hit any key to stop autoboot: 1
948 09:46:54.871956 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 09:46:54.872642 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 09:46:54.873123 Setting prompt string to ['=>']
951 09:46:54.873605 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 09:46:54.886538 0
953 09:46:54.887551 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 09:46:54.888077 Sending with 10 millisecond of delay
956 09:46:56.026019 => setenv autoload no
957 09:46:56.037869 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 09:46:56.040624 setenv autoload no
959 09:46:56.041169 Sending with 10 millisecond of delay
961 09:46:57.837933 => setenv initrd_high 0xffffffff
962 09:46:57.848688 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 09:46:57.849250 setenv initrd_high 0xffffffff
964 09:46:57.849732 Sending with 10 millisecond of delay
966 09:46:59.465514 => setenv fdt_high 0xffffffff
967 09:46:59.476259 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 09:46:59.476818 setenv fdt_high 0xffffffff
969 09:46:59.477297 Sending with 10 millisecond of delay
971 09:46:59.768909 => dhcp
972 09:46:59.779659 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 09:46:59.780342 dhcp
974 09:46:59.780608 Speed: 1000, full duplex
975 09:46:59.780818 BOOTP broadcast 1
976 09:47:00.027268 BOOTP broadcast 2
977 09:47:00.038542 DHCP client bound to address 192.168.6.33 (260 ms)
978 09:47:00.039230 Sending with 10 millisecond of delay
980 09:47:01.715260 => setenv serverip 192.168.6.2
981 09:47:01.728810 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
982 09:47:01.729408 setenv serverip 192.168.6.2
983 09:47:01.729869 Sending with 10 millisecond of delay
985 09:47:05.456496 => tftpboot 0x01080000 684944/tftp-deploy-m6b_anoi/kernel/uImage
986 09:47:05.470798 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
987 09:47:05.471763 tftpboot 0x01080000 684944/tftp-deploy-m6b_anoi/kernel/uImage
988 09:47:05.472301 Speed: 1000, full duplex
989 09:47:05.472783 Using ethernet@ff3f0000 device
990 09:47:05.476341 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
991 09:47:05.479153 Filename '684944/tftp-deploy-m6b_anoi/kernel/uImage'.
992 09:47:05.483070 Load address: 0x1080000
993 09:47:09.721838 Loading: *################################################## 63 MiB
994 09:47:09.722585 14.8 MiB/s
995 09:47:09.723120 done
996 09:47:09.725680 Bytes transferred = 66032192 (3ef9240 hex)
997 09:47:09.726661 Sending with 10 millisecond of delay
999 09:47:14.423411 => tftpboot 0x08000000 684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
1000 09:47:14.434330 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
1001 09:47:14.434985 tftpboot 0x08000000 684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot
1002 09:47:14.435248 Speed: 1000, full duplex
1003 09:47:14.435470 Using ethernet@ff3f0000 device
1004 09:47:14.437185 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1005 09:47:14.449139 Filename '684944/tftp-deploy-m6b_anoi/ramdisk/ramdisk.cpio.gz.uboot'.
1006 09:47:14.449544 Load address: 0x8000000
1007 09:47:16.749137 Loading: *################################################# UDP wrong checksum 00000007 00006f3b
1008 09:47:21.751702 T UDP wrong checksum 00000007 00006f3b
1009 09:47:31.753529 T T UDP wrong checksum 00000007 00006f3b
1010 09:47:43.042240 T T UDP wrong checksum 000000ff 0000bf5c
1011 09:47:43.092344 UDP wrong checksum 000000ff 0000584f
1012 09:47:51.757181 T UDP wrong checksum 00000007 00006f3b
1013 09:47:56.063562 T UDP wrong checksum 000000ff 0000be70
1014 09:47:56.085069 UDP wrong checksum 000000ff 00004363
1015 09:48:11.617141 T T T UDP wrong checksum 000000ff 00006d67
1016 09:48:11.645069 UDP wrong checksum 000000ff 0000fd59
1017 09:48:11.763720
1018 09:48:11.764382 Retry count exceeded; starting again
1020 09:48:11.765798 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
1023 09:48:11.767599 end: 2.4 uboot-commands (duration 00:01:49) [common]
1025 09:48:11.769154 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1027 09:48:11.770179 end: 2 uboot-action (duration 00:01:49) [common]
1029 09:48:11.771711 Cleaning after the job
1030 09:48:11.772330 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/ramdisk
1031 09:48:11.773664 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/kernel
1032 09:48:11.819454 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/dtb
1033 09:48:11.820388 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/nfsrootfs
1034 09:48:11.854543 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684944/tftp-deploy-m6b_anoi/modules
1035 09:48:11.863075 start: 4.1 power-off (timeout 00:00:30) [common]
1036 09:48:11.863738 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1037 09:48:11.894854 >> OK - accepted request
1038 09:48:11.896943 Returned 0 in 0 seconds
1039 09:48:11.998036 end: 4.1 power-off (duration 00:00:00) [common]
1041 09:48:11.999251 start: 4.2 read-feedback (timeout 00:10:00) [common]
1042 09:48:11.999942 Listened to connection for namespace 'common' for up to 1s
1043 09:48:13.000496 Finalising connection for namespace 'common'
1044 09:48:13.001247 Disconnecting from shell: Finalise
1045 09:48:13.001554 =>
1046 09:48:13.102357 end: 4.2 read-feedback (duration 00:00:01) [common]
1047 09:48:13.103111 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/684944
1048 09:48:14.698827 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/684944
1049 09:48:14.699455 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.