Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:04:56.390149 lava-dispatcher, installed at version: 2024.01
2 09:04:56.390978 start: 0 validate
3 09:04:56.391490 Start time: 2024-09-01 09:04:56.391456+00:00 (UTC)
4 09:04:56.392086 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:04:56.392648 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:04:56.431636 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:04:56.432187 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:04:56.460194 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:04:56.460831 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:04:56.491893 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:04:56.492487 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:04:56.522289 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:04:56.522908 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:04:56.560764 validate duration: 0.17
16 09:04:56.561669 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:04:56.562013 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:04:56.562337 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:04:56.562927 Not decompressing ramdisk as can be used compressed.
20 09:04:56.563385 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 09:04:56.563667 saving as /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/ramdisk/initrd.cpio.gz
22 09:04:56.563956 total size: 5628182 (5 MB)
23 09:04:56.597294 progress 0 % (0 MB)
24 09:04:56.601642 progress 5 % (0 MB)
25 09:04:56.606105 progress 10 % (0 MB)
26 09:04:56.609907 progress 15 % (0 MB)
27 09:04:56.614480 progress 20 % (1 MB)
28 09:04:56.618398 progress 25 % (1 MB)
29 09:04:56.622698 progress 30 % (1 MB)
30 09:04:56.626963 progress 35 % (1 MB)
31 09:04:56.630863 progress 40 % (2 MB)
32 09:04:56.634999 progress 45 % (2 MB)
33 09:04:56.638861 progress 50 % (2 MB)
34 09:04:56.643218 progress 55 % (2 MB)
35 09:04:56.647393 progress 60 % (3 MB)
36 09:04:56.651225 progress 65 % (3 MB)
37 09:04:56.655505 progress 70 % (3 MB)
38 09:04:56.659524 progress 75 % (4 MB)
39 09:04:56.663858 progress 80 % (4 MB)
40 09:04:56.667602 progress 85 % (4 MB)
41 09:04:56.671700 progress 90 % (4 MB)
42 09:04:56.675695 progress 95 % (5 MB)
43 09:04:56.679275 progress 100 % (5 MB)
44 09:04:56.680002 5 MB downloaded in 0.12 s (46.27 MB/s)
45 09:04:56.680613 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:04:56.681605 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:04:56.681945 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:04:56.682272 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:04:56.683125 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/kernel/Image
51 09:04:56.683437 saving as /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/kernel/Image
52 09:04:56.683667 total size: 45308416 (43 MB)
53 09:04:56.683920 No compression specified
54 09:04:56.720492 progress 0 % (0 MB)
55 09:04:56.750449 progress 5 % (2 MB)
56 09:04:56.779847 progress 10 % (4 MB)
57 09:04:56.809819 progress 15 % (6 MB)
58 09:04:56.840328 progress 20 % (8 MB)
59 09:04:56.870233 progress 25 % (10 MB)
60 09:04:56.898367 progress 30 % (12 MB)
61 09:04:56.928098 progress 35 % (15 MB)
62 09:04:56.960289 progress 40 % (17 MB)
63 09:04:56.991604 progress 45 % (19 MB)
64 09:04:57.020938 progress 50 % (21 MB)
65 09:04:57.049550 progress 55 % (23 MB)
66 09:04:57.077288 progress 60 % (25 MB)
67 09:04:57.105186 progress 65 % (28 MB)
68 09:04:57.133357 progress 70 % (30 MB)
69 09:04:57.162094 progress 75 % (32 MB)
70 09:04:57.192388 progress 80 % (34 MB)
71 09:04:57.220762 progress 85 % (36 MB)
72 09:04:57.249141 progress 90 % (38 MB)
73 09:04:57.277272 progress 95 % (41 MB)
74 09:04:57.304899 progress 100 % (43 MB)
75 09:04:57.305635 43 MB downloaded in 0.62 s (69.47 MB/s)
76 09:04:57.306136 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:04:57.307015 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:04:57.307310 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:04:57.307594 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:04:57.308119 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:04:57.308392 saving as /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:04:57.308611 total size: 54667 (0 MB)
84 09:04:57.308834 No compression specified
85 09:04:57.349190 progress 59 % (0 MB)
86 09:04:57.350063 progress 100 % (0 MB)
87 09:04:57.350667 0 MB downloaded in 0.04 s (1.24 MB/s)
88 09:04:57.351206 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:04:57.352185 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:04:57.352494 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:04:57.352823 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:04:57.353347 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 09:04:57.353636 saving as /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/nfsrootfs/full.rootfs.tar
95 09:04:57.353874 total size: 107552908 (102 MB)
96 09:04:57.354108 Using unxz to decompress xz
97 09:04:57.395596 progress 0 % (0 MB)
98 09:04:58.070063 progress 5 % (5 MB)
99 09:04:58.796188 progress 10 % (10 MB)
100 09:04:59.527224 progress 15 % (15 MB)
101 09:05:00.303525 progress 20 % (20 MB)
102 09:05:00.876112 progress 25 % (25 MB)
103 09:05:01.496635 progress 30 % (30 MB)
104 09:05:02.235329 progress 35 % (35 MB)
105 09:05:02.582724 progress 40 % (41 MB)
106 09:05:03.006916 progress 45 % (46 MB)
107 09:05:03.697532 progress 50 % (51 MB)
108 09:05:04.377127 progress 55 % (56 MB)
109 09:05:05.127808 progress 60 % (61 MB)
110 09:05:05.876875 progress 65 % (66 MB)
111 09:05:06.610939 progress 70 % (71 MB)
112 09:05:07.408687 progress 75 % (76 MB)
113 09:05:08.088662 progress 80 % (82 MB)
114 09:05:08.793866 progress 85 % (87 MB)
115 09:05:09.531908 progress 90 % (92 MB)
116 09:05:10.257622 progress 95 % (97 MB)
117 09:05:11.002314 progress 100 % (102 MB)
118 09:05:11.014388 102 MB downloaded in 13.66 s (7.51 MB/s)
119 09:05:11.015026 end: 1.4.1 http-download (duration 00:00:14) [common]
121 09:05:11.015920 end: 1.4 download-retry (duration 00:00:14) [common]
122 09:05:11.016252 start: 1.5 download-retry (timeout 00:09:46) [common]
123 09:05:11.016537 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 09:05:11.017027 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/modules.tar.xz
125 09:05:11.017295 saving as /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/modules/modules.tar
126 09:05:11.017507 total size: 11499436 (10 MB)
127 09:05:11.017727 Using unxz to decompress xz
128 09:05:11.054702 progress 0 % (0 MB)
129 09:05:11.133761 progress 5 % (0 MB)
130 09:05:11.241422 progress 10 % (1 MB)
131 09:05:11.328616 progress 15 % (1 MB)
132 09:05:11.421382 progress 20 % (2 MB)
133 09:05:11.495886 progress 25 % (2 MB)
134 09:05:11.575811 progress 30 % (3 MB)
135 09:05:11.650290 progress 35 % (3 MB)
136 09:05:11.733752 progress 40 % (4 MB)
137 09:05:11.813070 progress 45 % (4 MB)
138 09:05:11.894289 progress 50 % (5 MB)
139 09:05:11.981678 progress 55 % (6 MB)
140 09:05:12.056536 progress 60 % (6 MB)
141 09:05:12.145179 progress 65 % (7 MB)
142 09:05:12.225424 progress 70 % (7 MB)
143 09:05:12.314019 progress 75 % (8 MB)
144 09:05:12.422846 progress 80 % (8 MB)
145 09:05:12.524999 progress 85 % (9 MB)
146 09:05:12.598066 progress 90 % (9 MB)
147 09:05:12.684960 progress 95 % (10 MB)
148 09:05:12.760018 progress 100 % (10 MB)
149 09:05:12.774728 10 MB downloaded in 1.76 s (6.24 MB/s)
150 09:05:12.775412 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:05:12.776577 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:05:12.777133 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 09:05:12.777662 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 09:05:22.852763 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/684531/extract-nfsrootfs-3k66tcsg
156 09:05:22.853389 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 09:05:22.853679 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 09:05:22.854308 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv
159 09:05:22.855774 makedir: /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin
160 09:05:22.856399 makedir: /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/tests
161 09:05:22.857125 makedir: /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/results
162 09:05:22.857553 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-add-keys
163 09:05:22.858480 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-add-sources
164 09:05:22.859128 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-background-process-start
165 09:05:22.860169 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-background-process-stop
166 09:05:22.861296 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-common-functions
167 09:05:22.862760 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-echo-ipv4
168 09:05:22.863641 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-install-packages
169 09:05:22.864505 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-installed-packages
170 09:05:22.865708 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-os-build
171 09:05:22.866892 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-probe-channel
172 09:05:22.867917 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-probe-ip
173 09:05:22.869133 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-target-ip
174 09:05:22.870102 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-target-mac
175 09:05:22.871451 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-target-storage
176 09:05:22.872311 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-case
177 09:05:22.873799 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-event
178 09:05:22.874576 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-feedback
179 09:05:22.875262 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-raise
180 09:05:22.875870 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-reference
181 09:05:22.876539 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-runner
182 09:05:22.877374 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-set
183 09:05:22.878562 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-test-shell
184 09:05:22.879285 Updating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-install-packages (oe)
185 09:05:22.880046 Updating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/bin/lava-installed-packages (oe)
186 09:05:22.880682 Creating /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/environment
187 09:05:22.881181 LAVA metadata
188 09:05:22.881501 - LAVA_JOB_ID=684531
189 09:05:22.881730 - LAVA_DISPATCHER_IP=192.168.6.2
190 09:05:22.882139 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 09:05:22.883695 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 09:05:22.884157 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 09:05:22.884421 skipped lava-vland-overlay
194 09:05:22.884682 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 09:05:22.884951 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 09:05:22.885185 skipped lava-multinode-overlay
197 09:05:22.885437 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 09:05:22.885697 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 09:05:22.885969 Loading test definitions
200 09:05:22.886277 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 09:05:22.886520 Using /lava-684531 at stage 0
202 09:05:22.888053 uuid=684531_1.6.2.4.1 testdef=None
203 09:05:22.888488 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 09:05:22.888779 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 09:05:22.891313 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 09:05:22.892246 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 09:05:22.895056 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 09:05:22.896037 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 09:05:22.898640 runner path: /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/0/tests/0_dmesg test_uuid 684531_1.6.2.4.1
212 09:05:22.899383 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 09:05:22.900247 Creating lava-test-runner.conf files
215 09:05:22.900459 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/684531/lava-overlay-lag3ehbv/lava-684531/0 for stage 0
216 09:05:22.900833 - 0_dmesg
217 09:05:22.901236 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 09:05:22.901540 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 09:05:22.925444 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 09:05:22.925928 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 09:05:22.926201 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 09:05:22.926477 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 09:05:22.926750 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 09:05:23.756051 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 09:05:23.756522 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 09:05:23.756792 extracting modules file /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684531/extract-nfsrootfs-3k66tcsg
227 09:05:25.361613 extracting modules file /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk
228 09:05:26.787954 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 09:05:26.788459 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 09:05:26.788738 [common] Applying overlay to NFS
231 09:05:26.788951 [common] Applying overlay /var/lib/lava/dispatcher/tmp/684531/compress-overlay-gxh5emju/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/684531/extract-nfsrootfs-3k66tcsg
232 09:05:26.819256 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 09:05:26.819705 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 09:05:26.819997 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 09:05:26.820244 Converting downloaded kernel to a uImage
236 09:05:26.820568 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/kernel/Image /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/kernel/uImage
237 09:05:27.272039 output: Image Name:
238 09:05:27.272462 output: Created: Sun Sep 1 09:05:26 2024
239 09:05:27.272672 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 09:05:27.272876 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
241 09:05:27.273076 output: Load Address: 01080000
242 09:05:27.273276 output: Entry Point: 01080000
243 09:05:27.273472 output:
244 09:05:27.273814 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 09:05:27.274089 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 09:05:27.274361 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 09:05:27.274617 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 09:05:27.274877 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 09:05:27.275137 Building ramdisk /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk
250 09:05:30.098647 >> 165160 blocks
251 09:05:37.871910 Adding RAMdisk u-boot header.
252 09:05:37.872651 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk.cpio.gz.uboot
253 09:05:38.113204 output: Image Name:
254 09:05:38.113600 output: Created: Sun Sep 1 09:05:37 2024
255 09:05:38.113812 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 09:05:38.114019 output: Data Size: 23258961 Bytes = 22713.83 KiB = 22.18 MiB
257 09:05:38.114220 output: Load Address: 00000000
258 09:05:38.114422 output: Entry Point: 00000000
259 09:05:38.114620 output:
260 09:05:38.115190 rename /var/lib/lava/dispatcher/tmp/684531/extract-overlay-ramdisk-qx62mmn2/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
261 09:05:38.115605 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 09:05:38.115892 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 09:05:38.116410 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
264 09:05:38.116915 No LXC device requested
265 09:05:38.117473 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 09:05:38.118035 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
267 09:05:38.118579 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 09:05:38.119031 Checking files for TFTP limit of 4294967296 bytes.
269 09:05:38.121985 end: 1 tftp-deploy (duration 00:00:42) [common]
270 09:05:38.122613 start: 2 uboot-action (timeout 00:05:00) [common]
271 09:05:38.123182 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 09:05:38.123726 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 09:05:38.124315 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 09:05:38.124888 Using kernel file from prepare-kernel: 684531/tftp-deploy-r_a5gpv9/kernel/uImage
275 09:05:38.125573 substitutions:
276 09:05:38.126025 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 09:05:38.126472 - {DTB_ADDR}: 0x01070000
278 09:05:38.126909 - {DTB}: 684531/tftp-deploy-r_a5gpv9/dtb/meson-g12b-a311d-libretech-cc.dtb
279 09:05:38.127348 - {INITRD}: 684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
280 09:05:38.127787 - {KERNEL_ADDR}: 0x01080000
281 09:05:38.128250 - {KERNEL}: 684531/tftp-deploy-r_a5gpv9/kernel/uImage
282 09:05:38.128685 - {LAVA_MAC}: None
283 09:05:38.129158 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/684531/extract-nfsrootfs-3k66tcsg
284 09:05:38.129600 - {NFS_SERVER_IP}: 192.168.6.2
285 09:05:38.130034 - {PRESEED_CONFIG}: None
286 09:05:38.130465 - {PRESEED_LOCAL}: None
287 09:05:38.130892 - {RAMDISK_ADDR}: 0x08000000
288 09:05:38.131316 - {RAMDISK}: 684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
289 09:05:38.131746 - {ROOT_PART}: None
290 09:05:38.132201 - {ROOT}: None
291 09:05:38.132631 - {SERVER_IP}: 192.168.6.2
292 09:05:38.133057 - {TEE_ADDR}: 0x83000000
293 09:05:38.133482 - {TEE}: None
294 09:05:38.133910 Parsed boot commands:
295 09:05:38.134326 - setenv autoload no
296 09:05:38.134750 - setenv initrd_high 0xffffffff
297 09:05:38.135171 - setenv fdt_high 0xffffffff
298 09:05:38.135592 - dhcp
299 09:05:38.136030 - setenv serverip 192.168.6.2
300 09:05:38.136451 - tftpboot 0x01080000 684531/tftp-deploy-r_a5gpv9/kernel/uImage
301 09:05:38.136876 - tftpboot 0x08000000 684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
302 09:05:38.137300 - tftpboot 0x01070000 684531/tftp-deploy-r_a5gpv9/dtb/meson-g12b-a311d-libretech-cc.dtb
303 09:05:38.137721 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/684531/extract-nfsrootfs-3k66tcsg,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 09:05:38.138155 - bootm 0x01080000 0x08000000 0x01070000
305 09:05:38.138695 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 09:05:38.140345 start: 2.3 connect-device (timeout 00:05:00) [common]
308 09:05:38.140805 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 09:05:38.155548 Setting prompt string to ['lava-test: # ']
310 09:05:38.157181 end: 2.3 connect-device (duration 00:00:00) [common]
311 09:05:38.157835 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 09:05:38.158438 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 09:05:38.159013 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 09:05:38.160266 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 09:05:38.197344 >> OK - accepted request
316 09:05:38.199458 Returned 0 in 0 seconds
317 09:05:38.300406 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 09:05:38.302118 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 09:05:38.302746 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 09:05:38.303307 Setting prompt string to ['Hit any key to stop autoboot']
322 09:05:38.303822 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 09:05:38.305600 Trying 192.168.56.21...
324 09:05:38.306124 Connected to conserv1.
325 09:05:38.306589 Escape character is '^]'.
326 09:05:38.307055
327 09:05:38.307521 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 09:05:38.308024
329 09:05:50.385554 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
330 09:05:50.386223 bl2_stage_init 0x81
331 09:05:50.391001 hw id: 0x0000 - pwm id 0x01
332 09:05:50.391577 bl2_stage_init 0xc1
333 09:05:50.392153 bl2_stage_init 0x02
334 09:05:50.392609
335 09:05:50.396574 L0:00000000
336 09:05:50.397047 L1:20000703
337 09:05:50.397484 L2:00008067
338 09:05:50.397935 L3:14000000
339 09:05:50.398375 B2:00402000
340 09:05:50.402207 B1:e0f83180
341 09:05:50.402690
342 09:05:50.403145 TE: 58150
343 09:05:50.403579
344 09:05:50.407748 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
345 09:05:50.408252
346 09:05:50.408696 Board ID = 1
347 09:05:50.413446 Set A53 clk to 24M
348 09:05:50.413909 Set A73 clk to 24M
349 09:05:50.414344 Set clk81 to 24M
350 09:05:50.418938 A53 clk: 1200 MHz
351 09:05:50.419397 A73 clk: 1200 MHz
352 09:05:50.419831 CLK81: 166.6M
353 09:05:50.420291 smccc: 00012aab
354 09:05:50.424511 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
355 09:05:50.430212 board id: 1
356 09:05:50.435415 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
357 09:05:50.446599 fw parse done
358 09:05:50.452553 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
359 09:05:50.494271 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
360 09:05:50.506092 PIEI prepare done
361 09:05:50.506570 fastboot data load
362 09:05:50.507004 fastboot data verify
363 09:05:50.511740 verify result: 266
364 09:05:50.517304 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
365 09:05:50.517764 LPDDR4 probe
366 09:05:50.518198 ddr clk to 1584MHz
367 09:05:50.525332 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
368 09:05:50.562130
369 09:05:50.562663 dmc_version 0001
370 09:05:50.568334 Check phy result
371 09:05:50.575114 INFO : End of CA training
372 09:05:50.575591 INFO : End of initialization
373 09:05:50.580713 INFO : Training has run successfully!
374 09:05:50.581187 Check phy result
375 09:05:50.586305 INFO : End of initialization
376 09:05:50.586773 INFO : End of read enable training
377 09:05:50.591909 INFO : End of fine write leveling
378 09:05:50.597504 INFO : End of Write leveling coarse delay
379 09:05:50.597974 INFO : Training has run successfully!
380 09:05:50.598421 Check phy result
381 09:05:50.603093 INFO : End of initialization
382 09:05:50.603580 INFO : End of read dq deskew training
383 09:05:50.608708 INFO : End of MPR read delay center optimization
384 09:05:50.614319 INFO : End of write delay center optimization
385 09:05:50.619876 INFO : End of read delay center optimization
386 09:05:50.620397 INFO : End of max read latency training
387 09:05:50.625505 INFO : Training has run successfully!
388 09:05:50.625972 1D training succeed
389 09:05:50.634465 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 09:05:50.681424 Check phy result
391 09:05:50.681935 INFO : End of initialization
392 09:05:50.704025 INFO : End of 2D read delay Voltage center optimization
393 09:05:50.724253 INFO : End of 2D read delay Voltage center optimization
394 09:05:50.776459 INFO : End of 2D write delay Voltage center optimization
395 09:05:50.825818 INFO : End of 2D write delay Voltage center optimization
396 09:05:50.831418 INFO : Training has run successfully!
397 09:05:50.831892
398 09:05:50.832392 channel==0
399 09:05:50.836974 RxClkDly_Margin_A0==88 ps 9
400 09:05:50.837442 TxDqDly_Margin_A0==98 ps 10
401 09:05:50.842661 RxClkDly_Margin_A1==88 ps 9
402 09:05:50.843126 TxDqDly_Margin_A1==98 ps 10
403 09:05:50.843577 TrainedVREFDQ_A0==74
404 09:05:50.848215 TrainedVREFDQ_A1==74
405 09:05:50.848685 VrefDac_Margin_A0==25
406 09:05:50.849127 DeviceVref_Margin_A0==40
407 09:05:50.853767 VrefDac_Margin_A1==25
408 09:05:50.854246 DeviceVref_Margin_A1==40
409 09:05:50.854688
410 09:05:50.855125
411 09:05:50.859435 channel==1
412 09:05:50.859936 RxClkDly_Margin_A0==98 ps 10
413 09:05:50.860417 TxDqDly_Margin_A0==98 ps 10
414 09:05:50.864964 RxClkDly_Margin_A1==88 ps 9
415 09:05:50.865457 TxDqDly_Margin_A1==88 ps 9
416 09:05:50.870648 TrainedVREFDQ_A0==77
417 09:05:50.871133 TrainedVREFDQ_A1==77
418 09:05:50.871580 VrefDac_Margin_A0==22
419 09:05:50.876195 DeviceVref_Margin_A0==37
420 09:05:50.876666 VrefDac_Margin_A1==24
421 09:05:50.881769 DeviceVref_Margin_A1==37
422 09:05:50.882227
423 09:05:50.882674 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
424 09:05:50.883114
425 09:05:50.915414 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
426 09:05:50.915970 2D training succeed
427 09:05:50.921004 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
428 09:05:50.926681 auto size-- 65535DDR cs0 size: 2048MB
429 09:05:50.927161 DDR cs1 size: 2048MB
430 09:05:50.932188 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
431 09:05:50.932656 cs0 DataBus test pass
432 09:05:50.937786 cs1 DataBus test pass
433 09:05:50.938255 cs0 AddrBus test pass
434 09:05:50.938699 cs1 AddrBus test pass
435 09:05:50.939135
436 09:05:50.943453 100bdlr_step_size ps== 420
437 09:05:50.943934 result report
438 09:05:50.948956 boot times 0Enable ddr reg access
439 09:05:50.954320 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
440 09:05:50.967839 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
441 09:05:51.541424 0.0;M3 CHK:0;cm4_sp_mode 0
442 09:05:51.542031 MVN_1=0x00000000
443 09:05:51.547011 MVN_2=0x00000000
444 09:05:51.552827 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
445 09:05:51.553350 OPS=0x10
446 09:05:51.553819 ring efuse init
447 09:05:51.554289 chipver efuse init
448 09:05:51.558450 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
449 09:05:51.563924 [0.018960 Inits done]
450 09:05:51.564468 secure task start!
451 09:05:51.564930 high task start!
452 09:05:51.568496 low task start!
453 09:05:51.569006 run into bl31
454 09:05:51.575135 NOTICE: BL31: v1.3(release):4fc40b1
455 09:05:51.582963 NOTICE: BL31: Built : 15:58:17, May 22 2019
456 09:05:51.583483 NOTICE: BL31: G12A normal boot!
457 09:05:51.608342 NOTICE: BL31: BL33 decompress pass
458 09:05:51.613155 ERROR: Error initializing runtime service opteed_fast
459 09:05:52.846942
460 09:05:52.847544
461 09:05:52.854447 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
462 09:05:52.854973
463 09:05:52.855409 Model: Libre Computer AML-A311D-CC Alta
464 09:05:53.063005 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
465 09:05:53.086246 DRAM: 2 GiB (effective 3.8 GiB)
466 09:05:53.230144 Core: 408 devices, 31 uclasses, devicetree: separate
467 09:05:53.235415 WDT: Not starting watchdog@f0d0
468 09:05:53.268276 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
469 09:05:53.280749 Loading Environment from FAT... Card did not respond to voltage select! : -110
470 09:05:53.284730 ** Bad device specification mmc 0 **
471 09:05:53.296167 Card did not respond to voltage select! : -110
472 09:05:53.302756 ** Bad device specification mmc 0 **
473 09:05:53.303306 Couldn't find partition mmc 0
474 09:05:53.312078 Card did not respond to voltage select! : -110
475 09:05:53.317562 ** Bad device specification mmc 0 **
476 09:05:53.318116 Couldn't find partition mmc 0
477 09:05:53.321656 Error: could not access storage.
478 09:05:54.585973 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
479 09:05:54.586393 bl2_stage_init 0x81
480 09:05:54.591536 hw id: 0x0000 - pwm id 0x01
481 09:05:54.592041 bl2_stage_init 0xc1
482 09:05:54.592401 bl2_stage_init 0x02
483 09:05:54.592651
484 09:05:54.597098 L0:00000000
485 09:05:54.597431 L1:20000703
486 09:05:54.597644 L2:00008067
487 09:05:54.597847 L3:14000000
488 09:05:54.598050 B2:00402000
489 09:05:54.602749 B1:e0f83180
490 09:05:54.603222
491 09:05:54.603562 TE: 58150
492 09:05:54.603885
493 09:05:54.608312 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
494 09:05:54.608776
495 09:05:54.609113 Board ID = 1
496 09:05:54.613879 Set A53 clk to 24M
497 09:05:54.614337 Set A73 clk to 24M
498 09:05:54.614588 Set clk81 to 24M
499 09:05:54.619532 A53 clk: 1200 MHz
500 09:05:54.619870 A73 clk: 1200 MHz
501 09:05:54.620134 CLK81: 166.6M
502 09:05:54.620373 smccc: 00012aac
503 09:05:54.625134 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
504 09:05:54.630697 board id: 1
505 09:05:54.636506 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
506 09:05:54.647176 fw parse done
507 09:05:54.653182 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
508 09:05:54.694890 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
509 09:05:54.706699 PIEI prepare done
510 09:05:54.707072 fastboot data load
511 09:05:54.707297 fastboot data verify
512 09:05:54.712343 verify result: 266
513 09:05:54.717926 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
514 09:05:54.718273 LPDDR4 probe
515 09:05:54.718751 ddr clk to 1584MHz
516 09:05:54.726054 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
517 09:05:54.763303
518 09:05:54.763896 dmc_version 0001
519 09:05:54.769928 Check phy result
520 09:05:54.775811 INFO : End of CA training
521 09:05:54.776397 INFO : End of initialization
522 09:05:54.781430 INFO : Training has run successfully!
523 09:05:54.781990 Check phy result
524 09:05:54.787081 INFO : End of initialization
525 09:05:54.787629 INFO : End of read enable training
526 09:05:54.790333 INFO : End of fine write leveling
527 09:05:54.795828 INFO : End of Write leveling coarse delay
528 09:05:54.801481 INFO : Training has run successfully!
529 09:05:54.802044 Check phy result
530 09:05:54.802515 INFO : End of initialization
531 09:05:54.807059 INFO : End of read dq deskew training
532 09:05:54.812661 INFO : End of MPR read delay center optimization
533 09:05:54.813209 INFO : End of write delay center optimization
534 09:05:54.818321 INFO : End of read delay center optimization
535 09:05:54.823872 INFO : End of max read latency training
536 09:05:54.824441 INFO : Training has run successfully!
537 09:05:54.829455 1D training succeed
538 09:05:54.835440 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 09:05:54.882971 Check phy result
540 09:05:54.883519 INFO : End of initialization
541 09:05:54.905628 INFO : End of 2D read delay Voltage center optimization
542 09:05:54.925834 INFO : End of 2D read delay Voltage center optimization
543 09:05:54.977892 INFO : End of 2D write delay Voltage center optimization
544 09:05:55.027309 INFO : End of 2D write delay Voltage center optimization
545 09:05:55.032750 INFO : Training has run successfully!
546 09:05:55.033304
547 09:05:55.033748 channel==0
548 09:05:55.038272 RxClkDly_Margin_A0==88 ps 9
549 09:05:55.038759 TxDqDly_Margin_A0==98 ps 10
550 09:05:55.043921 RxClkDly_Margin_A1==78 ps 8
551 09:05:55.044541 TxDqDly_Margin_A1==98 ps 10
552 09:05:55.044997 TrainedVREFDQ_A0==74
553 09:05:55.049445 TrainedVREFDQ_A1==74
554 09:05:55.049981 VrefDac_Margin_A0==24
555 09:05:55.050412 DeviceVref_Margin_A0==40
556 09:05:55.055137 VrefDac_Margin_A1==25
557 09:05:55.055607 DeviceVref_Margin_A1==40
558 09:05:55.056056
559 09:05:55.056479
560 09:05:55.060644 channel==1
561 09:05:55.061122 RxClkDly_Margin_A0==98 ps 10
562 09:05:55.061539 TxDqDly_Margin_A0==98 ps 10
563 09:05:55.066268 RxClkDly_Margin_A1==88 ps 9
564 09:05:55.066790 TxDqDly_Margin_A1==88 ps 9
565 09:05:55.071909 TrainedVREFDQ_A0==77
566 09:05:55.072452 TrainedVREFDQ_A1==77
567 09:05:55.072883 VrefDac_Margin_A0==22
568 09:05:55.077461 DeviceVref_Margin_A0==37
569 09:05:55.077973 VrefDac_Margin_A1==24
570 09:05:55.083145 DeviceVref_Margin_A1==37
571 09:05:55.083653
572 09:05:55.084114 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
573 09:05:55.084535
574 09:05:55.116669 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
575 09:05:55.117236 2D training succeed
576 09:05:55.122265 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
577 09:05:55.127878 auto size-- 65535DDR cs0 size: 2048MB
578 09:05:55.128552 DDR cs1 size: 2048MB
579 09:05:55.133445 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
580 09:05:55.134069 cs0 DataBus test pass
581 09:05:55.139136 cs1 DataBus test pass
582 09:05:55.139609 cs0 AddrBus test pass
583 09:05:55.140232 cs1 AddrBus test pass
584 09:05:55.140676
585 09:05:55.144653 100bdlr_step_size ps== 420
586 09:05:55.145141 result report
587 09:05:55.150257 boot times 0Enable ddr reg access
588 09:05:55.155586 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
589 09:05:55.169208 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
590 09:05:55.742828 0.0;M3 CHK:0;cm4_sp_mode 0
591 09:05:55.743452 MVN_1=0x00000000
592 09:05:55.748307 MVN_2=0x00000000
593 09:05:55.754063 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
594 09:05:55.754583 OPS=0x10
595 09:05:55.755042 ring efuse init
596 09:05:55.755462 chipver efuse init
597 09:05:55.759627 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
598 09:05:55.765284 [0.018961 Inits done]
599 09:05:55.765747 secure task start!
600 09:05:55.766145 high task start!
601 09:05:55.769808 low task start!
602 09:05:55.770322 run into bl31
603 09:05:55.776486 NOTICE: BL31: v1.3(release):4fc40b1
604 09:05:55.784279 NOTICE: BL31: Built : 15:58:17, May 22 2019
605 09:05:55.784818 NOTICE: BL31: G12A normal boot!
606 09:05:55.809632 NOTICE: BL31: BL33 decompress pass
607 09:05:55.815377 ERROR: Error initializing runtime service opteed_fast
608 09:05:57.048360
609 09:05:57.049022
610 09:05:57.056660 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
611 09:05:57.057143
612 09:05:57.057570 Model: Libre Computer AML-A311D-CC Alta
613 09:05:57.264267 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
614 09:05:57.288381 DRAM: 2 GiB (effective 3.8 GiB)
615 09:05:57.431325 Core: 408 devices, 31 uclasses, devicetree: separate
616 09:05:57.437150 WDT: Not starting watchdog@f0d0
617 09:05:57.469460 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
618 09:05:57.482004 Loading Environment from FAT... Card did not respond to voltage select! : -110
619 09:05:57.486980 ** Bad device specification mmc 0 **
620 09:05:57.497317 Card did not respond to voltage select! : -110
621 09:05:57.504947 ** Bad device specification mmc 0 **
622 09:05:57.505405 Couldn't find partition mmc 0
623 09:05:57.513295 Card did not respond to voltage select! : -110
624 09:05:57.518811 ** Bad device specification mmc 0 **
625 09:05:57.519262 Couldn't find partition mmc 0
626 09:05:57.523873 Error: could not access storage.
627 09:05:57.865691 Net: eth0: ethernet@ff3f0000
628 09:05:57.866267 starting USB...
629 09:05:58.118284 Bus usb@ff500000: Register 3000140 NbrPorts 3
630 09:05:58.118852 Starting the controller
631 09:05:58.125338 USB XHCI 1.10
632 09:05:59.836282 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
633 09:05:59.836972 bl2_stage_init 0x01
634 09:05:59.837452 bl2_stage_init 0x81
635 09:05:59.841846 hw id: 0x0000 - pwm id 0x01
636 09:05:59.842401 bl2_stage_init 0xc1
637 09:05:59.842870 bl2_stage_init 0x02
638 09:05:59.843320
639 09:05:59.847425 L0:00000000
640 09:05:59.847954 L1:20000703
641 09:05:59.848452 L2:00008067
642 09:05:59.848904 L3:14000000
643 09:05:59.850411 B2:00402000
644 09:05:59.850932 B1:e0f83180
645 09:05:59.851384
646 09:05:59.851830 TE: 58124
647 09:05:59.852334
648 09:05:59.861427 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
649 09:05:59.862004
650 09:05:59.862467 Board ID = 1
651 09:05:59.862914 Set A53 clk to 24M
652 09:05:59.863361 Set A73 clk to 24M
653 09:05:59.867175 Set clk81 to 24M
654 09:05:59.867720 A53 clk: 1200 MHz
655 09:05:59.868226 A73 clk: 1200 MHz
656 09:05:59.870834 CLK81: 166.6M
657 09:05:59.871370 smccc: 00012a92
658 09:05:59.876466 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
659 09:05:59.882197 board id: 1
660 09:05:59.887063 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
661 09:05:59.897357 fw parse done
662 09:05:59.903334 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
663 09:05:59.945002 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
664 09:05:59.957060 PIEI prepare done
665 09:05:59.957638 fastboot data load
666 09:05:59.958098 fastboot data verify
667 09:05:59.962588 verify result: 266
668 09:05:59.968226 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
669 09:05:59.968804 LPDDR4 probe
670 09:05:59.969265 ddr clk to 1584MHz
671 09:05:59.976430 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
672 09:06:00.013428
673 09:06:00.014011 dmc_version 0001
674 09:06:00.020208 Check phy result
675 09:06:00.026075 INFO : End of CA training
676 09:06:00.026624 INFO : End of initialization
677 09:06:00.031555 INFO : Training has run successfully!
678 09:06:00.032153 Check phy result
679 09:06:00.037188 INFO : End of initialization
680 09:06:00.037726 INFO : End of read enable training
681 09:06:00.042815 INFO : End of fine write leveling
682 09:06:00.048345 INFO : End of Write leveling coarse delay
683 09:06:00.048890 INFO : Training has run successfully!
684 09:06:00.049349 Check phy result
685 09:06:00.054044 INFO : End of initialization
686 09:06:00.054586 INFO : End of read dq deskew training
687 09:06:00.059536 INFO : End of MPR read delay center optimization
688 09:06:00.065153 INFO : End of write delay center optimization
689 09:06:00.070714 INFO : End of read delay center optimization
690 09:06:00.071247 INFO : End of max read latency training
691 09:06:00.076341 INFO : Training has run successfully!
692 09:06:00.076888 1D training succeed
693 09:06:00.085493 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 09:06:00.133176 Check phy result
695 09:06:00.133764 INFO : End of initialization
696 09:06:00.155620 INFO : End of 2D read delay Voltage center optimization
697 09:06:00.174916 INFO : End of 2D read delay Voltage center optimization
698 09:06:00.226800 INFO : End of 2D write delay Voltage center optimization
699 09:06:00.276131 INFO : End of 2D write delay Voltage center optimization
700 09:06:00.281612 INFO : Training has run successfully!
701 09:06:00.282152
702 09:06:00.282611 channel==0
703 09:06:00.287183 RxClkDly_Margin_A0==88 ps 9
704 09:06:00.287723 TxDqDly_Margin_A0==98 ps 10
705 09:06:00.292893 RxClkDly_Margin_A1==88 ps 9
706 09:06:00.293431 TxDqDly_Margin_A1==98 ps 10
707 09:06:00.293890 TrainedVREFDQ_A0==74
708 09:06:00.298388 TrainedVREFDQ_A1==74
709 09:06:00.298924 VrefDac_Margin_A0==25
710 09:06:00.299377 DeviceVref_Margin_A0==40
711 09:06:00.304077 VrefDac_Margin_A1==25
712 09:06:00.304600 DeviceVref_Margin_A1==40
713 09:06:00.305055
714 09:06:00.305499
715 09:06:00.309594 channel==1
716 09:06:00.310133 RxClkDly_Margin_A0==88 ps 9
717 09:06:00.310592 TxDqDly_Margin_A0==88 ps 9
718 09:06:00.315201 RxClkDly_Margin_A1==88 ps 9
719 09:06:00.315739 TxDqDly_Margin_A1==88 ps 9
720 09:06:00.320822 TrainedVREFDQ_A0==77
721 09:06:00.321358 TrainedVREFDQ_A1==77
722 09:06:00.321817 VrefDac_Margin_A0==23
723 09:06:00.326367 DeviceVref_Margin_A0==37
724 09:06:00.326893 VrefDac_Margin_A1==24
725 09:06:00.332111 DeviceVref_Margin_A1==37
726 09:06:00.332653
727 09:06:00.333107 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
728 09:06:00.333557
729 09:06:00.365480 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000017 00000018 00000015 00000017 00000019 00000017 00000019 00000019 00000019 0000001a 00000018 00000017 00000019 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
730 09:06:00.366125 2D training succeed
731 09:06:00.371161 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
732 09:06:00.376736 auto size-- 65535DDR cs0 size: 2048MB
733 09:06:00.377273 DDR cs1 size: 2048MB
734 09:06:00.382422 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
735 09:06:00.382980 cs0 DataBus test pass
736 09:06:00.388107 cs1 DataBus test pass
737 09:06:00.388644 cs0 AddrBus test pass
738 09:06:00.389102 cs1 AddrBus test pass
739 09:06:00.389542
740 09:06:00.393580 100bdlr_step_size ps== 420
741 09:06:00.394117 result report
742 09:06:00.399167 boot times 0Enable ddr reg access
743 09:06:00.404370 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
744 09:06:00.417721 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
745 09:06:00.989708 0.0;M3 CHK:0;cm4_sp_mode 0
746 09:06:00.990354 MVN_1=0x00000000
747 09:06:00.995260 MVN_2=0x00000000
748 09:06:01.001064 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
749 09:06:01.001628 OPS=0x10
750 09:06:01.002094 ring efuse init
751 09:06:01.002525 chipver efuse init
752 09:06:01.006621 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
753 09:06:01.012209 [0.018961 Inits done]
754 09:06:01.012719 secure task start!
755 09:06:01.013152 high task start!
756 09:06:01.016750 low task start!
757 09:06:01.017254 run into bl31
758 09:06:01.023417 NOTICE: BL31: v1.3(release):4fc40b1
759 09:06:01.031210 NOTICE: BL31: Built : 15:58:17, May 22 2019
760 09:06:01.031730 NOTICE: BL31: G12A normal boot!
761 09:06:01.056561 NOTICE: BL31: BL33 decompress pass
762 09:06:01.061239 ERROR: Error initializing runtime service opteed_fast
763 09:06:02.295146
764 09:06:02.295835
765 09:06:02.303479 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
766 09:06:02.304074
767 09:06:02.304554 Model: Libre Computer AML-A311D-CC Alta
768 09:06:02.511925 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
769 09:06:02.535416 DRAM: 2 GiB (effective 3.8 GiB)
770 09:06:02.678405 Core: 408 devices, 31 uclasses, devicetree: separate
771 09:06:02.684202 WDT: Not starting watchdog@f0d0
772 09:06:02.716499 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
773 09:06:02.728975 Loading Environment from FAT... Card did not respond to voltage select! : -110
774 09:06:02.733041 ** Bad device specification mmc 0 **
775 09:06:02.744405 Card did not respond to voltage select! : -110
776 09:06:02.751009 ** Bad device specification mmc 0 **
777 09:06:02.751547 Couldn't find partition mmc 0
778 09:06:02.760300 Card did not respond to voltage select! : -110
779 09:06:02.765714 ** Bad device specification mmc 0 **
780 09:06:02.766262 Couldn't find partition mmc 0
781 09:06:02.770791 Error: could not access storage.
782 09:06:03.113315 Net: eth0: ethernet@ff3f0000
783 09:06:03.113987 starting USB...
784 09:06:03.365106 Bus usb@ff500000: Register 3000140 NbrPorts 3
785 09:06:03.365805 Starting the controller
786 09:06:03.372098 USB XHCI 1.10
787 09:06:05.537741 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
788 09:06:05.538133 bl2_stage_init 0x01
789 09:06:05.538459 bl2_stage_init 0x81
790 09:06:05.543014 hw id: 0x0000 - pwm id 0x01
791 09:06:05.543307 bl2_stage_init 0xc1
792 09:06:05.543561 bl2_stage_init 0x02
793 09:06:05.543805
794 09:06:05.548663 L0:00000000
795 09:06:05.548952 L1:20000703
796 09:06:05.549204 L2:00008067
797 09:06:05.549446 L3:14000000
798 09:06:05.554295 B2:00402000
799 09:06:05.554584 B1:e0f83180
800 09:06:05.554821
801 09:06:05.555063 TE: 58159
802 09:06:05.555306
803 09:06:05.559912 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
804 09:06:05.560227
805 09:06:05.560535 Board ID = 1
806 09:06:05.565492 Set A53 clk to 24M
807 09:06:05.565790 Set A73 clk to 24M
808 09:06:05.566035 Set clk81 to 24M
809 09:06:05.571089 A53 clk: 1200 MHz
810 09:06:05.571382 A73 clk: 1200 MHz
811 09:06:05.571618 CLK81: 166.6M
812 09:06:05.571858 smccc: 00012ab5
813 09:06:05.576917 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
814 09:06:05.582291 board id: 1
815 09:06:05.588164 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
816 09:06:05.598710 fw parse done
817 09:06:05.603728 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
818 09:06:05.646378 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
819 09:06:05.658186 PIEI prepare done
820 09:06:05.658813 fastboot data load
821 09:06:05.659370 fastboot data verify
822 09:06:05.663804 verify result: 266
823 09:06:05.669413 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
824 09:06:05.670036 LPDDR4 probe
825 09:06:05.670587 ddr clk to 1584MHz
826 09:06:05.677513 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
827 09:06:05.714774
828 09:06:05.715459 dmc_version 0001
829 09:06:05.721231 Check phy result
830 09:06:05.727233 INFO : End of CA training
831 09:06:05.727854 INFO : End of initialization
832 09:06:05.732942 INFO : Training has run successfully!
833 09:06:05.733542 Check phy result
834 09:06:05.738541 INFO : End of initialization
835 09:06:05.739134 INFO : End of read enable training
836 09:06:05.744060 INFO : End of fine write leveling
837 09:06:05.749716 INFO : End of Write leveling coarse delay
838 09:06:05.750352 INFO : Training has run successfully!
839 09:06:05.750903 Check phy result
840 09:06:05.755213 INFO : End of initialization
841 09:06:05.755808 INFO : End of read dq deskew training
842 09:06:05.760795 INFO : End of MPR read delay center optimization
843 09:06:05.766388 INFO : End of write delay center optimization
844 09:06:05.772036 INFO : End of read delay center optimization
845 09:06:05.772653 INFO : End of max read latency training
846 09:06:05.777695 INFO : Training has run successfully!
847 09:06:05.778302 1D training succeed
848 09:06:05.785834 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 09:06:05.834512 Check phy result
850 09:06:05.835183 INFO : End of initialization
851 09:06:05.856108 INFO : End of 2D read delay Voltage center optimization
852 09:06:05.875255 INFO : End of 2D read delay Voltage center optimization
853 09:06:05.927599 INFO : End of 2D write delay Voltage center optimization
854 09:06:05.977456 INFO : End of 2D write delay Voltage center optimization
855 09:06:05.982948 INFO : Training has run successfully!
856 09:06:05.983570
857 09:06:05.984154 channel==0
858 09:06:05.988515 RxClkDly_Margin_A0==88 ps 9
859 09:06:05.989135 TxDqDly_Margin_A0==98 ps 10
860 09:06:05.991818 RxClkDly_Margin_A1==88 ps 9
861 09:06:05.992442 TxDqDly_Margin_A1==98 ps 10
862 09:06:05.997482 TrainedVREFDQ_A0==74
863 09:06:05.998180 TrainedVREFDQ_A1==74
864 09:06:06.002950 VrefDac_Margin_A0==25
865 09:06:06.003600 DeviceVref_Margin_A0==40
866 09:06:06.004154 VrefDac_Margin_A1==25
867 09:06:06.008566 DeviceVref_Margin_A1==40
868 09:06:06.009142
869 09:06:06.009657
870 09:06:06.010161 channel==1
871 09:06:06.010658 RxClkDly_Margin_A0==98 ps 10
872 09:06:06.014171 TxDqDly_Margin_A0==98 ps 10
873 09:06:06.014746 RxClkDly_Margin_A1==98 ps 10
874 09:06:06.019785 TxDqDly_Margin_A1==98 ps 10
875 09:06:06.020393 TrainedVREFDQ_A0==77
876 09:06:06.020914 TrainedVREFDQ_A1==77
877 09:06:06.025320 VrefDac_Margin_A0==22
878 09:06:06.025893 DeviceVref_Margin_A0==37
879 09:06:06.030921 VrefDac_Margin_A1==22
880 09:06:06.031477 DeviceVref_Margin_A1==37
881 09:06:06.032022
882 09:06:06.036519 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
883 09:06:06.037072
884 09:06:06.064563 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
885 09:06:06.070162 2D training succeed
886 09:06:06.075780 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
887 09:06:06.076405 auto size-- 65535DDR cs0 size: 2048MB
888 09:06:06.081457 DDR cs1 size: 2048MB
889 09:06:06.082025 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
890 09:06:06.086958 cs0 DataBus test pass
891 09:06:06.087513 cs1 DataBus test pass
892 09:06:06.088057 cs0 AddrBus test pass
893 09:06:06.092617 cs1 AddrBus test pass
894 09:06:06.093175
895 09:06:06.093687 100bdlr_step_size ps== 420
896 09:06:06.094204 result report
897 09:06:06.098142 boot times 0Enable ddr reg access
898 09:06:06.105139 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
899 09:06:06.119512 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
900 09:06:06.691465 0.0;M3 CHK:0;cm4_sp_mode 0
901 09:06:06.691958 MVN_1=0x00000000
902 09:06:06.696914 MVN_2=0x00000000
903 09:06:06.702772 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
904 09:06:06.703148 OPS=0x10
905 09:06:06.703460 ring efuse init
906 09:06:06.703766 chipver efuse init
907 09:06:06.710783 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
908 09:06:06.711102 [0.018960 Inits done]
909 09:06:06.718465 secure task start!
910 09:06:06.718770 high task start!
911 09:06:06.719010 low task start!
912 09:06:06.719246 run into bl31
913 09:06:06.725084 NOTICE: BL31: v1.3(release):4fc40b1
914 09:06:06.732941 NOTICE: BL31: Built : 15:58:17, May 22 2019
915 09:06:06.733251 NOTICE: BL31: G12A normal boot!
916 09:06:06.758509 NOTICE: BL31: BL33 decompress pass
917 09:06:06.763031 ERROR: Error initializing runtime service opteed_fast
918 09:06:07.996968
919 09:06:07.997535
920 09:06:08.004394 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
921 09:06:08.004853
922 09:06:08.005452 Model: Libre Computer AML-A311D-CC Alta
923 09:06:08.213011 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
924 09:06:08.236213 DRAM: 2 GiB (effective 3.8 GiB)
925 09:06:08.380318 Core: 408 devices, 31 uclasses, devicetree: separate
926 09:06:08.385317 WDT: Not starting watchdog@f0d0
927 09:06:08.418456 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
928 09:06:08.430883 Loading Environment from FAT... Card did not respond to voltage select! : -110
929 09:06:08.434905 ** Bad device specification mmc 0 **
930 09:06:08.446103 Card did not respond to voltage select! : -110
931 09:06:08.453755 ** Bad device specification mmc 0 **
932 09:06:08.454353 Couldn't find partition mmc 0
933 09:06:08.462088 Card did not respond to voltage select! : -110
934 09:06:08.467585 ** Bad device specification mmc 0 **
935 09:06:08.468199 Couldn't find partition mmc 0
936 09:06:08.472680 Error: could not access storage.
937 09:06:08.815371 Net: eth0: ethernet@ff3f0000
938 09:06:08.816094 starting USB...
939 09:06:09.067003 Bus usb@ff500000: Register 3000140 NbrPorts 3
940 09:06:09.067696 Starting the controller
941 09:06:09.073944 USB XHCI 1.10
942 09:06:10.628257 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
943 09:06:10.636524 scanning usb for storage devices... 0 Storage Device(s) found
945 09:06:10.688271 Hit any key to stop autoboot: 1
946 09:06:10.689601 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
947 09:06:10.690286 start: 2.4.3 bootloader-commands (timeout 00:04:27) [common]
948 09:06:10.690818 Setting prompt string to ['=>']
949 09:06:10.691362 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:27)
950 09:06:10.704042 0
951 09:06:10.705050 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
952 09:06:10.705619 Sending with 10 millisecond of delay
954 09:06:11.842741 => setenv autoload no
955 09:06:11.853961 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
956 09:06:11.859491 setenv autoload no
957 09:06:11.860370 Sending with 10 millisecond of delay
959 09:06:13.657250 => setenv initrd_high 0xffffffff
960 09:06:13.668026 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
961 09:06:13.668888 setenv initrd_high 0xffffffff
962 09:06:13.669640 Sending with 10 millisecond of delay
964 09:06:15.285917 => setenv fdt_high 0xffffffff
965 09:06:15.296739 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
966 09:06:15.297613 setenv fdt_high 0xffffffff
967 09:06:15.298379 Sending with 10 millisecond of delay
969 09:06:15.590512 => dhcp
970 09:06:15.601342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
971 09:06:15.602335 dhcp
972 09:06:15.602817 Speed: 1000, full duplex
973 09:06:15.603276 BOOTP broadcast 1
974 09:06:15.848912 BOOTP broadcast 2
975 09:06:15.875549 DHCP client bound to address 192.168.6.33 (273 ms)
976 09:06:15.876393 Sending with 10 millisecond of delay
978 09:06:17.553469 => setenv serverip 192.168.6.2
979 09:06:17.564337 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 09:06:17.565323 setenv serverip 192.168.6.2
981 09:06:17.566073 Sending with 10 millisecond of delay
983 09:06:21.290143 => tftpboot 0x01080000 684531/tftp-deploy-r_a5gpv9/kernel/uImage
984 09:06:21.301064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 09:06:21.302082 tftpboot 0x01080000 684531/tftp-deploy-r_a5gpv9/kernel/uImage
986 09:06:21.302606 Speed: 1000, full duplex
987 09:06:21.303068 Using ethernet@ff3f0000 device
988 09:06:21.303930 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
989 09:06:21.309285 Filename '684531/tftp-deploy-r_a5gpv9/kernel/uImage'.
990 09:06:21.313269 Load address: 0x1080000
991 09:06:24.291152 Loading: *################################################## 43.2 MiB
992 09:06:24.291779 14.5 MiB/s
993 09:06:24.292338 done
994 09:06:24.295699 Bytes transferred = 45308480 (2b35a40 hex)
995 09:06:24.296613 Sending with 10 millisecond of delay
997 09:06:28.989673 => tftpboot 0x08000000 684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
998 09:06:29.000332 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:09)
999 09:06:29.002058 tftpboot 0x08000000 684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot
1000 09:06:29.003032 Speed: 1000, full duplex
1001 09:06:29.003927 Using ethernet@ff3f0000 device
1002 09:06:29.005012 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1003 09:06:29.014837 Filename '684531/tftp-deploy-r_a5gpv9/ramdisk/ramdisk.cpio.gz.uboot'.
1004 09:06:29.015097 Load address: 0x8000000
1005 09:06:36.032881 Loading: *#############T #################################### UDP wrong checksum 00000005 00006a9a
1006 09:06:41.152511 T UDP wrong checksum 00000005 00006a9a
1007 09:06:51.036950 T T UDP wrong checksum 00000005 00006a9a
1008 09:06:59.404173 T UDP wrong checksum 000000ff 0000e511
1009 09:06:59.422864 UDP wrong checksum 000000ff 00007704
1010 09:07:03.479375 T UDP wrong checksum 000000ff 0000939d
1011 09:07:03.504937 UDP wrong checksum 000000ff 00002490
1012 09:07:04.828488 UDP wrong checksum 000000ff 0000cb66
1013 09:07:04.844103 UDP wrong checksum 000000ff 00006359
1014 09:07:08.074990 T UDP wrong checksum 000000ff 00008f2b
1015 09:07:08.091391 UDP wrong checksum 000000ff 0000291e
1016 09:07:08.255524 UDP wrong checksum 000000ff 0000805c
1017 09:07:08.276773 UDP wrong checksum 000000ff 0000154f
1018 09:07:11.041237 T UDP wrong checksum 00000005 00006a9a
1019 09:07:26.045060 T T
1020 09:07:26.045483 Retry count exceeded; starting again
1022 09:07:26.046336 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1025 09:07:26.047254 end: 2.4 uboot-commands (duration 00:01:48) [common]
1027 09:07:26.047949 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1029 09:07:26.048525 end: 2 uboot-action (duration 00:01:48) [common]
1031 09:07:26.049317 Cleaning after the job
1032 09:07:26.049624 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/ramdisk
1033 09:07:26.050463 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/kernel
1034 09:07:26.064167 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/dtb
1035 09:07:26.065077 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/nfsrootfs
1036 09:07:26.093795 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684531/tftp-deploy-r_a5gpv9/modules
1037 09:07:26.108892 start: 4.1 power-off (timeout 00:00:30) [common]
1038 09:07:26.109523 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1039 09:07:26.145440 >> OK - accepted request
1040 09:07:26.147554 Returned 0 in 0 seconds
1041 09:07:26.248282 end: 4.1 power-off (duration 00:00:00) [common]
1043 09:07:26.249272 start: 4.2 read-feedback (timeout 00:10:00) [common]
1044 09:07:26.249943 Listened to connection for namespace 'common' for up to 1s
1045 09:07:27.250876 Finalising connection for namespace 'common'
1046 09:07:27.251364 Disconnecting from shell: Finalise
1047 09:07:27.251649 =>
1048 09:07:27.352441 end: 4.2 read-feedback (duration 00:00:01) [common]
1049 09:07:27.353194 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/684531
1050 09:07:29.546871 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/684531
1051 09:07:29.547489 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.