Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 09:22:16.805085 lava-dispatcher, installed at version: 2024.01
2 09:22:16.805898 start: 0 validate
3 09:22:16.806362 Start time: 2024-09-01 09:22:16.806331+00:00 (UTC)
4 09:22:16.806918 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 09:22:16.807477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 09:22:16.845981 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 09:22:16.846525 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 09:22:16.878991 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 09:22:16.879650 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 09:22:16.926523 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 09:22:16.927041 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 09:22:16.961716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 09:22:16.962256 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.11-rc6%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 09:22:17.009769 validate duration: 0.20
16 09:22:17.010683 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 09:22:17.011044 start: 1.1 download-retry (timeout 00:10:00) [common]
18 09:22:17.011400 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 09:22:17.012047 Not decompressing ramdisk as can be used compressed.
20 09:22:17.012566 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 09:22:17.012896 saving as /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/ramdisk/initrd.cpio.gz
22 09:22:17.013205 total size: 5628169 (5 MB)
23 09:22:17.049800 progress 0 % (0 MB)
24 09:22:17.057665 progress 5 % (0 MB)
25 09:22:17.065866 progress 10 % (0 MB)
26 09:22:17.070760 progress 15 % (0 MB)
27 09:22:17.074958 progress 20 % (1 MB)
28 09:22:17.078735 progress 25 % (1 MB)
29 09:22:17.082962 progress 30 % (1 MB)
30 09:22:17.087357 progress 35 % (1 MB)
31 09:22:17.091179 progress 40 % (2 MB)
32 09:22:17.095505 progress 45 % (2 MB)
33 09:22:17.099399 progress 50 % (2 MB)
34 09:22:17.103738 progress 55 % (2 MB)
35 09:22:17.108055 progress 60 % (3 MB)
36 09:22:17.111802 progress 65 % (3 MB)
37 09:22:17.116130 progress 70 % (3 MB)
38 09:22:17.120357 progress 75 % (4 MB)
39 09:22:17.124732 progress 80 % (4 MB)
40 09:22:17.128708 progress 85 % (4 MB)
41 09:22:17.133142 progress 90 % (4 MB)
42 09:22:17.137223 progress 95 % (5 MB)
43 09:22:17.140682 progress 100 % (5 MB)
44 09:22:17.141365 5 MB downloaded in 0.13 s (41.89 MB/s)
45 09:22:17.141914 end: 1.1.1 http-download (duration 00:00:00) [common]
47 09:22:17.142860 end: 1.1 download-retry (duration 00:00:00) [common]
48 09:22:17.143202 start: 1.2 download-retry (timeout 00:10:00) [common]
49 09:22:17.143513 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 09:22:17.144033 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/kernel/Image
51 09:22:17.144291 saving as /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/kernel/Image
52 09:22:17.144501 total size: 45308416 (43 MB)
53 09:22:17.144713 No compression specified
54 09:22:17.178034 progress 0 % (0 MB)
55 09:22:17.207730 progress 5 % (2 MB)
56 09:22:17.237272 progress 10 % (4 MB)
57 09:22:17.266072 progress 15 % (6 MB)
58 09:22:17.295005 progress 20 % (8 MB)
59 09:22:17.324221 progress 25 % (10 MB)
60 09:22:17.352628 progress 30 % (12 MB)
61 09:22:17.380696 progress 35 % (15 MB)
62 09:22:17.408799 progress 40 % (17 MB)
63 09:22:17.437462 progress 45 % (19 MB)
64 09:22:17.465800 progress 50 % (21 MB)
65 09:22:17.493875 progress 55 % (23 MB)
66 09:22:17.522105 progress 60 % (25 MB)
67 09:22:17.550179 progress 65 % (28 MB)
68 09:22:17.581510 progress 70 % (30 MB)
69 09:22:17.611056 progress 75 % (32 MB)
70 09:22:17.639421 progress 80 % (34 MB)
71 09:22:17.668261 progress 85 % (36 MB)
72 09:22:17.699543 progress 90 % (38 MB)
73 09:22:17.728061 progress 95 % (41 MB)
74 09:22:17.756146 progress 100 % (43 MB)
75 09:22:17.756861 43 MB downloaded in 0.61 s (70.56 MB/s)
76 09:22:17.757337 end: 1.2.1 http-download (duration 00:00:01) [common]
78 09:22:17.758158 end: 1.2 download-retry (duration 00:00:01) [common]
79 09:22:17.758428 start: 1.3 download-retry (timeout 00:09:59) [common]
80 09:22:17.758693 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 09:22:17.759190 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 09:22:17.759436 saving as /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/dtb/meson-g12b-a311d-libretech-cc.dtb
83 09:22:17.759642 total size: 54667 (0 MB)
84 09:22:17.759848 No compression specified
85 09:22:17.792844 progress 59 % (0 MB)
86 09:22:17.793842 progress 100 % (0 MB)
87 09:22:17.794434 0 MB downloaded in 0.03 s (1.50 MB/s)
88 09:22:17.795280 end: 1.3.1 http-download (duration 00:00:00) [common]
90 09:22:17.796362 end: 1.3 download-retry (duration 00:00:00) [common]
91 09:22:17.796748 start: 1.4 download-retry (timeout 00:09:59) [common]
92 09:22:17.797035 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 09:22:17.797609 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 09:22:17.797935 saving as /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/nfsrootfs/full.rootfs.tar
95 09:22:17.798193 total size: 120894716 (115 MB)
96 09:22:17.798470 Using unxz to decompress xz
97 09:22:17.839696 progress 0 % (0 MB)
98 09:22:18.658784 progress 5 % (5 MB)
99 09:22:19.513548 progress 10 % (11 MB)
100 09:22:20.311799 progress 15 % (17 MB)
101 09:22:21.057000 progress 20 % (23 MB)
102 09:22:21.658811 progress 25 % (28 MB)
103 09:22:22.592712 progress 30 % (34 MB)
104 09:22:23.394347 progress 35 % (40 MB)
105 09:22:23.742206 progress 40 % (46 MB)
106 09:22:24.128357 progress 45 % (51 MB)
107 09:22:24.871955 progress 50 % (57 MB)
108 09:22:25.768859 progress 55 % (63 MB)
109 09:22:26.570170 progress 60 % (69 MB)
110 09:22:27.331908 progress 65 % (74 MB)
111 09:22:28.118762 progress 70 % (80 MB)
112 09:22:28.946917 progress 75 % (86 MB)
113 09:22:29.746476 progress 80 % (92 MB)
114 09:22:30.523891 progress 85 % (98 MB)
115 09:22:31.409656 progress 90 % (103 MB)
116 09:22:32.241360 progress 95 % (109 MB)
117 09:22:33.096139 progress 100 % (115 MB)
118 09:22:33.110164 115 MB downloaded in 15.31 s (7.53 MB/s)
119 09:22:33.110916 end: 1.4.1 http-download (duration 00:00:15) [common]
121 09:22:33.111945 end: 1.4 download-retry (duration 00:00:15) [common]
122 09:22:33.112362 start: 1.5 download-retry (timeout 00:09:44) [common]
123 09:22:33.112709 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 09:22:33.113333 downloading http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/modules.tar.xz
125 09:22:33.113698 saving as /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/modules/modules.tar
126 09:22:33.113944 total size: 11499436 (10 MB)
127 09:22:33.114188 Using unxz to decompress xz
128 09:22:33.175794 progress 0 % (0 MB)
129 09:22:33.244045 progress 5 % (0 MB)
130 09:22:33.331864 progress 10 % (1 MB)
131 09:22:33.420773 progress 15 % (1 MB)
132 09:22:33.515222 progress 20 % (2 MB)
133 09:22:33.592103 progress 25 % (2 MB)
134 09:22:33.672579 progress 30 % (3 MB)
135 09:22:33.749363 progress 35 % (3 MB)
136 09:22:33.829946 progress 40 % (4 MB)
137 09:22:33.907318 progress 45 % (4 MB)
138 09:22:33.987663 progress 50 % (5 MB)
139 09:22:34.073647 progress 55 % (6 MB)
140 09:22:34.147493 progress 60 % (6 MB)
141 09:22:34.234659 progress 65 % (7 MB)
142 09:22:34.309610 progress 70 % (7 MB)
143 09:22:34.393282 progress 75 % (8 MB)
144 09:22:34.485056 progress 80 % (8 MB)
145 09:22:34.583484 progress 85 % (9 MB)
146 09:22:34.654006 progress 90 % (9 MB)
147 09:22:34.733373 progress 95 % (10 MB)
148 09:22:34.805497 progress 100 % (10 MB)
149 09:22:34.821009 10 MB downloaded in 1.71 s (6.42 MB/s)
150 09:22:34.821624 end: 1.5.1 http-download (duration 00:00:02) [common]
152 09:22:34.822472 end: 1.5 download-retry (duration 00:00:02) [common]
153 09:22:34.822746 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 09:22:34.823015 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 09:22:52.460823 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/684583/extract-nfsrootfs-pn16whlf
156 09:22:52.461418 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 09:22:52.461707 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 09:22:52.462479 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg
159 09:22:52.462986 makedir: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin
160 09:22:52.463356 makedir: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/tests
161 09:22:52.463681 makedir: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/results
162 09:22:52.464043 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-add-keys
163 09:22:52.464607 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-add-sources
164 09:22:52.465138 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-background-process-start
165 09:22:52.465702 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-background-process-stop
166 09:22:52.466341 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-common-functions
167 09:22:52.466885 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-echo-ipv4
168 09:22:52.467397 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-install-packages
169 09:22:52.467943 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-installed-packages
170 09:22:52.468578 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-os-build
171 09:22:52.469187 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-probe-channel
172 09:22:52.469800 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-probe-ip
173 09:22:52.470404 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-target-ip
174 09:22:52.470926 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-target-mac
175 09:22:52.471427 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-target-storage
176 09:22:52.471950 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-case
177 09:22:52.472666 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-event
178 09:22:52.473472 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-feedback
179 09:22:52.474131 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-raise
180 09:22:52.474690 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-reference
181 09:22:52.475305 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-runner
182 09:22:52.475922 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-set
183 09:22:52.476584 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-test-shell
184 09:22:52.477203 Updating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-add-keys (debian)
185 09:22:52.477840 Updating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-add-sources (debian)
186 09:22:52.478527 Updating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-install-packages (debian)
187 09:22:52.479232 Updating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-installed-packages (debian)
188 09:22:52.479825 Updating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/bin/lava-os-build (debian)
189 09:22:52.480359 Creating /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/environment
190 09:22:52.480799 LAVA metadata
191 09:22:52.481107 - LAVA_JOB_ID=684583
192 09:22:52.481330 - LAVA_DISPATCHER_IP=192.168.6.2
193 09:22:52.481731 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 09:22:52.482766 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 09:22:52.483092 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 09:22:52.483306 skipped lava-vland-overlay
197 09:22:52.483555 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 09:22:52.483819 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 09:22:52.484086 skipped lava-multinode-overlay
200 09:22:52.484379 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 09:22:52.484652 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 09:22:52.484941 Loading test definitions
203 09:22:52.485271 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 09:22:52.485530 Using /lava-684583 at stage 0
205 09:22:52.486779 uuid=684583_1.6.2.4.1 testdef=None
206 09:22:52.487144 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 09:22:52.487429 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 09:22:52.489213 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 09:22:52.490103 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 09:22:52.497988 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 09:22:52.498886 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 09:22:52.501249 runner path: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/0/tests/0_timesync-off test_uuid 684583_1.6.2.4.1
215 09:22:52.501957 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 09:22:52.502804 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 09:22:52.503035 Using /lava-684583 at stage 0
219 09:22:52.503410 Fetching tests from https://github.com/kernelci/test-definitions.git
220 09:22:52.503714 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/0/tests/1_kselftest-alsa'
221 09:22:56.131885 Running '/usr/bin/git checkout kernelci.org
222 09:22:56.306529 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 09:22:56.309459 uuid=684583_1.6.2.4.5 testdef=None
224 09:22:56.310162 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 09:22:56.311804 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 09:22:56.317801 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 09:22:56.319574 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 09:22:56.327623 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 09:22:56.329512 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 09:22:56.337290 runner path: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/0/tests/1_kselftest-alsa test_uuid 684583_1.6.2.4.5
234 09:22:56.337885 BOARD='meson-g12b-a311d-libretech-cc'
235 09:22:56.338347 BRANCH='mainline'
236 09:22:56.338797 SKIPFILE='/dev/null'
237 09:22:56.339242 SKIP_INSTALL='True'
238 09:22:56.339694 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.11-rc6/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 09:22:56.340178 TST_CASENAME=''
240 09:22:56.340631 TST_CMDFILES='alsa'
241 09:22:56.341791 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 09:22:56.343521 Creating lava-test-runner.conf files
244 09:22:56.344001 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/684583/lava-overlay-mn_e4vdg/lava-684583/0 for stage 0
245 09:22:56.344803 - 0_timesync-off
246 09:22:56.345360 - 1_kselftest-alsa
247 09:22:56.346102 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 09:22:56.346711 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 09:23:19.723312 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 09:23:19.723766 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 09:23:19.724089 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 09:23:19.724411 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 09:23:19.724704 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 09:23:20.354415 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 09:23:20.354902 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 09:23:20.355175 extracting modules file /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684583/extract-nfsrootfs-pn16whlf
257 09:23:21.754701 extracting modules file /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/modules/modules.tar to /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk
258 09:23:23.170914 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 09:23:23.171398 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 09:23:23.171692 [common] Applying overlay to NFS
261 09:23:23.171917 [common] Applying overlay /var/lib/lava/dispatcher/tmp/684583/compress-overlay-6931oei8/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/684583/extract-nfsrootfs-pn16whlf
262 09:23:25.900010 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 09:23:25.900508 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 09:23:25.900816 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 09:23:25.901082 Converting downloaded kernel to a uImage
266 09:23:25.901432 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/kernel/Image /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/kernel/uImage
267 09:23:26.394478 output: Image Name:
268 09:23:26.394893 output: Created: Sun Sep 1 09:23:25 2024
269 09:23:26.395105 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 09:23:26.395312 output: Data Size: 45308416 Bytes = 44246.50 KiB = 43.21 MiB
271 09:23:26.395522 output: Load Address: 01080000
272 09:23:26.395730 output: Entry Point: 01080000
273 09:23:26.395929 output:
274 09:23:26.396304 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 09:23:26.396577 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 09:23:26.396845 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 09:23:26.397101 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 09:23:26.397357 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 09:23:26.397622 Building ramdisk /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk
280 09:23:28.627693 >> 165160 blocks
281 09:23:36.625635 Adding RAMdisk u-boot header.
282 09:23:36.626317 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk.cpio.gz.uboot
283 09:23:36.866061 output: Image Name:
284 09:23:36.866463 output: Created: Sun Sep 1 09:23:36 2024
285 09:23:36.866988 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 09:23:36.867447 output: Data Size: 23259187 Bytes = 22714.05 KiB = 22.18 MiB
287 09:23:36.867922 output: Load Address: 00000000
288 09:23:36.868415 output: Entry Point: 00000000
289 09:23:36.868863 output:
290 09:23:36.869968 rename /var/lib/lava/dispatcher/tmp/684583/extract-overlay-ramdisk-jypmraue/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
291 09:23:36.870745 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 09:23:36.871357 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 09:23:36.872008 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 09:23:36.872519 No LXC device requested
295 09:23:36.873079 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 09:23:36.873651 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 09:23:36.874206 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 09:23:36.874663 Checking files for TFTP limit of 4294967296 bytes.
299 09:23:36.877595 end: 1 tftp-deploy (duration 00:01:20) [common]
300 09:23:36.878224 start: 2 uboot-action (timeout 00:05:00) [common]
301 09:23:36.878812 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 09:23:36.879370 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 09:23:36.879934 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 09:23:36.880549 Using kernel file from prepare-kernel: 684583/tftp-deploy-9no1f_nm/kernel/uImage
305 09:23:36.881246 substitutions:
306 09:23:36.881707 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 09:23:36.882159 - {DTB_ADDR}: 0x01070000
308 09:23:36.882606 - {DTB}: 684583/tftp-deploy-9no1f_nm/dtb/meson-g12b-a311d-libretech-cc.dtb
309 09:23:36.883054 - {INITRD}: 684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
310 09:23:36.883496 - {KERNEL_ADDR}: 0x01080000
311 09:23:36.883932 - {KERNEL}: 684583/tftp-deploy-9no1f_nm/kernel/uImage
312 09:23:36.884440 - {LAVA_MAC}: None
313 09:23:36.884928 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/684583/extract-nfsrootfs-pn16whlf
314 09:23:36.885373 - {NFS_SERVER_IP}: 192.168.6.2
315 09:23:36.885809 - {PRESEED_CONFIG}: None
316 09:23:36.886242 - {PRESEED_LOCAL}: None
317 09:23:36.886681 - {RAMDISK_ADDR}: 0x08000000
318 09:23:36.887113 - {RAMDISK}: 684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
319 09:23:36.887546 - {ROOT_PART}: None
320 09:23:36.887999 - {ROOT}: None
321 09:23:36.888443 - {SERVER_IP}: 192.168.6.2
322 09:23:36.888876 - {TEE_ADDR}: 0x83000000
323 09:23:36.889307 - {TEE}: None
324 09:23:36.889737 Parsed boot commands:
325 09:23:36.890156 - setenv autoload no
326 09:23:36.890584 - setenv initrd_high 0xffffffff
327 09:23:36.891015 - setenv fdt_high 0xffffffff
328 09:23:36.891444 - dhcp
329 09:23:36.891874 - setenv serverip 192.168.6.2
330 09:23:36.892335 - tftpboot 0x01080000 684583/tftp-deploy-9no1f_nm/kernel/uImage
331 09:23:36.892775 - tftpboot 0x08000000 684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
332 09:23:36.893211 - tftpboot 0x01070000 684583/tftp-deploy-9no1f_nm/dtb/meson-g12b-a311d-libretech-cc.dtb
333 09:23:36.893647 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/684583/extract-nfsrootfs-pn16whlf,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 09:23:36.894094 - bootm 0x01080000 0x08000000 0x01070000
335 09:23:36.894651 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 09:23:36.896344 start: 2.3 connect-device (timeout 00:05:00) [common]
338 09:23:36.896816 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 09:23:36.913325 Setting prompt string to ['lava-test: # ']
340 09:23:36.914981 end: 2.3 connect-device (duration 00:00:00) [common]
341 09:23:36.915678 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 09:23:36.916357 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 09:23:36.917013 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 09:23:36.918357 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 09:23:36.954429 >> OK - accepted request
346 09:23:36.956544 Returned 0 in 0 seconds
347 09:23:37.057798 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 09:23:37.059672 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 09:23:37.060357 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 09:23:37.060934 Setting prompt string to ['Hit any key to stop autoboot']
352 09:23:37.061445 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 09:23:37.063201 Trying 192.168.56.21...
354 09:23:37.063732 Connected to conserv1.
355 09:23:37.064252 Escape character is '^]'.
356 09:23:37.064727
357 09:23:37.065206 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 09:23:37.065693
359 09:23:47.882238 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 09:23:47.883202 bl2_stage_init 0x01
361 09:23:47.883812 bl2_stage_init 0x81
362 09:23:47.887817 hw id: 0x0000 - pwm id 0x01
363 09:23:47.888779 bl2_stage_init 0xc1
364 09:23:47.889513 bl2_stage_init 0x02
365 09:23:47.890232
366 09:23:47.893137 L0:00000000
367 09:23:47.893934 L1:20000703
368 09:23:47.894658 L2:00008067
369 09:23:47.895365 L3:14000000
370 09:23:47.898745 B2:00402000
371 09:23:47.899514 B1:e0f83180
372 09:23:47.900307
373 09:23:47.901025 TE: 58124
374 09:23:47.901721
375 09:23:47.904421 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 09:23:47.905155
377 09:23:47.905812 Board ID = 1
378 09:23:47.909930 Set A53 clk to 24M
379 09:23:47.910686 Set A73 clk to 24M
380 09:23:47.911390 Set clk81 to 24M
381 09:23:47.915842 A53 clk: 1200 MHz
382 09:23:47.916424 A73 clk: 1200 MHz
383 09:23:47.916837 CLK81: 166.6M
384 09:23:47.917233 smccc: 00012a92
385 09:23:47.921128 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 09:23:47.926644 board id: 1
387 09:23:47.931646 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 09:23:47.943359 fw parse done
389 09:23:47.949174 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 09:23:47.991827 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 09:23:48.002827 PIEI prepare done
392 09:23:48.003350 fastboot data load
393 09:23:48.003752 fastboot data verify
394 09:23:48.008337 verify result: 266
395 09:23:48.013943 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 09:23:48.014380 LPDDR4 probe
397 09:23:48.014774 ddr clk to 1584MHz
398 09:23:48.020953 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 09:23:48.059116
400 09:23:48.059616 dmc_version 0001
401 09:23:48.065418 Check phy result
402 09:23:48.071683 INFO : End of CA training
403 09:23:48.072179 INFO : End of initialization
404 09:23:48.077368 INFO : Training has run successfully!
405 09:23:48.077801 Check phy result
406 09:23:48.082884 INFO : End of initialization
407 09:23:48.083342 INFO : End of read enable training
408 09:23:48.088584 INFO : End of fine write leveling
409 09:23:48.094079 INFO : End of Write leveling coarse delay
410 09:23:48.094516 INFO : Training has run successfully!
411 09:23:48.094926 Check phy result
412 09:23:48.100076 INFO : End of initialization
413 09:23:48.100536 INFO : End of read dq deskew training
414 09:23:48.105446 INFO : End of MPR read delay center optimization
415 09:23:48.111258 INFO : End of write delay center optimization
416 09:23:48.116652 INFO : End of read delay center optimization
417 09:23:48.117104 INFO : End of max read latency training
418 09:23:48.122164 INFO : Training has run successfully!
419 09:23:48.122604 1D training succeed
420 09:23:48.130387 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 09:23:48.178879 Check phy result
422 09:23:48.179393 INFO : End of initialization
423 09:23:48.200768 INFO : End of 2D read delay Voltage center optimization
424 09:23:48.220856 INFO : End of 2D read delay Voltage center optimization
425 09:23:48.272048 INFO : End of 2D write delay Voltage center optimization
426 09:23:48.322305 INFO : End of 2D write delay Voltage center optimization
427 09:23:48.327892 INFO : Training has run successfully!
428 09:23:48.328384
429 09:23:48.328812 channel==0
430 09:23:48.333443 RxClkDly_Margin_A0==88 ps 9
431 09:23:48.333884 TxDqDly_Margin_A0==98 ps 10
432 09:23:48.339053 RxClkDly_Margin_A1==88 ps 9
433 09:23:48.339521 TxDqDly_Margin_A1==88 ps 9
434 09:23:48.339938 TrainedVREFDQ_A0==74
435 09:23:48.344616 TrainedVREFDQ_A1==74
436 09:23:48.345056 VrefDac_Margin_A0==25
437 09:23:48.345465 DeviceVref_Margin_A0==40
438 09:23:48.350221 VrefDac_Margin_A1==25
439 09:23:48.350654 DeviceVref_Margin_A1==40
440 09:23:48.351062
441 09:23:48.351468
442 09:23:48.351870 channel==1
443 09:23:48.355894 RxClkDly_Margin_A0==98 ps 10
444 09:23:48.356359 TxDqDly_Margin_A0==98 ps 10
445 09:23:48.361489 RxClkDly_Margin_A1==98 ps 10
446 09:23:48.361918 TxDqDly_Margin_A1==88 ps 9
447 09:23:48.367000 TrainedVREFDQ_A0==77
448 09:23:48.367433 TrainedVREFDQ_A1==77
449 09:23:48.367842 VrefDac_Margin_A0==22
450 09:23:48.372628 DeviceVref_Margin_A0==37
451 09:23:48.373080 VrefDac_Margin_A1==24
452 09:23:48.378222 DeviceVref_Margin_A1==37
453 09:23:48.378688
454 09:23:48.379102 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 09:23:48.379516
456 09:23:48.411797 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000016 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 09:23:48.412391 2D training succeed
458 09:23:48.417539 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 09:23:48.423008 auto size-- 65535DDR cs0 size: 2048MB
460 09:23:48.423447 DDR cs1 size: 2048MB
461 09:23:48.428643 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 09:23:48.429077 cs0 DataBus test pass
463 09:23:48.434173 cs1 DataBus test pass
464 09:23:48.434628 cs0 AddrBus test pass
465 09:23:48.435042 cs1 AddrBus test pass
466 09:23:48.435445
467 09:23:48.439785 100bdlr_step_size ps== 420
468 09:23:48.440262 result report
469 09:23:48.445408 boot times 0Enable ddr reg access
470 09:23:48.449825 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 09:23:48.463300 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 09:23:49.038410 0.0;M3 CHK:0;cm4_sp_mode 0
473 09:23:49.039034 MVN_1=0x00000000
474 09:23:49.043894 MVN_2=0x00000000
475 09:23:49.049374 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 09:23:49.049828 OPS=0x10
477 09:23:49.050237 ring efuse init
478 09:23:49.050639 chipver efuse init
479 09:23:49.055010 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 09:23:49.060567 [0.018961 Inits done]
481 09:23:49.061007 secure task start!
482 09:23:49.061423 high task start!
483 09:23:49.065132 low task start!
484 09:23:49.065432 run into bl31
485 09:23:49.071802 NOTICE: BL31: v1.3(release):4fc40b1
486 09:23:49.078701 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 09:23:49.078982 NOTICE: BL31: G12A normal boot!
488 09:23:49.105002 NOTICE: BL31: BL33 decompress pass
489 09:23:49.110658 ERROR: Error initializing runtime service opteed_fast
490 09:23:50.343475
491 09:23:50.343861
492 09:23:50.351952 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 09:23:50.352256
494 09:23:50.352477 Model: Libre Computer AML-A311D-CC Alta
495 09:23:50.559503 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 09:23:50.584008 DRAM: 2 GiB (effective 3.8 GiB)
497 09:23:50.726826 Core: 408 devices, 31 uclasses, devicetree: separate
498 09:23:50.731738 WDT: Not starting watchdog@f0d0
499 09:23:50.765024 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 09:23:50.777478 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 09:23:50.781648 ** Bad device specification mmc 0 **
502 09:23:50.792751 Card did not respond to voltage select! : -110
503 09:23:50.800368 ** Bad device specification mmc 0 **
504 09:23:50.800871 Couldn't find partition mmc 0
505 09:23:50.808769 Card did not respond to voltage select! : -110
506 09:23:50.814317 ** Bad device specification mmc 0 **
507 09:23:50.814828 Couldn't find partition mmc 0
508 09:23:50.819420 Error: could not access storage.
509 09:23:52.082484 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 09:23:52.083122 bl2_stage_init 0x01
511 09:23:52.083599 bl2_stage_init 0x81
512 09:23:52.088204 hw id: 0x0000 - pwm id 0x01
513 09:23:52.088728 bl2_stage_init 0xc1
514 09:23:52.089188 bl2_stage_init 0x02
515 09:23:52.089640
516 09:23:52.093702 L0:00000000
517 09:23:52.094217 L1:20000703
518 09:23:52.094672 L2:00008067
519 09:23:52.095115 L3:14000000
520 09:23:52.096565 B2:00402000
521 09:23:52.097079 B1:e0f83180
522 09:23:52.097532
523 09:23:52.097979 TE: 58124
524 09:23:52.098424
525 09:23:52.107725 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 09:23:52.108296
527 09:23:52.108758 Board ID = 1
528 09:23:52.109205 Set A53 clk to 24M
529 09:23:52.109645 Set A73 clk to 24M
530 09:23:52.113387 Set clk81 to 24M
531 09:23:52.113908 A53 clk: 1200 MHz
532 09:23:52.114363 A73 clk: 1200 MHz
533 09:23:52.118959 CLK81: 166.6M
534 09:23:52.119481 smccc: 00012a92
535 09:23:52.124642 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 09:23:52.125168 board id: 1
537 09:23:52.132742 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 09:23:52.143847 fw parse done
539 09:23:52.149806 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 09:23:52.192323 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 09:23:52.203322 PIEI prepare done
542 09:23:52.203830 fastboot data load
543 09:23:52.204336 fastboot data verify
544 09:23:52.208854 verify result: 266
545 09:23:52.214422 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 09:23:52.214929 LPDDR4 probe
547 09:23:52.215384 ddr clk to 1584MHz
548 09:23:52.222429 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 09:23:52.259693
550 09:23:52.260362 dmc_version 0001
551 09:23:52.265416 Check phy result
552 09:23:52.272437 INFO : End of CA training
553 09:23:52.272730 INFO : End of initialization
554 09:23:52.277687 INFO : Training has run successfully!
555 09:23:52.277937 Check phy result
556 09:23:52.283393 INFO : End of initialization
557 09:23:52.284415 INFO : End of read enable training
558 09:23:52.289058 INFO : End of fine write leveling
559 09:23:52.294601 INFO : End of Write leveling coarse delay
560 09:23:52.295441 INFO : Training has run successfully!
561 09:23:52.295653 Check phy result
562 09:23:52.300165 INFO : End of initialization
563 09:23:52.300411 INFO : End of read dq deskew training
564 09:23:52.305643 INFO : End of MPR read delay center optimization
565 09:23:52.311372 INFO : End of write delay center optimization
566 09:23:52.316900 INFO : End of read delay center optimization
567 09:23:52.317157 INFO : End of max read latency training
568 09:23:52.322436 INFO : Training has run successfully!
569 09:23:52.322677 1D training succeed
570 09:23:52.330679 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 09:23:52.379379 Check phy result
572 09:23:52.380655 INFO : End of initialization
573 09:23:52.401262 INFO : End of 2D read delay Voltage center optimization
574 09:23:52.421641 INFO : End of 2D read delay Voltage center optimization
575 09:23:52.472551 INFO : End of 2D write delay Voltage center optimization
576 09:23:52.522877 INFO : End of 2D write delay Voltage center optimization
577 09:23:52.528357 INFO : Training has run successfully!
578 09:23:52.528940
579 09:23:52.529332 channel==0
580 09:23:52.533875 RxClkDly_Margin_A0==88 ps 9
581 09:23:52.534244 TxDqDly_Margin_A0==98 ps 10
582 09:23:52.537242 RxClkDly_Margin_A1==88 ps 9
583 09:23:52.537591 TxDqDly_Margin_A1==98 ps 10
584 09:23:52.542761 TrainedVREFDQ_A0==74
585 09:23:52.543133 TrainedVREFDQ_A1==75
586 09:23:52.543403 VrefDac_Margin_A0==25
587 09:23:52.548442 DeviceVref_Margin_A0==40
588 09:23:52.548876 VrefDac_Margin_A1==25
589 09:23:52.554006 DeviceVref_Margin_A1==39
590 09:23:52.554368
591 09:23:52.554615
592 09:23:52.554845 channel==1
593 09:23:52.555070 RxClkDly_Margin_A0==98 ps 10
594 09:23:52.559762 TxDqDly_Margin_A0==98 ps 10
595 09:23:52.560392 RxClkDly_Margin_A1==98 ps 10
596 09:23:52.565360 TxDqDly_Margin_A1==98 ps 10
597 09:23:52.565878 TrainedVREFDQ_A0==77
598 09:23:52.566292 TrainedVREFDQ_A1==77
599 09:23:52.570855 VrefDac_Margin_A0==22
600 09:23:52.571353 DeviceVref_Margin_A0==37
601 09:23:52.576485 VrefDac_Margin_A1==22
602 09:23:52.577010 DeviceVref_Margin_A1==37
603 09:23:52.577409
604 09:23:52.582097 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 09:23:52.582625
606 09:23:52.610183 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
607 09:23:52.616001 2D training succeed
608 09:23:52.621344 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 09:23:52.621930 auto size-- 65535DDR cs0 size: 2048MB
610 09:23:52.627304 DDR cs1 size: 2048MB
611 09:23:52.627883 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 09:23:52.632515 cs0 DataBus test pass
613 09:23:52.633066 cs1 DataBus test pass
614 09:23:52.633492 cs0 AddrBus test pass
615 09:23:52.638136 cs1 AddrBus test pass
616 09:23:52.638743
617 09:23:52.639180 100bdlr_step_size ps== 420
618 09:23:52.639614 result report
619 09:23:52.644348 boot times 0Enable ddr reg access
620 09:23:52.651609 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 09:23:52.664346 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 09:23:53.238074 0.0;M3 CHK:0;cm4_sp_mode 0
623 09:23:53.238711 MVN_1=0x00000000
624 09:23:53.243525 MVN_2=0x00000000
625 09:23:53.249396 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 09:23:53.249919 OPS=0x10
627 09:23:53.250368 ring efuse init
628 09:23:53.250772 chipver efuse init
629 09:23:53.257469 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 09:23:53.257934 [0.018961 Inits done]
631 09:23:53.265034 secure task start!
632 09:23:53.265496 high task start!
633 09:23:53.265893 low task start!
634 09:23:53.266282 run into bl31
635 09:23:53.271607 NOTICE: BL31: v1.3(release):4fc40b1
636 09:23:53.279445 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 09:23:53.279896 NOTICE: BL31: G12A normal boot!
638 09:23:53.304788 NOTICE: BL31: BL33 decompress pass
639 09:23:53.310443 ERROR: Error initializing runtime service opteed_fast
640 09:23:54.543342
641 09:23:54.543929
642 09:23:54.550820 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 09:23:54.551284
644 09:23:54.551690 Model: Libre Computer AML-A311D-CC Alta
645 09:23:54.760161 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 09:23:54.783602 DRAM: 2 GiB (effective 3.8 GiB)
647 09:23:54.926590 Core: 408 devices, 31 uclasses, devicetree: separate
648 09:23:54.932435 WDT: Not starting watchdog@f0d0
649 09:23:54.964615 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 09:23:54.977065 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 09:23:54.982063 ** Bad device specification mmc 0 **
652 09:23:54.992423 Card did not respond to voltage select! : -110
653 09:23:55.000045 ** Bad device specification mmc 0 **
654 09:23:55.000482 Couldn't find partition mmc 0
655 09:23:55.008398 Card did not respond to voltage select! : -110
656 09:23:55.013897 ** Bad device specification mmc 0 **
657 09:23:55.014325 Couldn't find partition mmc 0
658 09:23:55.018952 Error: could not access storage.
659 09:23:55.361436 Net: eth0: ethernet@ff3f0000
660 09:23:55.361758 starting USB...
661 09:23:55.613227 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 09:23:55.613784 Starting the controller
663 09:23:55.620208 USB XHCI 1.10
664 09:23:57.332682 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 09:23:57.333116 bl2_stage_init 0x01
666 09:23:57.333392 bl2_stage_init 0x81
667 09:23:57.338187 hw id: 0x0000 - pwm id 0x01
668 09:23:57.338499 bl2_stage_init 0xc1
669 09:23:57.338889 bl2_stage_init 0x02
670 09:23:57.339154
671 09:23:57.343898 L0:00000000
672 09:23:57.344235 L1:20000703
673 09:23:57.344483 L2:00008067
674 09:23:57.344728 L3:14000000
675 09:23:57.349445 B2:00402000
676 09:23:57.349750 B1:e0f83180
677 09:23:57.349994
678 09:23:57.350242 TE: 58167
679 09:23:57.350490
680 09:23:57.354997 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 09:23:57.355299
682 09:23:57.355557 Board ID = 1
683 09:23:57.360592 Set A53 clk to 24M
684 09:23:57.361025 Set A73 clk to 24M
685 09:23:57.361255 Set clk81 to 24M
686 09:23:57.366117 A53 clk: 1200 MHz
687 09:23:57.366421 A73 clk: 1200 MHz
688 09:23:57.366677 CLK81: 166.6M
689 09:23:57.366922 smccc: 00012abe
690 09:23:57.371696 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 09:23:57.377330 board id: 1
692 09:23:57.382145 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 09:23:57.393888 fw parse done
694 09:23:57.398812 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 09:23:57.442141 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 09:23:57.453289 PIEI prepare done
697 09:23:57.453623 fastboot data load
698 09:23:57.453866 fastboot data verify
699 09:23:57.459029 verify result: 266
700 09:23:57.464528 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 09:23:57.465036 LPDDR4 probe
702 09:23:57.465493 ddr clk to 1584MHz
703 09:23:57.471577 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 09:23:57.508827
705 09:23:57.509327 dmc_version 0001
706 09:23:57.515551 Check phy result
707 09:23:57.522322 INFO : End of CA training
708 09:23:57.522847 INFO : End of initialization
709 09:23:57.527997 INFO : Training has run successfully!
710 09:23:57.528477 Check phy result
711 09:23:57.533505 INFO : End of initialization
712 09:23:57.533966 INFO : End of read enable training
713 09:23:57.536944 INFO : End of fine write leveling
714 09:23:57.542504 INFO : End of Write leveling coarse delay
715 09:23:57.548097 INFO : Training has run successfully!
716 09:23:57.548549 Check phy result
717 09:23:57.548967 INFO : End of initialization
718 09:23:57.553741 INFO : End of read dq deskew training
719 09:23:57.559310 INFO : End of MPR read delay center optimization
720 09:23:57.559771 INFO : End of write delay center optimization
721 09:23:57.564947 INFO : End of read delay center optimization
722 09:23:57.570605 INFO : End of max read latency training
723 09:23:57.571063 INFO : Training has run successfully!
724 09:23:57.576147 1D training succeed
725 09:23:57.581509 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 09:23:57.628528 Check phy result
727 09:23:57.628922 INFO : End of initialization
728 09:23:57.651126 INFO : End of 2D read delay Voltage center optimization
729 09:23:57.670924 INFO : End of 2D read delay Voltage center optimization
730 09:23:57.723211 INFO : End of 2D write delay Voltage center optimization
731 09:23:57.773264 INFO : End of 2D write delay Voltage center optimization
732 09:23:57.778832 INFO : Training has run successfully!
733 09:23:57.779699
734 09:23:57.780471 channel==0
735 09:23:57.783746 RxClkDly_Margin_A0==88 ps 9
736 09:23:57.784418 TxDqDly_Margin_A0==98 ps 10
737 09:23:57.789497 RxClkDly_Margin_A1==88 ps 9
738 09:23:57.790376 TxDqDly_Margin_A1==88 ps 9
739 09:23:57.791026 TrainedVREFDQ_A0==74
740 09:23:57.795015 TrainedVREFDQ_A1==74
741 09:23:57.795808 VrefDac_Margin_A0==25
742 09:23:57.796482 DeviceVref_Margin_A0==40
743 09:23:57.800633 VrefDac_Margin_A1==25
744 09:23:57.801443 DeviceVref_Margin_A1==40
745 09:23:57.802033
746 09:23:57.802636
747 09:23:57.803212 channel==1
748 09:23:57.806149 RxClkDly_Margin_A0==98 ps 10
749 09:23:57.806869 TxDqDly_Margin_A0==98 ps 10
750 09:23:57.811710 RxClkDly_Margin_A1==98 ps 10
751 09:23:57.812247 TxDqDly_Margin_A1==88 ps 9
752 09:23:57.824054 TrainedVREFDQ_A0==77
753 09:23:57.824902 TrainedVREFDQ_A1==77
754 09:23:57.825540 VrefDac_Margin_A0==22
755 09:23:57.826144 DeviceVref_Margin_A0==37
756 09:23:57.826716 VrefDac_Margin_A1==22
757 09:23:57.828550 DeviceVref_Margin_A1==37
758 09:23:57.829231
759 09:23:57.829808 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 09:23:57.830357
761 09:23:57.862213 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 0000005f
762 09:23:57.862864 2D training succeed
763 09:23:57.867720 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 09:23:57.873301 auto size-- 65535DDR cs0 size: 2048MB
765 09:23:57.873854 DDR cs1 size: 2048MB
766 09:23:57.878925 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 09:23:57.879582 cs0 DataBus test pass
768 09:23:57.884457 cs1 DataBus test pass
769 09:23:57.884967 cs0 AddrBus test pass
770 09:23:57.885399 cs1 AddrBus test pass
771 09:23:57.885816
772 09:23:57.890129 100bdlr_step_size ps== 420
773 09:23:57.890859 result report
774 09:23:57.895660 boot times 0Enable ddr reg access
775 09:23:57.900679 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 09:23:57.914219 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 09:23:58.486346 0.0;M3 CHK:0;cm4_sp_mode 0
778 09:23:58.486790 MVN_1=0x00000000
779 09:23:58.491796 MVN_2=0x00000000
780 09:23:58.497524 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 09:23:58.497860 OPS=0x10
782 09:23:58.498108 ring efuse init
783 09:23:58.498339 chipver efuse init
784 09:23:58.503064 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 09:23:58.508705 [0.018961 Inits done]
786 09:23:58.508988 secure task start!
787 09:23:58.509218 high task start!
788 09:23:58.513293 low task start!
789 09:23:58.513581 run into bl31
790 09:23:58.520261 NOTICE: BL31: v1.3(release):4fc40b1
791 09:23:58.526885 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 09:23:58.527286 NOTICE: BL31: G12A normal boot!
793 09:23:58.553158 NOTICE: BL31: BL33 decompress pass
794 09:23:58.558322 ERROR: Error initializing runtime service opteed_fast
795 09:23:59.791930
796 09:23:59.792600
797 09:23:59.799822 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 09:23:59.800335
799 09:23:59.800759 Model: Libre Computer AML-A311D-CC Alta
800 09:24:00.008236 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 09:24:00.031213 DRAM: 2 GiB (effective 3.8 GiB)
802 09:24:00.175013 Core: 408 devices, 31 uclasses, devicetree: separate
803 09:24:00.179944 WDT: Not starting watchdog@f0d0
804 09:24:00.213215 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 09:24:00.225559 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 09:24:00.230229 ** Bad device specification mmc 0 **
807 09:24:00.240954 Card did not respond to voltage select! : -110
808 09:24:00.247739 ** Bad device specification mmc 0 **
809 09:24:00.248240 Couldn't find partition mmc 0
810 09:24:00.256887 Card did not respond to voltage select! : -110
811 09:24:00.262411 ** Bad device specification mmc 0 **
812 09:24:00.262881 Couldn't find partition mmc 0
813 09:24:00.267379 Error: could not access storage.
814 09:24:00.610523 Net: eth0: ethernet@ff3f0000
815 09:24:00.610940 starting USB...
816 09:24:00.862811 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 09:24:00.863438 Starting the controller
818 09:24:00.869756 USB XHCI 1.10
819 09:24:03.032973 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 09:24:03.033589 bl2_stage_init 0x01
821 09:24:03.034014 bl2_stage_init 0x81
822 09:24:03.038384 hw id: 0x0000 - pwm id 0x01
823 09:24:03.038837 bl2_stage_init 0xc1
824 09:24:03.039252 bl2_stage_init 0x02
825 09:24:03.039656
826 09:24:03.044033 L0:00000000
827 09:24:03.044472 L1:20000703
828 09:24:03.044905 L2:00008067
829 09:24:03.045310 L3:14000000
830 09:24:03.049659 B2:00402000
831 09:24:03.050112 B1:e0f83180
832 09:24:03.050524
833 09:24:03.050942 TE: 58159
834 09:24:03.051360
835 09:24:03.055237 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 09:24:03.055687
837 09:24:03.056130 Board ID = 1
838 09:24:03.060830 Set A53 clk to 24M
839 09:24:03.061282 Set A73 clk to 24M
840 09:24:03.061693 Set clk81 to 24M
841 09:24:03.066386 A53 clk: 1200 MHz
842 09:24:03.066842 A73 clk: 1200 MHz
843 09:24:03.067252 CLK81: 166.6M
844 09:24:03.067652 smccc: 00012ab5
845 09:24:03.072043 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 09:24:03.077685 board id: 1
847 09:24:03.083472 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 09:24:03.094151 fw parse done
849 09:24:03.099279 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 09:24:03.142933 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 09:24:03.153837 PIEI prepare done
852 09:24:03.154448 fastboot data load
853 09:24:03.154925 fastboot data verify
854 09:24:03.159454 verify result: 266
855 09:24:03.164986 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 09:24:03.165599 LPDDR4 probe
857 09:24:03.166083 ddr clk to 1584MHz
858 09:24:03.172885 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 09:24:03.210164
860 09:24:03.210718 dmc_version 0001
861 09:24:03.216073 Check phy result
862 09:24:03.222791 INFO : End of CA training
863 09:24:03.223314 INFO : End of initialization
864 09:24:03.228295 INFO : Training has run successfully!
865 09:24:03.228822 Check phy result
866 09:24:03.233951 INFO : End of initialization
867 09:24:03.234476 INFO : End of read enable training
868 09:24:03.239500 INFO : End of fine write leveling
869 09:24:03.245109 INFO : End of Write leveling coarse delay
870 09:24:03.245638 INFO : Training has run successfully!
871 09:24:03.246101 Check phy result
872 09:24:03.250784 INFO : End of initialization
873 09:24:03.251305 INFO : End of read dq deskew training
874 09:24:03.256293 INFO : End of MPR read delay center optimization
875 09:24:03.261852 INFO : End of write delay center optimization
876 09:24:03.267483 INFO : End of read delay center optimization
877 09:24:03.268041 INFO : End of max read latency training
878 09:24:03.273105 INFO : Training has run successfully!
879 09:24:03.273623 1D training succeed
880 09:24:03.281832 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 09:24:03.329904 Check phy result
882 09:24:03.330436 INFO : End of initialization
883 09:24:03.351689 INFO : End of 2D read delay Voltage center optimization
884 09:24:03.371393 INFO : End of 2D read delay Voltage center optimization
885 09:24:03.423953 INFO : End of 2D write delay Voltage center optimization
886 09:24:03.473322 INFO : End of 2D write delay Voltage center optimization
887 09:24:03.478978 INFO : Training has run successfully!
888 09:24:03.479513
889 09:24:03.480005 channel==0
890 09:24:03.484585 RxClkDly_Margin_A0==88 ps 9
891 09:24:03.485109 TxDqDly_Margin_A0==98 ps 10
892 09:24:03.490148 RxClkDly_Margin_A1==88 ps 9
893 09:24:03.490683 TxDqDly_Margin_A1==98 ps 10
894 09:24:03.491171 TrainedVREFDQ_A0==74
895 09:24:03.495834 TrainedVREFDQ_A1==74
896 09:24:03.496430 VrefDac_Margin_A0==25
897 09:24:03.496896 DeviceVref_Margin_A0==40
898 09:24:03.501334 VrefDac_Margin_A1==25
899 09:24:03.501878 DeviceVref_Margin_A1==40
900 09:24:03.502314
901 09:24:03.502746
902 09:24:03.506878 channel==1
903 09:24:03.507396 RxClkDly_Margin_A0==98 ps 10
904 09:24:03.507832 TxDqDly_Margin_A0==98 ps 10
905 09:24:03.512491 RxClkDly_Margin_A1==98 ps 10
906 09:24:03.513001 TxDqDly_Margin_A1==88 ps 9
907 09:24:03.518166 TrainedVREFDQ_A0==77
908 09:24:03.518700 TrainedVREFDQ_A1==77
909 09:24:03.519140 VrefDac_Margin_A0==22
910 09:24:03.523756 DeviceVref_Margin_A0==37
911 09:24:03.524340 VrefDac_Margin_A1==22
912 09:24:03.529368 DeviceVref_Margin_A1==37
913 09:24:03.529904
914 09:24:03.530342 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 09:24:03.535111
916 09:24:03.562830 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 09:24:03.563436 2D training succeed
918 09:24:03.568453 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 09:24:03.574023 auto size-- 65535DDR cs0 size: 2048MB
920 09:24:03.574543 DDR cs1 size: 2048MB
921 09:24:03.579634 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 09:24:03.580185 cs0 DataBus test pass
923 09:24:03.585244 cs1 DataBus test pass
924 09:24:03.585767 cs0 AddrBus test pass
925 09:24:03.586215 cs1 AddrBus test pass
926 09:24:03.586652
927 09:24:03.590812 100bdlr_step_size ps== 420
928 09:24:03.591338 result report
929 09:24:03.596449 boot times 0Enable ddr reg access
930 09:24:03.601852 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 09:24:03.615306 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 09:24:04.188886 0.0;M3 CHK:0;cm4_sp_mode 0
933 09:24:04.189588 MVN_1=0x00000000
934 09:24:04.194483 MVN_2=0x00000000
935 09:24:04.200260 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 09:24:04.200831 OPS=0x10
937 09:24:04.201336 ring efuse init
938 09:24:04.201834 chipver efuse init
939 09:24:04.205810 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 09:24:04.211442 [0.018961 Inits done]
941 09:24:04.212016 secure task start!
942 09:24:04.212497 high task start!
943 09:24:04.215697 low task start!
944 09:24:04.216251 run into bl31
945 09:24:04.222737 NOTICE: BL31: v1.3(release):4fc40b1
946 09:24:04.229825 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 09:24:04.230364 NOTICE: BL31: G12A normal boot!
948 09:24:04.255887 NOTICE: BL31: BL33 decompress pass
949 09:24:04.261116 ERROR: Error initializing runtime service opteed_fast
950 09:24:05.494446
951 09:24:05.494806
952 09:24:05.502014 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 09:24:05.502286
954 09:24:05.502516 Model: Libre Computer AML-A311D-CC Alta
955 09:24:05.710605 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 09:24:05.734034 DRAM: 2 GiB (effective 3.8 GiB)
957 09:24:05.877678 Core: 408 devices, 31 uclasses, devicetree: separate
958 09:24:05.883395 WDT: Not starting watchdog@f0d0
959 09:24:05.915810 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 09:24:05.928259 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 09:24:05.933163 ** Bad device specification mmc 0 **
962 09:24:05.943587 Card did not respond to voltage select! : -110
963 09:24:05.950300 ** Bad device specification mmc 0 **
964 09:24:05.950813 Couldn't find partition mmc 0
965 09:24:05.959586 Card did not respond to voltage select! : -110
966 09:24:05.965088 ** Bad device specification mmc 0 **
967 09:24:05.965602 Couldn't find partition mmc 0
968 09:24:05.970074 Error: could not access storage.
969 09:24:06.311904 Net: eth0: ethernet@ff3f0000
970 09:24:06.312550 starting USB...
971 09:24:06.564381 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 09:24:06.564746 Starting the controller
973 09:24:06.571175 USB XHCI 1.10
974 09:24:08.125378 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 09:24:08.132771 scanning usb for storage devices... 0 Storage Device(s) found
977 09:24:08.184376 Hit any key to stop autoboot: 1
978 09:24:08.185225 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
979 09:24:08.185872 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
980 09:24:08.186551 Setting prompt string to ['=>']
981 09:24:08.187101 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
982 09:24:08.200133 0
983 09:24:08.201118 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 09:24:08.201693 Sending with 10 millisecond of delay
986 09:24:09.336719 => setenv autoload no
987 09:24:09.347315 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:28)
988 09:24:09.349913 setenv autoload no
989 09:24:09.350401 Sending with 10 millisecond of delay
991 09:24:11.146770 => setenv initrd_high 0xffffffff
992 09:24:11.157359 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
993 09:24:11.158650 setenv initrd_high 0xffffffff
994 09:24:11.160118 Sending with 10 millisecond of delay
996 09:24:12.778132 => setenv fdt_high 0xffffffff
997 09:24:12.788921 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
998 09:24:12.789704 setenv fdt_high 0xffffffff
999 09:24:12.790414 Sending with 10 millisecond of delay
1001 09:24:13.082214 => dhcp
1002 09:24:13.093024 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1003 09:24:13.093875 dhcp
1004 09:24:13.094386 Speed: 1000, full duplex
1005 09:24:13.094858 BOOTP broadcast 1
1006 09:24:13.340933 BOOTP broadcast 2
1007 09:24:13.353278 DHCP client bound to address 192.168.6.33 (260 ms)
1008 09:24:13.354047 Sending with 10 millisecond of delay
1010 09:24:15.030572 => setenv serverip 192.168.6.2
1011 09:24:15.041318 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1012 09:24:15.042153 setenv serverip 192.168.6.2
1013 09:24:15.042841 Sending with 10 millisecond of delay
1015 09:24:18.767699 => tftpboot 0x01080000 684583/tftp-deploy-9no1f_nm/kernel/uImage
1016 09:24:18.778516 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1017 09:24:18.779311 tftpboot 0x01080000 684583/tftp-deploy-9no1f_nm/kernel/uImage
1018 09:24:18.779759 Speed: 1000, full duplex
1019 09:24:18.780215 Using ethernet@ff3f0000 device
1020 09:24:18.781170 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1021 09:24:18.786752 Filename '684583/tftp-deploy-9no1f_nm/kernel/uImage'.
1022 09:24:18.790131 Load address: 0x1080000
1023 09:24:21.755026 Loading: *################################################## 43.2 MiB
1024 09:24:21.755408 14.6 MiB/s
1025 09:24:21.755623 done
1026 09:24:21.759451 Bytes transferred = 45308480 (2b35a40 hex)
1027 09:24:21.760027 Sending with 10 millisecond of delay
1029 09:24:26.446453 => tftpboot 0x08000000 684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
1030 09:24:26.457201 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1031 09:24:26.458015 tftpboot 0x08000000 684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot
1032 09:24:26.458475 Speed: 1000, full duplex
1033 09:24:26.458903 Using ethernet@ff3f0000 device
1034 09:24:26.459872 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1035 09:24:26.468476 Filename '684583/tftp-deploy-9no1f_nm/ramdisk/ramdisk.cpio.gz.uboot'.
1036 09:24:26.469018 Load address: 0x8000000
1037 09:24:27.477781 Loading: *################ UDP wrong checksum 000000ff 000008c9
1038 09:24:27.489011 UDP wrong checksum 000000ff 00008cbb
1039 09:24:33.525490 T ################################# UDP wrong checksum 00000005 0000678b
1040 09:24:36.671048 UDP wrong checksum 000000ff 000059f5
1041 09:24:36.703976 UDP wrong checksum 000000ff 0000f1e7
1042 09:24:38.526394 T UDP wrong checksum 00000005 0000678b
1043 09:24:41.287862 UDP wrong checksum 000000ff 000075fb
1044 09:24:41.326249 UDP wrong checksum 000000ff 00000fee
1045 09:24:48.529443 T T UDP wrong checksum 00000005 0000678b
1046 09:24:56.055361 T UDP wrong checksum 000000ff 0000bd21
1047 09:24:56.066265 UDP wrong checksum 000000ff 00004714
1048 09:25:08.533092 T T T UDP wrong checksum 00000005 0000678b
1049 09:25:23.537283 T T
1050 09:25:23.537699 Retry count exceeded; starting again
1052 09:25:23.538628 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1055 09:25:23.539615 end: 2.4 uboot-commands (duration 00:01:47) [common]
1057 09:25:23.540787 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1059 09:25:23.541898 end: 2 uboot-action (duration 00:01:47) [common]
1061 09:25:23.543409 Cleaning after the job
1062 09:25:23.543947 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/ramdisk
1063 09:25:23.545329 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/kernel
1064 09:25:23.588632 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/dtb
1065 09:25:23.589495 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/nfsrootfs
1066 09:25:23.624670 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/684583/tftp-deploy-9no1f_nm/modules
1067 09:25:23.631808 start: 4.1 power-off (timeout 00:00:30) [common]
1068 09:25:23.632445 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1069 09:25:23.665873 >> OK - accepted request
1070 09:25:23.667665 Returned 0 in 0 seconds
1071 09:25:23.768599 end: 4.1 power-off (duration 00:00:00) [common]
1073 09:25:23.770330 start: 4.2 read-feedback (timeout 00:10:00) [common]
1074 09:25:23.771443 Listened to connection for namespace 'common' for up to 1s
1075 09:25:24.772175 Finalising connection for namespace 'common'
1076 09:25:24.772643 Disconnecting from shell: Finalise
1077 09:25:24.772925 =>
1078 09:25:24.873733 end: 4.2 read-feedback (duration 00:00:01) [common]
1079 09:25:24.874450 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/684583
1080 09:25:27.951909 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/684583
1081 09:25:27.952562 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.