Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 21:08:24.409434 lava-dispatcher, installed at version: 2024.01
2 21:08:24.410200 start: 0 validate
3 21:08:24.410651 Start time: 2024-10-02 21:08:24.410621+00:00 (UTC)
4 21:08:24.411219 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 21:08:24.411740 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 21:08:24.445823 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 21:08:24.446432 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-42-gf23aa4c0761a7%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 21:08:24.473772 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 21:08:24.474407 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-42-gf23aa4c0761a7%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 21:08:24.501959 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 21:08:24.502456 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 21:08:24.531385 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 21:08:24.531881 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-42-gf23aa4c0761a7%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 21:08:24.567069 validate duration: 0.16
16 21:08:24.567943 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 21:08:24.568384 start: 1.1 download-retry (timeout 00:10:00) [common]
18 21:08:24.568776 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 21:08:24.569421 Not decompressing ramdisk as can be used compressed.
20 21:08:24.569942 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 21:08:24.570242 saving as /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/ramdisk/initrd.cpio.gz
22 21:08:24.570547 total size: 5628182 (5 MB)
23 21:08:24.604731 progress 0 % (0 MB)
24 21:08:24.608761 progress 5 % (0 MB)
25 21:08:24.612757 progress 10 % (0 MB)
26 21:08:24.616315 progress 15 % (0 MB)
27 21:08:24.620774 progress 20 % (1 MB)
28 21:08:24.624476 progress 25 % (1 MB)
29 21:08:24.628475 progress 30 % (1 MB)
30 21:08:24.632516 progress 35 % (1 MB)
31 21:08:24.636109 progress 40 % (2 MB)
32 21:08:24.640172 progress 45 % (2 MB)
33 21:08:24.643752 progress 50 % (2 MB)
34 21:08:24.647678 progress 55 % (2 MB)
35 21:08:24.651580 progress 60 % (3 MB)
36 21:08:24.655131 progress 65 % (3 MB)
37 21:08:24.659054 progress 70 % (3 MB)
38 21:08:24.662705 progress 75 % (4 MB)
39 21:08:24.666833 progress 80 % (4 MB)
40 21:08:24.670397 progress 85 % (4 MB)
41 21:08:24.674211 progress 90 % (4 MB)
42 21:08:24.677896 progress 95 % (5 MB)
43 21:08:24.681149 progress 100 % (5 MB)
44 21:08:24.681797 5 MB downloaded in 0.11 s (48.25 MB/s)
45 21:08:24.682364 end: 1.1.1 http-download (duration 00:00:00) [common]
47 21:08:24.683306 end: 1.1 download-retry (duration 00:00:00) [common]
48 21:08:24.683610 start: 1.2 download-retry (timeout 00:10:00) [common]
49 21:08:24.683888 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 21:08:24.684415 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-42-gf23aa4c0761a7/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 21:08:24.684692 saving as /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/kernel/Image
52 21:08:24.684929 total size: 44136456 (42 MB)
53 21:08:24.685146 No compression specified
54 21:08:24.718181 progress 0 % (0 MB)
55 21:08:24.745244 progress 5 % (2 MB)
56 21:08:24.772037 progress 10 % (4 MB)
57 21:08:24.799622 progress 15 % (6 MB)
58 21:08:24.826217 progress 20 % (8 MB)
59 21:08:24.852750 progress 25 % (10 MB)
60 21:08:24.879622 progress 30 % (12 MB)
61 21:08:24.905770 progress 35 % (14 MB)
62 21:08:24.932074 progress 40 % (16 MB)
63 21:08:24.959082 progress 45 % (18 MB)
64 21:08:24.985487 progress 50 % (21 MB)
65 21:08:25.014397 progress 55 % (23 MB)
66 21:08:25.041380 progress 60 % (25 MB)
67 21:08:25.068051 progress 65 % (27 MB)
68 21:08:25.094786 progress 70 % (29 MB)
69 21:08:25.121754 progress 75 % (31 MB)
70 21:08:25.147916 progress 80 % (33 MB)
71 21:08:25.173854 progress 85 % (35 MB)
72 21:08:25.200282 progress 90 % (37 MB)
73 21:08:25.226681 progress 95 % (40 MB)
74 21:08:25.252480 progress 100 % (42 MB)
75 21:08:25.253245 42 MB downloaded in 0.57 s (74.07 MB/s)
76 21:08:25.253738 end: 1.2.1 http-download (duration 00:00:01) [common]
78 21:08:25.254598 end: 1.2 download-retry (duration 00:00:01) [common]
79 21:08:25.254880 start: 1.3 download-retry (timeout 00:09:59) [common]
80 21:08:25.255152 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 21:08:25.255629 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-42-gf23aa4c0761a7/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 21:08:25.255882 saving as /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 21:08:25.256116 total size: 53209 (0 MB)
84 21:08:25.256326 No compression specified
85 21:08:25.295845 progress 61 % (0 MB)
86 21:08:25.296736 progress 100 % (0 MB)
87 21:08:25.297272 0 MB downloaded in 0.04 s (1.23 MB/s)
88 21:08:25.297737 end: 1.3.1 http-download (duration 00:00:00) [common]
90 21:08:25.298550 end: 1.3 download-retry (duration 00:00:00) [common]
91 21:08:25.298820 start: 1.4 download-retry (timeout 00:09:59) [common]
92 21:08:25.299091 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 21:08:25.299550 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 21:08:25.299795 saving as /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/nfsrootfs/full.rootfs.tar
95 21:08:25.300053 total size: 107552908 (102 MB)
96 21:08:25.300276 Using unxz to decompress xz
97 21:08:25.335180 progress 0 % (0 MB)
98 21:08:25.990877 progress 5 % (5 MB)
99 21:08:26.719416 progress 10 % (10 MB)
100 21:08:27.448168 progress 15 % (15 MB)
101 21:08:28.210023 progress 20 % (20 MB)
102 21:08:28.783898 progress 25 % (25 MB)
103 21:08:29.404922 progress 30 % (30 MB)
104 21:08:30.146087 progress 35 % (35 MB)
105 21:08:30.492780 progress 40 % (41 MB)
106 21:08:30.989045 progress 45 % (46 MB)
107 21:08:31.824262 progress 50 % (51 MB)
108 21:08:32.647716 progress 55 % (56 MB)
109 21:08:33.457669 progress 60 % (61 MB)
110 21:08:34.214369 progress 65 % (66 MB)
111 21:08:34.945964 progress 70 % (71 MB)
112 21:08:35.719148 progress 75 % (76 MB)
113 21:08:36.491888 progress 80 % (82 MB)
114 21:08:37.245632 progress 85 % (87 MB)
115 21:08:38.021697 progress 90 % (92 MB)
116 21:08:38.753086 progress 95 % (97 MB)
117 21:08:39.503967 progress 100 % (102 MB)
118 21:08:39.516835 102 MB downloaded in 14.22 s (7.21 MB/s)
119 21:08:39.517433 end: 1.4.1 http-download (duration 00:00:14) [common]
121 21:08:39.518266 end: 1.4 download-retry (duration 00:00:14) [common]
122 21:08:39.518536 start: 1.5 download-retry (timeout 00:09:45) [common]
123 21:08:39.518798 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 21:08:39.519379 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-42-gf23aa4c0761a7/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 21:08:39.519640 saving as /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/modules/modules.tar
126 21:08:39.519848 total size: 11441952 (10 MB)
127 21:08:39.520221 Using unxz to decompress xz
128 21:08:39.566371 progress 0 % (0 MB)
129 21:08:39.638178 progress 5 % (0 MB)
130 21:08:39.714134 progress 10 % (1 MB)
131 21:08:39.805325 progress 15 % (1 MB)
132 21:08:39.884864 progress 20 % (2 MB)
133 21:08:39.970000 progress 25 % (2 MB)
134 21:08:40.046444 progress 30 % (3 MB)
135 21:08:40.127514 progress 35 % (3 MB)
136 21:08:40.208211 progress 40 % (4 MB)
137 21:08:40.290061 progress 45 % (4 MB)
138 21:08:40.366874 progress 50 % (5 MB)
139 21:08:40.443494 progress 55 % (6 MB)
140 21:08:40.524575 progress 60 % (6 MB)
141 21:08:40.607828 progress 65 % (7 MB)
142 21:08:40.691713 progress 70 % (7 MB)
143 21:08:40.788878 progress 75 % (8 MB)
144 21:08:40.886095 progress 80 % (8 MB)
145 21:08:40.963514 progress 85 % (9 MB)
146 21:08:41.040475 progress 90 % (9 MB)
147 21:08:41.114225 progress 95 % (10 MB)
148 21:08:41.192478 progress 100 % (10 MB)
149 21:08:41.204286 10 MB downloaded in 1.68 s (6.48 MB/s)
150 21:08:41.204927 end: 1.5.1 http-download (duration 00:00:02) [common]
152 21:08:41.205768 end: 1.5 download-retry (duration 00:00:02) [common]
153 21:08:41.206041 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 21:08:41.206308 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 21:08:52.092560 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/794742/extract-nfsrootfs-dgz3a311
156 21:08:52.093158 end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
157 21:08:52.093449 start: 1.6.2 lava-overlay (timeout 00:09:32) [common]
158 21:08:52.094205 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo
159 21:08:52.094686 makedir: /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin
160 21:08:52.095025 makedir: /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/tests
161 21:08:52.095343 makedir: /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/results
162 21:08:52.095676 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-add-keys
163 21:08:52.096250 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-add-sources
164 21:08:52.096781 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-background-process-start
165 21:08:52.097286 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-background-process-stop
166 21:08:52.097817 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-common-functions
167 21:08:52.098323 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-echo-ipv4
168 21:08:52.098838 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-install-packages
169 21:08:52.099333 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-installed-packages
170 21:08:52.099816 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-os-build
171 21:08:52.100347 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-probe-channel
172 21:08:52.100844 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-probe-ip
173 21:08:52.101436 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-target-ip
174 21:08:52.101935 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-target-mac
175 21:08:52.102420 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-target-storage
176 21:08:52.102910 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-case
177 21:08:52.103392 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-event
178 21:08:52.103876 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-feedback
179 21:08:52.104404 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-raise
180 21:08:52.104894 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-reference
181 21:08:52.105380 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-runner
182 21:08:52.105871 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-set
183 21:08:52.106351 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-test-shell
184 21:08:52.106842 Updating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-install-packages (oe)
185 21:08:52.107398 Updating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/bin/lava-installed-packages (oe)
186 21:08:52.107862 Creating /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/environment
187 21:08:52.108283 LAVA metadata
188 21:08:52.108552 - LAVA_JOB_ID=794742
189 21:08:52.108770 - LAVA_DISPATCHER_IP=192.168.6.2
190 21:08:52.109143 start: 1.6.2.1 ssh-authorize (timeout 00:09:32) [common]
191 21:08:52.110132 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 21:08:52.110454 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:32) [common]
193 21:08:52.110663 skipped lava-vland-overlay
194 21:08:52.110905 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 21:08:52.111158 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:32) [common]
196 21:08:52.111376 skipped lava-multinode-overlay
197 21:08:52.111620 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 21:08:52.111873 start: 1.6.2.4 test-definition (timeout 00:09:32) [common]
199 21:08:52.112156 Loading test definitions
200 21:08:52.112441 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:32) [common]
201 21:08:52.112662 Using /lava-794742 at stage 0
202 21:08:52.113868 uuid=794742_1.6.2.4.1 testdef=None
203 21:08:52.114180 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 21:08:52.114447 start: 1.6.2.4.2 test-overlay (timeout 00:09:32) [common]
205 21:08:52.116361 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 21:08:52.117156 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:32) [common]
208 21:08:52.119522 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 21:08:52.120374 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:32) [common]
211 21:08:52.122625 runner path: /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/0/tests/0_dmesg test_uuid 794742_1.6.2.4.1
212 21:08:52.123195 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 21:08:52.123949 Creating lava-test-runner.conf files
215 21:08:52.124172 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/794742/lava-overlay-92mhmexo/lava-794742/0 for stage 0
216 21:08:52.124519 - 0_dmesg
217 21:08:52.124860 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 21:08:52.125135 start: 1.6.2.5 compress-overlay (timeout 00:09:32) [common]
219 21:08:52.147015 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 21:08:52.147428 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:32) [common]
221 21:08:52.147902 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 21:08:52.148252 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 21:08:52.148527 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:32) [common]
224 21:08:52.784795 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 21:08:52.785279 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 21:08:52.785552 extracting modules file /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/794742/extract-nfsrootfs-dgz3a311
227 21:08:54.145430 extracting modules file /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk
228 21:08:55.543542 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 21:08:55.544066 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 21:08:55.544370 [common] Applying overlay to NFS
231 21:08:55.544602 [common] Applying overlay /var/lib/lava/dispatcher/tmp/794742/compress-overlay-v7d6hgng/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/794742/extract-nfsrootfs-dgz3a311
232 21:08:55.574735 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 21:08:55.575179 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 21:08:55.575477 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 21:08:55.575724 Converting downloaded kernel to a uImage
236 21:08:55.576064 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/kernel/Image /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/kernel/uImage
237 21:08:56.027238 output: Image Name:
238 21:08:56.027643 output: Created: Wed Oct 2 21:08:55 2024
239 21:08:56.027872 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 21:08:56.028128 output: Data Size: 44136456 Bytes = 43102.01 KiB = 42.09 MiB
241 21:08:56.028343 output: Load Address: 01080000
242 21:08:56.028551 output: Entry Point: 01080000
243 21:08:56.028757 output:
244 21:08:56.029098 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 21:08:56.029378 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 21:08:56.029656 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 21:08:56.029920 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 21:08:56.030186 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 21:08:56.030452 Building ramdisk /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk
250 21:08:58.214272 >> 165144 blocks
251 21:09:08.314050 Adding RAMdisk u-boot header.
252 21:09:08.314715 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk.cpio.gz.uboot
253 21:09:08.711462 output: Image Name:
254 21:09:08.711882 output: Created: Wed Oct 2 21:09:08 2024
255 21:09:08.712241 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 21:09:08.712653 output: Data Size: 23573719 Bytes = 23021.21 KiB = 22.48 MiB
257 21:09:08.713051 output: Load Address: 00000000
258 21:09:08.713445 output: Entry Point: 00000000
259 21:09:08.713837 output:
260 21:09:08.714906 rename /var/lib/lava/dispatcher/tmp/794742/extract-overlay-ramdisk-pdbe_ed_/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
261 21:09:08.715612 end: 1.6.8 compress-ramdisk (duration 00:00:13) [common]
262 21:09:08.716187 end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
263 21:09:08.716718 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:16) [common]
264 21:09:08.717179 No LXC device requested
265 21:09:08.717675 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 21:09:08.718182 start: 1.8 deploy-device-env (timeout 00:09:16) [common]
267 21:09:08.718672 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 21:09:08.719082 Checking files for TFTP limit of 4294967296 bytes.
269 21:09:08.721784 end: 1 tftp-deploy (duration 00:00:44) [common]
270 21:09:08.722362 start: 2 uboot-action (timeout 00:05:00) [common]
271 21:09:08.722879 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 21:09:08.723373 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 21:09:08.723868 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 21:09:08.724420 Using kernel file from prepare-kernel: 794742/tftp-deploy-1u2msy4v/kernel/uImage
275 21:09:08.725049 substitutions:
276 21:09:08.725448 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 21:09:08.725852 - {DTB_ADDR}: 0x01070000
278 21:09:08.726248 - {DTB}: 794742/tftp-deploy-1u2msy4v/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 21:09:08.726643 - {INITRD}: 794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
280 21:09:08.727035 - {KERNEL_ADDR}: 0x01080000
281 21:09:08.727421 - {KERNEL}: 794742/tftp-deploy-1u2msy4v/kernel/uImage
282 21:09:08.727813 - {LAVA_MAC}: None
283 21:09:08.728272 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/794742/extract-nfsrootfs-dgz3a311
284 21:09:08.728672 - {NFS_SERVER_IP}: 192.168.6.2
285 21:09:08.729060 - {PRESEED_CONFIG}: None
286 21:09:08.729447 - {PRESEED_LOCAL}: None
287 21:09:08.729831 - {RAMDISK_ADDR}: 0x08000000
288 21:09:08.730214 - {RAMDISK}: 794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
289 21:09:08.730602 - {ROOT_PART}: None
290 21:09:08.730989 - {ROOT}: None
291 21:09:08.731375 - {SERVER_IP}: 192.168.6.2
292 21:09:08.731760 - {TEE_ADDR}: 0x83000000
293 21:09:08.732172 - {TEE}: None
294 21:09:08.732560 Parsed boot commands:
295 21:09:08.732934 - setenv autoload no
296 21:09:08.733318 - setenv initrd_high 0xffffffff
297 21:09:08.733706 - setenv fdt_high 0xffffffff
298 21:09:08.734089 - dhcp
299 21:09:08.734478 - setenv serverip 192.168.6.2
300 21:09:08.734885 - tftpboot 0x01080000 794742/tftp-deploy-1u2msy4v/kernel/uImage
301 21:09:08.735284 - tftpboot 0x08000000 794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
302 21:09:08.735682 - tftpboot 0x01070000 794742/tftp-deploy-1u2msy4v/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 21:09:08.736110 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/794742/extract-nfsrootfs-dgz3a311,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 21:09:08.736526 - bootm 0x01080000 0x08000000 0x01070000
305 21:09:08.737032 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 21:09:08.738530 start: 2.3 connect-device (timeout 00:05:00) [common]
308 21:09:08.738957 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 21:09:08.755107 Setting prompt string to ['lava-test: # ']
310 21:09:08.756637 end: 2.3 connect-device (duration 00:00:00) [common]
311 21:09:08.757251 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 21:09:08.757804 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 21:09:08.758609 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 21:09:08.760132 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 21:09:08.794246 >> OK - accepted request
316 21:09:08.796313 Returned 0 in 0 seconds
317 21:09:08.897405 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 21:09:08.899031 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 21:09:08.899629 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 21:09:08.900207 Setting prompt string to ['Hit any key to stop autoboot']
322 21:09:08.900691 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 21:09:08.902246 Trying 192.168.56.21...
324 21:09:08.902741 Connected to conserv1.
325 21:09:08.903171 Escape character is '^]'.
326 21:09:08.903599
327 21:09:08.904064 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 21:09:08.904502
329 21:09:16.121011 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 21:09:16.121629 bl2_stage_init 0x01
331 21:09:16.122090 bl2_stage_init 0x81
332 21:09:16.126524 hw id: 0x0000 - pwm id 0x01
333 21:09:16.127051 bl2_stage_init 0xc1
334 21:09:16.132067 bl2_stage_init 0x02
335 21:09:16.132577
336 21:09:16.132998 L0:00000000
337 21:09:16.133425 L1:00000703
338 21:09:16.133839 L2:00008067
339 21:09:16.134231 L3:15000000
340 21:09:16.137622 S1:00000000
341 21:09:16.138096 B2:20282000
342 21:09:16.138531 B1:a0f83180
343 21:09:16.138936
344 21:09:16.139349 TE: 70126
345 21:09:16.139754
346 21:09:16.143210 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 21:09:16.143670
348 21:09:16.148808 Board ID = 1
349 21:09:16.149262 Set cpu clk to 24M
350 21:09:16.149681 Set clk81 to 24M
351 21:09:16.154412 Use GP1_pll as DSU clk.
352 21:09:16.154866 DSU clk: 1200 Mhz
353 21:09:16.155275 CPU clk: 1200 MHz
354 21:09:16.160013 Set clk81 to 166.6M
355 21:09:16.165590 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 21:09:16.166043 board id: 1
357 21:09:16.172833 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 21:09:16.183466 fw parse done
359 21:09:16.189436 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 21:09:16.232116 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 21:09:16.242989 PIEI prepare done
362 21:09:16.243474 fastboot data load
363 21:09:16.243888 fastboot data verify
364 21:09:16.248708 verify result: 266
365 21:09:16.254311 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 21:09:16.254811 LPDDR4 probe
367 21:09:16.255220 ddr clk to 1584MHz
368 21:09:16.261245 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 21:09:16.299617
370 21:09:16.300213 dmc_version 0001
371 21:09:16.306248 Check phy result
372 21:09:16.312088 INFO : End of CA training
373 21:09:16.312555 INFO : End of initialization
374 21:09:16.317696 INFO : Training has run successfully!
375 21:09:16.318177 Check phy result
376 21:09:16.323304 INFO : End of initialization
377 21:09:16.323764 INFO : End of read enable training
378 21:09:16.328897 INFO : End of fine write leveling
379 21:09:16.334501 INFO : End of Write leveling coarse delay
380 21:09:16.334965 INFO : Training has run successfully!
381 21:09:16.335364 Check phy result
382 21:09:16.340084 INFO : End of initialization
383 21:09:16.340568 INFO : End of read dq deskew training
384 21:09:16.345676 INFO : End of MPR read delay center optimization
385 21:09:16.351299 INFO : End of write delay center optimization
386 21:09:16.356895 INFO : End of read delay center optimization
387 21:09:16.357359 INFO : End of max read latency training
388 21:09:16.362512 INFO : Training has run successfully!
389 21:09:16.362981 1D training succeed
390 21:09:16.371660 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 21:09:16.419287 Check phy result
392 21:09:16.419833 INFO : End of initialization
393 21:09:16.441653 INFO : End of 2D read delay Voltage center optimization
394 21:09:16.460812 INFO : End of 2D read delay Voltage center optimization
395 21:09:16.512705 INFO : End of 2D write delay Voltage center optimization
396 21:09:16.561878 INFO : End of 2D write delay Voltage center optimization
397 21:09:16.567509 INFO : Training has run successfully!
398 21:09:16.567954
399 21:09:16.568405 channel==0
400 21:09:16.573068 RxClkDly_Margin_A0==78 ps 8
401 21:09:16.573547 TxDqDly_Margin_A0==98 ps 10
402 21:09:16.578725 RxClkDly_Margin_A1==88 ps 9
403 21:09:16.579220 TxDqDly_Margin_A1==98 ps 10
404 21:09:16.579648 TrainedVREFDQ_A0==74
405 21:09:16.584299 TrainedVREFDQ_A1==74
406 21:09:16.584759 VrefDac_Margin_A0==24
407 21:09:16.585158 DeviceVref_Margin_A0==40
408 21:09:16.589873 VrefDac_Margin_A1==23
409 21:09:16.590335 DeviceVref_Margin_A1==40
410 21:09:16.590752
411 21:09:16.591151
412 21:09:16.595549 channel==1
413 21:09:16.596118 RxClkDly_Margin_A0==78 ps 8
414 21:09:16.596565 TxDqDly_Margin_A0==98 ps 10
415 21:09:16.601041 RxClkDly_Margin_A1==78 ps 8
416 21:09:16.601511 TxDqDly_Margin_A1==88 ps 9
417 21:09:16.606654 TrainedVREFDQ_A0==78
418 21:09:16.607127 TrainedVREFDQ_A1==75
419 21:09:16.607536 VrefDac_Margin_A0==22
420 21:09:16.612321 DeviceVref_Margin_A0==36
421 21:09:16.612781 VrefDac_Margin_A1==22
422 21:09:16.617873 DeviceVref_Margin_A1==39
423 21:09:16.618336
424 21:09:16.618737 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 21:09:16.619137
426 21:09:16.651514 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 21:09:16.652116 2D training succeed
428 21:09:16.657031 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 21:09:16.662592 auto size-- 65535DDR cs0 size: 2048MB
430 21:09:16.663047 DDR cs1 size: 2048MB
431 21:09:16.668330 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 21:09:16.668830 cs0 DataBus test pass
433 21:09:16.673881 cs1 DataBus test pass
434 21:09:16.674346 cs0 AddrBus test pass
435 21:09:16.674760 cs1 AddrBus test pass
436 21:09:16.675161
437 21:09:16.679552 100bdlr_step_size ps== 478
438 21:09:16.680052 result report
439 21:09:16.685045 boot times 0Enable ddr reg access
440 21:09:16.690354 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 21:09:16.704079 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 21:09:17.359330 bl2z: ptr: 05129330, size: 00001e40
443 21:09:17.365914 0.0;M3 CHK:0;cm4_sp_mode 0
444 21:09:17.366401 MVN_1=0x00000000
445 21:09:17.366816 MVN_2=0x00000000
446 21:09:17.377289 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 21:09:17.377774 OPS=0x04
448 21:09:17.378214 ring efuse init
449 21:09:17.380283 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 21:09:17.386115 [0.017319 Inits done]
451 21:09:17.386586 secure task start!
452 21:09:17.386994 high task start!
453 21:09:17.387399 low task start!
454 21:09:17.390500 run into bl31
455 21:09:17.399030 NOTICE: BL31: v1.3(release):4fc40b1
456 21:09:17.406849 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 21:09:17.407310 NOTICE: BL31: G12A normal boot!
458 21:09:17.422321 NOTICE: BL31: BL33 decompress pass
459 21:09:17.428020 ERROR: Error initializing runtime service opteed_fast
460 21:09:20.171556 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 21:09:20.172236 bl2_stage_init 0x01
462 21:09:20.172676 bl2_stage_init 0x81
463 21:09:20.177191 hw id: 0x0000 - pwm id 0x01
464 21:09:20.177700 bl2_stage_init 0xc1
465 21:09:20.182879 bl2_stage_init 0x02
466 21:09:20.183385
467 21:09:20.183788 L0:00000000
468 21:09:20.184225 L1:00000703
469 21:09:20.184621 L2:00008067
470 21:09:20.185011 L3:15000000
471 21:09:20.188392 S1:00000000
472 21:09:20.188842 B2:20282000
473 21:09:20.189232 B1:a0f83180
474 21:09:20.189618
475 21:09:20.190004 TE: 69417
476 21:09:20.190393
477 21:09:20.194098 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 21:09:20.194550
479 21:09:20.199483 Board ID = 1
480 21:09:20.199924 Set cpu clk to 24M
481 21:09:20.200355 Set clk81 to 24M
482 21:09:20.205146 Use GP1_pll as DSU clk.
483 21:09:20.205590 DSU clk: 1200 Mhz
484 21:09:20.205983 CPU clk: 1200 MHz
485 21:09:20.210746 Set clk81 to 166.6M
486 21:09:20.216406 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 21:09:20.216854 board id: 1
488 21:09:20.223512 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 21:09:20.234448 fw parse done
490 21:09:20.240419 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 21:09:20.283474 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 21:09:20.294710 PIEI prepare done
493 21:09:20.295200 fastboot data load
494 21:09:20.295596 fastboot data verify
495 21:09:20.300277 verify result: 266
496 21:09:20.305871 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 21:09:20.306318 LPDDR4 probe
498 21:09:20.306707 ddr clk to 1584MHz
499 21:09:20.313909 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 21:09:20.351582
501 21:09:20.352082 dmc_version 0001
502 21:09:20.358654 Check phy result
503 21:09:20.364841 INFO : End of CA training
504 21:09:20.365309 INFO : End of initialization
505 21:09:20.370253 INFO : Training has run successfully!
506 21:09:20.370704 Check phy result
507 21:09:20.375880 INFO : End of initialization
508 21:09:20.376365 INFO : End of read enable training
509 21:09:20.381445 INFO : End of fine write leveling
510 21:09:20.387161 INFO : End of Write leveling coarse delay
511 21:09:20.387638 INFO : Training has run successfully!
512 21:09:20.388086 Check phy result
513 21:09:20.392633 INFO : End of initialization
514 21:09:20.393092 INFO : End of read dq deskew training
515 21:09:20.398259 INFO : End of MPR read delay center optimization
516 21:09:20.403790 INFO : End of write delay center optimization
517 21:09:20.409413 INFO : End of read delay center optimization
518 21:09:20.409878 INFO : End of max read latency training
519 21:09:20.415158 INFO : Training has run successfully!
520 21:09:20.415611 1D training succeed
521 21:09:20.424205 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 21:09:20.472495 Check phy result
523 21:09:20.473035 INFO : End of initialization
524 21:09:20.499977 INFO : End of 2D read delay Voltage center optimization
525 21:09:20.524120 INFO : End of 2D read delay Voltage center optimization
526 21:09:20.580885 INFO : End of 2D write delay Voltage center optimization
527 21:09:20.635481 INFO : End of 2D write delay Voltage center optimization
528 21:09:20.641239 INFO : Training has run successfully!
529 21:09:20.641702
530 21:09:20.642117 channel==0
531 21:09:20.646757 RxClkDly_Margin_A0==78 ps 8
532 21:09:20.647242 TxDqDly_Margin_A0==88 ps 9
533 21:09:20.647656 RxClkDly_Margin_A1==88 ps 9
534 21:09:20.652274 TxDqDly_Margin_A1==98 ps 10
535 21:09:20.652743 TrainedVREFDQ_A0==74
536 21:09:20.657909 TrainedVREFDQ_A1==74
537 21:09:20.658369 VrefDac_Margin_A0==23
538 21:09:20.658777 DeviceVref_Margin_A0==40
539 21:09:20.663827 VrefDac_Margin_A1==23
540 21:09:20.664322 DeviceVref_Margin_A1==40
541 21:09:20.664731
542 21:09:20.665134
543 21:09:20.665532 channel==1
544 21:09:20.669143 RxClkDly_Margin_A0==78 ps 8
545 21:09:20.669598 TxDqDly_Margin_A0==98 ps 10
546 21:09:20.674654 RxClkDly_Margin_A1==88 ps 9
547 21:09:20.675106 TxDqDly_Margin_A1==88 ps 9
548 21:09:20.680272 TrainedVREFDQ_A0==78
549 21:09:20.680741 TrainedVREFDQ_A1==75
550 21:09:20.681150 VrefDac_Margin_A0==22
551 21:09:20.686031 DeviceVref_Margin_A0==36
552 21:09:20.686497 VrefDac_Margin_A1==22
553 21:09:20.686907 DeviceVref_Margin_A1==39
554 21:09:20.687306
555 21:09:20.691472 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 21:09:20.691925
557 21:09:20.724967 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
558 21:09:20.725500 2D training succeed
559 21:09:20.730584 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 21:09:20.736210 auto size-- 65535DDR cs0 size: 2048MB
561 21:09:20.736666 DDR cs1 size: 2048MB
562 21:09:20.741773 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 21:09:20.742225 cs0 DataBus test pass
564 21:09:20.742633 cs1 DataBus test pass
565 21:09:20.747399 cs0 AddrBus test pass
566 21:09:20.747852 cs1 AddrBus test pass
567 21:09:20.748306
568 21:09:20.752981 100bdlr_step_size ps== 478
569 21:09:20.753449 result report
570 21:09:20.753857 boot times 0Enable ddr reg access
571 21:09:20.762980 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 21:09:20.775924 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 21:09:21.436838 bl2z: ptr: 05129330, size: 00001e40
574 21:09:21.444187 0.0;M3 CHK:0;cm4_sp_mode 0
575 21:09:21.444665 MVN_1=0x00000000
576 21:09:21.445075 MVN_2=0x00000000
577 21:09:21.455573 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 21:09:21.456090 OPS=0x04
579 21:09:21.456513 ring efuse init
580 21:09:21.461238 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 21:09:21.461704 [0.017354 Inits done]
582 21:09:21.462112 secure task start!
583 21:09:21.468498 high task start!
584 21:09:21.468955 low task start!
585 21:09:21.469360 run into bl31
586 21:09:21.477184 NOTICE: BL31: v1.3(release):4fc40b1
587 21:09:21.484984 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 21:09:21.485457 NOTICE: BL31: G12A normal boot!
589 21:09:21.500476 NOTICE: BL31: BL33 decompress pass
590 21:09:21.506237 ERROR: Error initializing runtime service opteed_fast
591 21:09:22.872999 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 21:09:22.873601 bl2_stage_init 0x01
593 21:09:22.874028 bl2_stage_init 0x81
594 21:09:22.878650 hw id: 0x0000 - pwm id 0x01
595 21:09:22.879139 bl2_stage_init 0xc1
596 21:09:22.884205 bl2_stage_init 0x02
597 21:09:22.884685
598 21:09:22.885104 L0:00000000
599 21:09:22.885513 L1:00000703
600 21:09:22.885915 L2:00008067
601 21:09:22.886316 L3:15000000
602 21:09:22.889826 S1:00000000
603 21:09:22.890307 B2:20282000
604 21:09:22.890718 B1:a0f83180
605 21:09:22.891122
606 21:09:22.891521 TE: 72136
607 21:09:22.891923
608 21:09:22.895431 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 21:09:22.895924
610 21:09:22.901014 Board ID = 1
611 21:09:22.901496 Set cpu clk to 24M
612 21:09:22.901907 Set clk81 to 24M
613 21:09:22.906622 Use GP1_pll as DSU clk.
614 21:09:22.907099 DSU clk: 1200 Mhz
615 21:09:22.907512 CPU clk: 1200 MHz
616 21:09:22.912220 Set clk81 to 166.6M
617 21:09:22.917843 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 21:09:22.918336 board id: 1
619 21:09:22.925001 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 21:09:22.935669 fw parse done
621 21:09:22.941624 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 21:09:22.984247 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 21:09:22.995339 PIEI prepare done
624 21:09:22.995876 fastboot data load
625 21:09:22.996372 fastboot data verify
626 21:09:23.000881 verify result: 266
627 21:09:23.006484 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 21:09:23.007129 LPDDR4 probe
629 21:09:23.007735 ddr clk to 1584MHz
630 21:09:23.014469 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 21:09:23.051740
632 21:09:23.052377 dmc_version 0001
633 21:09:23.058353 Check phy result
634 21:09:23.064366 INFO : End of CA training
635 21:09:23.064856 INFO : End of initialization
636 21:09:23.071279 INFO : Training has run successfully!
637 21:09:23.071779 Check phy result
638 21:09:23.075533 INFO : End of initialization
639 21:09:23.076053 INFO : End of read enable training
640 21:09:23.081101 INFO : End of fine write leveling
641 21:09:23.086646 INFO : End of Write leveling coarse delay
642 21:09:23.087118 INFO : Training has run successfully!
643 21:09:23.087526 Check phy result
644 21:09:23.092258 INFO : End of initialization
645 21:09:23.092723 INFO : End of read dq deskew training
646 21:09:23.097857 INFO : End of MPR read delay center optimization
647 21:09:23.103434 INFO : End of write delay center optimization
648 21:09:23.109033 INFO : End of read delay center optimization
649 21:09:23.109484 INFO : End of max read latency training
650 21:09:23.114621 INFO : Training has run successfully!
651 21:09:23.115072 1D training succeed
652 21:09:23.123762 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 21:09:23.171400 Check phy result
654 21:09:23.171882 INFO : End of initialization
655 21:09:23.193840 INFO : End of 2D read delay Voltage center optimization
656 21:09:23.212949 INFO : End of 2D read delay Voltage center optimization
657 21:09:23.264813 INFO : End of 2D write delay Voltage center optimization
658 21:09:23.313998 INFO : End of 2D write delay Voltage center optimization
659 21:09:23.319539 INFO : Training has run successfully!
660 21:09:23.320045
661 21:09:23.320485 channel==0
662 21:09:23.325128 RxClkDly_Margin_A0==88 ps 9
663 21:09:23.325591 TxDqDly_Margin_A0==98 ps 10
664 21:09:23.330721 RxClkDly_Margin_A1==88 ps 9
665 21:09:23.331175 TxDqDly_Margin_A1==88 ps 9
666 21:09:23.331588 TrainedVREFDQ_A0==74
667 21:09:23.336359 TrainedVREFDQ_A1==74
668 21:09:23.336815 VrefDac_Margin_A0==23
669 21:09:23.337225 DeviceVref_Margin_A0==40
670 21:09:23.341938 VrefDac_Margin_A1==23
671 21:09:23.342399 DeviceVref_Margin_A1==40
672 21:09:23.342813
673 21:09:23.343216
674 21:09:23.343616 channel==1
675 21:09:23.347565 RxClkDly_Margin_A0==78 ps 8
676 21:09:23.348052 TxDqDly_Margin_A0==98 ps 10
677 21:09:23.353156 RxClkDly_Margin_A1==78 ps 8
678 21:09:23.353609 TxDqDly_Margin_A1==88 ps 9
679 21:09:23.358786 TrainedVREFDQ_A0==78
680 21:09:23.359244 TrainedVREFDQ_A1==78
681 21:09:23.359655 VrefDac_Margin_A0==22
682 21:09:23.364326 DeviceVref_Margin_A0==36
683 21:09:23.364779 VrefDac_Margin_A1==22
684 21:09:23.369965 DeviceVref_Margin_A1==36
685 21:09:23.370421
686 21:09:23.370835 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 21:09:23.371240
688 21:09:23.403528 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 21:09:23.404097 2D training succeed
690 21:09:23.409153 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 21:09:23.414783 auto size-- 65535DDR cs0 size: 2048MB
692 21:09:23.415242 DDR cs1 size: 2048MB
693 21:09:23.420357 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 21:09:23.420811 cs0 DataBus test pass
695 21:09:23.425926 cs1 DataBus test pass
696 21:09:23.426375 cs0 AddrBus test pass
697 21:09:23.426782 cs1 AddrBus test pass
698 21:09:23.427183
699 21:09:23.431568 100bdlr_step_size ps== 478
700 21:09:23.432068 result report
701 21:09:23.437175 boot times 0Enable ddr reg access
702 21:09:23.442337 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 21:09:23.456171 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 21:09:24.111960 bl2z: ptr: 05129330, size: 00001e40
705 21:09:24.120242 0.0;M3 CHK:0;cm4_sp_mode 0
706 21:09:24.120745 MVN_1=0x00000000
707 21:09:24.121158 MVN_2=0x00000000
708 21:09:24.131659 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 21:09:24.132208 OPS=0x04
710 21:09:24.132657 ring efuse init
711 21:09:24.134640 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 21:09:24.141019 [0.017319 Inits done]
713 21:09:24.141529 secure task start!
714 21:09:24.141978 high task start!
715 21:09:24.142435 low task start!
716 21:09:24.145290 run into bl31
717 21:09:24.153956 NOTICE: BL31: v1.3(release):4fc40b1
718 21:09:24.161749 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 21:09:24.162271 NOTICE: BL31: G12A normal boot!
720 21:09:24.177292 NOTICE: BL31: BL33 decompress pass
721 21:09:24.182936 ERROR: Error initializing runtime service opteed_fast
722 21:09:24.978375
723 21:09:24.978998
724 21:09:24.983797 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 21:09:24.984352
726 21:09:24.987292 Model: Libre Computer AML-S905D3-CC Solitude
727 21:09:25.134331 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 21:09:25.149857 DRAM: 2 GiB (effective 3.8 GiB)
729 21:09:25.250782 Core: 406 devices, 33 uclasses, devicetree: separate
730 21:09:25.256652 WDT: Not starting watchdog@f0d0
731 21:09:25.281816 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 21:09:25.293890 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 21:09:25.298887 ** Bad device specification mmc 0 **
734 21:09:25.308878 Card did not respond to voltage select! : -110
735 21:09:25.316587 ** Bad device specification mmc 0 **
736 21:09:25.317098 Couldn't find partition mmc 0
737 21:09:25.324832 Card did not respond to voltage select! : -110
738 21:09:25.330331 ** Bad device specification mmc 0 **
739 21:09:25.330810 Couldn't find partition mmc 0
740 21:09:25.335405 Error: could not access storage.
741 21:09:25.631852 Net: eth0: ethernet@ff3f0000
742 21:09:25.632494 starting USB...
743 21:09:25.876787 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 21:09:25.877389 Starting the controller
745 21:09:25.883686 USB XHCI 1.10
746 21:09:27.437501 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 21:09:27.445953 scanning usb for storage devices... 0 Storage Device(s) found
749 21:09:27.497479 Hit any key to stop autoboot: 1
750 21:09:27.498466 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 21:09:27.499102 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 21:09:27.499631 Setting prompt string to ['=>']
753 21:09:27.500207 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 21:09:27.511922 0
755 21:09:27.512888 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 21:09:27.614184 => setenv autoload no
758 21:09:27.614982 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 21:09:27.619866 setenv autoload no
761 21:09:27.721464 => setenv initrd_high 0xffffffff
762 21:09:27.722192 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 21:09:27.726720 setenv initrd_high 0xffffffff
765 21:09:27.828261 => setenv fdt_high 0xffffffff
766 21:09:27.829005 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 21:09:27.833510 setenv fdt_high 0xffffffff
769 21:09:27.935177 => dhcp
770 21:09:27.935948 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 21:09:27.940078 dhcp
772 21:09:28.545721 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 21:09:28.546326 Speed: 1000, full duplex
774 21:09:28.546765 BOOTP broadcast 1
775 21:09:28.793256 BOOTP broadcast 2
776 21:09:29.294185 BOOTP broadcast 3
777 21:09:30.296140 BOOTP broadcast 4
778 21:09:32.297093 BOOTP broadcast 5
779 21:09:32.309160 DHCP client bound to address 192.168.6.12 (3763 ms)
781 21:09:32.410698 => setenv serverip 192.168.6.2
782 21:09:32.411703 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
783 21:09:32.415861 setenv serverip 192.168.6.2
785 21:09:32.517460 => tftpboot 0x01080000 794742/tftp-deploy-1u2msy4v/kernel/uImage
786 21:09:32.518239 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
787 21:09:32.524900 tftpboot 0x01080000 794742/tftp-deploy-1u2msy4v/kernel/uImage
788 21:09:32.525451 Speed: 1000, full duplex
789 21:09:32.525870 Using ethernet@ff3f0000 device
790 21:09:32.530304 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 21:09:32.535820 Filename '794742/tftp-deploy-1u2msy4v/kernel/uImage'.
792 21:09:32.539264 Load address: 0x1080000
793 21:09:37.082453 Loading: *################################################## 42.1 MiB
794 21:09:37.082850 9.3 MiB/s
795 21:09:37.083064 done
796 21:09:37.085714 Bytes transferred = 44136520 (2a17848 hex)
798 21:09:37.186711 => tftpboot 0x08000000 794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
799 21:09:37.187236 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
800 21:09:37.194356 tftpboot 0x08000000 794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot
801 21:09:37.194645 Speed: 1000, full duplex
802 21:09:37.194856 Using ethernet@ff3f0000 device
803 21:09:37.199829 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
804 21:09:37.208982 Filename '794742/tftp-deploy-1u2msy4v/ramdisk/ramdisk.cpio.gz.uboot'.
805 21:09:37.209290 Load address: 0x8000000
806 21:09:38.044840 Loading: *########## UDP wrong checksum 00000005 0000f4bd
807 21:09:39.658596 UDP wrong checksum 000000ff 00006c32
808 21:09:39.689647 UDP wrong checksum 000000ff 0000f124
809 21:09:44.561223 T ####################################### UDP wrong checksum 00000005 000026bb
810 21:09:49.561972 T UDP wrong checksum 00000005 000026bb
811 21:09:59.563950 T T UDP wrong checksum 00000005 000026bb
812 21:10:09.344242 T UDP wrong checksum 000000ff 0000bce8
813 21:10:09.392037 UDP wrong checksum 000000ff 00003fdb
814 21:10:17.161215 T T UDP wrong checksum 000000ff 0000f9ed
815 21:10:17.201319 UDP wrong checksum 000000ff 00007fe0
816 21:10:19.568312 T UDP wrong checksum 00000005 000026bb
817 21:10:28.183927 T UDP wrong checksum 000000ff 0000727a
818 21:10:28.196293 UDP wrong checksum 000000ff 0000f66c
819 21:10:34.572036 T
820 21:10:34.572667 Retry count exceeded; starting again
822 21:10:34.574071 end: 2.4.3 bootloader-commands (duration 00:01:07) [common]
825 21:10:34.575868 end: 2.4 uboot-commands (duration 00:01:26) [common]
827 21:10:34.577270 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
829 21:10:34.578315 end: 2 uboot-action (duration 00:01:26) [common]
831 21:10:34.579863 Cleaning after the job
832 21:10:34.580468 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/ramdisk
833 21:10:34.581629 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/kernel
834 21:10:34.609578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/dtb
835 21:10:34.610814 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/nfsrootfs
836 21:10:34.685432 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/794742/tftp-deploy-1u2msy4v/modules
837 21:10:34.706488 start: 4.1 power-off (timeout 00:00:30) [common]
838 21:10:34.707149 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
839 21:10:34.740814 >> OK - accepted request
840 21:10:34.742932 Returned 0 in 0 seconds
841 21:10:34.843885 end: 4.1 power-off (duration 00:00:00) [common]
843 21:10:34.844869 start: 4.2 read-feedback (timeout 00:10:00) [common]
844 21:10:34.845528 Listened to connection for namespace 'common' for up to 1s
845 21:10:35.846455 Finalising connection for namespace 'common'
846 21:10:35.846906 Disconnecting from shell: Finalise
847 21:10:35.847191 =>
848 21:10:35.947936 end: 4.2 read-feedback (duration 00:00:01) [common]
849 21:10:35.948670 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/794742
850 21:10:37.816212 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/794742
851 21:10:37.816822 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.