Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:20:53.928811 lava-dispatcher, installed at version: 2024.01
2 01:20:53.929600 start: 0 validate
3 01:20:53.930051 Start time: 2024-10-03 01:20:53.930024+00:00 (UTC)
4 01:20:53.930608 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:20:53.931108 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:20:53.975927 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:20:53.976534 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fkernel%2FImage exists
8 01:20:54.003460 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:20:54.004127 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:20:54.031251 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:20:54.031763 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:20:54.064155 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:20:54.064655 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-16%2Fmodules.tar.xz exists
14 01:20:54.098010 validate duration: 0.17
16 01:20:54.098887 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:20:54.099391 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:20:54.099750 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:20:54.100423 Not decompressing ramdisk as can be used compressed.
20 01:20:54.100926 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:20:54.101216 saving as /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/ramdisk/initrd.cpio.gz
22 01:20:54.101533 total size: 5628182 (5 MB)
23 01:20:54.143060 progress 0 % (0 MB)
24 01:20:54.147227 progress 5 % (0 MB)
25 01:20:54.151234 progress 10 % (0 MB)
26 01:20:54.154847 progress 15 % (0 MB)
27 01:20:54.158770 progress 20 % (1 MB)
28 01:20:54.162248 progress 25 % (1 MB)
29 01:20:54.166175 progress 30 % (1 MB)
30 01:20:54.170108 progress 35 % (1 MB)
31 01:20:54.173683 progress 40 % (2 MB)
32 01:20:54.177595 progress 45 % (2 MB)
33 01:20:54.181118 progress 50 % (2 MB)
34 01:20:54.184922 progress 55 % (2 MB)
35 01:20:54.188892 progress 60 % (3 MB)
36 01:20:54.192343 progress 65 % (3 MB)
37 01:20:54.196202 progress 70 % (3 MB)
38 01:20:54.199692 progress 75 % (4 MB)
39 01:20:54.203437 progress 80 % (4 MB)
40 01:20:54.206671 progress 85 % (4 MB)
41 01:20:54.210311 progress 90 % (4 MB)
42 01:20:54.213969 progress 95 % (5 MB)
43 01:20:54.217224 progress 100 % (5 MB)
44 01:20:54.217875 5 MB downloaded in 0.12 s (46.14 MB/s)
45 01:20:54.218443 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:20:54.219356 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:20:54.219678 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:20:54.219969 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:20:54.220508 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/kernel/Image
51 01:20:54.220797 saving as /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/kernel/Image
52 01:20:54.221021 total size: 39424512 (37 MB)
53 01:20:54.221243 No compression specified
54 01:20:54.252951 progress 0 % (0 MB)
55 01:20:54.279386 progress 5 % (1 MB)
56 01:20:54.302681 progress 10 % (3 MB)
57 01:20:54.326017 progress 15 % (5 MB)
58 01:20:54.349539 progress 20 % (7 MB)
59 01:20:54.373733 progress 25 % (9 MB)
60 01:20:54.397688 progress 30 % (11 MB)
61 01:20:54.421640 progress 35 % (13 MB)
62 01:20:54.445124 progress 40 % (15 MB)
63 01:20:54.468951 progress 45 % (16 MB)
64 01:20:54.492303 progress 50 % (18 MB)
65 01:20:54.515801 progress 55 % (20 MB)
66 01:20:54.538907 progress 60 % (22 MB)
67 01:20:54.562451 progress 65 % (24 MB)
68 01:20:54.586125 progress 70 % (26 MB)
69 01:20:54.609760 progress 75 % (28 MB)
70 01:20:54.632929 progress 80 % (30 MB)
71 01:20:54.656298 progress 85 % (31 MB)
72 01:20:54.679669 progress 90 % (33 MB)
73 01:20:54.703530 progress 95 % (35 MB)
74 01:20:54.726733 progress 100 % (37 MB)
75 01:20:54.727294 37 MB downloaded in 0.51 s (74.27 MB/s)
76 01:20:54.727769 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:20:54.728628 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:20:54.728903 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:20:54.729166 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:20:54.729617 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:20:54.729865 saving as /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:20:54.730071 total size: 53209 (0 MB)
84 01:20:54.730279 No compression specified
85 01:20:54.770806 progress 61 % (0 MB)
86 01:20:54.771653 progress 100 % (0 MB)
87 01:20:54.772220 0 MB downloaded in 0.04 s (1.20 MB/s)
88 01:20:54.772695 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:20:54.773496 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:20:54.773756 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:20:54.774015 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:20:54.774464 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:20:54.774717 saving as /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/nfsrootfs/full.rootfs.tar
95 01:20:54.774927 total size: 107552908 (102 MB)
96 01:20:54.775137 Using unxz to decompress xz
97 01:20:54.808874 progress 0 % (0 MB)
98 01:20:55.456987 progress 5 % (5 MB)
99 01:20:56.183181 progress 10 % (10 MB)
100 01:20:56.916414 progress 15 % (15 MB)
101 01:20:57.678434 progress 20 % (20 MB)
102 01:20:58.247764 progress 25 % (25 MB)
103 01:20:58.868663 progress 30 % (30 MB)
104 01:20:59.608053 progress 35 % (35 MB)
105 01:20:59.969896 progress 40 % (41 MB)
106 01:21:00.394102 progress 45 % (46 MB)
107 01:21:01.090620 progress 50 % (51 MB)
108 01:21:01.775096 progress 55 % (56 MB)
109 01:21:02.530751 progress 60 % (61 MB)
110 01:21:03.287379 progress 65 % (66 MB)
111 01:21:04.022351 progress 70 % (71 MB)
112 01:21:04.790070 progress 75 % (76 MB)
113 01:21:05.482454 progress 80 % (82 MB)
114 01:21:06.189181 progress 85 % (87 MB)
115 01:21:06.911433 progress 90 % (92 MB)
116 01:21:07.614490 progress 95 % (97 MB)
117 01:21:08.350993 progress 100 % (102 MB)
118 01:21:08.363942 102 MB downloaded in 13.59 s (7.55 MB/s)
119 01:21:08.364719 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:21:08.365780 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:21:08.366072 start: 1.5 download-retry (timeout 00:09:46) [common]
123 01:21:08.366362 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 01:21:08.367265 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-16/modules.tar.xz
125 01:21:08.367662 saving as /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/modules/modules.tar
126 01:21:08.368044 total size: 11756024 (11 MB)
127 01:21:08.368391 Using unxz to decompress xz
128 01:21:08.413293 progress 0 % (0 MB)
129 01:21:08.482766 progress 5 % (0 MB)
130 01:21:08.561929 progress 10 % (1 MB)
131 01:21:08.650309 progress 15 % (1 MB)
132 01:21:08.733027 progress 20 % (2 MB)
133 01:21:08.816710 progress 25 % (2 MB)
134 01:21:08.898411 progress 30 % (3 MB)
135 01:21:08.978431 progress 35 % (3 MB)
136 01:21:09.057283 progress 40 % (4 MB)
137 01:21:09.134706 progress 45 % (5 MB)
138 01:21:09.213667 progress 50 % (5 MB)
139 01:21:09.290848 progress 55 % (6 MB)
140 01:21:09.376110 progress 60 % (6 MB)
141 01:21:09.463142 progress 65 % (7 MB)
142 01:21:09.546170 progress 70 % (7 MB)
143 01:21:09.640948 progress 75 % (8 MB)
144 01:21:09.736817 progress 80 % (9 MB)
145 01:21:09.814285 progress 85 % (9 MB)
146 01:21:09.891336 progress 90 % (10 MB)
147 01:21:09.972093 progress 95 % (10 MB)
148 01:21:10.050527 progress 100 % (11 MB)
149 01:21:10.063802 11 MB downloaded in 1.70 s (6.61 MB/s)
150 01:21:10.064517 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:21:10.065421 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:21:10.065719 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 01:21:10.066009 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 01:21:20.052830 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/795762/extract-nfsrootfs-1mz9304c
156 01:21:20.053422 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:21:20.053707 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 01:21:20.054331 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc
159 01:21:20.054808 makedir: /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin
160 01:21:20.055151 makedir: /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/tests
161 01:21:20.055476 makedir: /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/results
162 01:21:20.055815 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-add-keys
163 01:21:20.056382 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-add-sources
164 01:21:20.056897 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-background-process-start
165 01:21:20.057399 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-background-process-stop
166 01:21:20.057930 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-common-functions
167 01:21:20.058438 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-echo-ipv4
168 01:21:20.058931 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-install-packages
169 01:21:20.059426 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-installed-packages
170 01:21:20.059916 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-os-build
171 01:21:20.060441 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-probe-channel
172 01:21:20.060948 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-probe-ip
173 01:21:20.061449 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-target-ip
174 01:21:20.061944 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-target-mac
175 01:21:20.062464 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-target-storage
176 01:21:20.063010 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-case
177 01:21:20.063548 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-event
178 01:21:20.064073 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-feedback
179 01:21:20.064576 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-raise
180 01:21:20.065072 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-reference
181 01:21:20.065567 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-runner
182 01:21:20.066063 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-set
183 01:21:20.066583 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-test-shell
184 01:21:20.067118 Updating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-install-packages (oe)
185 01:21:20.067670 Updating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/bin/lava-installed-packages (oe)
186 01:21:20.068211 Creating /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/environment
187 01:21:20.068620 LAVA metadata
188 01:21:20.068887 - LAVA_JOB_ID=795762
189 01:21:20.069105 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:21:20.069476 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 01:21:20.070473 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:21:20.070795 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 01:21:20.071005 skipped lava-vland-overlay
194 01:21:20.071248 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:21:20.071504 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 01:21:20.071724 skipped lava-multinode-overlay
197 01:21:20.071967 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:21:20.072251 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 01:21:20.072501 Loading test definitions
200 01:21:20.072778 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 01:21:20.072998 Using /lava-795762 at stage 0
202 01:21:20.074192 uuid=795762_1.6.2.4.1 testdef=None
203 01:21:20.074494 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:21:20.074752 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 01:21:20.076572 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:21:20.077382 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 01:21:20.079629 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:21:20.080477 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 01:21:20.082616 runner path: /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/0/tests/0_dmesg test_uuid 795762_1.6.2.4.1
212 01:21:20.083167 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:21:20.083917 Creating lava-test-runner.conf files
215 01:21:20.084158 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/795762/lava-overlay-_7jv_snc/lava-795762/0 for stage 0
216 01:21:20.084498 - 0_dmesg
217 01:21:20.084835 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:21:20.085106 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 01:21:20.106766 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:21:20.107126 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 01:21:20.107384 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:21:20.107646 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:21:20.107905 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 01:21:20.725759 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:21:20.726218 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 01:21:20.726483 extracting modules file /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795762/extract-nfsrootfs-1mz9304c
227 01:21:22.103779 extracting modules file /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk
228 01:21:23.529291 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:21:23.529765 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 01:21:23.530046 [common] Applying overlay to NFS
231 01:21:23.530260 [common] Applying overlay /var/lib/lava/dispatcher/tmp/795762/compress-overlay-gl2o0n9y/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/795762/extract-nfsrootfs-1mz9304c
232 01:21:23.560089 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:21:23.560488 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 01:21:23.560761 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 01:21:23.560993 Converting downloaded kernel to a uImage
236 01:21:23.561303 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/kernel/Image /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/kernel/uImage
237 01:21:23.962463 output: Image Name:
238 01:21:23.962884 output: Created: Thu Oct 3 01:21:23 2024
239 01:21:23.963094 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:21:23.963300 output: Data Size: 39424512 Bytes = 38500.50 KiB = 37.60 MiB
241 01:21:23.963501 output: Load Address: 01080000
242 01:21:23.963702 output: Entry Point: 01080000
243 01:21:23.963901 output:
244 01:21:23.964279 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:21:23.964547 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:21:23.964816 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 01:21:23.965095 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:21:23.965360 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 01:21:23.965615 Building ramdisk /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk
250 01:21:26.299135 >> 173426 blocks
251 01:21:34.008133 Adding RAMdisk u-boot header.
252 01:21:34.008818 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk.cpio.gz.uboot
253 01:21:34.255666 output: Image Name:
254 01:21:34.256151 output: Created: Thu Oct 3 01:21:34 2024
255 01:21:34.256628 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:21:34.257082 output: Data Size: 24125047 Bytes = 23559.62 KiB = 23.01 MiB
257 01:21:34.257530 output: Load Address: 00000000
258 01:21:34.257967 output: Entry Point: 00000000
259 01:21:34.258402 output:
260 01:21:34.259512 rename /var/lib/lava/dispatcher/tmp/795762/extract-overlay-ramdisk-hord94uh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
261 01:21:34.260316 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:21:34.260918 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 01:21:34.261493 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 01:21:34.261989 No LXC device requested
265 01:21:34.262534 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:21:34.263093 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 01:21:34.263633 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:21:34.264117 Checking files for TFTP limit of 4294967296 bytes.
269 01:21:34.267033 end: 1 tftp-deploy (duration 00:00:40) [common]
270 01:21:34.267665 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:21:34.268320 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:21:34.268876 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:21:34.269432 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:21:34.270006 Using kernel file from prepare-kernel: 795762/tftp-deploy-83uk6ezw/kernel/uImage
275 01:21:34.270696 substitutions:
276 01:21:34.271147 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:21:34.271591 - {DTB_ADDR}: 0x01070000
278 01:21:34.272064 - {DTB}: 795762/tftp-deploy-83uk6ezw/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:21:34.272509 - {INITRD}: 795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
280 01:21:34.272946 - {KERNEL_ADDR}: 0x01080000
281 01:21:34.273382 - {KERNEL}: 795762/tftp-deploy-83uk6ezw/kernel/uImage
282 01:21:34.273813 - {LAVA_MAC}: None
283 01:21:34.274289 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/795762/extract-nfsrootfs-1mz9304c
284 01:21:34.274728 - {NFS_SERVER_IP}: 192.168.6.2
285 01:21:34.275159 - {PRESEED_CONFIG}: None
286 01:21:34.275586 - {PRESEED_LOCAL}: None
287 01:21:34.276048 - {RAMDISK_ADDR}: 0x08000000
288 01:21:34.276488 - {RAMDISK}: 795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
289 01:21:34.276918 - {ROOT_PART}: None
290 01:21:34.277352 - {ROOT}: None
291 01:21:34.277780 - {SERVER_IP}: 192.168.6.2
292 01:21:34.278208 - {TEE_ADDR}: 0x83000000
293 01:21:34.278631 - {TEE}: None
294 01:21:34.279057 Parsed boot commands:
295 01:21:34.279470 - setenv autoload no
296 01:21:34.279894 - setenv initrd_high 0xffffffff
297 01:21:34.280350 - setenv fdt_high 0xffffffff
298 01:21:34.280774 - dhcp
299 01:21:34.281197 - setenv serverip 192.168.6.2
300 01:21:34.281622 - tftpboot 0x01080000 795762/tftp-deploy-83uk6ezw/kernel/uImage
301 01:21:34.282074 - tftpboot 0x08000000 795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
302 01:21:34.282558 - tftpboot 0x01070000 795762/tftp-deploy-83uk6ezw/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:21:34.283003 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/795762/extract-nfsrootfs-1mz9304c,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:21:34.283446 - bootm 0x01080000 0x08000000 0x01070000
305 01:21:34.284062 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:21:34.285739 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:21:34.286202 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:21:34.302564 Setting prompt string to ['lava-test: # ']
310 01:21:34.304215 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:21:34.304876 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:21:34.305485 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:21:34.306083 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:21:34.307323 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:21:34.344850 >> OK - accepted request
316 01:21:34.347106 Returned 0 in 0 seconds
317 01:21:34.448336 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:21:34.450114 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:21:34.450755 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:21:34.451307 Setting prompt string to ['Hit any key to stop autoboot']
322 01:21:34.451811 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:21:34.453549 Trying 192.168.56.21...
324 01:21:34.454077 Connected to conserv1.
325 01:21:34.454528 Escape character is '^]'.
326 01:21:34.454984
327 01:21:34.455445 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:21:34.455903
329 01:21:42.445920 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:21:42.446574 bl2_stage_init 0x01
331 01:21:42.447027 bl2_stage_init 0x81
332 01:21:42.451405 hw id: 0x0000 - pwm id 0x01
333 01:21:42.451890 bl2_stage_init 0xc1
334 01:21:42.457037 bl2_stage_init 0x02
335 01:21:42.457521
336 01:21:42.457968 L0:00000000
337 01:21:42.458415 L1:00000703
338 01:21:42.458856 L2:00008067
339 01:21:42.459288 L3:15000000
340 01:21:42.462720 S1:00000000
341 01:21:42.463212 B2:20282000
342 01:21:42.463665 B1:a0f83180
343 01:21:42.464135
344 01:21:42.464579 TE: 68956
345 01:21:42.465016
346 01:21:42.468390 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:21:42.468883
348 01:21:42.473848 Board ID = 1
349 01:21:42.474334 Set cpu clk to 24M
350 01:21:42.474773 Set clk81 to 24M
351 01:21:42.479499 Use GP1_pll as DSU clk.
352 01:21:42.480047 DSU clk: 1200 Mhz
353 01:21:42.480496 CPU clk: 1200 MHz
354 01:21:42.485103 Set clk81 to 166.6M
355 01:21:42.490693 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:21:42.491183 board id: 1
357 01:21:42.497880 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:21:42.508547 fw parse done
359 01:21:42.514532 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:21:42.557074 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:21:42.568026 PIEI prepare done
362 01:21:42.568534 fastboot data load
363 01:21:42.569000 fastboot data verify
364 01:21:42.573575 verify result: 266
365 01:21:42.579327 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:21:42.579798 LPDDR4 probe
367 01:21:42.580271 ddr clk to 1584MHz
368 01:21:42.587423 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:21:42.624680
370 01:21:42.625162 dmc_version 0001
371 01:21:42.631268 Check phy result
372 01:21:42.637097 INFO : End of CA training
373 01:21:42.637594 INFO : End of initialization
374 01:21:42.642635 INFO : Training has run successfully!
375 01:21:42.643105 Check phy result
376 01:21:42.648318 INFO : End of initialization
377 01:21:42.648781 INFO : End of read enable training
378 01:21:42.651533 INFO : End of fine write leveling
379 01:21:42.657110 INFO : End of Write leveling coarse delay
380 01:21:42.662728 INFO : Training has run successfully!
381 01:21:42.663192 Check phy result
382 01:21:42.663624 INFO : End of initialization
383 01:21:42.668298 INFO : End of read dq deskew training
384 01:21:42.673762 INFO : End of MPR read delay center optimization
385 01:21:42.674228 INFO : End of write delay center optimization
386 01:21:42.679397 INFO : End of read delay center optimization
387 01:21:42.685096 INFO : End of max read latency training
388 01:21:42.685571 INFO : Training has run successfully!
389 01:21:42.690583 1D training succeed
390 01:21:42.696562 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:21:42.744242 Check phy result
392 01:21:42.744794 INFO : End of initialization
393 01:21:42.766544 INFO : End of 2D read delay Voltage center optimization
394 01:21:42.785637 INFO : End of 2D read delay Voltage center optimization
395 01:21:42.837521 INFO : End of 2D write delay Voltage center optimization
396 01:21:42.886688 INFO : End of 2D write delay Voltage center optimization
397 01:21:42.892361 INFO : Training has run successfully!
398 01:21:42.892845
399 01:21:42.893291 channel==0
400 01:21:42.897961 RxClkDly_Margin_A0==88 ps 9
401 01:21:42.898430 TxDqDly_Margin_A0==98 ps 10
402 01:21:42.901428 RxClkDly_Margin_A1==88 ps 9
403 01:21:42.901902 TxDqDly_Margin_A1==98 ps 10
404 01:21:42.906998 TrainedVREFDQ_A0==75
405 01:21:42.907485 TrainedVREFDQ_A1==74
406 01:21:42.907926 VrefDac_Margin_A0==23
407 01:21:42.912581 DeviceVref_Margin_A0==39
408 01:21:42.913048 VrefDac_Margin_A1==23
409 01:21:42.918113 DeviceVref_Margin_A1==40
410 01:21:42.918574
411 01:21:42.919015
412 01:21:42.919453 channel==1
413 01:21:42.919884 RxClkDly_Margin_A0==78 ps 8
414 01:21:42.923774 TxDqDly_Margin_A0==98 ps 10
415 01:21:42.924276 RxClkDly_Margin_A1==78 ps 8
416 01:21:42.929351 TxDqDly_Margin_A1==88 ps 9
417 01:21:42.929821 TrainedVREFDQ_A0==78
418 01:21:42.930257 TrainedVREFDQ_A1==77
419 01:21:42.937675 VrefDac_Margin_A0==22
420 01:21:42.938138 DeviceVref_Margin_A0==36
421 01:21:42.939357 VrefDac_Margin_A1==22
422 01:21:42.939809 DeviceVref_Margin_A1==37
423 01:21:42.940282
424 01:21:42.945064 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:21:42.945530
426 01:21:42.972949 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 01:21:42.978522 2D training succeed
428 01:21:42.984157 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:21:42.989721 auto size-- 65535DDR cs0 size: 2048MB
430 01:21:42.990186 DDR cs1 size: 2048MB
431 01:21:42.990621 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:21:42.995352 cs0 DataBus test pass
433 01:21:42.995819 cs1 DataBus test pass
434 01:21:43.000946 cs0 AddrBus test pass
435 01:21:43.001407 cs1 AddrBus test pass
436 01:21:43.001839
437 01:21:43.002273 100bdlr_step_size ps== 478
438 01:21:43.006523 result report
439 01:21:43.006979 boot times 0Enable ddr reg access
440 01:21:43.015093 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:21:43.028933 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:21:43.684471 bl2z: ptr: 05129330, size: 00001e40
443 01:21:43.692756 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:21:43.693250 MVN_1=0x00000000
445 01:21:43.693686 MVN_2=0x00000000
446 01:21:43.704319 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:21:43.704800 OPS=0x04
448 01:21:43.705258 ring efuse init
449 01:21:43.709853 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:21:43.710334 [0.017319 Inits done]
451 01:21:43.710785 secure task start!
452 01:21:43.717622 high task start!
453 01:21:43.718102 low task start!
454 01:21:43.718550 run into bl31
455 01:21:43.726407 NOTICE: BL31: v1.3(release):4fc40b1
456 01:21:43.734048 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:21:43.734533 NOTICE: BL31: G12A normal boot!
458 01:21:43.749469 NOTICE: BL31: BL33 decompress pass
459 01:21:43.755172 ERROR: Error initializing runtime service opteed_fast
460 01:21:46.495261 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:21:46.495929 bl2_stage_init 0x01
462 01:21:46.496486 bl2_stage_init 0x81
463 01:21:46.500879 hw id: 0x0000 - pwm id 0x01
464 01:21:46.501397 bl2_stage_init 0xc1
465 01:21:46.506567 bl2_stage_init 0x02
466 01:21:46.507120
467 01:21:46.507567 L0:00000000
468 01:21:46.508030 L1:00000703
469 01:21:46.508470 L2:00008067
470 01:21:46.508897 L3:15000000
471 01:21:46.512081 S1:00000000
472 01:21:46.512553 B2:20282000
473 01:21:46.512983 B1:a0f83180
474 01:21:46.513409
475 01:21:46.513839 TE: 68575
476 01:21:46.514265
477 01:21:46.517737 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:21:46.518203
479 01:21:46.523254 Board ID = 1
480 01:21:46.523712 Set cpu clk to 24M
481 01:21:46.524181 Set clk81 to 24M
482 01:21:46.528853 Use GP1_pll as DSU clk.
483 01:21:46.529313 DSU clk: 1200 Mhz
484 01:21:46.529744 CPU clk: 1200 MHz
485 01:21:46.534442 Set clk81 to 166.6M
486 01:21:46.540076 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:21:46.540537 board id: 1
488 01:21:46.546382 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:21:46.558219 fw parse done
490 01:21:46.563678 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:21:46.607285 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:21:46.618380 PIEI prepare done
493 01:21:46.618848 fastboot data load
494 01:21:46.619282 fastboot data verify
495 01:21:46.623951 verify result: 266
496 01:21:46.629637 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:21:46.630109 LPDDR4 probe
498 01:21:46.630540 ddr clk to 1584MHz
499 01:21:46.637558 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 01:21:46.675310
501 01:21:46.675787 dmc_version 0001
502 01:21:46.682423 Check phy result
503 01:21:46.688301 INFO : End of CA training
504 01:21:46.688781 INFO : End of initialization
505 01:21:46.693884 INFO : Training has run successfully!
506 01:21:46.694372 Check phy result
507 01:21:46.699560 INFO : End of initialization
508 01:21:46.700057 INFO : End of read enable training
509 01:21:46.702826 INFO : End of fine write leveling
510 01:21:46.708293 INFO : End of Write leveling coarse delay
511 01:21:46.713910 INFO : Training has run successfully!
512 01:21:46.714381 Check phy result
513 01:21:46.714831 INFO : End of initialization
514 01:21:46.719558 INFO : End of read dq deskew training
515 01:21:46.725114 INFO : End of MPR read delay center optimization
516 01:21:46.725588 INFO : End of write delay center optimization
517 01:21:46.730814 INFO : End of read delay center optimization
518 01:21:46.736333 INFO : End of max read latency training
519 01:21:46.736803 INFO : Training has run successfully!
520 01:21:46.741926 1D training succeed
521 01:21:46.747901 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 01:21:46.796265 Check phy result
523 01:21:46.796831 INFO : End of initialization
524 01:21:46.823582 INFO : End of 2D read delay Voltage center optimization
525 01:21:46.847735 INFO : End of 2D read delay Voltage center optimization
526 01:21:46.904446 INFO : End of 2D write delay Voltage center optimization
527 01:21:46.958455 INFO : End of 2D write delay Voltage center optimization
528 01:21:46.963976 INFO : Training has run successfully!
529 01:21:46.964491
530 01:21:46.964947 channel==0
531 01:21:46.969616 RxClkDly_Margin_A0==78 ps 8
532 01:21:46.970086 TxDqDly_Margin_A0==98 ps 10
533 01:21:46.975210 RxClkDly_Margin_A1==78 ps 8
534 01:21:46.975670 TxDqDly_Margin_A1==88 ps 9
535 01:21:46.976150 TrainedVREFDQ_A0==74
536 01:21:46.980860 TrainedVREFDQ_A1==75
537 01:21:46.981332 VrefDac_Margin_A0==23
538 01:21:46.981776 DeviceVref_Margin_A0==40
539 01:21:46.986403 VrefDac_Margin_A1==23
540 01:21:46.986876 DeviceVref_Margin_A1==39
541 01:21:46.987322
542 01:21:46.987766
543 01:21:46.988248 channel==1
544 01:21:46.991973 RxClkDly_Margin_A0==78 ps 8
545 01:21:46.992472 TxDqDly_Margin_A0==98 ps 10
546 01:21:46.997628 RxClkDly_Margin_A1==78 ps 8
547 01:21:46.998107 TxDqDly_Margin_A1==88 ps 9
548 01:21:47.003206 TrainedVREFDQ_A0==78
549 01:21:47.003675 TrainedVREFDQ_A1==77
550 01:21:47.004155 VrefDac_Margin_A0==22
551 01:21:47.008796 DeviceVref_Margin_A0==36
552 01:21:47.009261 VrefDac_Margin_A1==22
553 01:21:47.014364 DeviceVref_Margin_A1==37
554 01:21:47.014831
555 01:21:47.015279 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 01:21:47.015723
557 01:21:47.048007 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 01:21:47.048558 2D training succeed
559 01:21:47.053593 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 01:21:47.059203 auto size-- 65535DDR cs0 size: 2048MB
561 01:21:47.059673 DDR cs1 size: 2048MB
562 01:21:47.064833 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 01:21:47.065301 cs0 DataBus test pass
564 01:21:47.070400 cs1 DataBus test pass
565 01:21:47.070867 cs0 AddrBus test pass
566 01:21:47.071309 cs1 AddrBus test pass
567 01:21:47.071749
568 01:21:47.076014 100bdlr_step_size ps== 471
569 01:21:47.076494 result report
570 01:21:47.081580 boot times 0Enable ddr reg access
571 01:21:47.086784 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 01:21:47.100708 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 01:21:47.760127 bl2z: ptr: 05129330, size: 00001e40
574 01:21:47.769466 0.0;M3 CHK:0;cm4_sp_mode 0
575 01:21:47.770026 MVN_1=0x00000000
576 01:21:47.770521 MVN_2=0x00000000
577 01:21:47.780914 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 01:21:47.781437 OPS=0x04
579 01:21:47.781904 ring efuse init
580 01:21:47.783875 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 01:21:47.789877 [0.017355 Inits done]
582 01:21:47.790349 secure task start!
583 01:21:47.790798 high task start!
584 01:21:47.791239 low task start!
585 01:21:47.794192 run into bl31
586 01:21:47.802855 NOTICE: BL31: v1.3(release):4fc40b1
587 01:21:47.810743 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 01:21:47.811257 NOTICE: BL31: G12A normal boot!
589 01:21:47.826365 NOTICE: BL31: BL33 decompress pass
590 01:21:47.831962 ERROR: Error initializing runtime service opteed_fast
591 01:21:49.195800 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 01:21:49.196498 bl2_stage_init 0x01
593 01:21:49.196970 bl2_stage_init 0x81
594 01:21:49.201220 hw id: 0x0000 - pwm id 0x01
595 01:21:49.201735 bl2_stage_init 0xc1
596 01:21:49.206437 bl2_stage_init 0x02
597 01:21:49.206972
598 01:21:49.207461 L0:00000000
599 01:21:49.207926 L1:00000703
600 01:21:49.208413 L2:00008067
601 01:21:49.212021 L3:15000000
602 01:21:49.212503 S1:00000000
603 01:21:49.212956 B2:20282000
604 01:21:49.213399 B1:a0f83180
605 01:21:49.213837
606 01:21:49.214272 TE: 68579
607 01:21:49.214713
608 01:21:49.223160 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 01:21:49.223646
610 01:21:49.224125 Board ID = 1
611 01:21:49.224574 Set cpu clk to 24M
612 01:21:49.225020 Set clk81 to 24M
613 01:21:49.228778 Use GP1_pll as DSU clk.
614 01:21:49.229256 DSU clk: 1200 Mhz
615 01:21:49.229705 CPU clk: 1200 MHz
616 01:21:49.234122 Set clk81 to 166.6M
617 01:21:49.239858 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 01:21:49.240525 board id: 1
619 01:21:49.247912 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 01:21:49.258376 fw parse done
621 01:21:49.263540 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 01:21:49.306944 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 01:21:49.317847 PIEI prepare done
624 01:21:49.318424 fastboot data load
625 01:21:49.318898 fastboot data verify
626 01:21:49.323634 verify result: 266
627 01:21:49.329154 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 01:21:49.329687 LPDDR4 probe
629 01:21:49.330147 ddr clk to 1584MHz
630 01:21:49.337232 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 01:21:49.373467
632 01:21:49.374048 dmc_version 0001
633 01:21:49.381086 Check phy result
634 01:21:49.386899 INFO : End of CA training
635 01:21:49.387544 INFO : End of initialization
636 01:21:49.392440 INFO : Training has run successfully!
637 01:21:49.393074 Check phy result
638 01:21:49.398082 INFO : End of initialization
639 01:21:49.398669 INFO : End of read enable training
640 01:21:49.403744 INFO : End of fine write leveling
641 01:21:49.409292 INFO : End of Write leveling coarse delay
642 01:21:49.409860 INFO : Training has run successfully!
643 01:21:49.410332 Check phy result
644 01:21:49.414929 INFO : End of initialization
645 01:21:49.415525 INFO : End of read dq deskew training
646 01:21:49.420516 INFO : End of MPR read delay center optimization
647 01:21:49.426152 INFO : End of write delay center optimization
648 01:21:49.431834 INFO : End of read delay center optimization
649 01:21:49.432566 INFO : End of max read latency training
650 01:21:49.437365 INFO : Training has run successfully!
651 01:21:49.438014 1D training succeed
652 01:21:49.446551 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 01:21:49.494294 Check phy result
654 01:21:49.494965 INFO : End of initialization
655 01:21:49.516742 INFO : End of 2D read delay Voltage center optimization
656 01:21:49.535683 INFO : End of 2D read delay Voltage center optimization
657 01:21:49.587568 INFO : End of 2D write delay Voltage center optimization
658 01:21:49.636835 INFO : End of 2D write delay Voltage center optimization
659 01:21:49.642516 INFO : Training has run successfully!
660 01:21:49.643039
661 01:21:49.643502 channel==0
662 01:21:49.647897 RxClkDly_Margin_A0==88 ps 9
663 01:21:49.648439 TxDqDly_Margin_A0==98 ps 10
664 01:21:49.651182 RxClkDly_Margin_A1==88 ps 9
665 01:21:49.651700 TxDqDly_Margin_A1==98 ps 10
666 01:21:49.656865 TrainedVREFDQ_A0==74
667 01:21:49.657392 TrainedVREFDQ_A1==74
668 01:21:49.662491 VrefDac_Margin_A0==23
669 01:21:49.663023 DeviceVref_Margin_A0==40
670 01:21:49.663507 VrefDac_Margin_A1==23
671 01:21:49.667778 DeviceVref_Margin_A1==40
672 01:21:49.668350
673 01:21:49.668841
674 01:21:49.669312 channel==1
675 01:21:49.669771 RxClkDly_Margin_A0==88 ps 9
676 01:21:49.673317 TxDqDly_Margin_A0==98 ps 10
677 01:21:49.673830 RxClkDly_Margin_A1==88 ps 9
678 01:21:49.679058 TxDqDly_Margin_A1==88 ps 9
679 01:21:49.679596 TrainedVREFDQ_A0==78
680 01:21:49.680111 TrainedVREFDQ_A1==77
681 01:21:49.684572 VrefDac_Margin_A0==23
682 01:21:49.685086 DeviceVref_Margin_A0==36
683 01:21:49.690188 VrefDac_Margin_A1==22
684 01:21:49.690737 DeviceVref_Margin_A1==37
685 01:21:49.691221
686 01:21:49.695774 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 01:21:49.696316
688 01:21:49.723766 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 01:21:49.729240 2D training succeed
690 01:21:49.734768 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 01:21:49.735260 auto size-- 65535DDR cs0 size: 2048MB
692 01:21:49.740349 DDR cs1 size: 2048MB
693 01:21:49.740834 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 01:21:49.746058 cs0 DataBus test pass
695 01:21:49.746559 cs1 DataBus test pass
696 01:21:49.747045 cs0 AddrBus test pass
697 01:21:49.751646 cs1 AddrBus test pass
698 01:21:49.752201
699 01:21:49.752670 100bdlr_step_size ps== 478
700 01:21:49.753133 result report
701 01:21:49.757263 boot times 0Enable ddr reg access
702 01:21:49.765024 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 01:21:49.778771 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 01:21:50.434430 bl2z: ptr: 05129330, size: 00001e40
705 01:21:50.442331 0.0;M3 CHK:0;cm4_sp_mode 0
706 01:21:50.442720 MVN_1=0x00000000
707 01:21:50.443019 MVN_2=0x00000000
708 01:21:50.453827 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 01:21:50.454374 OPS=0x04
710 01:21:50.454841 ring efuse init
711 01:21:50.459519 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 01:21:50.459832 [0.017319 Inits done]
713 01:21:50.460108 secure task start!
714 01:21:50.466850 high task start!
715 01:21:50.467166 low task start!
716 01:21:50.467420 run into bl31
717 01:21:50.475509 NOTICE: BL31: v1.3(release):4fc40b1
718 01:21:50.483318 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 01:21:50.483653 NOTICE: BL31: G12A normal boot!
720 01:21:50.498899 NOTICE: BL31: BL33 decompress pass
721 01:21:50.504545 ERROR: Error initializing runtime service opteed_fast
722 01:21:51.299801
723 01:21:51.300249
724 01:21:51.305305 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 01:21:51.305602
726 01:21:51.308733 Model: Libre Computer AML-S905D3-CC Solitude
727 01:21:51.455715 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 01:21:51.471180 DRAM: 2 GiB (effective 3.8 GiB)
729 01:21:51.572110 Core: 406 devices, 33 uclasses, devicetree: separate
730 01:21:51.578086 WDT: Not starting watchdog@f0d0
731 01:21:51.603162 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 01:21:51.615467 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 01:21:51.620403 ** Bad device specification mmc 0 **
734 01:21:51.630574 Card did not respond to voltage select! : -110
735 01:21:51.638107 ** Bad device specification mmc 0 **
736 01:21:51.638647 Couldn't find partition mmc 0
737 01:21:51.646701 Card did not respond to voltage select! : -110
738 01:21:51.651920 ** Bad device specification mmc 0 **
739 01:21:51.652488 Couldn't find partition mmc 0
740 01:21:51.656922 Error: could not access storage.
741 01:21:51.953347 Net: eth0: ethernet@ff3f0000
742 01:21:51.953776 starting USB...
743 01:21:52.198024 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 01:21:52.198629 Starting the controller
745 01:21:52.204063 USB XHCI 1.10
746 01:21:53.761313 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 01:21:53.769751 scanning usb for storage devices... 0 Storage Device(s) found
749 01:21:53.820777 Hit any key to stop autoboot: 1
750 01:21:53.821427 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 01:21:53.821781 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 01:21:53.822057 Setting prompt string to ['=>']
753 01:21:53.822327 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 01:21:53.835823 0
755 01:21:53.836530 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 01:21:53.937316 => setenv autoload no
758 01:21:53.937934 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 01:21:53.941203 setenv autoload no
761 01:21:54.042207 => setenv initrd_high 0xffffffff
762 01:21:54.042749 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 01:21:54.047012 setenv initrd_high 0xffffffff
765 01:21:54.148026 => setenv fdt_high 0xffffffff
766 01:21:54.148535 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 01:21:54.152791 setenv fdt_high 0xffffffff
769 01:21:54.253805 => dhcp
770 01:21:54.254414 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 01:21:54.257484 dhcp
772 01:21:55.364501 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 01:21:55.364926 Speed: 1000, full duplex
774 01:21:55.365147 BOOTP broadcast 1
775 01:21:55.613121 BOOTP broadcast 2
776 01:21:56.114021 BOOTP broadcast 3
777 01:21:57.115077 BOOTP broadcast 4
778 01:21:59.116115 BOOTP broadcast 5
779 01:21:59.127400 DHCP client bound to address 192.168.6.12 (3762 ms)
781 01:21:59.228956 => setenv serverip 192.168.6.2
782 01:21:59.229756 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
783 01:21:59.235142 setenv serverip 192.168.6.2
785 01:21:59.337229 => tftpboot 0x01080000 795762/tftp-deploy-83uk6ezw/kernel/uImage
786 01:21:59.338087 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
787 01:21:59.344882 tftpboot 0x01080000 795762/tftp-deploy-83uk6ezw/kernel/uImage
788 01:21:59.345526 Speed: 1000, full duplex
789 01:21:59.346072 Using ethernet@ff3f0000 device
790 01:21:59.350419 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 01:21:59.355956 Filename '795762/tftp-deploy-83uk6ezw/kernel/uImage'.
792 01:21:59.359767 Load address: 0x1080000
793 01:22:01.875423 Loading: *######################################### UDP wrong checksum 00000005 00004c22
794 01:22:02.392781 ######### 37.6 MiB
795 01:22:02.393343 12.4 MiB/s
796 01:22:02.393742 done
797 01:22:02.397264 Bytes transferred = 39424576 (2599240 hex)
799 01:22:02.498659 => tftpboot 0x08000000 795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
800 01:22:02.499283 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
801 01:22:02.506505 tftpboot 0x08000000 795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot
802 01:22:02.506948 Speed: 1000, full duplex
803 01:22:02.507347 Using ethernet@ff3f0000 device
804 01:22:02.511701 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
805 01:22:02.521450 Filename '795762/tftp-deploy-83uk6ezw/ramdisk/ramdisk.cpio.gz.uboot'.
806 01:22:02.521881 Load address: 0x8000000
807 01:22:04.506361 Loading: *################################################# UDP wrong checksum 00000005 00001d7b
808 01:22:09.506117 T UDP wrong checksum 00000005 00001d7b
809 01:22:19.508030 T T UDP wrong checksum 00000005 00001d7b
810 01:22:30.386189 T T UDP wrong checksum 000000ff 0000a378
811 01:22:30.433769 UDP wrong checksum 000000ff 0000386b
812 01:22:31.365985 UDP wrong checksum 000000ff 0000612b
813 01:22:31.405903 UDP wrong checksum 000000ff 0000f11d
814 01:22:39.512038 T T UDP wrong checksum 00000005 00001d7b
815 01:22:59.515771 T T T
816 01:22:59.516627 Retry count exceeded; starting again
818 01:22:59.519168 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
821 01:22:59.521272 end: 2.4 uboot-commands (duration 00:01:25) [common]
823 01:22:59.522765 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
825 01:22:59.523922 end: 2 uboot-action (duration 00:01:25) [common]
827 01:22:59.525695 Cleaning after the job
828 01:22:59.526339 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/ramdisk
829 01:22:59.527808 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/kernel
830 01:22:59.554592 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/dtb
831 01:22:59.556208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/nfsrootfs
832 01:22:59.650936 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795762/tftp-deploy-83uk6ezw/modules
833 01:22:59.671735 start: 4.1 power-off (timeout 00:00:30) [common]
834 01:22:59.672515 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
835 01:22:59.705433 >> OK - accepted request
836 01:22:59.707526 Returned 0 in 0 seconds
837 01:22:59.808527 end: 4.1 power-off (duration 00:00:00) [common]
839 01:22:59.809634 start: 4.2 read-feedback (timeout 00:10:00) [common]
840 01:22:59.810360 Listened to connection for namespace 'common' for up to 1s
841 01:23:00.811247 Finalising connection for namespace 'common'
842 01:23:00.811714 Disconnecting from shell: Finalise
843 01:23:00.812024 =>
844 01:23:00.912840 end: 4.2 read-feedback (duration 00:00:01) [common]
845 01:23:00.913577 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/795762
846 01:23:02.890666 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/795762
847 01:23:02.891267 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.