Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:53:25.337595 lava-dispatcher, installed at version: 2024.01
2 01:53:25.338415 start: 0 validate
3 01:53:25.338890 Start time: 2024-10-03 01:53:25.338861+00:00 (UTC)
4 01:53:25.339462 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:53:25.340014 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:53:25.413678 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:53:25.414242 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 01:53:25.444401 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:53:25.445035 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:53:25.476732 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:53:25.477225 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:53:25.505357 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:53:25.505840 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 01:53:25.546392 validate duration: 0.21
16 01:53:25.548105 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:53:25.548835 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:53:25.549492 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:53:25.550661 Not decompressing ramdisk as can be used compressed.
20 01:53:25.551605 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:53:25.552231 saving as /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/ramdisk/initrd.cpio.gz
22 01:53:25.552824 total size: 5628182 (5 MB)
23 01:53:25.600772 progress 0 % (0 MB)
24 01:53:25.609680 progress 5 % (0 MB)
25 01:53:25.618540 progress 10 % (0 MB)
26 01:53:25.626422 progress 15 % (0 MB)
27 01:53:25.633502 progress 20 % (1 MB)
28 01:53:25.637265 progress 25 % (1 MB)
29 01:53:25.641299 progress 30 % (1 MB)
30 01:53:25.645294 progress 35 % (1 MB)
31 01:53:25.648895 progress 40 % (2 MB)
32 01:53:25.652895 progress 45 % (2 MB)
33 01:53:25.656456 progress 50 % (2 MB)
34 01:53:25.660461 progress 55 % (2 MB)
35 01:53:25.664440 progress 60 % (3 MB)
36 01:53:25.667871 progress 65 % (3 MB)
37 01:53:25.671791 progress 70 % (3 MB)
38 01:53:25.675323 progress 75 % (4 MB)
39 01:53:25.679086 progress 80 % (4 MB)
40 01:53:25.682349 progress 85 % (4 MB)
41 01:53:25.685919 progress 90 % (4 MB)
42 01:53:25.689501 progress 95 % (5 MB)
43 01:53:25.692737 progress 100 % (5 MB)
44 01:53:25.693376 5 MB downloaded in 0.14 s (38.19 MB/s)
45 01:53:25.693920 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:53:25.694799 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:53:25.695085 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:53:25.695351 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:53:25.695817 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+debug/gcc-12/kernel/Image
51 01:53:25.696087 saving as /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/kernel/Image
52 01:53:25.696294 total size: 169937408 (162 MB)
53 01:53:25.696503 No compression specified
54 01:53:25.728180 progress 0 % (0 MB)
55 01:53:25.830204 progress 5 % (8 MB)
56 01:53:25.929211 progress 10 % (16 MB)
57 01:53:26.028521 progress 15 % (24 MB)
58 01:53:26.128256 progress 20 % (32 MB)
59 01:53:26.226268 progress 25 % (40 MB)
60 01:53:26.324535 progress 30 % (48 MB)
61 01:53:26.423544 progress 35 % (56 MB)
62 01:53:26.524137 progress 40 % (64 MB)
63 01:53:26.624358 progress 45 % (72 MB)
64 01:53:26.724866 progress 50 % (81 MB)
65 01:53:26.825329 progress 55 % (89 MB)
66 01:53:26.925328 progress 60 % (97 MB)
67 01:53:27.025139 progress 65 % (105 MB)
68 01:53:27.124884 progress 70 % (113 MB)
69 01:53:27.225465 progress 75 % (121 MB)
70 01:53:27.326069 progress 80 % (129 MB)
71 01:53:27.426849 progress 85 % (137 MB)
72 01:53:27.526812 progress 90 % (145 MB)
73 01:53:27.627002 progress 95 % (153 MB)
74 01:53:27.726718 progress 100 % (162 MB)
75 01:53:27.727284 162 MB downloaded in 2.03 s (79.80 MB/s)
76 01:53:27.727759 end: 1.2.1 http-download (duration 00:00:02) [common]
78 01:53:27.728605 end: 1.2 download-retry (duration 00:00:02) [common]
79 01:53:27.728877 start: 1.3 download-retry (timeout 00:09:58) [common]
80 01:53:27.729139 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 01:53:27.729613 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:53:27.729879 saving as /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:53:27.730088 total size: 53209 (0 MB)
84 01:53:27.730296 No compression specified
85 01:53:27.769804 progress 61 % (0 MB)
86 01:53:27.770653 progress 100 % (0 MB)
87 01:53:27.771198 0 MB downloaded in 0.04 s (1.23 MB/s)
88 01:53:27.771661 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:53:27.772509 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:53:27.772772 start: 1.4 download-retry (timeout 00:09:58) [common]
92 01:53:27.773031 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 01:53:27.773491 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:53:27.773730 saving as /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/nfsrootfs/full.rootfs.tar
95 01:53:27.773935 total size: 107552908 (102 MB)
96 01:53:27.774143 Using unxz to decompress xz
97 01:53:27.819134 progress 0 % (0 MB)
98 01:53:28.458402 progress 5 % (5 MB)
99 01:53:29.179501 progress 10 % (10 MB)
100 01:53:29.898458 progress 15 % (15 MB)
101 01:53:30.648342 progress 20 % (20 MB)
102 01:53:31.215554 progress 25 % (25 MB)
103 01:53:31.832477 progress 30 % (30 MB)
104 01:53:32.566915 progress 35 % (35 MB)
105 01:53:32.910084 progress 40 % (41 MB)
106 01:53:33.336506 progress 45 % (46 MB)
107 01:53:34.030358 progress 50 % (51 MB)
108 01:53:34.718193 progress 55 % (56 MB)
109 01:53:35.475771 progress 60 % (61 MB)
110 01:53:36.230049 progress 65 % (66 MB)
111 01:53:36.963418 progress 70 % (71 MB)
112 01:53:37.730463 progress 75 % (76 MB)
113 01:53:38.418943 progress 80 % (82 MB)
114 01:53:39.128615 progress 85 % (87 MB)
115 01:53:39.858648 progress 90 % (92 MB)
116 01:53:40.577192 progress 95 % (97 MB)
117 01:53:41.318972 progress 100 % (102 MB)
118 01:53:41.330805 102 MB downloaded in 13.56 s (7.57 MB/s)
119 01:53:41.331384 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:53:41.332448 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:53:41.332960 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:53:41.333460 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:53:41.334237 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 01:53:41.334683 saving as /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/modules/modules.tar
126 01:53:41.335077 total size: 27663052 (26 MB)
127 01:53:41.335483 Using unxz to decompress xz
128 01:53:41.384326 progress 0 % (0 MB)
129 01:53:41.569034 progress 5 % (1 MB)
130 01:53:41.798542 progress 10 % (2 MB)
131 01:53:42.036663 progress 15 % (3 MB)
132 01:53:42.325029 progress 20 % (5 MB)
133 01:53:42.574462 progress 25 % (6 MB)
134 01:53:42.819086 progress 30 % (7 MB)
135 01:53:43.064178 progress 35 % (9 MB)
136 01:53:43.308567 progress 40 % (10 MB)
137 01:53:43.508146 progress 45 % (11 MB)
138 01:53:43.722735 progress 50 % (13 MB)
139 01:53:43.935700 progress 55 % (14 MB)
140 01:53:44.138663 progress 60 % (15 MB)
141 01:53:44.327757 progress 65 % (17 MB)
142 01:53:44.535015 progress 70 % (18 MB)
143 01:53:44.736381 progress 75 % (19 MB)
144 01:53:44.938235 progress 80 % (21 MB)
145 01:53:45.148751 progress 85 % (22 MB)
146 01:53:45.369271 progress 90 % (23 MB)
147 01:53:45.575544 progress 95 % (25 MB)
148 01:53:45.777282 progress 100 % (26 MB)
149 01:53:45.788247 26 MB downloaded in 4.45 s (5.92 MB/s)
150 01:53:45.788857 end: 1.5.1 http-download (duration 00:00:04) [common]
152 01:53:45.790088 end: 1.5 download-retry (duration 00:00:04) [common]
153 01:53:45.790709 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 01:53:45.791268 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 01:53:55.968002 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/796013/extract-nfsrootfs-3i9kiesj
156 01:53:55.968632 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:53:55.968928 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 01:53:55.969526 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t
159 01:53:55.969989 makedir: /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin
160 01:53:55.970351 makedir: /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/tests
161 01:53:55.970690 makedir: /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/results
162 01:53:55.971096 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-add-keys
163 01:53:55.971708 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-add-sources
164 01:53:55.972315 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-background-process-start
165 01:53:55.972874 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-background-process-stop
166 01:53:55.973451 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-common-functions
167 01:53:55.974024 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-echo-ipv4
168 01:53:55.974541 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-install-packages
169 01:53:55.975102 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-installed-packages
170 01:53:55.975625 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-os-build
171 01:53:55.976266 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-probe-channel
172 01:53:55.976827 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-probe-ip
173 01:53:55.977342 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-target-ip
174 01:53:55.977860 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-target-mac
175 01:53:55.978402 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-target-storage
176 01:53:55.978948 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-case
177 01:53:55.979469 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-event
178 01:53:55.980025 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-feedback
179 01:53:55.980586 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-raise
180 01:53:55.981096 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-reference
181 01:53:55.981653 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-runner
182 01:53:55.982203 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-set
183 01:53:55.982746 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-test-shell
184 01:53:55.983312 Updating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-install-packages (oe)
185 01:53:55.983906 Updating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/bin/lava-installed-packages (oe)
186 01:53:55.984489 Creating /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/environment
187 01:53:55.984943 LAVA metadata
188 01:53:55.985231 - LAVA_JOB_ID=796013
189 01:53:55.985452 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:53:55.985857 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 01:53:55.986948 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:53:55.987332 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 01:53:55.987541 skipped lava-vland-overlay
194 01:53:55.987786 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:53:55.988075 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 01:53:55.988300 skipped lava-multinode-overlay
197 01:53:55.988543 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:53:55.988795 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 01:53:55.989062 Loading test definitions
200 01:53:55.989355 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 01:53:55.989581 Using /lava-796013 at stage 0
202 01:53:55.990915 uuid=796013_1.6.2.4.1 testdef=None
203 01:53:55.991295 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:53:55.991571 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 01:53:55.993739 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:53:55.994593 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 01:53:55.997231 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:53:55.998169 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 01:53:56.000646 runner path: /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/0/tests/0_dmesg test_uuid 796013_1.6.2.4.1
212 01:53:56.001373 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:53:56.002174 Creating lava-test-runner.conf files
215 01:53:56.002377 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/796013/lava-overlay-11y2_l3t/lava-796013/0 for stage 0
216 01:53:56.002756 - 0_dmesg
217 01:53:56.003147 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:53:56.003439 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 01:53:56.026385 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:53:56.026855 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 01:53:56.027118 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:53:56.027387 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:53:56.027650 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 01:53:56.753003 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:53:56.753470 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 01:53:56.753720 extracting modules file /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/796013/extract-nfsrootfs-3i9kiesj
227 01:53:58.508820 extracting modules file /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk
228 01:54:00.268868 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 01:54:00.269353 start: 1.6.5 apply-overlay-tftp (timeout 00:09:25) [common]
230 01:54:00.269633 [common] Applying overlay to NFS
231 01:54:00.269848 [common] Applying overlay /var/lib/lava/dispatcher/tmp/796013/compress-overlay-rwjb9hgd/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/796013/extract-nfsrootfs-3i9kiesj
232 01:54:00.299372 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:54:00.299765 start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
234 01:54:00.300075 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
235 01:54:00.300315 Converting downloaded kernel to a uImage
236 01:54:00.300615 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/kernel/Image /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/kernel/uImage
237 01:54:01.987639 output: Image Name:
238 01:54:01.988116 output: Created: Thu Oct 3 01:54:00 2024
239 01:54:01.988364 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:54:01.988571 output: Data Size: 169937408 Bytes = 165954.50 KiB = 162.06 MiB
241 01:54:01.988774 output: Load Address: 01080000
242 01:54:01.988971 output: Entry Point: 01080000
243 01:54:01.989167 output:
244 01:54:01.989500 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 01:54:01.989761 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 01:54:01.990023 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 01:54:01.990272 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:54:01.990524 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 01:54:01.990773 Building ramdisk /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk
250 01:54:07.551164 >> 426603 blocks
251 01:54:25.097339 Adding RAMdisk u-boot header.
252 01:54:25.097773 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk.cpio.gz.uboot
253 01:54:25.626322 output: Image Name:
254 01:54:25.626715 output: Created: Thu Oct 3 01:54:25 2024
255 01:54:25.626929 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:54:25.627136 output: Data Size: 50925249 Bytes = 49731.69 KiB = 48.57 MiB
257 01:54:25.627339 output: Load Address: 00000000
258 01:54:25.627539 output: Entry Point: 00000000
259 01:54:25.627736 output:
260 01:54:25.628561 rename /var/lib/lava/dispatcher/tmp/796013/extract-overlay-ramdisk-bqj9frwl/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/ramdisk/ramdisk.cpio.gz.uboot
261 01:54:25.629340 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 01:54:25.629936 end: 1.6 prepare-tftp-overlay (duration 00:00:40) [common]
263 01:54:25.630519 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 01:54:25.631027 No LXC device requested
265 01:54:25.631582 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:54:25.632186 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 01:54:25.632736 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:54:25.633188 Checking files for TFTP limit of 4294967296 bytes.
269 01:54:25.636144 end: 1 tftp-deploy (duration 00:01:00) [common]
270 01:54:25.636793 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:54:25.637369 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:54:25.637916 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:54:25.638467 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:54:25.639052 Using kernel file from prepare-kernel: 796013/tftp-deploy-7rnuam7_/kernel/uImage
275 01:54:25.639746 substitutions:
276 01:54:25.640235 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:54:25.640685 - {DTB_ADDR}: 0x01070000
278 01:54:25.641127 - {DTB}: 796013/tftp-deploy-7rnuam7_/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:54:25.641567 - {INITRD}: 796013/tftp-deploy-7rnuam7_/ramdisk/ramdisk.cpio.gz.uboot
280 01:54:25.642002 - {KERNEL_ADDR}: 0x01080000
281 01:54:25.642439 - {KERNEL}: 796013/tftp-deploy-7rnuam7_/kernel/uImage
282 01:54:25.642874 - {LAVA_MAC}: None
283 01:54:25.643352 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/796013/extract-nfsrootfs-3i9kiesj
284 01:54:25.643795 - {NFS_SERVER_IP}: 192.168.6.2
285 01:54:25.644260 - {PRESEED_CONFIG}: None
286 01:54:25.644696 - {PRESEED_LOCAL}: None
287 01:54:25.645129 - {RAMDISK_ADDR}: 0x08000000
288 01:54:25.645555 - {RAMDISK}: 796013/tftp-deploy-7rnuam7_/ramdisk/ramdisk.cpio.gz.uboot
289 01:54:25.645986 - {ROOT_PART}: None
290 01:54:25.646420 - {ROOT}: None
291 01:54:25.646852 - {SERVER_IP}: 192.168.6.2
292 01:54:25.647280 - {TEE_ADDR}: 0x83000000
293 01:54:25.647711 - {TEE}: None
294 01:54:25.648169 Parsed boot commands:
295 01:54:25.648590 - setenv autoload no
296 01:54:25.649018 - setenv initrd_high 0xffffffff
297 01:54:25.649444 - setenv fdt_high 0xffffffff
298 01:54:25.649869 - dhcp
299 01:54:25.650292 - setenv serverip 192.168.6.2
300 01:54:25.650719 - tftpboot 0x01080000 796013/tftp-deploy-7rnuam7_/kernel/uImage
301 01:54:25.651147 - tftpboot 0x08000000 796013/tftp-deploy-7rnuam7_/ramdisk/ramdisk.cpio.gz.uboot
302 01:54:25.651576 - tftpboot 0x01070000 796013/tftp-deploy-7rnuam7_/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:54:25.652026 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/796013/extract-nfsrootfs-3i9kiesj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:54:25.652474 - bootm 0x01080000 0x08000000 0x01070000
305 01:54:25.653035 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:54:25.654675 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:54:25.655137 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:54:25.671486 Setting prompt string to ['lava-test: # ']
310 01:54:25.673138 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:54:25.673794 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:54:25.674402 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:54:25.674982 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:54:25.676235 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:54:25.715455 >> OK - accepted request
316 01:54:25.717595 Returned 0 in 0 seconds
317 01:54:25.818768 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:54:25.820591 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:54:25.821213 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:54:25.821770 Setting prompt string to ['Hit any key to stop autoboot']
322 01:54:25.822273 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:54:25.824044 Trying 192.168.56.21...
324 01:54:25.824578 Connected to conserv1.
325 01:54:25.825023 Escape character is '^]'.
326 01:54:25.825477
327 01:54:25.825937 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:54:25.826388
329 01:54:32.966859 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:54:32.967673 bl2_stage_init 0x01
331 01:54:32.968306 bl2_stage_init 0x81
332 01:54:32.972568 hw id: 0x0000 - pwm id 0x01
333 01:54:32.973209 bl2_stage_init 0xc1
334 01:54:32.977949 bl2_stage_init 0x02
335 01:54:32.978577
336 01:54:32.979397 L0:00000000
337 01:54:32.979952 L1:00000703
338 01:54:32.980519 L2:00008067
339 01:54:32.981041 L3:15000000
340 01:54:32.981712 S1:00000000
341 01:54:32.984844 B2:20282000
342 01:54:32.985359 B1:a0f83180
343 01:54:32.985784
344 01:54:32.986096 TE: 68109
345 01:54:32.986309
346 01:54:32.990400 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:54:32.990897
348 01:54:32.991317 Board ID = 1
349 01:54:32.995917 Set cpu clk to 24M
350 01:54:32.996430 Set clk81 to 24M
351 01:54:32.996847 Use GP1_pll as DSU clk.
352 01:54:33.001492 DSU clk: 1200 Mhz
353 01:54:33.001903 CPU clk: 1200 MHz
354 01:54:33.002455 Set clk81 to 166.6M
355 01:54:33.007293 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:54:33.012882 board id: 1
357 01:54:33.018808 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:54:33.029277 fw parse done
359 01:54:33.035266 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:54:33.077713 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:54:33.088811 PIEI prepare done
362 01:54:33.089336 fastboot data load
363 01:54:33.089756 fastboot data verify
364 01:54:33.094330 verify result: 266
365 01:54:33.099934 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:54:33.100473 LPDDR4 probe
367 01:54:33.100886 ddr clk to 1584MHz
368 01:54:33.107931 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:54:33.145305
370 01:54:33.145834 dmc_version 0001
371 01:54:33.151862 Check phy result
372 01:54:33.157883 INFO : End of CA training
373 01:54:33.158359 INFO : End of initialization
374 01:54:33.163390 INFO : Training has run successfully!
375 01:54:33.163899 Check phy result
376 01:54:33.169065 INFO : End of initialization
377 01:54:33.169578 INFO : End of read enable training
378 01:54:33.174617 INFO : End of fine write leveling
379 01:54:33.180238 INFO : End of Write leveling coarse delay
380 01:54:33.180715 INFO : Training has run successfully!
381 01:54:33.181121 Check phy result
382 01:54:33.185634 INFO : End of initialization
383 01:54:33.185936 INFO : End of read dq deskew training
384 01:54:33.191248 INFO : End of MPR read delay center optimization
385 01:54:33.196996 INFO : End of write delay center optimization
386 01:54:33.202648 INFO : End of read delay center optimization
387 01:54:33.203145 INFO : End of max read latency training
388 01:54:33.208257 INFO : Training has run successfully!
389 01:54:33.208737 1D training succeed
390 01:54:33.217388 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:54:33.264024 Check phy result
392 01:54:33.264414 INFO : End of initialization
393 01:54:33.286468 INFO : End of 2D read delay Voltage center optimization
394 01:54:33.305557 INFO : End of 2D read delay Voltage center optimization
395 01:54:33.358162 INFO : End of 2D write delay Voltage center optimization
396 01:54:33.407468 INFO : End of 2D write delay Voltage center optimization
397 01:54:33.413015 INFO : Training has run successfully!
398 01:54:33.413385
399 01:54:33.413667 channel==0
400 01:54:33.418689 RxClkDly_Margin_A0==78 ps 8
401 01:54:33.419030 TxDqDly_Margin_A0==98 ps 10
402 01:54:33.424296 RxClkDly_Margin_A1==78 ps 8
403 01:54:33.424645 TxDqDly_Margin_A1==88 ps 9
404 01:54:33.424905 TrainedVREFDQ_A0==74
405 01:54:33.429843 TrainedVREFDQ_A1==74
406 01:54:33.430176 VrefDac_Margin_A0==25
407 01:54:33.430440 DeviceVref_Margin_A0==40
408 01:54:33.435553 VrefDac_Margin_A1==23
409 01:54:33.435889 DeviceVref_Margin_A1==40
410 01:54:33.436192
411 01:54:33.436444
412 01:54:33.436690 channel==1
413 01:54:33.440970 RxClkDly_Margin_A0==88 ps 9
414 01:54:33.441280 TxDqDly_Margin_A0==98 ps 10
415 01:54:33.446704 RxClkDly_Margin_A1==78 ps 8
416 01:54:33.447052 TxDqDly_Margin_A1==88 ps 9
417 01:54:33.452222 TrainedVREFDQ_A0==78
418 01:54:33.452564 TrainedVREFDQ_A1==75
419 01:54:33.452817 VrefDac_Margin_A0==22
420 01:54:33.457851 DeviceVref_Margin_A0==36
421 01:54:33.458179 VrefDac_Margin_A1==22
422 01:54:33.463392 DeviceVref_Margin_A1==39
423 01:54:33.463744
424 01:54:33.464037 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:54:33.464306
426 01:54:33.497075 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 01:54:33.497570 2D training succeed
428 01:54:33.502957 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:54:33.508343 auto size-- 65535DDR cs0 size: 2048MB
430 01:54:33.508704 DDR cs1 size: 2048MB
431 01:54:33.513789 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:54:33.514157 cs0 DataBus test pass
433 01:54:33.519360 cs1 DataBus test pass
434 01:54:33.519700 cs0 AddrBus test pass
435 01:54:33.519953 cs1 AddrBus test pass
436 01:54:33.520230
437 01:54:33.524962 100bdlr_step_size ps== 478
438 01:54:33.525313 result report
439 01:54:33.530672 boot times 0Enable ddr reg access
440 01:54:33.535742 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:54:33.549578 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:54:34.204502 bl2z: ptr: 05129330, size: 00001e40
443 01:54:34.212497 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:54:34.212886 MVN_1=0x00000000
445 01:54:34.213164 MVN_2=0x00000000
446 01:54:34.223933 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:54:34.224533 OPS=0x04
448 01:54:34.224852 ring efuse init
449 01:54:34.229555 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:54:34.229913 [0.017319 Inits done]
451 01:54:34.230185 secure task start!
452 01:54:34.236750 high task start!
453 01:54:34.237117 low task start!
454 01:54:34.237390 run into bl31
455 01:54:34.245311 NOTICE: BL31: v1.3(release):4fc40b1
456 01:54:34.253125 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:54:34.253524 NOTICE: BL31: G12A normal boot!
458 01:54:34.268760 NOTICE: BL31: BL33 decompress pass
459 01:54:34.274404 ERROR: Error initializing runtime service opteed_fast
460 01:54:37.016706 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:54:37.017165 bl2_stage_init 0x01
462 01:54:37.017390 bl2_stage_init 0x81
463 01:54:37.022340 hw id: 0x0000 - pwm id 0x01
464 01:54:37.022711 bl2_stage_init 0xc1
465 01:54:37.027866 bl2_stage_init 0x02
466 01:54:37.028257
467 01:54:37.028514 L0:00000000
468 01:54:37.028760 L1:00000703
469 01:54:37.028996 L2:00008067
470 01:54:37.029234 L3:15000000
471 01:54:37.033447 S1:00000000
472 01:54:37.033789 B2:20282000
473 01:54:37.034041 B1:a0f83180
474 01:54:37.034280
475 01:54:37.034521 TE: 68528
476 01:54:37.034759
477 01:54:37.039043 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:54:37.039368
479 01:54:37.044630 Board ID = 1
480 01:54:37.044978 Set cpu clk to 24M
481 01:54:37.045224 Set clk81 to 24M
482 01:54:37.050231 Use GP1_pll as DSU clk.
483 01:54:37.050561 DSU clk: 1200 Mhz
484 01:54:37.050813 CPU clk: 1200 MHz
485 01:54:37.055845 Set clk81 to 166.6M
486 01:54:37.061462 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:54:37.061805 board id: 1
488 01:54:37.068651 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:54:37.079347 fw parse done
490 01:54:37.085288 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:54:37.127004 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:54:37.139057 PIEI prepare done
493 01:54:37.139472 fastboot data load
494 01:54:37.139729 fastboot data verify
495 01:54:37.144523 verify result: 266
496 01:54:37.150221 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:54:37.150617 LPDDR4 probe
498 01:54:37.150867 ddr clk to 1584MHz
499 01:54:37.158200 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 01:54:37.194877
501 01:54:37.195309 dmc_version 0001
502 01:54:37.202109 Check phy result
503 01:54:37.208017 INFO : End of CA training
504 01:54:37.208437 INFO : End of initialization
505 01:54:37.213582 INFO : Training has run successfully!
506 01:54:37.213979 Check phy result
507 01:54:37.219312 INFO : End of initialization
508 01:54:37.219872 INFO : End of read enable training
509 01:54:37.224772 INFO : End of fine write leveling
510 01:54:37.230777 INFO : End of Write leveling coarse delay
511 01:54:37.231185 INFO : Training has run successfully!
512 01:54:37.231441 Check phy result
513 01:54:37.235971 INFO : End of initialization
514 01:54:37.236373 INFO : End of read dq deskew training
515 01:54:37.241546 INFO : End of MPR read delay center optimization
516 01:54:37.247227 INFO : End of write delay center optimization
517 01:54:37.252735 INFO : End of read delay center optimization
518 01:54:37.253124 INFO : End of max read latency training
519 01:54:37.258334 INFO : Training has run successfully!
520 01:54:37.258707 1D training succeed
521 01:54:37.267540 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 01:54:37.315281 Check phy result
523 01:54:37.315687 INFO : End of initialization
524 01:54:37.337512 INFO : End of 2D read delay Voltage center optimization
525 01:54:37.356622 INFO : End of 2D read delay Voltage center optimization
526 01:54:37.407555 INFO : End of 2D write delay Voltage center optimization
527 01:54:37.457719 INFO : End of 2D write delay Voltage center optimization
528 01:54:37.463269 INFO : Training has run successfully!
529 01:54:37.463578
530 01:54:37.463832 channel==0
531 01:54:37.468912 RxClkDly_Margin_A0==69 ps 7
532 01:54:37.469233 TxDqDly_Margin_A0==88 ps 9
533 01:54:37.474420 RxClkDly_Margin_A1==88 ps 9
534 01:54:37.474720 TxDqDly_Margin_A1==98 ps 10
535 01:54:37.474955 TrainedVREFDQ_A0==74
536 01:54:37.480076 TrainedVREFDQ_A1==74
537 01:54:37.480406 VrefDac_Margin_A0==23
538 01:54:37.480660 DeviceVref_Margin_A0==40
539 01:54:37.485611 VrefDac_Margin_A1==23
540 01:54:37.485934 DeviceVref_Margin_A1==40
541 01:54:37.486192
542 01:54:37.486422
543 01:54:37.486636 channel==1
544 01:54:37.491233 RxClkDly_Margin_A0==78 ps 8
545 01:54:37.491572 TxDqDly_Margin_A0==88 ps 9
546 01:54:37.496829 RxClkDly_Margin_A1==88 ps 9
547 01:54:37.497156 TxDqDly_Margin_A1==88 ps 9
548 01:54:37.502411 TrainedVREFDQ_A0==75
549 01:54:37.502749 TrainedVREFDQ_A1==75
550 01:54:37.502969 VrefDac_Margin_A0==22
551 01:54:37.508070 DeviceVref_Margin_A0==39
552 01:54:37.508428 VrefDac_Margin_A1==22
553 01:54:37.508633 DeviceVref_Margin_A1==39
554 01:54:37.513568
555 01:54:37.513812 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 01:54:37.514013
557 01:54:37.547207 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
558 01:54:37.547499 2D training succeed
559 01:54:37.552823 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 01:54:37.558432 auto size-- 65535DDR cs0 size: 2048MB
561 01:54:37.558909 DDR cs1 size: 2048MB
562 01:54:37.564074 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 01:54:37.564547 cs0 DataBus test pass
564 01:54:37.569606 cs1 DataBus test pass
565 01:54:37.570091 cs0 AddrBus test pass
566 01:54:37.570525 cs1 AddrBus test pass
567 01:54:37.570957
568 01:54:37.575261 100bdlr_step_size ps== 478
569 01:54:37.575743 result report
570 01:54:37.580829 boot times 0Enable ddr reg access
571 01:54:37.584984 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 01:54:37.599732 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 01:54:38.253710 bl2z: ptr: 05129330, size: 00001e40
574 01:54:38.261582 0.0;M3 CHK:0;cm4_sp_mode 0
575 01:54:38.262139 MVN_1=0x00000000
576 01:54:38.262431 MVN_2=0x00000000
577 01:54:38.273151 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 01:54:38.273721 OPS=0x04
579 01:54:38.274016 ring efuse init
580 01:54:38.278690 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 01:54:38.279206 [0.017310 Inits done]
582 01:54:38.279613 secure task start!
583 01:54:38.285947 high task start!
584 01:54:38.286327 low task start!
585 01:54:38.286574 run into bl31
586 01:54:38.294537 NOTICE: BL31: v1.3(release):4fc40b1
587 01:54:38.302389 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 01:54:38.302950 NOTICE: BL31: G12A normal boot!
589 01:54:38.317852 NOTICE: BL31: BL33 decompress pass
590 01:54:38.322594 ERROR: Error initializing runtime service opteed_fast
591 01:54:39.718765 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 01:54:39.719193 bl2_stage_init 0x01
593 01:54:39.719452 bl2_stage_init 0x81
594 01:54:39.724188 hw id: 0x0000 - pwm id 0x01
595 01:54:39.724646 bl2_stage_init 0xc1
596 01:54:39.729615 bl2_stage_init 0x02
597 01:54:39.730082
598 01:54:39.730358 L0:00000000
599 01:54:39.730595 L1:00000703
600 01:54:39.730819 L2:00008067
601 01:54:39.731064 L3:15000000
602 01:54:39.735089 S1:00000000
603 01:54:39.735548 B2:20282000
604 01:54:39.735938 B1:a0f83180
605 01:54:39.736231
606 01:54:39.736461 TE: 68629
607 01:54:39.736697
608 01:54:39.740790 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 01:54:39.741118
610 01:54:39.746359 Board ID = 1
611 01:54:39.746843 Set cpu clk to 24M
612 01:54:39.747469 Set clk81 to 24M
613 01:54:39.751836 Use GP1_pll as DSU clk.
614 01:54:39.752172 DSU clk: 1200 Mhz
615 01:54:39.752413 CPU clk: 1200 MHz
616 01:54:39.757503 Set clk81 to 166.6M
617 01:54:39.763188 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 01:54:39.763688 board id: 1
619 01:54:39.770490 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 01:54:39.781224 fw parse done
621 01:54:39.787085 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 01:54:39.829705 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 01:54:39.840621 PIEI prepare done
624 01:54:39.840944 fastboot data load
625 01:54:39.841171 fastboot data verify
626 01:54:39.846185 verify result: 266
627 01:54:39.851850 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 01:54:39.852333 LPDDR4 probe
629 01:54:39.852578 ddr clk to 1584MHz
630 01:54:39.859885 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 01:54:39.897245
632 01:54:39.897620 dmc_version 0001
633 01:54:39.903804 Check phy result
634 01:54:39.909698 INFO : End of CA training
635 01:54:39.910113 INFO : End of initialization
636 01:54:39.915247 INFO : Training has run successfully!
637 01:54:39.915529 Check phy result
638 01:54:39.920982 INFO : End of initialization
639 01:54:39.921390 INFO : End of read enable training
640 01:54:39.926643 INFO : End of fine write leveling
641 01:54:39.932137 INFO : End of Write leveling coarse delay
642 01:54:39.932435 INFO : Training has run successfully!
643 01:54:39.932642 Check phy result
644 01:54:39.937689 INFO : End of initialization
645 01:54:39.937964 INFO : End of read dq deskew training
646 01:54:39.943240 INFO : End of MPR read delay center optimization
647 01:54:39.948840 INFO : End of write delay center optimization
648 01:54:39.954537 INFO : End of read delay center optimization
649 01:54:39.954832 INFO : End of max read latency training
650 01:54:39.960128 INFO : Training has run successfully!
651 01:54:39.960432 1D training succeed
652 01:54:39.969280 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 01:54:40.016840 Check phy result
654 01:54:40.017344 INFO : End of initialization
655 01:54:40.039227 INFO : End of 2D read delay Voltage center optimization
656 01:54:40.058560 INFO : End of 2D read delay Voltage center optimization
657 01:54:40.110410 INFO : End of 2D write delay Voltage center optimization
658 01:54:40.159661 INFO : End of 2D write delay Voltage center optimization
659 01:54:40.165057 INFO : Training has run successfully!
660 01:54:40.165348
661 01:54:40.165565 channel==0
662 01:54:40.170690 RxClkDly_Margin_A0==69 ps 7
663 01:54:40.170963 TxDqDly_Margin_A0==88 ps 9
664 01:54:40.176384 RxClkDly_Margin_A1==78 ps 8
665 01:54:40.176797 TxDqDly_Margin_A1==88 ps 9
666 01:54:40.177144 TrainedVREFDQ_A0==74
667 01:54:40.181939 TrainedVREFDQ_A1==75
668 01:54:40.182258 VrefDac_Margin_A0==24
669 01:54:40.182484 DeviceVref_Margin_A0==40
670 01:54:40.187601 VrefDac_Margin_A1==23
671 01:54:40.187919 DeviceVref_Margin_A1==39
672 01:54:40.188166
673 01:54:40.188457
674 01:54:40.188669 channel==1
675 01:54:40.193089 RxClkDly_Margin_A0==78 ps 8
676 01:54:40.193410 TxDqDly_Margin_A0==88 ps 9
677 01:54:40.198654 RxClkDly_Margin_A1==78 ps 8
678 01:54:40.199074 TxDqDly_Margin_A1==88 ps 9
679 01:54:40.204371 TrainedVREFDQ_A0==76
680 01:54:40.204686 TrainedVREFDQ_A1==75
681 01:54:40.204903 VrefDac_Margin_A0==22
682 01:54:40.209874 DeviceVref_Margin_A0==38
683 01:54:40.210293 VrefDac_Margin_A1==22
684 01:54:40.210640 DeviceVref_Margin_A1==39
685 01:54:40.215548
686 01:54:40.215951 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 01:54:40.216237
688 01:54:40.249098 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 01:54:40.249599 2D training succeed
690 01:54:40.254731 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 01:54:40.260187 auto size-- 65535DDR cs0 size: 2048MB
692 01:54:40.260474 DDR cs1 size: 2048MB
693 01:54:40.265760 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 01:54:40.266046 cs0 DataBus test pass
695 01:54:40.271369 cs1 DataBus test pass
696 01:54:40.271641 cs0 AddrBus test pass
697 01:54:40.271854 cs1 AddrBus test pass
698 01:54:40.272092
699 01:54:40.277016 100bdlr_step_size ps== 478
700 01:54:40.277312 result report
701 01:54:40.282575 boot times 0Enable ddr reg access
702 01:54:40.287636 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 01:54:40.301494 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 01:54:40.956238 bl2z: ptr: 05129330, size: 00001e40
705 01:54:40.964298 0.0;M3 CHK:0;cm4_sp_mode 0
706 01:54:40.964852 MVN_1=0x00000000
707 01:54:40.965319 MVN_2=0x00000000
708 01:54:40.975717 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 01:54:40.976342 OPS=0x04
710 01:54:40.976813 ring efuse init
711 01:54:40.981335 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 01:54:40.981844 [0.017310 Inits done]
713 01:54:40.982202 secure task start!
714 01:54:40.988514 high task start!
715 01:54:40.988768 low task start!
716 01:54:40.989258 run into bl31
717 01:54:40.997223 NOTICE: BL31: v1.3(release):4fc40b1
718 01:54:41.005021 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 01:54:41.005547 NOTICE: BL31: G12A normal boot!
720 01:54:41.020658 NOTICE: BL31: BL33 decompress pass
721 01:54:41.026219 ERROR: Error initializing runtime service opteed_fast
722 01:54:41.821668
723 01:54:41.822342
724 01:54:41.826985 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 01:54:41.827496
726 01:54:41.829568 Model: Libre Computer AML-S905D3-CC Solitude
727 01:54:41.977595 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 01:54:41.992886 DRAM: 2 GiB (effective 3.8 GiB)
729 01:54:42.093883 Core: 406 devices, 33 uclasses, devicetree: separate
730 01:54:42.099861 WDT: Not starting watchdog@f0d0
731 01:54:42.124888 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 01:54:42.137094 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 01:54:42.142109 ** Bad device specification mmc 0 **
734 01:54:42.152128 Card did not respond to voltage select! : -110
735 01:54:42.159955 ** Bad device specification mmc 0 **
736 01:54:42.160459 Couldn't find partition mmc 0
737 01:54:42.168238 Card did not respond to voltage select! : -110
738 01:54:42.173710 ** Bad device specification mmc 0 **
739 01:54:42.174179 Couldn't find partition mmc 0
740 01:54:42.178766 Error: could not access storage.
741 01:54:42.476189 Net: eth0: ethernet@ff3f0000
742 01:54:42.476809 starting USB...
743 01:54:42.720884 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 01:54:42.721500 Starting the controller
745 01:54:42.727835 USB XHCI 1.10
746 01:54:44.284213 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 01:54:44.292385 scanning usb for storage devices... 0 Storage Device(s) found
749 01:54:44.344066 Hit any key to stop autoboot: 1
750 01:54:44.345012 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 01:54:44.345651 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 01:54:44.346182 Setting prompt string to ['=>']
753 01:54:44.346707 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 01:54:44.357538 0
755 01:54:44.358478 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 01:54:44.459966 => setenv autoload no
758 01:54:44.461130 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 01:54:44.466710 setenv autoload no
761 01:54:44.568412 => setenv initrd_high 0xffffffff
762 01:54:44.569264 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 01:54:44.573474 setenv initrd_high 0xffffffff
765 01:54:44.675297 => setenv fdt_high 0xffffffff
766 01:54:44.676294 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 01:54:44.680345 setenv fdt_high 0xffffffff
769 01:54:44.782050 => dhcp
770 01:54:44.782861 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 01:54:44.787014 dhcp
772 01:54:45.843091 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 01:54:45.843774 Speed: 1000, full duplex
774 01:54:45.844300 BOOTP broadcast 1
775 01:54:46.091778 BOOTP broadcast 2
776 01:54:46.592845 BOOTP broadcast 3
777 01:54:47.593716 BOOTP broadcast 4
778 01:54:49.594876 BOOTP broadcast 5
779 01:54:49.606906 DHCP client bound to address 192.168.6.12 (3763 ms)
781 01:54:49.708432 => setenv serverip 192.168.6.2
782 01:54:49.709352 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
783 01:54:49.713969 setenv serverip 192.168.6.2
785 01:54:49.815417 => tftpboot 0x01080000 796013/tftp-deploy-7rnuam7_/kernel/uImage
786 01:54:49.816329 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
787 01:54:49.823065 tftpboot 0x01080000 796013/tftp-deploy-7rnuam7_/kernel/uImage
788 01:54:49.823554 Speed: 1000, full duplex
789 01:54:49.823966 Using ethernet@ff3f0000 device
790 01:54:49.828559 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 01:54:49.834085 Filename '796013/tftp-deploy-7rnuam7_/kernel/uImage'.
792 01:54:49.837975 Load address: 0x1080000
793 01:54:51.437128 Loading: *#### UDP wrong checksum 000000ff 00003a02
794 01:54:51.467239 UDP wrong checksum 000000ff 0000c2f4
795 01:54:54.957827 ############ UDP wrong checksum 000000ff 0000b270
796 01:54:55.008012 UDP wrong checksum 000000ff 00003863
797 01:55:01.056557 #T ##
798 01:55:01.057075 TFTP error: trying to overwrite reserved memory...
800 01:55:01.058092 end: 2.4.3 bootloader-commands (duration 00:00:17) [common]
803 01:55:01.059249 end: 2.4 uboot-commands (duration 00:00:35) [common]
805 01:55:01.060166 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
807 01:55:01.061052 end: 2 uboot-action (duration 00:00:35) [common]
809 01:55:01.062132 Cleaning after the job
810 01:55:01.062544 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/ramdisk
811 01:55:01.080466 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/kernel
812 01:55:01.100578 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/dtb
813 01:55:01.101715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/nfsrootfs
814 01:55:01.136218 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/796013/tftp-deploy-7rnuam7_/modules
815 01:55:01.153952 start: 4.1 power-off (timeout 00:00:30) [common]
816 01:55:01.154618 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
817 01:55:01.190965 >> OK - accepted request
818 01:55:01.193194 Returned 0 in 0 seconds
819 01:55:01.294036 end: 4.1 power-off (duration 00:00:00) [common]
821 01:55:01.295072 start: 4.2 read-feedback (timeout 00:10:00) [common]
822 01:55:01.295738 Listened to connection for namespace 'common' for up to 1s
823 01:55:02.296737 Finalising connection for namespace 'common'
824 01:55:02.297541 Disconnecting from shell: Finalise
825 01:55:02.297840 =>
826 01:55:02.398634 end: 4.2 read-feedback (duration 00:00:01) [common]
827 01:55:02.399337 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/796013
828 01:55:04.211093 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/796013
829 01:55:04.211749 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.