Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:14:13.882838 lava-dispatcher, installed at version: 2024.01
2 01:14:13.883618 start: 0 validate
3 01:14:13.884104 Start time: 2024-10-03 01:14:13.884073+00:00 (UTC)
4 01:14:13.884676 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:14:13.885222 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:14:13.923217 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:14:13.923751 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:14:13.958433 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:14:13.959391 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:14:13.992693 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:14:13.993188 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:14:14.027521 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:14:14.028039 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:14:14.069245 validate duration: 0.19
16 01:14:14.070153 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:14:14.070522 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:14:14.070887 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:14:14.071458 Not decompressing ramdisk as can be used compressed.
20 01:14:14.071912 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:14:14.072253 saving as /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/ramdisk/initrd.cpio.gz
22 01:14:14.072568 total size: 5628182 (5 MB)
23 01:14:14.114485 progress 0 % (0 MB)
24 01:14:14.118857 progress 5 % (0 MB)
25 01:14:14.123363 progress 10 % (0 MB)
26 01:14:14.127450 progress 15 % (0 MB)
27 01:14:14.131781 progress 20 % (1 MB)
28 01:14:14.135727 progress 25 % (1 MB)
29 01:14:14.140007 progress 30 % (1 MB)
30 01:14:14.144253 progress 35 % (1 MB)
31 01:14:14.148007 progress 40 % (2 MB)
32 01:14:14.152276 progress 45 % (2 MB)
33 01:14:14.155806 progress 50 % (2 MB)
34 01:14:14.159738 progress 55 % (2 MB)
35 01:14:14.163621 progress 60 % (3 MB)
36 01:14:14.167146 progress 65 % (3 MB)
37 01:14:14.171039 progress 70 % (3 MB)
38 01:14:14.174607 progress 75 % (4 MB)
39 01:14:14.178501 progress 80 % (4 MB)
40 01:14:14.182014 progress 85 % (4 MB)
41 01:14:14.185903 progress 90 % (4 MB)
42 01:14:14.189674 progress 95 % (5 MB)
43 01:14:14.193031 progress 100 % (5 MB)
44 01:14:14.193685 5 MB downloaded in 0.12 s (44.32 MB/s)
45 01:14:14.194232 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:14:14.195133 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:14:14.195423 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:14:14.195698 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:14:14.196204 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/kernel/Image
51 01:14:14.196453 saving as /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/kernel/Image
52 01:14:14.196664 total size: 45713920 (43 MB)
53 01:14:14.196876 No compression specified
54 01:14:14.240588 progress 0 % (0 MB)
55 01:14:14.268942 progress 5 % (2 MB)
56 01:14:14.297244 progress 10 % (4 MB)
57 01:14:14.325855 progress 15 % (6 MB)
58 01:14:14.354200 progress 20 % (8 MB)
59 01:14:14.382503 progress 25 % (10 MB)
60 01:14:14.410964 progress 30 % (13 MB)
61 01:14:14.440073 progress 35 % (15 MB)
62 01:14:14.468707 progress 40 % (17 MB)
63 01:14:14.496814 progress 45 % (19 MB)
64 01:14:14.526102 progress 50 % (21 MB)
65 01:14:14.554794 progress 55 % (24 MB)
66 01:14:14.583647 progress 60 % (26 MB)
67 01:14:14.611862 progress 65 % (28 MB)
68 01:14:14.640964 progress 70 % (30 MB)
69 01:14:14.669756 progress 75 % (32 MB)
70 01:14:14.698431 progress 80 % (34 MB)
71 01:14:14.726969 progress 85 % (37 MB)
72 01:14:14.755688 progress 90 % (39 MB)
73 01:14:14.784225 progress 95 % (41 MB)
74 01:14:14.812613 progress 100 % (43 MB)
75 01:14:14.813197 43 MB downloaded in 0.62 s (70.71 MB/s)
76 01:14:14.813675 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:14:14.814492 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:14:14.814771 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:14:14.815041 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:14:14.815571 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:14:14.815849 saving as /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:14:14.816087 total size: 54703 (0 MB)
84 01:14:14.816300 No compression specified
85 01:14:14.852650 progress 59 % (0 MB)
86 01:14:14.853504 progress 100 % (0 MB)
87 01:14:14.854044 0 MB downloaded in 0.04 s (1.37 MB/s)
88 01:14:14.854509 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:14:14.855326 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:14:14.855590 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:14:14.855855 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:14:14.856340 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:14:14.856585 saving as /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/nfsrootfs/full.rootfs.tar
95 01:14:14.856790 total size: 107552908 (102 MB)
96 01:14:14.857003 Using unxz to decompress xz
97 01:14:14.905354 progress 0 % (0 MB)
98 01:14:15.562256 progress 5 % (5 MB)
99 01:14:16.302694 progress 10 % (10 MB)
100 01:14:17.021803 progress 15 % (15 MB)
101 01:14:17.776241 progress 20 % (20 MB)
102 01:14:18.346068 progress 25 % (25 MB)
103 01:14:18.965780 progress 30 % (30 MB)
104 01:14:19.700912 progress 35 % (35 MB)
105 01:14:20.061500 progress 40 % (41 MB)
106 01:14:20.490363 progress 45 % (46 MB)
107 01:14:21.176241 progress 50 % (51 MB)
108 01:14:21.851068 progress 55 % (56 MB)
109 01:14:22.598439 progress 60 % (61 MB)
110 01:14:23.344506 progress 65 % (66 MB)
111 01:14:24.070175 progress 70 % (71 MB)
112 01:14:24.830047 progress 75 % (76 MB)
113 01:14:25.563922 progress 80 % (82 MB)
114 01:14:26.350109 progress 85 % (87 MB)
115 01:14:27.157635 progress 90 % (92 MB)
116 01:14:27.940488 progress 95 % (97 MB)
117 01:14:28.743307 progress 100 % (102 MB)
118 01:14:28.755476 102 MB downloaded in 13.90 s (7.38 MB/s)
119 01:14:28.756384 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:14:28.758028 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:14:28.758564 start: 1.5 download-retry (timeout 00:09:45) [common]
123 01:14:28.759099 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 01:14:28.760065 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/modules.tar.xz
125 01:14:28.760560 saving as /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/modules/modules.tar
126 01:14:28.760982 total size: 11617124 (11 MB)
127 01:14:28.761412 Using unxz to decompress xz
128 01:14:28.807009 progress 0 % (0 MB)
129 01:14:28.875247 progress 5 % (0 MB)
130 01:14:28.951917 progress 10 % (1 MB)
131 01:14:29.037704 progress 15 % (1 MB)
132 01:14:29.113600 progress 20 % (2 MB)
133 01:14:29.196708 progress 25 % (2 MB)
134 01:14:29.275369 progress 30 % (3 MB)
135 01:14:29.353943 progress 35 % (3 MB)
136 01:14:29.426660 progress 40 % (4 MB)
137 01:14:29.502862 progress 45 % (5 MB)
138 01:14:29.580211 progress 50 % (5 MB)
139 01:14:29.651474 progress 55 % (6 MB)
140 01:14:29.735620 progress 60 % (6 MB)
141 01:14:29.821802 progress 65 % (7 MB)
142 01:14:29.903484 progress 70 % (7 MB)
143 01:14:29.996849 progress 75 % (8 MB)
144 01:14:30.092673 progress 80 % (8 MB)
145 01:14:30.174802 progress 85 % (9 MB)
146 01:14:30.249433 progress 90 % (10 MB)
147 01:14:30.320772 progress 95 % (10 MB)
148 01:14:30.396202 progress 100 % (11 MB)
149 01:14:30.408112 11 MB downloaded in 1.65 s (6.73 MB/s)
150 01:14:30.409178 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:14:30.410955 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:14:30.411534 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 01:14:30.412159 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 01:14:40.308709 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/795671/extract-nfsrootfs-dnwfrs8t
156 01:14:40.309323 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:14:40.309619 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 01:14:40.310254 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv
159 01:14:40.310695 makedir: /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin
160 01:14:40.311029 makedir: /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/tests
161 01:14:40.311352 makedir: /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/results
162 01:14:40.311701 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-add-keys
163 01:14:40.312290 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-add-sources
164 01:14:40.312840 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-background-process-start
165 01:14:40.313362 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-background-process-stop
166 01:14:40.313910 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-common-functions
167 01:14:40.314415 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-echo-ipv4
168 01:14:40.314934 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-install-packages
169 01:14:40.315435 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-installed-packages
170 01:14:40.315920 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-os-build
171 01:14:40.316446 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-probe-channel
172 01:14:40.316951 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-probe-ip
173 01:14:40.317456 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-target-ip
174 01:14:40.317943 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-target-mac
175 01:14:40.318441 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-target-storage
176 01:14:40.318942 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-case
177 01:14:40.319440 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-event
178 01:14:40.319934 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-feedback
179 01:14:40.320460 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-raise
180 01:14:40.320969 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-reference
181 01:14:40.321473 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-runner
182 01:14:40.321968 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-set
183 01:14:40.322453 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-test-shell
184 01:14:40.322947 Updating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-install-packages (oe)
185 01:14:40.323498 Updating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/bin/lava-installed-packages (oe)
186 01:14:40.323951 Creating /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/environment
187 01:14:40.324371 LAVA metadata
188 01:14:40.324642 - LAVA_JOB_ID=795671
189 01:14:40.324859 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:14:40.325236 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 01:14:40.326285 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:14:40.326618 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 01:14:40.326831 skipped lava-vland-overlay
194 01:14:40.327079 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:14:40.327341 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 01:14:40.327564 skipped lava-multinode-overlay
197 01:14:40.327814 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:14:40.328109 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 01:14:40.328380 Loading test definitions
200 01:14:40.328671 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 01:14:40.328898 Using /lava-795671 at stage 0
202 01:14:40.330137 uuid=795671_1.6.2.4.1 testdef=None
203 01:14:40.330461 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:14:40.330733 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 01:14:40.332636 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:14:40.333469 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 01:14:40.335811 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:14:40.336692 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 01:14:40.338921 runner path: /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/0/tests/0_dmesg test_uuid 795671_1.6.2.4.1
212 01:14:40.339507 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:14:40.340335 Creating lava-test-runner.conf files
215 01:14:40.340546 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/795671/lava-overlay-jgwipwmv/lava-795671/0 for stage 0
216 01:14:40.340895 - 0_dmesg
217 01:14:40.341255 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:14:40.341540 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 01:14:40.363344 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:14:40.363774 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 01:14:40.364073 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:14:40.364355 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:14:40.364627 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 01:14:40.982859 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:14:40.983328 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 01:14:40.983577 extracting modules file /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795671/extract-nfsrootfs-dnwfrs8t
227 01:14:42.352954 extracting modules file /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk
228 01:14:43.748707 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:14:43.749174 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 01:14:43.749455 [common] Applying overlay to NFS
231 01:14:43.749669 [common] Applying overlay /var/lib/lava/dispatcher/tmp/795671/compress-overlay-_ig8r8xg/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/795671/extract-nfsrootfs-dnwfrs8t
232 01:14:43.779031 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:14:43.779442 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 01:14:43.779719 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 01:14:43.779953 Converting downloaded kernel to a uImage
236 01:14:43.780301 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/kernel/Image /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/kernel/uImage
237 01:14:44.252407 output: Image Name:
238 01:14:44.252840 output: Created: Thu Oct 3 01:14:43 2024
239 01:14:44.253053 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:14:44.253260 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 01:14:44.253464 output: Load Address: 01080000
242 01:14:44.253666 output: Entry Point: 01080000
243 01:14:44.253867 output:
244 01:14:44.254200 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:14:44.254467 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:14:44.254736 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 01:14:44.254991 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:14:44.255248 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 01:14:44.255505 Building ramdisk /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk
250 01:14:46.464318 >> 166772 blocks
251 01:14:54.172071 Adding RAMdisk u-boot header.
252 01:14:54.172523 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk.cpio.gz.uboot
253 01:14:54.412600 output: Image Name:
254 01:14:54.413111 output: Created: Thu Oct 3 01:14:54 2024
255 01:14:54.413386 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:14:54.413643 output: Data Size: 23420769 Bytes = 22871.84 KiB = 22.34 MiB
257 01:14:54.413896 output: Load Address: 00000000
258 01:14:54.414144 output: Entry Point: 00000000
259 01:14:54.414392 output:
260 01:14:54.415220 rename /var/lib/lava/dispatcher/tmp/795671/extract-overlay-ramdisk-fratsa_x/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
261 01:14:54.415745 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:14:54.416326 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 01:14:54.417053 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 01:14:54.417655 No LXC device requested
265 01:14:54.418313 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:14:54.418982 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 01:14:54.419623 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:14:54.420195 Checking files for TFTP limit of 4294967296 bytes.
269 01:14:54.423659 end: 1 tftp-deploy (duration 00:00:40) [common]
270 01:14:54.424460 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:14:54.425158 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:14:54.425808 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:14:54.426465 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:14:54.427146 Using kernel file from prepare-kernel: 795671/tftp-deploy-xf7v49qn/kernel/uImage
275 01:14:54.427951 substitutions:
276 01:14:54.428556 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:14:54.429093 - {DTB_ADDR}: 0x01070000
278 01:14:54.429627 - {DTB}: 795671/tftp-deploy-xf7v49qn/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:14:54.430157 - {INITRD}: 795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
280 01:14:54.430678 - {KERNEL_ADDR}: 0x01080000
281 01:14:54.431194 - {KERNEL}: 795671/tftp-deploy-xf7v49qn/kernel/uImage
282 01:14:54.431717 - {LAVA_MAC}: None
283 01:14:54.432335 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/795671/extract-nfsrootfs-dnwfrs8t
284 01:14:54.432878 - {NFS_SERVER_IP}: 192.168.6.2
285 01:14:54.433402 - {PRESEED_CONFIG}: None
286 01:14:54.433918 - {PRESEED_LOCAL}: None
287 01:14:54.434431 - {RAMDISK_ADDR}: 0x08000000
288 01:14:54.434935 - {RAMDISK}: 795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
289 01:14:54.435443 - {ROOT_PART}: None
290 01:14:54.435950 - {ROOT}: None
291 01:14:54.436502 - {SERVER_IP}: 192.168.6.2
292 01:14:54.437014 - {TEE_ADDR}: 0x83000000
293 01:14:54.437525 - {TEE}: None
294 01:14:54.438032 Parsed boot commands:
295 01:14:54.438526 - setenv autoload no
296 01:14:54.439030 - setenv initrd_high 0xffffffff
297 01:14:54.439534 - setenv fdt_high 0xffffffff
298 01:14:54.440061 - dhcp
299 01:14:54.440575 - setenv serverip 192.168.6.2
300 01:14:54.441080 - tftpboot 0x01080000 795671/tftp-deploy-xf7v49qn/kernel/uImage
301 01:14:54.441585 - tftpboot 0x08000000 795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
302 01:14:54.442090 - tftpboot 0x01070000 795671/tftp-deploy-xf7v49qn/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:14:54.442593 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/795671/extract-nfsrootfs-dnwfrs8t,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:14:54.443108 - bootm 0x01080000 0x08000000 0x01070000
305 01:14:54.443777 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:14:54.445765 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:14:54.446315 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:14:54.463337 Setting prompt string to ['lava-test: # ']
310 01:14:54.465264 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:14:54.466059 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:14:54.466770 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:14:54.467456 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:14:54.468900 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:14:54.508292 >> OK - accepted request
316 01:14:54.510691 Returned 0 in 0 seconds
317 01:14:54.612119 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:14:54.614255 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:14:54.614988 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:14:54.615655 Setting prompt string to ['Hit any key to stop autoboot']
322 01:14:54.616304 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:14:54.618286 Trying 192.168.56.21...
324 01:14:54.618907 Connected to conserv1.
325 01:14:54.619436 Escape character is '^]'.
326 01:14:54.619974
327 01:14:54.620584 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 01:14:54.621134
329 01:15:06.129309 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:15:06.130125 bl2_stage_init 0x01
331 01:15:06.130665 bl2_stage_init 0x81
332 01:15:06.134966 hw id: 0x0000 - pwm id 0x01
333 01:15:06.135621 bl2_stage_init 0xc1
334 01:15:06.136208 bl2_stage_init 0x02
335 01:15:06.136733
336 01:15:06.140526 L0:00000000
337 01:15:06.141094 L1:20000703
338 01:15:06.141636 L2:00008067
339 01:15:06.142163 L3:14000000
340 01:15:06.145905 B2:00402000
341 01:15:06.146253 B1:e0f83180
342 01:15:06.146510
343 01:15:06.146751 TE: 58124
344 01:15:06.146992
345 01:15:06.151601 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:15:06.152209
347 01:15:06.152724 Board ID = 1
348 01:15:06.157254 Set A53 clk to 24M
349 01:15:06.157810 Set A73 clk to 24M
350 01:15:06.158315 Set clk81 to 24M
351 01:15:06.162866 A53 clk: 1200 MHz
352 01:15:06.163418 A73 clk: 1200 MHz
353 01:15:06.163928 CLK81: 166.6M
354 01:15:06.164478 smccc: 00012a92
355 01:15:06.168346 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:15:06.173943 board id: 1
357 01:15:06.179853 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:15:06.190579 fw parse done
359 01:15:06.196674 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:15:06.239065 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:15:06.249941 PIEI prepare done
362 01:15:06.250483 fastboot data load
363 01:15:06.250904 fastboot data verify
364 01:15:06.255681 verify result: 266
365 01:15:06.261170 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:15:06.261735 LPDDR4 probe
367 01:15:06.262173 ddr clk to 1584MHz
368 01:15:06.269224 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:15:06.306463
370 01:15:06.307063 dmc_version 0001
371 01:15:06.313105 Check phy result
372 01:15:06.318775 INFO : End of CA training
373 01:15:06.319162 INFO : End of initialization
374 01:15:06.324775 INFO : Training has run successfully!
375 01:15:06.325312 Check phy result
376 01:15:06.330110 INFO : End of initialization
377 01:15:06.330641 INFO : End of read enable training
378 01:15:06.335789 INFO : End of fine write leveling
379 01:15:06.341336 INFO : End of Write leveling coarse delay
380 01:15:06.341878 INFO : Training has run successfully!
381 01:15:06.342335 Check phy result
382 01:15:06.346985 INFO : End of initialization
383 01:15:06.347564 INFO : End of read dq deskew training
384 01:15:06.352520 INFO : End of MPR read delay center optimization
385 01:15:06.358108 INFO : End of write delay center optimization
386 01:15:06.363740 INFO : End of read delay center optimization
387 01:15:06.364314 INFO : End of max read latency training
388 01:15:06.369344 INFO : Training has run successfully!
389 01:15:06.369870 1D training succeed
390 01:15:06.378489 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:15:06.426161 Check phy result
392 01:15:06.426807 INFO : End of initialization
393 01:15:06.447916 INFO : End of 2D read delay Voltage center optimization
394 01:15:06.468132 INFO : End of 2D read delay Voltage center optimization
395 01:15:06.520188 INFO : End of 2D write delay Voltage center optimization
396 01:15:06.569528 INFO : End of 2D write delay Voltage center optimization
397 01:15:06.575162 INFO : Training has run successfully!
398 01:15:06.576125
399 01:15:06.576995 channel==0
400 01:15:06.580653 RxClkDly_Margin_A0==88 ps 9
401 01:15:06.581212 TxDqDly_Margin_A0==98 ps 10
402 01:15:06.586336 RxClkDly_Margin_A1==88 ps 9
403 01:15:06.586681 TxDqDly_Margin_A1==88 ps 9
404 01:15:06.586933 TrainedVREFDQ_A0==74
405 01:15:06.591932 TrainedVREFDQ_A1==74
406 01:15:06.592505 VrefDac_Margin_A0==25
407 01:15:06.592957 DeviceVref_Margin_A0==40
408 01:15:06.597474 VrefDac_Margin_A1==25
409 01:15:06.598003 DeviceVref_Margin_A1==40
410 01:15:06.598443
411 01:15:06.598841
412 01:15:06.599106 channel==1
413 01:15:06.603052 RxClkDly_Margin_A0==98 ps 10
414 01:15:06.603579 TxDqDly_Margin_A0==98 ps 10
415 01:15:06.608529 RxClkDly_Margin_A1==98 ps 10
416 01:15:06.608994 TxDqDly_Margin_A1==88 ps 9
417 01:15:06.614296 TrainedVREFDQ_A0==77
418 01:15:06.615270 TrainedVREFDQ_A1==77
419 01:15:06.616025 VrefDac_Margin_A0==23
420 01:15:06.619946 DeviceVref_Margin_A0==37
421 01:15:06.620832 VrefDac_Margin_A1==22
422 01:15:06.625514 DeviceVref_Margin_A1==37
423 01:15:06.625836
424 01:15:06.626055 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:15:06.626265
426 01:15:06.659203 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 01:15:06.660340 2D training succeed
428 01:15:06.664707 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:15:06.670379 auto size-- 65535DDR cs0 size: 2048MB
430 01:15:06.671229 DDR cs1 size: 2048MB
431 01:15:06.675927 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:15:06.676492 cs0 DataBus test pass
433 01:15:06.681505 cs1 DataBus test pass
434 01:15:06.682027 cs0 AddrBus test pass
435 01:15:06.682443 cs1 AddrBus test pass
436 01:15:06.682847
437 01:15:06.687285 100bdlr_step_size ps== 420
438 01:15:06.688234 result report
439 01:15:06.692792 boot times 0Enable ddr reg access
440 01:15:06.698148 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:15:06.711487 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:15:07.284544 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:15:07.285188 MVN_1=0x00000000
444 01:15:07.290249 MVN_2=0x00000000
445 01:15:07.295743 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:15:07.296349 OPS=0x10
447 01:15:07.296799 ring efuse init
448 01:15:07.297210 chipver efuse init
449 01:15:07.301293 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:15:07.307307 [0.018961 Inits done]
451 01:15:07.307901 secure task start!
452 01:15:07.308445 high task start!
453 01:15:07.311482 low task start!
454 01:15:07.312011 run into bl31
455 01:15:07.318242 NOTICE: BL31: v1.3(release):4fc40b1
456 01:15:07.326132 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:15:07.326643 NOTICE: BL31: G12A normal boot!
458 01:15:07.351312 NOTICE: BL31: BL33 decompress pass
459 01:15:07.356968 ERROR: Error initializing runtime service opteed_fast
460 01:15:08.589865
461 01:15:08.590470
462 01:15:08.598295 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:15:08.598862
464 01:15:08.599306 Model: Libre Computer AML-A311D-CC Alta
465 01:15:08.806724 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:15:08.830094 DRAM: 2 GiB (effective 3.8 GiB)
467 01:15:08.973121 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:15:08.978947 WDT: Not starting watchdog@f0d0
469 01:15:09.011222 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:15:09.023692 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:15:09.028592 ** Bad device specification mmc 0 **
472 01:15:09.038988 Card did not respond to voltage select! : -110
473 01:15:09.046585 ** Bad device specification mmc 0 **
474 01:15:09.047079 Couldn't find partition mmc 0
475 01:15:09.054945 Card did not respond to voltage select! : -110
476 01:15:09.060448 ** Bad device specification mmc 0 **
477 01:15:09.060930 Couldn't find partition mmc 0
478 01:15:09.065500 Error: could not access storage.
479 01:15:10.329681 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:15:10.330310 bl2_stage_init 0x01
481 01:15:10.330735 bl2_stage_init 0x81
482 01:15:10.335225 hw id: 0x0000 - pwm id 0x01
483 01:15:10.335696 bl2_stage_init 0xc1
484 01:15:10.336154 bl2_stage_init 0x02
485 01:15:10.336561
486 01:15:10.340811 L0:00000000
487 01:15:10.341270 L1:20000703
488 01:15:10.341680 L2:00008067
489 01:15:10.342084 L3:14000000
490 01:15:10.346407 B2:00402000
491 01:15:10.346878 B1:e0f83180
492 01:15:10.347308
493 01:15:10.347721 TE: 58124
494 01:15:10.348166
495 01:15:10.352218 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:15:10.352698
497 01:15:10.353117 Board ID = 1
498 01:15:10.357681 Set A53 clk to 24M
499 01:15:10.358190 Set A73 clk to 24M
500 01:15:10.358613 Set clk81 to 24M
501 01:15:10.363286 A53 clk: 1200 MHz
502 01:15:10.363764 A73 clk: 1200 MHz
503 01:15:10.364212 CLK81: 166.6M
504 01:15:10.364644 smccc: 00012a91
505 01:15:10.369124 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:15:10.374478 board id: 1
507 01:15:10.380398 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:15:10.391041 fw parse done
509 01:15:10.397093 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:15:10.439642 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:15:10.450532 PIEI prepare done
512 01:15:10.451034 fastboot data load
513 01:15:10.451451 fastboot data verify
514 01:15:10.456211 verify result: 266
515 01:15:10.461723 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:15:10.462191 LPDDR4 probe
517 01:15:10.462598 ddr clk to 1584MHz
518 01:15:10.469710 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:15:10.507031
520 01:15:10.507611 dmc_version 0001
521 01:15:10.513654 Check phy result
522 01:15:10.519526 INFO : End of CA training
523 01:15:10.520140 INFO : End of initialization
524 01:15:10.525214 INFO : Training has run successfully!
525 01:15:10.525791 Check phy result
526 01:15:10.530714 INFO : End of initialization
527 01:15:10.531209 INFO : End of read enable training
528 01:15:10.536357 INFO : End of fine write leveling
529 01:15:10.541954 INFO : End of Write leveling coarse delay
530 01:15:10.542446 INFO : Training has run successfully!
531 01:15:10.542937 Check phy result
532 01:15:10.547570 INFO : End of initialization
533 01:15:10.548132 INFO : End of read dq deskew training
534 01:15:10.553236 INFO : End of MPR read delay center optimization
535 01:15:10.558719 INFO : End of write delay center optimization
536 01:15:10.564416 INFO : End of read delay center optimization
537 01:15:10.564951 INFO : End of max read latency training
538 01:15:10.569907 INFO : Training has run successfully!
539 01:15:10.570444 1D training succeed
540 01:15:10.579091 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:15:10.626536 Check phy result
542 01:15:10.627127 INFO : End of initialization
543 01:15:10.648404 INFO : End of 2D read delay Voltage center optimization
544 01:15:10.668758 INFO : End of 2D read delay Voltage center optimization
545 01:15:10.720768 INFO : End of 2D write delay Voltage center optimization
546 01:15:10.769647 INFO : End of 2D write delay Voltage center optimization
547 01:15:10.775177 INFO : Training has run successfully!
548 01:15:10.775713
549 01:15:10.776176 channel==0
550 01:15:10.780717 RxClkDly_Margin_A0==88 ps 9
551 01:15:10.781194 TxDqDly_Margin_A0==108 ps 11
552 01:15:10.786346 RxClkDly_Margin_A1==88 ps 9
553 01:15:10.786868 TxDqDly_Margin_A1==98 ps 10
554 01:15:10.787315 TrainedVREFDQ_A0==74
555 01:15:10.791920 TrainedVREFDQ_A1==76
556 01:15:10.792480 VrefDac_Margin_A0==25
557 01:15:10.797543 DeviceVref_Margin_A0==40
558 01:15:10.798077 VrefDac_Margin_A1==25
559 01:15:10.798489 DeviceVref_Margin_A1==38
560 01:15:10.798893
561 01:15:10.799285
562 01:15:10.803111 channel==1
563 01:15:10.803612 RxClkDly_Margin_A0==98 ps 10
564 01:15:10.804047 TxDqDly_Margin_A0==88 ps 9
565 01:15:10.808681 RxClkDly_Margin_A1==88 ps 9
566 01:15:10.809183 TxDqDly_Margin_A1==88 ps 9
567 01:15:10.814404 TrainedVREFDQ_A0==76
568 01:15:10.814967 TrainedVREFDQ_A1==77
569 01:15:10.815372 VrefDac_Margin_A0==22
570 01:15:10.819929 DeviceVref_Margin_A0==38
571 01:15:10.820455 VrefDac_Margin_A1==24
572 01:15:10.825581 DeviceVref_Margin_A1==37
573 01:15:10.826134
574 01:15:10.826538 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:15:10.826933
576 01:15:10.859252 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
577 01:15:10.859857 2D training succeed
578 01:15:10.864669 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:15:10.870248 auto size-- 65535DDR cs0 size: 2048MB
580 01:15:10.870701 DDR cs1 size: 2048MB
581 01:15:10.875862 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:15:10.876388 cs0 DataBus test pass
583 01:15:10.881448 cs1 DataBus test pass
584 01:15:10.881892 cs0 AddrBus test pass
585 01:15:10.882283 cs1 AddrBus test pass
586 01:15:10.882666
587 01:15:10.887040 100bdlr_step_size ps== 420
588 01:15:10.887491 result report
589 01:15:10.892665 boot times 0Enable ddr reg access
590 01:15:10.898015 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:15:10.911515 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:15:11.483717 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:15:11.484411 MVN_1=0x00000000
594 01:15:11.489363 MVN_2=0x00000000
595 01:15:11.495114 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:15:11.495617 OPS=0x10
597 01:15:11.496086 ring efuse init
598 01:15:11.496546 chipver efuse init
599 01:15:11.503039 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:15:11.503547 [0.018961 Inits done]
601 01:15:11.510800 secure task start!
602 01:15:11.511319 high task start!
603 01:15:11.511749 low task start!
604 01:15:11.512209 run into bl31
605 01:15:11.517473 NOTICE: BL31: v1.3(release):4fc40b1
606 01:15:11.525095 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:15:11.525580 NOTICE: BL31: G12A normal boot!
608 01:15:11.550437 NOTICE: BL31: BL33 decompress pass
609 01:15:11.556081 ERROR: Error initializing runtime service opteed_fast
610 01:15:12.789288
611 01:15:12.789914
612 01:15:12.797461 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:15:12.797952
614 01:15:12.798365 Model: Libre Computer AML-A311D-CC Alta
615 01:15:13.005928 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:15:13.029268 DRAM: 2 GiB (effective 3.8 GiB)
617 01:15:13.172348 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:15:13.178153 WDT: Not starting watchdog@f0d0
619 01:15:13.210592 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:15:13.222893 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:15:13.227826 ** Bad device specification mmc 0 **
622 01:15:13.238188 Card did not respond to voltage select! : -110
623 01:15:13.245762 ** Bad device specification mmc 0 **
624 01:15:13.246258 Couldn't find partition mmc 0
625 01:15:13.254119 Card did not respond to voltage select! : -110
626 01:15:13.259569 ** Bad device specification mmc 0 **
627 01:15:13.260059 Couldn't find partition mmc 0
628 01:15:13.264657 Error: could not access storage.
629 01:15:13.607259 Net: eth0: ethernet@ff3f0000
630 01:15:13.607863 starting USB...
631 01:15:13.860167 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:15:13.860806 Starting the controller
633 01:15:13.866027 USB XHCI 1.10
634 01:15:15.548698 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 01:15:15.549300 bl2_stage_init 0x01
636 01:15:15.549721 bl2_stage_init 0x81
637 01:15:15.554131 hw id: 0x0000 - pwm id 0x01
638 01:15:15.554608 bl2_stage_init 0xc1
639 01:15:15.555017 bl2_stage_init 0x02
640 01:15:15.555418
641 01:15:15.559574 L0:00000000
642 01:15:15.560076 L1:20000703
643 01:15:15.560486 L2:00008067
644 01:15:15.560884 L3:14000000
645 01:15:15.565275 B2:00402000
646 01:15:15.565742 B1:e0f83180
647 01:15:15.566149
648 01:15:15.566549 TE: 58167
649 01:15:15.566948
650 01:15:15.570825 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 01:15:15.571295
652 01:15:15.571704 Board ID = 1
653 01:15:15.576414 Set A53 clk to 24M
654 01:15:15.576886 Set A73 clk to 24M
655 01:15:15.577289 Set clk81 to 24M
656 01:15:15.582086 A53 clk: 1200 MHz
657 01:15:15.582545 A73 clk: 1200 MHz
658 01:15:15.582949 CLK81: 166.6M
659 01:15:15.583346 smccc: 00012abe
660 01:15:15.587506 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 01:15:15.593166 board id: 1
662 01:15:15.599015 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 01:15:15.609598 fw parse done
664 01:15:15.615552 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 01:15:15.658323 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 01:15:15.669057 PIEI prepare done
667 01:15:15.669553 fastboot data load
668 01:15:15.669974 fastboot data verify
669 01:15:15.674766 verify result: 266
670 01:15:15.680353 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 01:15:15.680834 LPDDR4 probe
672 01:15:15.681253 ddr clk to 1584MHz
673 01:15:15.688356 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 01:15:15.725585
675 01:15:15.726127 dmc_version 0001
676 01:15:15.732243 Check phy result
677 01:15:15.738155 INFO : End of CA training
678 01:15:15.738697 INFO : End of initialization
679 01:15:15.743768 INFO : Training has run successfully!
680 01:15:15.744283 Check phy result
681 01:15:15.749373 INFO : End of initialization
682 01:15:15.749845 INFO : End of read enable training
683 01:15:15.752702 INFO : End of fine write leveling
684 01:15:15.758211 INFO : End of Write leveling coarse delay
685 01:15:15.763880 INFO : Training has run successfully!
686 01:15:15.764411 Check phy result
687 01:15:15.764826 INFO : End of initialization
688 01:15:15.769489 INFO : End of read dq deskew training
689 01:15:15.775050 INFO : End of MPR read delay center optimization
690 01:15:15.775517 INFO : End of write delay center optimization
691 01:15:15.780671 INFO : End of read delay center optimization
692 01:15:15.786206 INFO : End of max read latency training
693 01:15:15.786677 INFO : Training has run successfully!
694 01:15:15.791859 1D training succeed
695 01:15:15.797670 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 01:15:15.845331 Check phy result
697 01:15:15.845904 INFO : End of initialization
698 01:15:15.867719 INFO : End of 2D read delay Voltage center optimization
699 01:15:15.887904 INFO : End of 2D read delay Voltage center optimization
700 01:15:15.939812 INFO : End of 2D write delay Voltage center optimization
701 01:15:15.989014 INFO : End of 2D write delay Voltage center optimization
702 01:15:15.994519 INFO : Training has run successfully!
703 01:15:15.994991
704 01:15:15.995420 channel==0
705 01:15:16.000135 RxClkDly_Margin_A0==88 ps 9
706 01:15:16.000620 TxDqDly_Margin_A0==98 ps 10
707 01:15:16.005741 RxClkDly_Margin_A1==88 ps 9
708 01:15:16.006232 TxDqDly_Margin_A1==88 ps 9
709 01:15:16.006654 TrainedVREFDQ_A0==74
710 01:15:16.011383 TrainedVREFDQ_A1==74
711 01:15:16.011856 VrefDac_Margin_A0==24
712 01:15:16.012317 DeviceVref_Margin_A0==40
713 01:15:16.016994 VrefDac_Margin_A1==25
714 01:15:16.017467 DeviceVref_Margin_A1==40
715 01:15:16.017871
716 01:15:16.018271
717 01:15:16.018669 channel==1
718 01:15:16.022519 RxClkDly_Margin_A0==98 ps 10
719 01:15:16.023001 TxDqDly_Margin_A0==98 ps 10
720 01:15:16.028119 RxClkDly_Margin_A1==98 ps 10
721 01:15:16.028600 TxDqDly_Margin_A1==98 ps 10
722 01:15:16.033847 TrainedVREFDQ_A0==77
723 01:15:16.034395 TrainedVREFDQ_A1==77
724 01:15:16.034835 VrefDac_Margin_A0==22
725 01:15:16.039482 DeviceVref_Margin_A0==37
726 01:15:16.040114 VrefDac_Margin_A1==24
727 01:15:16.045023 DeviceVref_Margin_A1==37
728 01:15:16.045604
729 01:15:16.046127 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 01:15:16.050565
731 01:15:16.078595 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 01:15:16.079213 2D training succeed
733 01:15:16.084234 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 01:15:16.090533 auto size-- 65535DDR cs0 size: 2048MB
735 01:15:16.091105 DDR cs1 size: 2048MB
736 01:15:16.095451 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 01:15:16.096052 cs0 DataBus test pass
738 01:15:16.101114 cs1 DataBus test pass
739 01:15:16.101749 cs0 AddrBus test pass
740 01:15:16.102171 cs1 AddrBus test pass
741 01:15:16.102600
742 01:15:16.106670 100bdlr_step_size ps== 420
743 01:15:16.107320 result report
744 01:15:16.112366 boot times 0Enable ddr reg access
745 01:15:16.117548 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 01:15:16.131195 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 01:15:16.703085 0.0;M3 CHK:0;cm4_sp_mode 0
748 01:15:16.703521 MVN_1=0x00000000
749 01:15:16.708486 MVN_2=0x00000000
750 01:15:16.714231 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 01:15:16.714616 OPS=0x10
752 01:15:16.714833 ring efuse init
753 01:15:16.715037 chipver efuse init
754 01:15:16.723485 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 01:15:16.723911 [0.018961 Inits done]
756 01:15:16.724166 secure task start!
757 01:15:16.730065 high task start!
758 01:15:16.730477 low task start!
759 01:15:16.730695 run into bl31
760 01:15:16.736681 NOTICE: BL31: v1.3(release):4fc40b1
761 01:15:16.744490 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 01:15:16.744891 NOTICE: BL31: G12A normal boot!
763 01:15:16.769910 NOTICE: BL31: BL33 decompress pass
764 01:15:16.774686 ERROR: Error initializing runtime service opteed_fast
765 01:15:18.010854
766 01:15:18.011322
767 01:15:18.016897 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 01:15:18.017334
769 01:15:18.017594 Model: Libre Computer AML-A311D-CC Alta
770 01:15:18.225247 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 01:15:18.248556 DRAM: 2 GiB (effective 3.8 GiB)
772 01:15:18.391719 Core: 408 devices, 31 uclasses, devicetree: separate
773 01:15:18.397487 WDT: Not starting watchdog@f0d0
774 01:15:18.429765 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 01:15:18.442309 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 01:15:18.447199 ** Bad device specification mmc 0 **
777 01:15:18.457481 Card did not respond to voltage select! : -110
778 01:15:18.465105 ** Bad device specification mmc 0 **
779 01:15:18.465462 Couldn't find partition mmc 0
780 01:15:18.473466 Card did not respond to voltage select! : -110
781 01:15:18.478928 ** Bad device specification mmc 0 **
782 01:15:18.479231 Couldn't find partition mmc 0
783 01:15:18.483977 Error: could not access storage.
784 01:15:18.826547 Net: eth0: ethernet@ff3f0000
785 01:15:18.826967 starting USB...
786 01:15:19.078446 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 01:15:19.079064 Starting the controller
788 01:15:19.085316 USB XHCI 1.10
789 01:15:21.188690 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 01:15:21.189120 bl2_stage_init 0x01
791 01:15:21.189351 bl2_stage_init 0x81
792 01:15:21.194361 hw id: 0x0000 - pwm id 0x01
793 01:15:21.194682 bl2_stage_init 0xc1
794 01:15:21.194898 bl2_stage_init 0x02
795 01:15:21.195115
796 01:15:21.199925 L0:00000000
797 01:15:21.200357 L1:20000703
798 01:15:21.200665 L2:00008067
799 01:15:21.200985 L3:14000000
800 01:15:21.206431 B2:00402000
801 01:15:21.206718 B1:e0f83180
802 01:15:21.206925
803 01:15:21.207132 TE: 58167
804 01:15:21.207331
805 01:15:21.212458 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 01:15:21.212749
807 01:15:21.212956 Board ID = 1
808 01:15:21.216654 Set A53 clk to 24M
809 01:15:21.216927 Set A73 clk to 24M
810 01:15:21.217131 Set clk81 to 24M
811 01:15:21.222411 A53 clk: 1200 MHz
812 01:15:21.222697 A73 clk: 1200 MHz
813 01:15:21.222899 CLK81: 166.6M
814 01:15:21.223109 smccc: 00012abe
815 01:15:21.227717 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 01:15:21.233284 board id: 1
817 01:15:21.239145 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 01:15:21.249788 fw parse done
819 01:15:21.255806 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 01:15:21.298459 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 01:15:21.309394 PIEI prepare done
822 01:15:21.309728 fastboot data load
823 01:15:21.309935 fastboot data verify
824 01:15:21.314939 verify result: 266
825 01:15:21.320533 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 01:15:21.320829 LPDDR4 probe
827 01:15:21.321043 ddr clk to 1584MHz
828 01:15:21.328523 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 01:15:21.365827
830 01:15:21.366184 dmc_version 0001
831 01:15:21.372492 Check phy result
832 01:15:21.378383 INFO : End of CA training
833 01:15:21.378837 INFO : End of initialization
834 01:15:21.383891 INFO : Training has run successfully!
835 01:15:21.384207 Check phy result
836 01:15:21.389509 INFO : End of initialization
837 01:15:21.389940 INFO : End of read enable training
838 01:15:21.392780 INFO : End of fine write leveling
839 01:15:21.398425 INFO : End of Write leveling coarse delay
840 01:15:21.404052 INFO : Training has run successfully!
841 01:15:21.404540 Check phy result
842 01:15:21.404949 INFO : End of initialization
843 01:15:21.409693 INFO : End of read dq deskew training
844 01:15:21.412945 INFO : End of MPR read delay center optimization
845 01:15:21.418580 INFO : End of write delay center optimization
846 01:15:21.424123 INFO : End of read delay center optimization
847 01:15:21.424566 INFO : End of max read latency training
848 01:15:21.429752 INFO : Training has run successfully!
849 01:15:21.430195 1D training succeed
850 01:15:21.436849 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 01:15:21.485482 Check phy result
852 01:15:21.485954 INFO : End of initialization
853 01:15:21.507101 INFO : End of 2D read delay Voltage center optimization
854 01:15:21.527149 INFO : End of 2D read delay Voltage center optimization
855 01:15:21.579141 INFO : End of 2D write delay Voltage center optimization
856 01:15:21.628397 INFO : End of 2D write delay Voltage center optimization
857 01:15:21.633925 INFO : Training has run successfully!
858 01:15:21.634414
859 01:15:21.634670 channel==0
860 01:15:21.639502 RxClkDly_Margin_A0==88 ps 9
861 01:15:21.639949 TxDqDly_Margin_A0==98 ps 10
862 01:15:21.645077 RxClkDly_Margin_A1==88 ps 9
863 01:15:21.645416 TxDqDly_Margin_A1==98 ps 10
864 01:15:21.645636 TrainedVREFDQ_A0==74
865 01:15:21.650857 TrainedVREFDQ_A1==74
866 01:15:21.651161 VrefDac_Margin_A0==25
867 01:15:21.651376 DeviceVref_Margin_A0==40
868 01:15:21.656520 VrefDac_Margin_A1==25
869 01:15:21.656995 DeviceVref_Margin_A1==40
870 01:15:21.657336
871 01:15:21.657664
872 01:15:21.661930 channel==1
873 01:15:21.662227 RxClkDly_Margin_A0==88 ps 9
874 01:15:21.662438 TxDqDly_Margin_A0==88 ps 9
875 01:15:21.667658 RxClkDly_Margin_A1==88 ps 9
876 01:15:21.668030 TxDqDly_Margin_A1==88 ps 9
877 01:15:21.673121 TrainedVREFDQ_A0==76
878 01:15:21.673459 TrainedVREFDQ_A1==77
879 01:15:21.673671 VrefDac_Margin_A0==22
880 01:15:21.678765 DeviceVref_Margin_A0==38
881 01:15:21.679290 VrefDac_Margin_A1==24
882 01:15:21.684305 DeviceVref_Margin_A1==37
883 01:15:21.684776
884 01:15:21.685012 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 01:15:21.685217
886 01:15:21.717905 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 01:15:21.719110 2D training succeed
888 01:15:21.723789 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 01:15:21.729243 auto size-- 65535DDR cs0 size: 2048MB
890 01:15:21.729824 DDR cs1 size: 2048MB
891 01:15:21.734914 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 01:15:21.735485 cs0 DataBus test pass
893 01:15:21.740448 cs1 DataBus test pass
894 01:15:21.741011 cs0 AddrBus test pass
895 01:15:21.741412 cs1 AddrBus test pass
896 01:15:21.741805
897 01:15:21.746077 100bdlr_step_size ps== 420
898 01:15:21.746645 result report
899 01:15:21.751687 boot times 0Enable ddr reg access
900 01:15:21.755932 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 01:15:21.769438 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 01:15:22.342239 0.0;M3 CHK:0;cm4_sp_mode 0
903 01:15:22.342907 MVN_1=0x00000000
904 01:15:22.347722 MVN_2=0x00000000
905 01:15:22.353457 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 01:15:22.354012 OPS=0x10
907 01:15:22.354443 ring efuse init
908 01:15:22.354873 chipver efuse init
909 01:15:22.359140 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 01:15:22.364645 [0.018960 Inits done]
911 01:15:22.365163 secure task start!
912 01:15:22.365588 high task start!
913 01:15:22.368436 low task start!
914 01:15:22.368948 run into bl31
915 01:15:22.375878 NOTICE: BL31: v1.3(release):4fc40b1
916 01:15:22.383802 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 01:15:22.384459 NOTICE: BL31: G12A normal boot!
918 01:15:22.409052 NOTICE: BL31: BL33 decompress pass
919 01:15:22.414748 ERROR: Error initializing runtime service opteed_fast
920 01:15:23.647610
921 01:15:23.648334
922 01:15:23.656017 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 01:15:23.656545
924 01:15:23.657017 Model: Libre Computer AML-A311D-CC Alta
925 01:15:23.864363 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 01:15:23.887758 DRAM: 2 GiB (effective 3.8 GiB)
927 01:15:24.030825 Core: 408 devices, 31 uclasses, devicetree: separate
928 01:15:24.036606 WDT: Not starting watchdog@f0d0
929 01:15:24.068879 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 01:15:24.081300 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 01:15:24.086304 ** Bad device specification mmc 0 **
932 01:15:24.096657 Card did not respond to voltage select! : -110
933 01:15:24.104285 ** Bad device specification mmc 0 **
934 01:15:24.104793 Couldn't find partition mmc 0
935 01:15:24.112628 Card did not respond to voltage select! : -110
936 01:15:24.118152 ** Bad device specification mmc 0 **
937 01:15:24.118702 Couldn't find partition mmc 0
938 01:15:24.123203 Error: could not access storage.
939 01:15:24.465685 Net: eth0: ethernet@ff3f0000
940 01:15:24.466338 starting USB...
941 01:15:24.717546 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 01:15:24.718197 Starting the controller
943 01:15:24.724444 USB XHCI 1.10
944 01:15:26.278579 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 01:15:26.286968 scanning usb for storage devices... 0 Storage Device(s) found
947 01:15:26.338221 Hit any key to stop autoboot: 1
948 01:15:26.339026 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 01:15:26.339400 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 01:15:26.339674 Setting prompt string to ['=>']
951 01:15:26.339935 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 01:15:26.344414 0
953 01:15:26.345034 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 01:15:26.345333 Sending with 10 millisecond of delay
956 01:15:27.480096 => setenv autoload no
957 01:15:27.490990 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 01:15:27.496622 setenv autoload no
959 01:15:27.497490 Sending with 10 millisecond of delay
961 01:15:29.294815 => setenv initrd_high 0xffffffff
962 01:15:29.305651 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 01:15:29.306612 setenv initrd_high 0xffffffff
964 01:15:29.307372 Sending with 10 millisecond of delay
966 01:15:30.924177 => setenv fdt_high 0xffffffff
967 01:15:30.934820 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 01:15:30.935372 setenv fdt_high 0xffffffff
969 01:15:30.935839 Sending with 10 millisecond of delay
971 01:15:31.227331 => dhcp
972 01:15:31.237868 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 01:15:31.238456 dhcp
974 01:15:31.238727 Speed: 1000, full duplex
975 01:15:31.238959 BOOTP broadcast 1
976 01:15:31.486364 BOOTP broadcast 2
977 01:15:31.987323 BOOTP broadcast 3
978 01:15:32.013788 DHCP client bound to address 192.168.6.33 (776 ms)
979 01:15:32.014365 Sending with 10 millisecond of delay
981 01:15:33.691377 => setenv serverip 192.168.6.2
982 01:15:33.702238 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
983 01:15:33.703177 setenv serverip 192.168.6.2
984 01:15:33.703872 Sending with 10 millisecond of delay
986 01:15:37.429971 => tftpboot 0x01080000 795671/tftp-deploy-xf7v49qn/kernel/uImage
987 01:15:37.440986 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
988 01:15:37.442079 tftpboot 0x01080000 795671/tftp-deploy-xf7v49qn/kernel/uImage
989 01:15:37.442680 Speed: 1000, full duplex
990 01:15:37.443230 Using ethernet@ff3f0000 device
991 01:15:37.443874 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
992 01:15:37.449337 Filename '795671/tftp-deploy-xf7v49qn/kernel/uImage'.
993 01:15:37.453177 Load address: 0x1080000
994 01:15:41.456421 Loading: *################################################## 43.6 MiB
995 01:15:41.457056 10.9 MiB/s
996 01:15:41.457484 done
997 01:15:41.460324 Bytes transferred = 45713984 (2b98a40 hex)
998 01:15:41.461135 Sending with 10 millisecond of delay
1000 01:15:46.155126 => tftpboot 0x08000000 795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
1001 01:15:46.165771 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:08)
1002 01:15:46.166429 tftpboot 0x08000000 795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot
1003 01:15:46.166679 Speed: 1000, full duplex
1004 01:15:46.166893 Using ethernet@ff3f0000 device
1005 01:15:46.168647 TFTP from server 192.168.6.2; our IP address is 192.168.6.33
1006 01:15:46.177181 Filename '795671/tftp-deploy-xf7v49qn/ramdisk/ramdisk.cpio.gz.uboot'.
1007 01:15:46.177633 Load address: 0x8000000
1008 01:15:48.264583 Loading: *################################################# UDP wrong checksum 00000005 0000d687
1009 01:15:53.265783 T UDP wrong checksum 00000005 0000d687
1010 01:16:03.267720 T T UDP wrong checksum 00000005 0000d687
1011 01:16:20.397196 T T T UDP wrong checksum 000000ff 00000932
1012 01:16:20.429492 UDP wrong checksum 000000ff 00009c24
1013 01:16:23.273667 T UDP wrong checksum 00000005 0000d687
1014 01:16:34.563233 T T UDP wrong checksum 000000ff 0000e81b
1015 01:16:34.569607 UDP wrong checksum 000000ff 00007c0e
1016 01:16:42.059289 T UDP wrong checksum 000000ff 0000504b
1017 01:16:42.114539 UDP wrong checksum 000000ff 0000d53d
1018 01:16:42.866571 UDP wrong checksum 000000ff 0000a86b
1019 01:16:42.884636 UDP wrong checksum 000000ff 0000455e
1020 01:16:43.277457
1021 01:16:43.278065 Retry count exceeded; starting again
1023 01:16:43.279482 end: 2.4.3 bootloader-commands (duration 00:01:17) [common]
1026 01:16:43.281398 end: 2.4 uboot-commands (duration 00:01:49) [common]
1028 01:16:43.282797 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1030 01:16:43.283830 end: 2 uboot-action (duration 00:01:49) [common]
1032 01:16:43.285487 Cleaning after the job
1033 01:16:43.286064 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/ramdisk
1034 01:16:43.287434 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/kernel
1035 01:16:43.294746 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/dtb
1036 01:16:43.295895 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/nfsrootfs
1037 01:16:43.328321 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795671/tftp-deploy-xf7v49qn/modules
1038 01:16:43.334382 start: 4.1 power-off (timeout 00:00:30) [common]
1039 01:16:43.334961 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1040 01:16:43.368333 >> OK - accepted request
1041 01:16:43.370595 Returned 0 in 0 seconds
1042 01:16:43.471793 end: 4.1 power-off (duration 00:00:00) [common]
1044 01:16:43.473541 start: 4.2 read-feedback (timeout 00:10:00) [common]
1045 01:16:43.474652 Listened to connection for namespace 'common' for up to 1s
1046 01:16:44.475499 Finalising connection for namespace 'common'
1047 01:16:44.476263 Disconnecting from shell: Finalise
1048 01:16:44.476790 =>
1049 01:16:44.577775 end: 4.2 read-feedback (duration 00:00:01) [common]
1050 01:16:44.578467 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/795671
1051 01:16:46.312742 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/795671
1052 01:16:46.313326 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.