Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:44:45.047912 lava-dispatcher, installed at version: 2024.01
2 01:44:45.048807 start: 0 validate
3 01:44:45.049297 Start time: 2024-10-03 01:44:45.049266+00:00 (UTC)
4 01:44:45.049895 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:44:45.050498 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:44:45.094209 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:44:45.094788 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:44:45.130884 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:44:45.131553 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:44:45.163864 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:44:45.164396 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:44:45.202263 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:44:45.202793 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:44:45.247100 validate duration: 0.20
16 01:44:45.248651 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:44:45.249268 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:44:45.249822 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:44:45.251136 Not decompressing ramdisk as can be used compressed.
20 01:44:45.252164 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:44:45.252766 saving as /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/ramdisk/initrd.cpio.gz
22 01:44:45.253379 total size: 5628169 (5 MB)
23 01:44:45.293773 progress 0 % (0 MB)
24 01:44:45.302698 progress 5 % (0 MB)
25 01:44:45.311901 progress 10 % (0 MB)
26 01:44:45.319263 progress 15 % (0 MB)
27 01:44:45.323793 progress 20 % (1 MB)
28 01:44:45.327595 progress 25 % (1 MB)
29 01:44:45.331844 progress 30 % (1 MB)
30 01:44:45.336290 progress 35 % (1 MB)
31 01:44:45.340218 progress 40 % (2 MB)
32 01:44:45.344845 progress 45 % (2 MB)
33 01:44:45.348985 progress 50 % (2 MB)
34 01:44:45.353405 progress 55 % (2 MB)
35 01:44:45.357756 progress 60 % (3 MB)
36 01:44:45.361925 progress 65 % (3 MB)
37 01:44:45.366285 progress 70 % (3 MB)
38 01:44:45.370099 progress 75 % (4 MB)
39 01:44:45.374220 progress 80 % (4 MB)
40 01:44:45.378003 progress 85 % (4 MB)
41 01:44:45.381961 progress 90 % (4 MB)
42 01:44:45.385843 progress 95 % (5 MB)
43 01:44:45.389419 progress 100 % (5 MB)
44 01:44:45.390181 5 MB downloaded in 0.14 s (39.24 MB/s)
45 01:44:45.390752 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:44:45.391663 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:44:45.392088 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:44:45.392418 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:44:45.393089 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/kernel/Image
51 01:44:45.393455 saving as /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/kernel/Image
52 01:44:45.393681 total size: 45713920 (43 MB)
53 01:44:45.393913 No compression specified
54 01:44:45.431642 progress 0 % (0 MB)
55 01:44:45.462353 progress 5 % (2 MB)
56 01:44:45.491116 progress 10 % (4 MB)
57 01:44:45.520573 progress 15 % (6 MB)
58 01:44:45.550800 progress 20 % (8 MB)
59 01:44:45.581975 progress 25 % (10 MB)
60 01:44:45.611658 progress 30 % (13 MB)
61 01:44:45.641796 progress 35 % (15 MB)
62 01:44:45.670681 progress 40 % (17 MB)
63 01:44:45.699457 progress 45 % (19 MB)
64 01:44:45.728276 progress 50 % (21 MB)
65 01:44:45.756831 progress 55 % (24 MB)
66 01:44:45.786168 progress 60 % (26 MB)
67 01:44:45.815339 progress 65 % (28 MB)
68 01:44:45.845812 progress 70 % (30 MB)
69 01:44:45.874808 progress 75 % (32 MB)
70 01:44:45.903592 progress 80 % (34 MB)
71 01:44:45.932444 progress 85 % (37 MB)
72 01:44:45.961077 progress 90 % (39 MB)
73 01:44:45.989554 progress 95 % (41 MB)
74 01:44:46.017310 progress 100 % (43 MB)
75 01:44:46.017849 43 MB downloaded in 0.62 s (69.85 MB/s)
76 01:44:46.018354 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:44:46.019192 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:44:46.019475 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:44:46.019750 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:44:46.020473 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:44:46.020802 saving as /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:44:46.021024 total size: 53209 (0 MB)
84 01:44:46.021261 No compression specified
85 01:44:46.082005 progress 61 % (0 MB)
86 01:44:46.083184 progress 100 % (0 MB)
87 01:44:46.083950 0 MB downloaded in 0.06 s (0.81 MB/s)
88 01:44:46.084697 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:44:46.085779 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:44:46.086138 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:44:46.086490 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:44:46.089563 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:44:46.089988 saving as /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/nfsrootfs/full.rootfs.tar
95 01:44:46.090251 total size: 120894716 (115 MB)
96 01:44:46.090507 Using unxz to decompress xz
97 01:44:46.132189 progress 0 % (0 MB)
98 01:44:46.962598 progress 5 % (5 MB)
99 01:44:47.861422 progress 10 % (11 MB)
100 01:44:48.707046 progress 15 % (17 MB)
101 01:44:49.492407 progress 20 % (23 MB)
102 01:44:50.114487 progress 25 % (28 MB)
103 01:44:50.991177 progress 30 % (34 MB)
104 01:44:51.846984 progress 35 % (40 MB)
105 01:44:52.231534 progress 40 % (46 MB)
106 01:44:52.640805 progress 45 % (51 MB)
107 01:44:53.373478 progress 50 % (57 MB)
108 01:44:54.251063 progress 55 % (63 MB)
109 01:44:55.027705 progress 60 % (69 MB)
110 01:44:55.782245 progress 65 % (74 MB)
111 01:44:56.553918 progress 70 % (80 MB)
112 01:44:57.371705 progress 75 % (86 MB)
113 01:44:58.154727 progress 80 % (92 MB)
114 01:44:58.911438 progress 85 % (98 MB)
115 01:44:59.785491 progress 90 % (103 MB)
116 01:45:00.581631 progress 95 % (109 MB)
117 01:45:01.407897 progress 100 % (115 MB)
118 01:45:01.420399 115 MB downloaded in 15.33 s (7.52 MB/s)
119 01:45:01.420989 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:45:01.421859 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:45:01.422148 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:45:01.422426 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:45:01.422925 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/modules.tar.xz
125 01:45:01.423186 saving as /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/modules/modules.tar
126 01:45:01.423401 total size: 11617124 (11 MB)
127 01:45:01.423621 Using unxz to decompress xz
128 01:45:01.465380 progress 0 % (0 MB)
129 01:45:01.533621 progress 5 % (0 MB)
130 01:45:01.610521 progress 10 % (1 MB)
131 01:45:01.695961 progress 15 % (1 MB)
132 01:45:01.771786 progress 20 % (2 MB)
133 01:45:01.853514 progress 25 % (2 MB)
134 01:45:01.932401 progress 30 % (3 MB)
135 01:45:02.012641 progress 35 % (3 MB)
136 01:45:02.086831 progress 40 % (4 MB)
137 01:45:02.163738 progress 45 % (5 MB)
138 01:45:02.240434 progress 50 % (5 MB)
139 01:45:02.312808 progress 55 % (6 MB)
140 01:45:02.397857 progress 60 % (6 MB)
141 01:45:02.482995 progress 65 % (7 MB)
142 01:45:02.563553 progress 70 % (7 MB)
143 01:45:02.655074 progress 75 % (8 MB)
144 01:45:02.753014 progress 80 % (8 MB)
145 01:45:02.836463 progress 85 % (9 MB)
146 01:45:02.914936 progress 90 % (10 MB)
147 01:45:02.988760 progress 95 % (10 MB)
148 01:45:03.067687 progress 100 % (11 MB)
149 01:45:03.080323 11 MB downloaded in 1.66 s (6.69 MB/s)
150 01:45:03.080972 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:45:03.081812 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:45:03.082083 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 01:45:03.082350 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 01:45:19.575064 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/795716/extract-nfsrootfs-uv699psn
156 01:45:19.575685 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:45:19.576046 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:45:19.576732 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg
159 01:45:19.577218 makedir: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin
160 01:45:19.577630 makedir: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/tests
161 01:45:19.578023 makedir: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/results
162 01:45:19.578404 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-add-keys
163 01:45:19.578952 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-add-sources
164 01:45:19.579462 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-background-process-start
165 01:45:19.579957 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-background-process-stop
166 01:45:19.580542 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-common-functions
167 01:45:19.581042 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-echo-ipv4
168 01:45:19.581523 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-install-packages
169 01:45:19.582079 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-installed-packages
170 01:45:19.582562 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-os-build
171 01:45:19.583060 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-probe-channel
172 01:45:19.583560 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-probe-ip
173 01:45:19.584065 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-target-ip
174 01:45:19.584604 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-target-mac
175 01:45:19.585099 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-target-storage
176 01:45:19.585583 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-case
177 01:45:19.586063 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-event
178 01:45:19.586532 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-feedback
179 01:45:19.587021 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-raise
180 01:45:19.587511 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-reference
181 01:45:19.588017 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-runner
182 01:45:19.588518 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-set
183 01:45:19.588995 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-test-shell
184 01:45:19.589476 Updating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-add-keys (debian)
185 01:45:19.590007 Updating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-add-sources (debian)
186 01:45:19.590508 Updating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-install-packages (debian)
187 01:45:19.591004 Updating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-installed-packages (debian)
188 01:45:19.591492 Updating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/bin/lava-os-build (debian)
189 01:45:19.591916 Creating /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/environment
190 01:45:19.592312 LAVA metadata
191 01:45:19.592574 - LAVA_JOB_ID=795716
192 01:45:19.592790 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:45:19.593144 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:45:19.594094 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:45:19.594404 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:45:19.594613 skipped lava-vland-overlay
197 01:45:19.594854 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:45:19.595108 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:45:19.595327 skipped lava-multinode-overlay
200 01:45:19.595569 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:45:19.595819 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:45:19.596124 Loading test definitions
203 01:45:19.596409 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:45:19.596630 Using /lava-795716 at stage 0
205 01:45:19.597730 uuid=795716_1.6.2.4.1 testdef=None
206 01:45:19.598036 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:45:19.598301 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:45:19.599853 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:45:19.600677 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:45:19.602620 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:45:19.603441 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:45:19.605314 runner path: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/0/tests/0_timesync-off test_uuid 795716_1.6.2.4.1
215 01:45:19.605862 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:45:19.606675 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:45:19.606897 Using /lava-795716 at stage 0
219 01:45:19.607252 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:45:19.607543 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/0/tests/1_kselftest-kvm'
221 01:45:23.012627 Running '/usr/bin/git checkout kernelci.org
222 01:45:23.035052 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 01:45:23.037441 uuid=795716_1.6.2.4.5 testdef=None
224 01:45:23.038066 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 01:45:23.039536 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:45:23.045010 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:45:23.046610 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:45:23.053787 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:45:23.055456 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:45:23.062436 runner path: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/0/tests/1_kselftest-kvm test_uuid 795716_1.6.2.4.5
234 01:45:23.062962 BOARD='meson-sm1-s905d3-libretech-cc'
235 01:45:23.063381 BRANCH='mainline'
236 01:45:23.063781 SKIPFILE='/dev/null'
237 01:45:23.064218 SKIP_INSTALL='True'
238 01:45:23.064619 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 01:45:23.065023 TST_CASENAME=''
240 01:45:23.065421 TST_CMDFILES='kvm'
241 01:45:23.066441 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:45:23.068033 Creating lava-test-runner.conf files
244 01:45:23.068474 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/795716/lava-overlay-6x_lzhkg/lava-795716/0 for stage 0
245 01:45:23.069150 - 0_timesync-off
246 01:45:23.069622 - 1_kselftest-kvm
247 01:45:23.070276 end: 1.6.2.4 test-definition (duration 00:00:03) [common]
248 01:45:23.070830 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:45:46.571908 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 01:45:46.572381 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 01:45:46.572648 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:45:46.572920 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:45:46.573184 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 01:45:47.238432 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:45:47.238913 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:45:47.239165 extracting modules file /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795716/extract-nfsrootfs-uv699psn
257 01:45:48.630083 extracting modules file /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk
258 01:45:50.047658 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:45:50.048182 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 01:45:50.048472 [common] Applying overlay to NFS
261 01:45:50.048691 [common] Applying overlay /var/lib/lava/dispatcher/tmp/795716/compress-overlay-jk79060v/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/795716/extract-nfsrootfs-uv699psn
262 01:45:52.791916 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:45:52.792416 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 01:45:52.792691 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 01:45:52.792921 Converting downloaded kernel to a uImage
266 01:45:52.793244 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/kernel/Image /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/kernel/uImage
267 01:45:53.285227 output: Image Name:
268 01:45:53.285648 output: Created: Thu Oct 3 01:45:52 2024
269 01:45:53.285859 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:45:53.286066 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 01:45:53.286270 output: Load Address: 01080000
272 01:45:53.286474 output: Entry Point: 01080000
273 01:45:53.286673 output:
274 01:45:53.287003 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:45:53.287270 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:45:53.287540 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:45:53.287801 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:45:53.288134 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:45:53.288406 Building ramdisk /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk
280 01:45:55.870945 >> 166772 blocks
281 01:46:03.853448 Adding RAMdisk u-boot header.
282 01:46:03.854273 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk.cpio.gz.uboot
283 01:46:04.091627 output: Image Name:
284 01:46:04.092367 output: Created: Thu Oct 3 01:46:03 2024
285 01:46:04.092977 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:46:04.093560 output: Data Size: 23423013 Bytes = 22874.04 KiB = 22.34 MiB
287 01:46:04.094061 output: Load Address: 00000000
288 01:46:04.094626 output: Entry Point: 00000000
289 01:46:04.095125 output:
290 01:46:04.096460 rename /var/lib/lava/dispatcher/tmp/795716/extract-overlay-ramdisk-wl3oahu3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
291 01:46:04.097266 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
292 01:46:04.097957 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 01:46:04.098664 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 01:46:04.099183 No LXC device requested
295 01:46:04.099738 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:46:04.100437 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 01:46:04.100998 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:46:04.101519 Checking files for TFTP limit of 4294967296 bytes.
299 01:46:04.104790 end: 1 tftp-deploy (duration 00:01:19) [common]
300 01:46:04.105532 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:46:04.106110 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:46:04.106733 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:46:04.107300 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:46:04.107951 Using kernel file from prepare-kernel: 795716/tftp-deploy-3h98mbi4/kernel/uImage
305 01:46:04.108757 substitutions:
306 01:46:04.109224 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:46:04.109723 - {DTB_ADDR}: 0x01070000
308 01:46:04.110176 - {DTB}: 795716/tftp-deploy-3h98mbi4/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 01:46:04.110624 - {INITRD}: 795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
310 01:46:04.111113 - {KERNEL_ADDR}: 0x01080000
311 01:46:04.111557 - {KERNEL}: 795716/tftp-deploy-3h98mbi4/kernel/uImage
312 01:46:04.112015 - {LAVA_MAC}: None
313 01:46:04.112558 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/795716/extract-nfsrootfs-uv699psn
314 01:46:04.113005 - {NFS_SERVER_IP}: 192.168.6.2
315 01:46:04.113511 - {PRESEED_CONFIG}: None
316 01:46:04.113952 - {PRESEED_LOCAL}: None
317 01:46:04.114439 - {RAMDISK_ADDR}: 0x08000000
318 01:46:04.114877 - {RAMDISK}: 795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
319 01:46:04.115307 - {ROOT_PART}: None
320 01:46:04.115798 - {ROOT}: None
321 01:46:04.116263 - {SERVER_IP}: 192.168.6.2
322 01:46:04.116760 - {TEE_ADDR}: 0x83000000
323 01:46:04.117193 - {TEE}: None
324 01:46:04.117672 Parsed boot commands:
325 01:46:04.118102 - setenv autoload no
326 01:46:04.118529 - setenv initrd_high 0xffffffff
327 01:46:04.119006 - setenv fdt_high 0xffffffff
328 01:46:04.119439 - dhcp
329 01:46:04.119867 - setenv serverip 192.168.6.2
330 01:46:04.120385 - tftpboot 0x01080000 795716/tftp-deploy-3h98mbi4/kernel/uImage
331 01:46:04.120820 - tftpboot 0x08000000 795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
332 01:46:04.121304 - tftpboot 0x01070000 795716/tftp-deploy-3h98mbi4/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 01:46:04.121739 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/795716/extract-nfsrootfs-uv699psn,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:46:04.122186 - bootm 0x01080000 0x08000000 0x01070000
335 01:46:04.122802 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:46:04.124691 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:46:04.125174 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 01:46:04.141663 Setting prompt string to ['lava-test: # ']
340 01:46:04.143407 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:46:04.144193 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:46:04.144909 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:46:04.145569 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:46:04.146939 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 01:46:04.187023 >> OK - accepted request
346 01:46:04.189235 Returned 0 in 0 seconds
347 01:46:04.290435 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:46:04.292547 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:46:04.293250 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:46:04.293810 Setting prompt string to ['Hit any key to stop autoboot']
352 01:46:04.294382 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:46:04.296199 Trying 192.168.56.21...
354 01:46:04.296815 Connected to conserv1.
355 01:46:04.297276 Escape character is '^]'.
356 01:46:04.297807
357 01:46:04.298281 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 01:46:04.298756
359 01:46:12.213346 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 01:46:12.214047 bl2_stage_init 0x01
361 01:46:12.214542 bl2_stage_init 0x81
362 01:46:12.218837 hw id: 0x0000 - pwm id 0x01
363 01:46:12.219409 bl2_stage_init 0xc1
364 01:46:12.224365 bl2_stage_init 0x02
365 01:46:12.224937
366 01:46:12.225436 L0:00000000
367 01:46:12.225921 L1:00000703
368 01:46:12.226389 L2:00008067
369 01:46:12.226862 L3:15000000
370 01:46:12.229919 S1:00000000
371 01:46:12.230466 B2:20282000
372 01:46:12.230950 B1:a0f83180
373 01:46:12.231398
374 01:46:12.231852 TE: 67427
375 01:46:12.232413
376 01:46:12.235545 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 01:46:12.236123
378 01:46:12.241132 Board ID = 1
379 01:46:12.241695 Set cpu clk to 24M
380 01:46:12.242169 Set clk81 to 24M
381 01:46:12.246754 Use GP1_pll as DSU clk.
382 01:46:12.247305 DSU clk: 1200 Mhz
383 01:46:12.247750 CPU clk: 1200 MHz
384 01:46:12.252349 Set clk81 to 166.6M
385 01:46:12.257897 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 01:46:12.258445 board id: 1
387 01:46:12.265168 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:46:12.275917 fw parse done
389 01:46:12.281820 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:46:12.324255 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:46:12.335186 PIEI prepare done
392 01:46:12.335723 fastboot data load
393 01:46:12.336228 fastboot data verify
394 01:46:12.340778 verify result: 266
395 01:46:12.346349 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 01:46:12.346836 LPDDR4 probe
397 01:46:12.347276 ddr clk to 1584MHz
398 01:46:12.354346 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:46:12.391627
400 01:46:12.392359 dmc_version 0001
401 01:46:12.398203 Check phy result
402 01:46:12.404100 INFO : End of CA training
403 01:46:12.404576 INFO : End of initialization
404 01:46:12.409691 INFO : Training has run successfully!
405 01:46:12.410182 Check phy result
406 01:46:12.415398 INFO : End of initialization
407 01:46:12.415877 INFO : End of read enable training
408 01:46:12.418623 INFO : End of fine write leveling
409 01:46:12.424199 INFO : End of Write leveling coarse delay
410 01:46:12.429817 INFO : Training has run successfully!
411 01:46:12.430292 Check phy result
412 01:46:12.430733 INFO : End of initialization
413 01:46:12.435398 INFO : End of read dq deskew training
414 01:46:12.440979 INFO : End of MPR read delay center optimization
415 01:46:12.441576 INFO : End of write delay center optimization
416 01:46:12.446659 INFO : End of read delay center optimization
417 01:46:12.452468 INFO : End of max read latency training
418 01:46:12.453022 INFO : Training has run successfully!
419 01:46:12.457931 1D training succeed
420 01:46:12.463966 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:46:12.511530 Check phy result
422 01:46:12.512206 INFO : End of initialization
423 01:46:12.534069 INFO : End of 2D read delay Voltage center optimization
424 01:46:12.553011 INFO : End of 2D read delay Voltage center optimization
425 01:46:12.604895 INFO : End of 2D write delay Voltage center optimization
426 01:46:12.654101 INFO : End of 2D write delay Voltage center optimization
427 01:46:12.659637 INFO : Training has run successfully!
428 01:46:12.660259
429 01:46:12.660711 channel==0
430 01:46:12.665199 RxClkDly_Margin_A0==78 ps 8
431 01:46:12.665764 TxDqDly_Margin_A0==98 ps 10
432 01:46:12.668550 RxClkDly_Margin_A1==88 ps 9
433 01:46:12.669093 TxDqDly_Margin_A1==98 ps 10
434 01:46:12.674163 TrainedVREFDQ_A0==74
435 01:46:12.674732 TrainedVREFDQ_A1==74
436 01:46:12.675199 VrefDac_Margin_A0==23
437 01:46:12.679834 DeviceVref_Margin_A0==40
438 01:46:12.680412 VrefDac_Margin_A1==22
439 01:46:12.685378 DeviceVref_Margin_A1==40
440 01:46:12.685961
441 01:46:12.686413
442 01:46:12.686880 channel==1
443 01:46:12.687313 RxClkDly_Margin_A0==88 ps 9
444 01:46:12.690945 TxDqDly_Margin_A0==88 ps 9
445 01:46:12.691493 RxClkDly_Margin_A1==78 ps 8
446 01:46:12.696597 TxDqDly_Margin_A1==88 ps 9
447 01:46:12.697187 TrainedVREFDQ_A0==75
448 01:46:12.697645 TrainedVREFDQ_A1==75
449 01:46:12.702178 VrefDac_Margin_A0==23
450 01:46:12.702729 DeviceVref_Margin_A0==39
451 01:46:12.707887 VrefDac_Margin_A1==22
452 01:46:12.708487 DeviceVref_Margin_A1==39
453 01:46:12.708926
454 01:46:12.713409 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:46:12.713973
456 01:46:12.741304 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
457 01:46:12.746988 2D training succeed
458 01:46:12.752491 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:46:12.753022 auto size-- 65535DDR cs0 size: 2048MB
460 01:46:12.758171 DDR cs1 size: 2048MB
461 01:46:12.758794 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:46:12.763794 cs0 DataBus test pass
463 01:46:12.764352 cs1 DataBus test pass
464 01:46:12.764791 cs0 AddrBus test pass
465 01:46:12.769317 cs1 AddrBus test pass
466 01:46:12.769842
467 01:46:12.770286 100bdlr_step_size ps== 478
468 01:46:12.770734 result report
469 01:46:12.774924 boot times 0Enable ddr reg access
470 01:46:12.782376 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:46:12.796154 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 01:46:13.451164 bl2z: ptr: 05129330, size: 00001e40
473 01:46:13.457964 0.0;M3 CHK:0;cm4_sp_mode 0
474 01:46:13.458519 MVN_1=0x00000000
475 01:46:13.458975 MVN_2=0x00000000
476 01:46:13.469454 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 01:46:13.469968 OPS=0x04
478 01:46:13.470416 ring efuse init
479 01:46:13.475091 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 01:46:13.475601 [0.017319 Inits done]
481 01:46:13.476094 secure task start!
482 01:46:13.482452 high task start!
483 01:46:13.483030 low task start!
484 01:46:13.483532 run into bl31
485 01:46:13.490948 NOTICE: BL31: v1.3(release):4fc40b1
486 01:46:13.498746 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 01:46:13.499319 NOTICE: BL31: G12A normal boot!
488 01:46:13.514251 NOTICE: BL31: BL33 decompress pass
489 01:46:13.520033 ERROR: Error initializing runtime service opteed_fast
490 01:46:16.263453 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 01:46:16.263929 bl2_stage_init 0x01
492 01:46:16.264238 bl2_stage_init 0x81
493 01:46:16.273150 hw id: 0x0000 - pwm id 0x01
494 01:46:16.273528 bl2_stage_init 0xc1
495 01:46:16.274544 bl2_stage_init 0x02
496 01:46:16.275024
497 01:46:16.275291 L0:00000000
498 01:46:16.275521 L1:00000703
499 01:46:16.275745 L2:00008067
500 01:46:16.276013 L3:15000000
501 01:46:16.280132 S1:00000000
502 01:46:16.280429 B2:20282000
503 01:46:16.280796 B1:a0f83180
504 01:46:16.281028
505 01:46:16.281257 TE: 67820
506 01:46:16.281488
507 01:46:16.285677 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 01:46:16.285988
509 01:46:16.291269 Board ID = 1
510 01:46:16.291573 Set cpu clk to 24M
511 01:46:16.291811 Set clk81 to 24M
512 01:46:16.296974 Use GP1_pll as DSU clk.
513 01:46:16.297260 DSU clk: 1200 Mhz
514 01:46:16.297495 CPU clk: 1200 MHz
515 01:46:16.302466 Set clk81 to 166.6M
516 01:46:16.308091 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 01:46:16.308388 board id: 1
518 01:46:16.315318 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 01:46:16.326254 fw parse done
520 01:46:16.332186 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 01:46:16.375319 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 01:46:16.386504 PIEI prepare done
523 01:46:16.386830 fastboot data load
524 01:46:16.387067 fastboot data verify
525 01:46:16.392145 verify result: 266
526 01:46:16.397725 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 01:46:16.398235 LPDDR4 probe
528 01:46:16.398641 ddr clk to 1584MHz
529 01:46:16.405717 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 01:46:16.443653
531 01:46:16.444313 dmc_version 0001
532 01:46:16.450508 Check phy result
533 01:46:16.456450 INFO : End of CA training
534 01:46:16.456965 INFO : End of initialization
535 01:46:16.462050 INFO : Training has run successfully!
536 01:46:16.462562 Check phy result
537 01:46:16.467687 INFO : End of initialization
538 01:46:16.468219 INFO : End of read enable training
539 01:46:16.473285 INFO : End of fine write leveling
540 01:46:16.478928 INFO : End of Write leveling coarse delay
541 01:46:16.479496 INFO : Training has run successfully!
542 01:46:16.479951 Check phy result
543 01:46:16.484472 INFO : End of initialization
544 01:46:16.485016 INFO : End of read dq deskew training
545 01:46:16.490056 INFO : End of MPR read delay center optimization
546 01:46:16.495661 INFO : End of write delay center optimization
547 01:46:16.501291 INFO : End of read delay center optimization
548 01:46:16.501816 INFO : End of max read latency training
549 01:46:16.506877 INFO : Training has run successfully!
550 01:46:16.507422 1D training succeed
551 01:46:16.516044 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 01:46:16.564378 Check phy result
553 01:46:16.564954 INFO : End of initialization
554 01:46:16.591767 INFO : End of 2D read delay Voltage center optimization
555 01:46:16.615854 INFO : End of 2D read delay Voltage center optimization
556 01:46:16.672779 INFO : End of 2D write delay Voltage center optimization
557 01:46:16.726707 INFO : End of 2D write delay Voltage center optimization
558 01:46:16.732176 INFO : Training has run successfully!
559 01:46:16.732718
560 01:46:16.733143 channel==0
561 01:46:16.737757 RxClkDly_Margin_A0==78 ps 8
562 01:46:16.738277 TxDqDly_Margin_A0==98 ps 10
563 01:46:16.743346 RxClkDly_Margin_A1==88 ps 9
564 01:46:16.743877 TxDqDly_Margin_A1==98 ps 10
565 01:46:16.744361 TrainedVREFDQ_A0==74
566 01:46:16.748949 TrainedVREFDQ_A1==75
567 01:46:16.749459 VrefDac_Margin_A0==24
568 01:46:16.749863 DeviceVref_Margin_A0==40
569 01:46:16.754547 VrefDac_Margin_A1==23
570 01:46:16.755044 DeviceVref_Margin_A1==39
571 01:46:16.755444
572 01:46:16.755840
573 01:46:16.760251 channel==1
574 01:46:16.760744 RxClkDly_Margin_A0==78 ps 8
575 01:46:16.761140 TxDqDly_Margin_A0==98 ps 10
576 01:46:16.765775 RxClkDly_Margin_A1==88 ps 9
577 01:46:16.766263 TxDqDly_Margin_A1==88 ps 9
578 01:46:16.771282 TrainedVREFDQ_A0==78
579 01:46:16.771650 TrainedVREFDQ_A1==75
580 01:46:16.771873 VrefDac_Margin_A0==22
581 01:46:16.776927 DeviceVref_Margin_A0==36
582 01:46:16.777463 VrefDac_Margin_A1==22
583 01:46:16.782535 DeviceVref_Margin_A1==39
584 01:46:16.783040
585 01:46:16.783460 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 01:46:16.783887
587 01:46:16.816112 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 01:46:16.816669 2D training succeed
589 01:46:16.821777 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 01:46:16.827360 auto size-- 65535DDR cs0 size: 2048MB
591 01:46:16.827882 DDR cs1 size: 2048MB
592 01:46:16.832945 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 01:46:16.833467 cs0 DataBus test pass
594 01:46:16.838539 cs1 DataBus test pass
595 01:46:16.839051 cs0 AddrBus test pass
596 01:46:16.839482 cs1 AddrBus test pass
597 01:46:16.839875
598 01:46:16.844197 100bdlr_step_size ps== 471
599 01:46:16.844726 result report
600 01:46:16.849745 boot times 0Enable ddr reg access
601 01:46:16.854980 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 01:46:16.868813 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 01:46:17.527610 bl2z: ptr: 05129330, size: 00001e40
604 01:46:17.536743 0.0;M3 CHK:0;cm4_sp_mode 0
605 01:46:17.537261 MVN_1=0x00000000
606 01:46:17.537668 MVN_2=0x00000000
607 01:46:17.548253 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 01:46:17.548740 OPS=0x04
609 01:46:17.549161 ring efuse init
610 01:46:17.553906 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 01:46:17.554374 [0.017355 Inits done]
612 01:46:17.554773 secure task start!
613 01:46:17.561630 high task start!
614 01:46:17.562159 low task start!
615 01:46:17.562584 run into bl31
616 01:46:17.570144 NOTICE: BL31: v1.3(release):4fc40b1
617 01:46:17.578012 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 01:46:17.578503 NOTICE: BL31: G12A normal boot!
619 01:46:17.593481 NOTICE: BL31: BL33 decompress pass
620 01:46:17.599201 ERROR: Error initializing runtime service opteed_fast
621 01:46:18.968081 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 01:46:18.968710 bl2_stage_init 0x01
623 01:46:18.969145 bl2_stage_init 0x81
624 01:46:18.973678 hw id: 0x0000 - pwm id 0x01
625 01:46:18.974144 bl2_stage_init 0xc1
626 01:46:18.979541 bl2_stage_init 0x02
627 01:46:18.980037
628 01:46:18.980467 L0:00000000
629 01:46:18.980874 L1:00000703
630 01:46:18.981275 L2:00008067
631 01:46:18.981680 L3:15000000
632 01:46:18.984913 S1:00000000
633 01:46:18.985384 B2:20282000
634 01:46:18.985791 B1:a0f83180
635 01:46:18.986190
636 01:46:18.986588 TE: 72078
637 01:46:18.986987
638 01:46:18.990452 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 01:46:18.990921
640 01:46:18.996074 Board ID = 1
641 01:46:18.996528 Set cpu clk to 24M
642 01:46:18.996939 Set clk81 to 24M
643 01:46:19.001757 Use GP1_pll as DSU clk.
644 01:46:19.002213 DSU clk: 1200 Mhz
645 01:46:19.002622 CPU clk: 1200 MHz
646 01:46:19.007248 Set clk81 to 166.6M
647 01:46:19.012862 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 01:46:19.013350 board id: 1
649 01:46:19.020122 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 01:46:19.030902 fw parse done
651 01:46:19.036883 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 01:46:19.079059 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 01:46:19.091088 PIEI prepare done
654 01:46:19.091557 fastboot data load
655 01:46:19.091970 fastboot data verify
656 01:46:19.096793 verify result: 266
657 01:46:19.102240 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 01:46:19.102724 LPDDR4 probe
659 01:46:19.103161 ddr clk to 1584MHz
660 01:46:19.110388 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 01:46:19.148090
662 01:46:19.148667 dmc_version 0001
663 01:46:19.155050 Check phy result
664 01:46:19.161083 INFO : End of CA training
665 01:46:19.161766 INFO : End of initialization
666 01:46:19.166686 INFO : Training has run successfully!
667 01:46:19.167321 Check phy result
668 01:46:19.172239 INFO : End of initialization
669 01:46:19.172903 INFO : End of read enable training
670 01:46:19.175536 INFO : End of fine write leveling
671 01:46:19.181127 INFO : End of Write leveling coarse delay
672 01:46:19.186715 INFO : Training has run successfully!
673 01:46:19.187351 Check phy result
674 01:46:19.187901 INFO : End of initialization
675 01:46:19.192333 INFO : End of read dq deskew training
676 01:46:19.197902 INFO : End of MPR read delay center optimization
677 01:46:19.198509 INFO : End of write delay center optimization
678 01:46:19.203460 INFO : End of read delay center optimization
679 01:46:19.209214 INFO : End of max read latency training
680 01:46:19.209841 INFO : Training has run successfully!
681 01:46:19.214681 1D training succeed
682 01:46:19.220609 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 01:46:19.268938 Check phy result
684 01:46:19.269533 INFO : End of initialization
685 01:46:19.296497 INFO : End of 2D read delay Voltage center optimization
686 01:46:19.320683 INFO : End of 2D read delay Voltage center optimization
687 01:46:19.376529 INFO : End of 2D write delay Voltage center optimization
688 01:46:19.431342 INFO : End of 2D write delay Voltage center optimization
689 01:46:19.436890 INFO : Training has run successfully!
690 01:46:19.437499
691 01:46:19.438054 channel==0
692 01:46:19.442439 RxClkDly_Margin_A0==78 ps 8
693 01:46:19.443053 TxDqDly_Margin_A0==98 ps 10
694 01:46:19.445713 RxClkDly_Margin_A1==88 ps 9
695 01:46:19.446297 TxDqDly_Margin_A1==98 ps 10
696 01:46:19.451180 TrainedVREFDQ_A0==74
697 01:46:19.451767 TrainedVREFDQ_A1==75
698 01:46:19.456934 VrefDac_Margin_A0==23
699 01:46:19.457568 DeviceVref_Margin_A0==40
700 01:46:19.458125 VrefDac_Margin_A1==23
701 01:46:19.462509 DeviceVref_Margin_A1==39
702 01:46:19.463181
703 01:46:19.463757
704 01:46:19.464405 channel==1
705 01:46:19.464965 RxClkDly_Margin_A0==78 ps 8
706 01:46:19.465989 TxDqDly_Margin_A0==98 ps 10
707 01:46:19.471654 RxClkDly_Margin_A1==88 ps 9
708 01:46:19.472458 TxDqDly_Margin_A1==88 ps 9
709 01:46:19.473061 TrainedVREFDQ_A0==78
710 01:46:19.477139 TrainedVREFDQ_A1==75
711 01:46:19.477781 VrefDac_Margin_A0==22
712 01:46:19.482907 DeviceVref_Margin_A0==36
713 01:46:19.483526 VrefDac_Margin_A1==22
714 01:46:19.484110 DeviceVref_Margin_A1==39
715 01:46:19.484631
716 01:46:19.488380 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 01:46:19.489008
718 01:46:19.522008 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
719 01:46:19.522813 2D training succeed
720 01:46:19.527472 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 01:46:19.533023 auto size-- 65535DDR cs0 size: 2048MB
722 01:46:19.533670 DDR cs1 size: 2048MB
723 01:46:19.538618 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 01:46:19.539240 cs0 DataBus test pass
725 01:46:19.539817 cs1 DataBus test pass
726 01:46:19.544291 cs0 AddrBus test pass
727 01:46:19.544950 cs1 AddrBus test pass
728 01:46:19.545519
729 01:46:19.549812 100bdlr_step_size ps== 478
730 01:46:19.550407 result report
731 01:46:19.550923 boot times 0Enable ddr reg access
732 01:46:19.559510 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 01:46:19.573351 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 01:46:20.234376 bl2z: ptr: 05129330, size: 00001e40
735 01:46:20.243793 0.0;M3 CHK:0;cm4_sp_mode 0
736 01:46:20.244532 MVN_1=0x00000000
737 01:46:20.245114 MVN_2=0x00000000
738 01:46:20.255209 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 01:46:20.255905 OPS=0x04
740 01:46:20.256493 ring efuse init
741 01:46:20.260860 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 01:46:20.261456 [0.017355 Inits done]
743 01:46:20.262000 secure task start!
744 01:46:20.268044 high task start!
745 01:46:20.268707 low task start!
746 01:46:20.269264 run into bl31
747 01:46:20.276646 NOTICE: BL31: v1.3(release):4fc40b1
748 01:46:20.284476 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 01:46:20.284993 NOTICE: BL31: G12A normal boot!
750 01:46:20.300096 NOTICE: BL31: BL33 decompress pass
751 01:46:20.305712 ERROR: Error initializing runtime service opteed_fast
752 01:46:21.101327
753 01:46:21.101949
754 01:46:21.106513 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 01:46:21.106989
756 01:46:21.110064 Model: Libre Computer AML-S905D3-CC Solitude
757 01:46:21.257096 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 01:46:21.272428 DRAM: 2 GiB (effective 3.8 GiB)
759 01:46:21.373493 Core: 406 devices, 33 uclasses, devicetree: separate
760 01:46:21.379501 WDT: Not starting watchdog@f0d0
761 01:46:21.404387 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 01:46:21.416604 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 01:46:21.421508 ** Bad device specification mmc 0 **
764 01:46:21.432245 Card did not respond to voltage select! : -110
765 01:46:21.439241 ** Bad device specification mmc 0 **
766 01:46:21.439701 Couldn't find partition mmc 0
767 01:46:21.447584 Card did not respond to voltage select! : -110
768 01:46:21.453109 ** Bad device specification mmc 0 **
769 01:46:21.453553 Couldn't find partition mmc 0
770 01:46:21.458180 Error: could not access storage.
771 01:46:21.754692 Net: eth0: ethernet@ff3f0000
772 01:46:21.755251 starting USB...
773 01:46:21.999274 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 01:46:21.999834 Starting the controller
775 01:46:22.006202 USB XHCI 1.10
776 01:46:23.560275 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 01:46:23.568459 scanning usb for storage devices... 0 Storage Device(s) found
779 01:46:23.619905 Hit any key to stop autoboot: 1
780 01:46:23.620748 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 01:46:23.621340 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
782 01:46:23.621819 Setting prompt string to ['=>']
783 01:46:23.622306 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
784 01:46:23.634505 0
785 01:46:23.635370 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 01:46:23.736574 => setenv autoload no
788 01:46:23.737211 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
789 01:46:23.741952 setenv autoload no
791 01:46:23.843380 => setenv initrd_high 0xffffffff
792 01:46:23.844037 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
793 01:46:23.848633 setenv initrd_high 0xffffffff
795 01:46:23.950000 => setenv fdt_high 0xffffffff
796 01:46:23.950613 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
797 01:46:23.955199 setenv fdt_high 0xffffffff
799 01:46:24.056649 => dhcp
800 01:46:24.057284 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
801 01:46:24.061342 dhcp
802 01:46:25.067461 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
803 01:46:25.068079 Speed: 1000, full duplex
804 01:46:25.068505 BOOTP broadcast 1
805 01:46:25.316030 BOOTP broadcast 2
806 01:46:25.816977 BOOTP broadcast 3
807 01:46:26.818034 BOOTP broadcast 4
808 01:46:28.819055 BOOTP broadcast 5
809 01:46:28.831959 DHCP client bound to address 192.168.6.12 (3763 ms)
811 01:46:28.933450 => setenv serverip 192.168.6.2
812 01:46:28.934191 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
813 01:46:28.938850 setenv serverip 192.168.6.2
815 01:46:29.040378 => tftpboot 0x01080000 795716/tftp-deploy-3h98mbi4/kernel/uImage
816 01:46:29.041117 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
817 01:46:29.047863 tftpboot 0x01080000 795716/tftp-deploy-3h98mbi4/kernel/uImage
818 01:46:29.048369 Speed: 1000, full duplex
819 01:46:29.048788 Using ethernet@ff3f0000 device
820 01:46:29.053404 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
821 01:46:29.058895 Filename '795716/tftp-deploy-3h98mbi4/kernel/uImage'.
822 01:46:29.062738 Load address: 0x1080000
823 01:46:34.206618 Loading: *################################################## 43.6 MiB
824 01:46:34.207222 8.5 MiB/s
825 01:46:34.207650 done
826 01:46:34.210886 Bytes transferred = 45713984 (2b98a40 hex)
828 01:46:34.312361 => tftpboot 0x08000000 795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
829 01:46:34.313058 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:30)
830 01:46:34.319588 tftpboot 0x08000000 795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot
831 01:46:34.320261 Speed: 1000, full duplex
832 01:46:34.320823 Using ethernet@ff3f0000 device
833 01:46:34.325087 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
834 01:46:34.334827 Filename '795716/tftp-deploy-3h98mbi4/ramdisk/ramdisk.cpio.gz.uboot'.
835 01:46:34.335466 Load address: 0x8000000
836 01:46:37.492670 Loading: *################### UDP wrong checksum 000000ff 00006c1e
837 01:46:37.526618 UDP wrong checksum 000000ff 0000f310
838 01:46:41.592967 T ############################## UDP wrong checksum 00000005 00003375
839 01:46:46.593758 T UDP wrong checksum 00000005 00003375
840 01:46:56.594706 T T UDP wrong checksum 00000005 00003375
841 01:47:16.599960 T T T T UDP wrong checksum 00000005 00003375
842 01:47:31.603536 T T
843 01:47:31.603969 Retry count exceeded; starting again
845 01:47:31.604887 end: 2.4.3 bootloader-commands (duration 00:01:08) [common]
848 01:47:31.605924 end: 2.4 uboot-commands (duration 00:01:27) [common]
850 01:47:31.606689 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
852 01:47:31.607266 end: 2 uboot-action (duration 00:01:28) [common]
854 01:47:31.608241 Cleaning after the job
855 01:47:31.608573 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/ramdisk
856 01:47:31.609332 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/kernel
857 01:47:31.642433 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/dtb
858 01:47:31.643215 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/nfsrootfs
859 01:47:31.676858 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795716/tftp-deploy-3h98mbi4/modules
860 01:47:31.683454 start: 4.1 power-off (timeout 00:00:30) [common]
861 01:47:31.684085 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
862 01:47:31.721403 >> OK - accepted request
863 01:47:31.723413 Returned 0 in 0 seconds
864 01:47:31.824153 end: 4.1 power-off (duration 00:00:00) [common]
866 01:47:31.825130 start: 4.2 read-feedback (timeout 00:10:00) [common]
867 01:47:31.825786 Listened to connection for namespace 'common' for up to 1s
868 01:47:32.826250 Finalising connection for namespace 'common'
869 01:47:32.826740 Disconnecting from shell: Finalise
870 01:47:32.827028 =>
871 01:47:32.927953 end: 4.2 read-feedback (duration 00:00:01) [common]
872 01:47:32.928785 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/795716
873 01:47:35.875604 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/795716
874 01:47:35.876245 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.