Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:15:33.809431 lava-dispatcher, installed at version: 2024.01
2 01:15:33.810262 start: 0 validate
3 01:15:33.810730 Start time: 2024-10-03 01:15:33.810700+00:00 (UTC)
4 01:15:33.811284 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:15:33.811831 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:15:33.858016 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:15:33.858607 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:15:33.891356 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:15:33.892084 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:15:33.920963 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:15:33.921556 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:15:33.950289 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:15:33.950776 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:15:33.988115 validate duration: 0.18
16 01:15:33.989199 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:15:33.989612 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:15:33.989981 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:15:33.990722 Not decompressing ramdisk as can be used compressed.
20 01:15:33.991312 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:15:33.991646 saving as /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/ramdisk/initrd.cpio.gz
22 01:15:33.992016 total size: 5628140 (5 MB)
23 01:15:34.031617 progress 0 % (0 MB)
24 01:15:34.035928 progress 5 % (0 MB)
25 01:15:34.040414 progress 10 % (0 MB)
26 01:15:34.044079 progress 15 % (0 MB)
27 01:15:34.048144 progress 20 % (1 MB)
28 01:15:34.051766 progress 25 % (1 MB)
29 01:15:34.055714 progress 30 % (1 MB)
30 01:15:34.059722 progress 35 % (1 MB)
31 01:15:34.063278 progress 40 % (2 MB)
32 01:15:34.067285 progress 45 % (2 MB)
33 01:15:34.070897 progress 50 % (2 MB)
34 01:15:34.074899 progress 55 % (2 MB)
35 01:15:34.078948 progress 60 % (3 MB)
36 01:15:34.082522 progress 65 % (3 MB)
37 01:15:34.086536 progress 70 % (3 MB)
38 01:15:34.090070 progress 75 % (4 MB)
39 01:15:34.093958 progress 80 % (4 MB)
40 01:15:34.097549 progress 85 % (4 MB)
41 01:15:34.101542 progress 90 % (4 MB)
42 01:15:34.105420 progress 95 % (5 MB)
43 01:15:34.108755 progress 100 % (5 MB)
44 01:15:34.109419 5 MB downloaded in 0.12 s (45.71 MB/s)
45 01:15:34.109962 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:15:34.110829 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:15:34.111120 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:15:34.111388 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:15:34.111872 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/kernel/Image
51 01:15:34.112190 saving as /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/kernel/Image
52 01:15:34.112410 total size: 45713920 (43 MB)
53 01:15:34.112621 No compression specified
54 01:15:34.156265 progress 0 % (0 MB)
55 01:15:34.185813 progress 5 % (2 MB)
56 01:15:34.213557 progress 10 % (4 MB)
57 01:15:34.241744 progress 15 % (6 MB)
58 01:15:34.270163 progress 20 % (8 MB)
59 01:15:34.298167 progress 25 % (10 MB)
60 01:15:34.326399 progress 30 % (13 MB)
61 01:15:34.354510 progress 35 % (15 MB)
62 01:15:34.383273 progress 40 % (17 MB)
63 01:15:34.411115 progress 45 % (19 MB)
64 01:15:34.439859 progress 50 % (21 MB)
65 01:15:34.468266 progress 55 % (24 MB)
66 01:15:34.496760 progress 60 % (26 MB)
67 01:15:34.524997 progress 65 % (28 MB)
68 01:15:34.553205 progress 70 % (30 MB)
69 01:15:34.581886 progress 75 % (32 MB)
70 01:15:34.610312 progress 80 % (34 MB)
71 01:15:34.638325 progress 85 % (37 MB)
72 01:15:34.666824 progress 90 % (39 MB)
73 01:15:34.694911 progress 95 % (41 MB)
74 01:15:34.723338 progress 100 % (43 MB)
75 01:15:34.723911 43 MB downloaded in 0.61 s (71.30 MB/s)
76 01:15:34.724414 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:15:34.725228 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:15:34.725504 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:15:34.725766 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:15:34.726243 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:15:34.726514 saving as /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:15:34.726723 total size: 53209 (0 MB)
84 01:15:34.726933 No compression specified
85 01:15:34.760880 progress 61 % (0 MB)
86 01:15:34.761731 progress 100 % (0 MB)
87 01:15:34.762260 0 MB downloaded in 0.04 s (1.43 MB/s)
88 01:15:34.762755 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:15:34.763572 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:15:34.763865 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:15:34.764183 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:15:34.764652 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:15:34.764896 saving as /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/nfsrootfs/full.rootfs.tar
95 01:15:34.765100 total size: 474398908 (452 MB)
96 01:15:34.765310 Using unxz to decompress xz
97 01:15:34.797691 progress 0 % (0 MB)
98 01:15:35.901376 progress 5 % (22 MB)
99 01:15:37.348684 progress 10 % (45 MB)
100 01:15:37.820979 progress 15 % (67 MB)
101 01:15:38.597170 progress 20 % (90 MB)
102 01:15:39.198319 progress 25 % (113 MB)
103 01:15:39.625045 progress 30 % (135 MB)
104 01:15:40.281040 progress 35 % (158 MB)
105 01:15:41.148417 progress 40 % (181 MB)
106 01:15:41.897047 progress 45 % (203 MB)
107 01:15:42.447225 progress 50 % (226 MB)
108 01:15:43.107123 progress 55 % (248 MB)
109 01:15:44.305426 progress 60 % (271 MB)
110 01:15:45.804576 progress 65 % (294 MB)
111 01:15:47.475045 progress 70 % (316 MB)
112 01:15:51.073227 progress 75 % (339 MB)
113 01:15:53.549531 progress 80 % (361 MB)
114 01:15:56.491470 progress 85 % (384 MB)
115 01:15:59.806289 progress 90 % (407 MB)
116 01:16:03.072371 progress 95 % (429 MB)
117 01:16:06.271347 progress 100 % (452 MB)
118 01:16:06.285438 452 MB downloaded in 31.52 s (14.35 MB/s)
119 01:16:06.286078 end: 1.4.1 http-download (duration 00:00:32) [common]
121 01:16:06.287634 end: 1.4 download-retry (duration 00:00:32) [common]
122 01:16:06.288287 start: 1.5 download-retry (timeout 00:09:28) [common]
123 01:16:06.288882 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 01:16:06.289890 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/modules.tar.xz
125 01:16:06.290398 saving as /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/modules/modules.tar
126 01:16:06.290847 total size: 11617124 (11 MB)
127 01:16:06.291309 Using unxz to decompress xz
128 01:16:06.339137 progress 0 % (0 MB)
129 01:16:06.411759 progress 5 % (0 MB)
130 01:16:06.492656 progress 10 % (1 MB)
131 01:16:06.581704 progress 15 % (1 MB)
132 01:16:06.660123 progress 20 % (2 MB)
133 01:16:06.743386 progress 25 % (2 MB)
134 01:16:06.823411 progress 30 % (3 MB)
135 01:16:06.903532 progress 35 % (3 MB)
136 01:16:06.977421 progress 40 % (4 MB)
137 01:16:07.054371 progress 45 % (5 MB)
138 01:16:07.132389 progress 50 % (5 MB)
139 01:16:07.205687 progress 55 % (6 MB)
140 01:16:07.290287 progress 60 % (6 MB)
141 01:16:07.376351 progress 65 % (7 MB)
142 01:16:07.458743 progress 70 % (7 MB)
143 01:16:07.551148 progress 75 % (8 MB)
144 01:16:07.647730 progress 80 % (8 MB)
145 01:16:07.729736 progress 85 % (9 MB)
146 01:16:07.806174 progress 90 % (10 MB)
147 01:16:07.879080 progress 95 % (10 MB)
148 01:16:07.955350 progress 100 % (11 MB)
149 01:16:07.968581 11 MB downloaded in 1.68 s (6.60 MB/s)
150 01:16:07.969507 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:16:07.971269 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:16:07.971836 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 01:16:07.972448 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 01:16:23.664929 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/795634/extract-nfsrootfs-u1ww_8j0
156 01:16:23.665526 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:16:23.665813 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 01:16:23.667017 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx
159 01:16:23.669592 makedir: /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin
160 01:16:23.670881 makedir: /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/tests
161 01:16:23.672255 makedir: /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/results
162 01:16:23.672798 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-add-keys
163 01:16:23.675486 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-add-sources
164 01:16:23.676574 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-background-process-start
165 01:16:23.679784 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-background-process-stop
166 01:16:23.683069 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-common-functions
167 01:16:23.684661 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-echo-ipv4
168 01:16:23.685795 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-install-packages
169 01:16:23.686632 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-installed-packages
170 01:16:23.688009 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-os-build
171 01:16:23.688729 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-probe-channel
172 01:16:23.689285 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-probe-ip
173 01:16:23.690093 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-target-ip
174 01:16:23.690603 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-target-mac
175 01:16:23.691094 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-target-storage
176 01:16:23.691655 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-case
177 01:16:23.692464 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-event
178 01:16:23.693299 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-feedback
179 01:16:23.694804 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-raise
180 01:16:23.696178 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-reference
181 01:16:23.697392 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-runner
182 01:16:23.698551 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-set
183 01:16:23.699077 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-test-shell
184 01:16:23.699581 Updating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-install-packages (oe)
185 01:16:23.700856 Updating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/bin/lava-installed-packages (oe)
186 01:16:23.701663 Creating /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/environment
187 01:16:23.702094 LAVA metadata
188 01:16:23.702365 - LAVA_JOB_ID=795634
189 01:16:23.702584 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:16:23.702967 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 01:16:23.705248 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:16:23.705714 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 01:16:23.705981 skipped lava-vland-overlay
194 01:16:23.706268 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:16:23.706544 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 01:16:23.706790 skipped lava-multinode-overlay
197 01:16:23.707064 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:16:23.707355 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 01:16:23.707656 Loading test definitions
200 01:16:23.708682 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 01:16:23.709128 Using /lava-795634 at stage 0
202 01:16:23.711324 uuid=795634_1.6.2.4.1 testdef=None
203 01:16:23.711670 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:16:23.711938 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 01:16:23.714375 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:16:23.715255 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 01:16:23.723534 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:16:23.724539 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 01:16:23.729679 runner path: /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 795634_1.6.2.4.1
212 01:16:23.731107 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:16:23.731925 Creating lava-test-runner.conf files
215 01:16:23.732172 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/795634/lava-overlay-o7_w_fhx/lava-795634/0 for stage 0
216 01:16:23.732928 - 0_v4l2-decoder-conformance-h264
217 01:16:23.733386 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:16:23.733724 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 01:16:23.761726 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:16:23.762183 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 01:16:23.762477 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:16:23.762806 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:16:23.763126 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 01:16:24.551323 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:16:24.551803 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 01:16:24.552097 extracting modules file /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795634/extract-nfsrootfs-u1ww_8j0
227 01:16:26.264675 extracting modules file /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk
228 01:16:27.723342 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:16:27.723946 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 01:16:27.724346 [common] Applying overlay to NFS
231 01:16:27.724636 [common] Applying overlay /var/lib/lava/dispatcher/tmp/795634/compress-overlay-c500on4o/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/795634/extract-nfsrootfs-u1ww_8j0
232 01:16:27.761336 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:16:27.761864 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 01:16:27.762249 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 01:16:27.762549 Converting downloaded kernel to a uImage
236 01:16:27.762941 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/kernel/Image /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/kernel/uImage
237 01:16:28.274484 output: Image Name:
238 01:16:28.274927 output: Created: Thu Oct 3 01:16:27 2024
239 01:16:28.275141 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:16:28.275346 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 01:16:28.275549 output: Load Address: 01080000
242 01:16:28.275749 output: Entry Point: 01080000
243 01:16:28.275948 output:
244 01:16:28.276389 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 01:16:28.276683 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 01:16:28.276967 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 01:16:28.277230 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:16:28.277491 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 01:16:28.277756 Building ramdisk /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk
250 01:16:30.549595 >> 166772 blocks
251 01:16:38.358545 Adding RAMdisk u-boot header.
252 01:16:38.358985 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk.cpio.gz.uboot
253 01:16:38.612764 output: Image Name:
254 01:16:38.613192 output: Created: Thu Oct 3 01:16:38 2024
255 01:16:38.613411 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:16:38.613620 output: Data Size: 23422545 Bytes = 22873.58 KiB = 22.34 MiB
257 01:16:38.613821 output: Load Address: 00000000
258 01:16:38.614022 output: Entry Point: 00000000
259 01:16:38.614221 output:
260 01:16:38.614872 rename /var/lib/lava/dispatcher/tmp/795634/extract-overlay-ramdisk-s439stgv/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
261 01:16:38.615300 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:16:38.615591 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 01:16:38.615893 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 01:16:38.616362 No LXC device requested
265 01:16:38.616876 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:16:38.617409 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 01:16:38.617905 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:16:38.618316 Checking files for TFTP limit of 4294967296 bytes.
269 01:16:38.621075 end: 1 tftp-deploy (duration 00:01:05) [common]
270 01:16:38.621655 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:16:38.622174 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:16:38.622663 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:16:38.623160 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:16:38.623678 Using kernel file from prepare-kernel: 795634/tftp-deploy-0pq310h0/kernel/uImage
275 01:16:38.624327 substitutions:
276 01:16:38.624732 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:16:38.625129 - {DTB_ADDR}: 0x01070000
278 01:16:38.625522 - {DTB}: 795634/tftp-deploy-0pq310h0/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:16:38.625918 - {INITRD}: 795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
280 01:16:38.626310 - {KERNEL_ADDR}: 0x01080000
281 01:16:38.626696 - {KERNEL}: 795634/tftp-deploy-0pq310h0/kernel/uImage
282 01:16:38.627087 - {LAVA_MAC}: None
283 01:16:38.627528 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/795634/extract-nfsrootfs-u1ww_8j0
284 01:16:38.627922 - {NFS_SERVER_IP}: 192.168.6.2
285 01:16:38.628356 - {PRESEED_CONFIG}: None
286 01:16:38.628745 - {PRESEED_LOCAL}: None
287 01:16:38.629134 - {RAMDISK_ADDR}: 0x08000000
288 01:16:38.629516 - {RAMDISK}: 795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
289 01:16:38.629904 - {ROOT_PART}: None
290 01:16:38.630288 - {ROOT}: None
291 01:16:38.630669 - {SERVER_IP}: 192.168.6.2
292 01:16:38.631053 - {TEE_ADDR}: 0x83000000
293 01:16:38.631438 - {TEE}: None
294 01:16:38.631820 Parsed boot commands:
295 01:16:38.632216 - setenv autoload no
296 01:16:38.632600 - setenv initrd_high 0xffffffff
297 01:16:38.632985 - setenv fdt_high 0xffffffff
298 01:16:38.633366 - dhcp
299 01:16:38.633745 - setenv serverip 192.168.6.2
300 01:16:38.634127 - tftpboot 0x01080000 795634/tftp-deploy-0pq310h0/kernel/uImage
301 01:16:38.634510 - tftpboot 0x08000000 795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
302 01:16:38.634891 - tftpboot 0x01070000 795634/tftp-deploy-0pq310h0/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:16:38.635273 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/795634/extract-nfsrootfs-u1ww_8j0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:16:38.635666 - bootm 0x01080000 0x08000000 0x01070000
305 01:16:38.636174 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:16:38.637645 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:16:38.638053 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:16:38.652347 Setting prompt string to ['lava-test: # ']
310 01:16:38.653819 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:16:38.654409 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:16:38.654957 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:16:38.655521 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:16:38.656756 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:16:38.690082 >> OK - accepted request
316 01:16:38.692055 Returned 0 in 0 seconds
317 01:16:38.793172 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:16:38.794726 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:16:38.795266 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:16:38.795780 Setting prompt string to ['Hit any key to stop autoboot']
322 01:16:38.796281 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:16:38.797807 Trying 192.168.56.21...
324 01:16:38.798269 Connected to conserv1.
325 01:16:38.798683 Escape character is '^]'.
326 01:16:38.799094
327 01:16:38.799504 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 01:16:38.799916
329 01:16:45.746817 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:16:45.747313 bl2_stage_init 0x01
331 01:16:45.747565 bl2_stage_init 0x81
332 01:16:45.752231 hw id: 0x0000 - pwm id 0x01
333 01:16:45.752522 bl2_stage_init 0xc1
334 01:16:45.757772 bl2_stage_init 0x02
335 01:16:45.758063
336 01:16:45.758299 L0:00000000
337 01:16:45.758543 L1:00000703
338 01:16:45.758761 L2:00008067
339 01:16:45.762995 L3:15000000
340 01:16:45.763333 S1:00000000
341 01:16:45.763622 B2:20282000
342 01:16:45.763916 B1:a0f83180
343 01:16:45.764251
344 01:16:45.764492 TE: 70550
345 01:16:45.764716
346 01:16:45.774372 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:16:45.774707
348 01:16:45.774945 Board ID = 1
349 01:16:45.775172 Set cpu clk to 24M
350 01:16:45.775394 Set clk81 to 24M
351 01:16:45.778147 Use GP1_pll as DSU clk.
352 01:16:45.778422 DSU clk: 1200 Mhz
353 01:16:45.783720 CPU clk: 1200 MHz
354 01:16:45.784084 Set clk81 to 166.6M
355 01:16:45.789339 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:16:45.789629 board id: 1
357 01:16:45.797651 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:16:45.809393 fw parse done
359 01:16:45.814333 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:16:45.857033 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:16:45.868845 PIEI prepare done
362 01:16:45.869208 fastboot data load
363 01:16:45.869511 fastboot data verify
364 01:16:45.874412 verify result: 266
365 01:16:45.879964 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:16:45.880282 LPDDR4 probe
367 01:16:45.880582 ddr clk to 1584MHz
368 01:16:45.887474 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:16:45.924858
370 01:16:45.925216 dmc_version 0001
371 01:16:45.931021 Check phy result
372 01:16:45.937787 INFO : End of CA training
373 01:16:45.938118 INFO : End of initialization
374 01:16:45.943526 INFO : Training has run successfully!
375 01:16:45.943822 Check phy result
376 01:16:45.949088 INFO : End of initialization
377 01:16:45.949617 INFO : End of read enable training
378 01:16:45.954668 INFO : End of fine write leveling
379 01:16:45.960249 INFO : End of Write leveling coarse delay
380 01:16:45.960723 INFO : Training has run successfully!
381 01:16:45.961169 Check phy result
382 01:16:45.965866 INFO : End of initialization
383 01:16:45.966338 INFO : End of read dq deskew training
384 01:16:45.971531 INFO : End of MPR read delay center optimization
385 01:16:45.977123 INFO : End of write delay center optimization
386 01:16:45.982780 INFO : End of read delay center optimization
387 01:16:45.983251 INFO : End of max read latency training
388 01:16:45.988588 INFO : Training has run successfully!
389 01:16:45.989066 1D training succeed
390 01:16:45.996925 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:16:46.044022 Check phy result
392 01:16:46.044526 INFO : End of initialization
393 01:16:46.066962 INFO : End of 2D read delay Voltage center optimization
394 01:16:46.086529 INFO : End of 2D read delay Voltage center optimization
395 01:16:46.138096 INFO : End of 2D write delay Voltage center optimization
396 01:16:46.187566 INFO : End of 2D write delay Voltage center optimization
397 01:16:46.193114 INFO : Training has run successfully!
398 01:16:46.193649
399 01:16:46.194101 channel==0
400 01:16:46.198706 RxClkDly_Margin_A0==78 ps 8
401 01:16:46.199209 TxDqDly_Margin_A0==98 ps 10
402 01:16:46.204317 RxClkDly_Margin_A1==88 ps 9
403 01:16:46.204879 TxDqDly_Margin_A1==88 ps 9
404 01:16:46.205330 TrainedVREFDQ_A0==74
405 01:16:46.209872 TrainedVREFDQ_A1==75
406 01:16:46.210358 VrefDac_Margin_A0==25
407 01:16:46.210798 DeviceVref_Margin_A0==40
408 01:16:46.215515 VrefDac_Margin_A1==23
409 01:16:46.216021 DeviceVref_Margin_A1==39
410 01:16:46.216464
411 01:16:46.216902
412 01:16:46.217337 channel==1
413 01:16:46.221103 RxClkDly_Margin_A0==78 ps 8
414 01:16:46.221583 TxDqDly_Margin_A0==88 ps 9
415 01:16:46.226699 RxClkDly_Margin_A1==78 ps 8
416 01:16:46.227177 TxDqDly_Margin_A1==88 ps 9
417 01:16:46.232295 TrainedVREFDQ_A0==76
418 01:16:46.232767 TrainedVREFDQ_A1==75
419 01:16:46.233205 VrefDac_Margin_A0==22
420 01:16:46.237855 DeviceVref_Margin_A0==38
421 01:16:46.238356 VrefDac_Margin_A1==22
422 01:16:46.238794 DeviceVref_Margin_A1==38
423 01:16:46.243512
424 01:16:46.244055 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:16:46.244502
426 01:16:46.277071 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 01:16:46.277685 2D training succeed
428 01:16:46.282647 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:16:46.288267 auto size-- 65535DDR cs0 size: 2048MB
430 01:16:46.288744 DDR cs1 size: 2048MB
431 01:16:46.293846 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:16:46.294321 cs0 DataBus test pass
433 01:16:46.299456 cs1 DataBus test pass
434 01:16:46.299928 cs0 AddrBus test pass
435 01:16:46.300410 cs1 AddrBus test pass
436 01:16:46.300843
437 01:16:46.305051 100bdlr_step_size ps== 478
438 01:16:46.305541 result report
439 01:16:46.310654 boot times 0Enable ddr reg access
440 01:16:46.314753 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:16:46.328833 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:16:46.984433 bl2z: ptr: 05129330, size: 00001e40
443 01:16:46.990849 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:16:46.991419 MVN_1=0x00000000
445 01:16:46.991862 MVN_2=0x00000000
446 01:16:47.002431 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:16:47.002987 OPS=0x04
448 01:16:47.003430 ring efuse init
449 01:16:47.005234 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:16:47.011582 [0.017319 Inits done]
451 01:16:47.012151 secure task start!
452 01:16:47.012593 high task start!
453 01:16:47.013027 low task start!
454 01:16:47.015833 run into bl31
455 01:16:47.024584 NOTICE: BL31: v1.3(release):4fc40b1
456 01:16:47.031397 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:16:47.031930 NOTICE: BL31: G12A normal boot!
458 01:16:47.047785 NOTICE: BL31: BL33 decompress pass
459 01:16:47.053457 ERROR: Error initializing runtime service opteed_fast
460 01:16:49.795913 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:16:49.796375 bl2_stage_init 0x01
462 01:16:49.796591 bl2_stage_init 0x81
463 01:16:49.801409 hw id: 0x0000 - pwm id 0x01
464 01:16:49.801687 bl2_stage_init 0xc1
465 01:16:49.807001 bl2_stage_init 0x02
466 01:16:49.807268
467 01:16:49.807477 L0:00000000
468 01:16:49.807675 L1:00000703
469 01:16:49.807873 L2:00008067
470 01:16:49.808096 L3:15000000
471 01:16:49.812657 S1:00000000
472 01:16:49.812918 B2:20282000
473 01:16:49.813118 B1:a0f83180
474 01:16:49.813315
475 01:16:49.813511 TE: 71228
476 01:16:49.813707
477 01:16:49.818186 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:16:49.818445
479 01:16:49.823862 Board ID = 1
480 01:16:49.824136 Set cpu clk to 24M
481 01:16:49.824346 Set clk81 to 24M
482 01:16:49.829400 Use GP1_pll as DSU clk.
483 01:16:49.829670 DSU clk: 1200 Mhz
484 01:16:49.829876 CPU clk: 1200 MHz
485 01:16:49.834993 Set clk81 to 166.6M
486 01:16:49.840657 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:16:49.840927 board id: 1
488 01:16:49.847830 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:16:49.858780 fw parse done
490 01:16:49.863668 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:16:49.906830 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:16:49.919102 PIEI prepare done
493 01:16:49.919423 fastboot data load
494 01:16:49.919644 fastboot data verify
495 01:16:49.924539 verify result: 266
496 01:16:49.930145 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:16:49.930427 LPDDR4 probe
498 01:16:49.930636 ddr clk to 1584MHz
499 01:16:49.938214 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 01:16:49.976009
501 01:16:49.976397 dmc_version 0001
502 01:16:49.982042 Check phy result
503 01:16:49.989051 INFO : End of CA training
504 01:16:49.989370 INFO : End of initialization
505 01:16:49.994613 INFO : Training has run successfully!
506 01:16:49.994911 Check phy result
507 01:16:50.000166 INFO : End of initialization
508 01:16:50.000465 INFO : End of read enable training
509 01:16:50.003399 INFO : End of fine write leveling
510 01:16:50.009062 INFO : End of Write leveling coarse delay
511 01:16:50.014657 INFO : Training has run successfully!
512 01:16:50.014960 Check phy result
513 01:16:50.015170 INFO : End of initialization
514 01:16:50.020221 INFO : End of read dq deskew training
515 01:16:50.025823 INFO : End of MPR read delay center optimization
516 01:16:50.026126 INFO : End of write delay center optimization
517 01:16:50.031395 INFO : End of read delay center optimization
518 01:16:50.037032 INFO : End of max read latency training
519 01:16:50.037333 INFO : Training has run successfully!
520 01:16:50.042608 1D training succeed
521 01:16:50.048149 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 01:16:50.095832 Check phy result
523 01:16:50.096364 INFO : End of initialization
524 01:16:50.124334 INFO : End of 2D read delay Voltage center optimization
525 01:16:50.147521 INFO : End of 2D read delay Voltage center optimization
526 01:16:50.205038 INFO : End of 2D write delay Voltage center optimization
527 01:16:50.259061 INFO : End of 2D write delay Voltage center optimization
528 01:16:50.264627 INFO : Training has run successfully!
529 01:16:50.265135
530 01:16:50.265576 channel==0
531 01:16:50.270203 RxClkDly_Margin_A0==78 ps 8
532 01:16:50.270693 TxDqDly_Margin_A0==98 ps 10
533 01:16:50.275800 RxClkDly_Margin_A1==88 ps 9
534 01:16:50.276331 TxDqDly_Margin_A1==98 ps 10
535 01:16:50.276772 TrainedVREFDQ_A0==74
536 01:16:50.281440 TrainedVREFDQ_A1==74
537 01:16:50.281932 VrefDac_Margin_A0==24
538 01:16:50.282369 DeviceVref_Margin_A0==40
539 01:16:50.286998 VrefDac_Margin_A1==23
540 01:16:50.287490 DeviceVref_Margin_A1==40
541 01:16:50.287923
542 01:16:50.288392
543 01:16:50.292634 channel==1
544 01:16:50.293131 RxClkDly_Margin_A0==78 ps 8
545 01:16:50.293567 TxDqDly_Margin_A0==98 ps 10
546 01:16:50.298204 RxClkDly_Margin_A1==78 ps 8
547 01:16:50.298698 TxDqDly_Margin_A1==78 ps 8
548 01:16:50.303821 TrainedVREFDQ_A0==78
549 01:16:50.304362 TrainedVREFDQ_A1==75
550 01:16:50.304802 VrefDac_Margin_A0==22
551 01:16:50.309449 DeviceVref_Margin_A0==36
552 01:16:50.309949 VrefDac_Margin_A1==22
553 01:16:50.315005 DeviceVref_Margin_A1==38
554 01:16:50.315523
555 01:16:50.315961 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 01:16:50.316433
557 01:16:50.348565 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
558 01:16:50.349131 2D training succeed
559 01:16:50.354245 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 01:16:50.359813 auto size-- 65535DDR cs0 size: 2048MB
561 01:16:50.360338 DDR cs1 size: 2048MB
562 01:16:50.365448 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 01:16:50.365961 cs0 DataBus test pass
564 01:16:50.371016 cs1 DataBus test pass
565 01:16:50.371510 cs0 AddrBus test pass
566 01:16:50.371943 cs1 AddrBus test pass
567 01:16:50.372417
568 01:16:50.376633 100bdlr_step_size ps== 471
569 01:16:50.377146 result report
570 01:16:50.382217 boot times 0Enable ddr reg access
571 01:16:50.387460 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 01:16:50.401195 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 01:16:51.060095 bl2z: ptr: 05129330, size: 00001e40
574 01:16:51.068867 0.0;M3 CHK:0;cm4_sp_mode 0
575 01:16:51.069382 MVN_1=0x00000000
576 01:16:51.069816 MVN_2=0x00000000
577 01:16:51.080322 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 01:16:51.080823 OPS=0x04
579 01:16:51.081258 ring efuse init
580 01:16:51.083381 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 01:16:51.089994 [0.017355 Inits done]
582 01:16:51.090482 secure task start!
583 01:16:51.090918 high task start!
584 01:16:51.091345 low task start!
585 01:16:51.094065 run into bl31
586 01:16:51.102624 NOTICE: BL31: v1.3(release):4fc40b1
587 01:16:51.110427 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 01:16:51.110936 NOTICE: BL31: G12A normal boot!
589 01:16:51.125942 NOTICE: BL31: BL33 decompress pass
590 01:16:51.131738 ERROR: Error initializing runtime service opteed_fast
591 01:16:52.496262 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 01:16:52.496908 bl2_stage_init 0x01
593 01:16:52.497368 bl2_stage_init 0x81
594 01:16:52.501915 hw id: 0x0000 - pwm id 0x01
595 01:16:52.502423 bl2_stage_init 0xc1
596 01:16:52.506736 bl2_stage_init 0x02
597 01:16:52.507249
598 01:16:52.507710 L0:00000000
599 01:16:52.508256 L1:00000703
600 01:16:52.508710 L2:00008067
601 01:16:52.512343 L3:15000000
602 01:16:52.512847 S1:00000000
603 01:16:52.513298 B2:20282000
604 01:16:52.513740 B1:a0f83180
605 01:16:52.514182
606 01:16:52.514621 TE: 71104
607 01:16:52.515060
608 01:16:52.523665 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 01:16:52.524219
610 01:16:52.524676 Board ID = 1
611 01:16:52.525118 Set cpu clk to 24M
612 01:16:52.525553 Set clk81 to 24M
613 01:16:52.529036 Use GP1_pll as DSU clk.
614 01:16:52.529542 DSU clk: 1200 Mhz
615 01:16:52.529992 CPU clk: 1200 MHz
616 01:16:52.534754 Set clk81 to 166.6M
617 01:16:52.540267 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 01:16:52.540773 board id: 1
619 01:16:52.547906 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 01:16:52.559193 fw parse done
621 01:16:52.565155 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 01:16:52.607684 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 01:16:52.619468 PIEI prepare done
624 01:16:52.620068 fastboot data load
625 01:16:52.620549 fastboot data verify
626 01:16:52.624963 verify result: 266
627 01:16:52.630533 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 01:16:52.631064 LPDDR4 probe
629 01:16:52.631521 ddr clk to 1584MHz
630 01:16:52.638630 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 01:16:52.676013
632 01:16:52.676574 dmc_version 0001
633 01:16:52.682318 Check phy result
634 01:16:52.689268 INFO : End of CA training
635 01:16:52.689786 INFO : End of initialization
636 01:16:52.694868 INFO : Training has run successfully!
637 01:16:52.695388 Check phy result
638 01:16:52.700519 INFO : End of initialization
639 01:16:52.701044 INFO : End of read enable training
640 01:16:52.706206 INFO : End of fine write leveling
641 01:16:52.711941 INFO : End of Write leveling coarse delay
642 01:16:52.712514 INFO : Training has run successfully!
643 01:16:52.712970 Check phy result
644 01:16:52.718875 INFO : End of initialization
645 01:16:52.719403 INFO : End of read dq deskew training
646 01:16:52.723004 INFO : End of MPR read delay center optimization
647 01:16:52.728800 INFO : End of write delay center optimization
648 01:16:52.734065 INFO : End of read delay center optimization
649 01:16:52.734609 INFO : End of max read latency training
650 01:16:52.739633 INFO : Training has run successfully!
651 01:16:52.740227 1D training succeed
652 01:16:52.748752 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 01:16:52.797124 Check phy result
654 01:16:52.797729 INFO : End of initialization
655 01:16:52.824622 INFO : End of 2D read delay Voltage center optimization
656 01:16:52.848722 INFO : End of 2D read delay Voltage center optimization
657 01:16:52.905240 INFO : End of 2D write delay Voltage center optimization
658 01:16:52.959221 INFO : End of 2D write delay Voltage center optimization
659 01:16:52.964842 INFO : Training has run successfully!
660 01:16:52.965370
661 01:16:52.965838 channel==0
662 01:16:52.970552 RxClkDly_Margin_A0==88 ps 9
663 01:16:52.971072 TxDqDly_Margin_A0==88 ps 9
664 01:16:52.976024 RxClkDly_Margin_A1==88 ps 9
665 01:16:52.976537 TxDqDly_Margin_A1==98 ps 10
666 01:16:52.976995 TrainedVREFDQ_A0==74
667 01:16:52.981571 TrainedVREFDQ_A1==75
668 01:16:52.982081 VrefDac_Margin_A0==24
669 01:16:52.982538 DeviceVref_Margin_A0==40
670 01:16:52.987187 VrefDac_Margin_A1==23
671 01:16:52.987694 DeviceVref_Margin_A1==39
672 01:16:52.988190
673 01:16:52.988649
674 01:16:52.989097 channel==1
675 01:16:52.992843 RxClkDly_Margin_A0==78 ps 8
676 01:16:52.993352 TxDqDly_Margin_A0==88 ps 9
677 01:16:52.998535 RxClkDly_Margin_A1==88 ps 9
678 01:16:52.999040 TxDqDly_Margin_A1==78 ps 8
679 01:16:53.004034 TrainedVREFDQ_A0==75
680 01:16:53.004550 TrainedVREFDQ_A1==75
681 01:16:53.005008 VrefDac_Margin_A0==22
682 01:16:53.009642 DeviceVref_Margin_A0==39
683 01:16:53.010164 VrefDac_Margin_A1==22
684 01:16:53.010620 DeviceVref_Margin_A1==39
685 01:16:53.015325
686 01:16:53.015848 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 01:16:53.016346
688 01:16:53.049105 soc_vref_reg_value 0x 00000019 00000019 00000019 00000017 00000019 00000016 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 01:16:53.049671 2D training succeed
690 01:16:53.054440 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 01:16:53.060036 auto size-- 65535DDR cs0 size: 2048MB
692 01:16:53.060544 DDR cs1 size: 2048MB
693 01:16:53.065620 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 01:16:53.066130 cs0 DataBus test pass
695 01:16:53.071222 cs1 DataBus test pass
696 01:16:53.071726 cs0 AddrBus test pass
697 01:16:53.072220 cs1 AddrBus test pass
698 01:16:53.072669
699 01:16:53.076823 100bdlr_step_size ps== 464
700 01:16:53.077340 result report
701 01:16:53.082421 boot times 0Enable ddr reg access
702 01:16:53.087505 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 01:16:53.101244 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 01:16:53.761227 bl2z: ptr: 05129330, size: 00001e40
705 01:16:53.769475 0.0;M3 CHK:0;cm4_sp_mode 0
706 01:16:53.769912 MVN_1=0x00000000
707 01:16:53.770164 MVN_2=0x00000000
708 01:16:53.780942 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 01:16:53.781257 OPS=0x04
710 01:16:53.781475 ring efuse init
711 01:16:53.786692 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 01:16:53.787239 [0.017355 Inits done]
713 01:16:53.787697 secure task start!
714 01:16:53.794291 high task start!
715 01:16:53.794801 low task start!
716 01:16:53.795257 run into bl31
717 01:16:53.802892 NOTICE: BL31: v1.3(release):4fc40b1
718 01:16:53.810717 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 01:16:53.811264 NOTICE: BL31: G12A normal boot!
720 01:16:53.826232 NOTICE: BL31: BL33 decompress pass
721 01:16:53.831912 ERROR: Error initializing runtime service opteed_fast
722 01:16:54.626085
723 01:16:54.626491
724 01:16:54.631631 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 01:16:54.632041
726 01:16:54.635099 Model: Libre Computer AML-S905D3-CC Solitude
727 01:16:54.781919 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 01:16:54.797313 DRAM: 2 GiB (effective 3.8 GiB)
729 01:16:54.898271 Core: 406 devices, 33 uclasses, devicetree: separate
730 01:16:54.904091 WDT: Not starting watchdog@f0d0
731 01:16:54.929167 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 01:16:54.941511 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 01:16:54.945863 ** Bad device specification mmc 0 **
734 01:16:54.956612 Card did not respond to voltage select! : -110
735 01:16:54.964168 ** Bad device specification mmc 0 **
736 01:16:54.964607 Couldn't find partition mmc 0
737 01:16:54.972475 Card did not respond to voltage select! : -110
738 01:16:54.977860 ** Bad device specification mmc 0 **
739 01:16:54.978212 Couldn't find partition mmc 0
740 01:16:54.982898 Error: could not access storage.
741 01:16:55.279287 Net: eth0: ethernet@ff3f0000
742 01:16:55.279825 starting USB...
743 01:16:55.524052 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 01:16:55.524460 Starting the controller
745 01:16:55.531006 USB XHCI 1.10
746 01:16:57.087791 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 01:16:57.096109 scanning usb for storage devices... 0 Storage Device(s) found
749 01:16:57.147835 Hit any key to stop autoboot: 1
750 01:16:57.148885 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
751 01:16:57.149602 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 01:16:57.150187 Setting prompt string to ['=>']
753 01:16:57.150755 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 01:16:57.162090 0
755 01:16:57.163128 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 01:16:57.264681 => setenv autoload no
758 01:16:57.265552 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 01:16:57.270941 setenv autoload no
761 01:16:57.372734 => setenv initrd_high 0xffffffff
762 01:16:57.373636 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 01:16:57.377516 setenv initrd_high 0xffffffff
765 01:16:57.479090 => setenv fdt_high 0xffffffff
766 01:16:57.479883 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 01:16:57.484184 setenv fdt_high 0xffffffff
769 01:16:57.585789 => dhcp
770 01:16:57.586550 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 01:16:57.590917 dhcp
772 01:16:58.045500 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 01:16:58.046162 Speed: 1000, full duplex
774 01:16:58.046639 BOOTP broadcast 1
775 01:16:58.294343 BOOTP broadcast 2
776 01:16:58.795295 BOOTP broadcast 3
777 01:16:59.795358 BOOTP broadcast 4
778 01:17:01.796743 BOOTP broadcast 5
779 01:17:01.810918 DHCP client bound to address 192.168.6.12 (3764 ms)
781 01:17:01.912683 => setenv serverip 192.168.6.2
782 01:17:01.913511 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
783 01:17:01.917469 setenv serverip 192.168.6.2
785 01:17:02.019211 => tftpboot 0x01080000 795634/tftp-deploy-0pq310h0/kernel/uImage
786 01:17:02.020274 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
787 01:17:02.027073 tftpboot 0x01080000 795634/tftp-deploy-0pq310h0/kernel/uImage
788 01:17:02.027790 Speed: 1000, full duplex
789 01:17:02.028434 Using ethernet@ff3f0000 device
790 01:17:02.032845 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 01:17:02.037930 Filename '795634/tftp-deploy-0pq310h0/kernel/uImage'.
792 01:17:02.041862 Load address: 0x1080000
793 01:17:05.858569 Loading: *################################################## 43.6 MiB
794 01:17:05.858982 11.4 MiB/s
795 01:17:05.859211 done
796 01:17:05.862950 Bytes transferred = 45713984 (2b98a40 hex)
798 01:17:05.964036 => tftpboot 0x08000000 795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
799 01:17:05.964683 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:33)
800 01:17:05.971361 tftpboot 0x08000000 795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot
801 01:17:05.971659 Speed: 1000, full duplex
802 01:17:05.971880 Using ethernet@ff3f0000 device
803 01:17:05.976763 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
804 01:17:05.986565 Filename '795634/tftp-deploy-0pq310h0/ramdisk/ramdisk.cpio.gz.uboot'.
805 01:17:05.986898 Load address: 0x8000000
806 01:17:07.940278 Loading: *################################ UDP wrong checksum 000000ff 0000bff5
807 01:17:07.970145 UDP wrong checksum 000000ff 000045e8
808 01:17:13.221618 T ################# UDP wrong checksum 00000005 0000f6b1
809 01:17:14.708918 UDP wrong checksum 000000ff 0000801b
810 01:17:14.723593 UDP wrong checksum 000000ff 0000040e
811 01:17:18.222423 T UDP wrong checksum 00000005 0000f6b1
812 01:17:28.225289 T T UDP wrong checksum 00000005 0000f6b1
813 01:17:38.641434 T T UDP wrong checksum 000000ff 00006f0e
814 01:17:38.671359 UDP wrong checksum 000000ff 00000501
815 01:17:48.227725 T UDP wrong checksum 00000005 0000f6b1
816 01:17:53.372273 T T UDP wrong checksum 000000ff 00007c1b
817 01:17:53.376529 UDP wrong checksum 000000ff 0000060e
818 01:18:03.232853 T
819 01:18:03.233298 Retry count exceeded; starting again
821 01:18:03.234374 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
824 01:18:03.235403 end: 2.4 uboot-commands (duration 00:01:25) [common]
826 01:18:03.236187 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
828 01:18:03.236810 end: 2 uboot-action (duration 00:01:25) [common]
830 01:18:03.237722 Cleaning after the job
831 01:18:03.238067 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/ramdisk
832 01:18:03.238786 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/kernel
833 01:18:03.267208 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/dtb
834 01:18:03.269648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/nfsrootfs
835 01:18:03.338715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795634/tftp-deploy-0pq310h0/modules
836 01:18:03.346432 start: 4.1 power-off (timeout 00:00:30) [common]
837 01:18:03.347093 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
838 01:18:03.380586 >> OK - accepted request
839 01:18:03.382803 Returned 0 in 0 seconds
840 01:18:03.483716 end: 4.1 power-off (duration 00:00:00) [common]
842 01:18:03.484930 start: 4.2 read-feedback (timeout 00:10:00) [common]
843 01:18:03.485648 Listened to connection for namespace 'common' for up to 1s
844 01:18:04.486587 Finalising connection for namespace 'common'
845 01:18:04.487308 Disconnecting from shell: Finalise
846 01:18:04.487604 =>
847 01:18:04.588289 end: 4.2 read-feedback (duration 00:00:01) [common]
848 01:18:04.588756 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/795634
849 01:18:07.278114 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/795634
850 01:18:07.278734 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.