Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:36:45.216530 lava-dispatcher, installed at version: 2024.01
2 01:36:45.217313 start: 0 validate
3 01:36:45.217801 Start time: 2024-10-03 01:36:45.217770+00:00 (UTC)
4 01:36:45.218363 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:36:45.218894 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:36:45.254441 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:36:45.254985 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:36:45.289082 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:36:45.289787 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:36:45.319236 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:36:45.319734 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:36:45.350196 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:36:45.350687 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc1-46-g7ec462100ef91%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:36:45.391190 validate duration: 0.17
16 01:36:45.392078 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:36:45.392435 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:36:45.392749 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:36:45.393378 Not decompressing ramdisk as can be used compressed.
20 01:36:45.393865 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:36:45.394154 saving as /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/ramdisk/initrd.cpio.gz
22 01:36:45.394447 total size: 5628140 (5 MB)
23 01:36:45.428631 progress 0 % (0 MB)
24 01:36:45.432917 progress 5 % (0 MB)
25 01:36:45.437401 progress 10 % (0 MB)
26 01:36:45.441149 progress 15 % (0 MB)
27 01:36:45.445209 progress 20 % (1 MB)
28 01:36:45.448956 progress 25 % (1 MB)
29 01:36:45.453088 progress 30 % (1 MB)
30 01:36:45.457152 progress 35 % (1 MB)
31 01:36:45.460874 progress 40 % (2 MB)
32 01:36:45.465059 progress 45 % (2 MB)
33 01:36:45.468776 progress 50 % (2 MB)
34 01:36:45.472901 progress 55 % (2 MB)
35 01:36:45.477107 progress 60 % (3 MB)
36 01:36:45.480764 progress 65 % (3 MB)
37 01:36:45.484888 progress 70 % (3 MB)
38 01:36:45.488614 progress 75 % (4 MB)
39 01:36:45.492829 progress 80 % (4 MB)
40 01:36:45.496665 progress 85 % (4 MB)
41 01:36:45.501108 progress 90 % (4 MB)
42 01:36:45.505084 progress 95 % (5 MB)
43 01:36:45.508542 progress 100 % (5 MB)
44 01:36:45.509206 5 MB downloaded in 0.11 s (46.78 MB/s)
45 01:36:45.509751 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:36:45.510634 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:36:45.510924 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:36:45.511195 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:36:45.511656 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/kernel/Image
51 01:36:45.511900 saving as /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/kernel/Image
52 01:36:45.512146 total size: 45713920 (43 MB)
53 01:36:45.512358 No compression specified
54 01:36:45.553044 progress 0 % (0 MB)
55 01:36:45.581373 progress 5 % (2 MB)
56 01:36:45.609320 progress 10 % (4 MB)
57 01:36:45.637354 progress 15 % (6 MB)
58 01:36:45.665995 progress 20 % (8 MB)
59 01:36:45.693593 progress 25 % (10 MB)
60 01:36:45.721934 progress 30 % (13 MB)
61 01:36:45.750053 progress 35 % (15 MB)
62 01:36:45.778764 progress 40 % (17 MB)
63 01:36:45.806815 progress 45 % (19 MB)
64 01:36:45.835005 progress 50 % (21 MB)
65 01:36:45.863494 progress 55 % (24 MB)
66 01:36:45.892207 progress 60 % (26 MB)
67 01:36:45.919742 progress 65 % (28 MB)
68 01:36:45.948538 progress 70 % (30 MB)
69 01:36:45.977013 progress 75 % (32 MB)
70 01:36:46.004981 progress 80 % (34 MB)
71 01:36:46.032484 progress 85 % (37 MB)
72 01:36:46.060180 progress 90 % (39 MB)
73 01:36:46.088033 progress 95 % (41 MB)
74 01:36:46.115056 progress 100 % (43 MB)
75 01:36:46.115649 43 MB downloaded in 0.60 s (72.24 MB/s)
76 01:36:46.116172 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:36:46.117031 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:36:46.117323 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:36:46.117600 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:36:46.118109 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:36:46.118396 saving as /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:36:46.118613 total size: 53209 (0 MB)
84 01:36:46.118826 No compression specified
85 01:36:46.158112 progress 61 % (0 MB)
86 01:36:46.158970 progress 100 % (0 MB)
87 01:36:46.159502 0 MB downloaded in 0.04 s (1.24 MB/s)
88 01:36:46.160026 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:36:46.160845 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:36:46.161107 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:36:46.161370 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:36:46.161846 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:36:46.162089 saving as /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/nfsrootfs/full.rootfs.tar
95 01:36:46.162296 total size: 474398908 (452 MB)
96 01:36:46.162505 Using unxz to decompress xz
97 01:36:46.195455 progress 0 % (0 MB)
98 01:36:47.329362 progress 5 % (22 MB)
99 01:36:48.780769 progress 10 % (45 MB)
100 01:36:49.255208 progress 15 % (67 MB)
101 01:36:50.056203 progress 20 % (90 MB)
102 01:36:50.568377 progress 25 % (113 MB)
103 01:36:50.972168 progress 30 % (135 MB)
104 01:36:51.597812 progress 35 % (158 MB)
105 01:36:52.475764 progress 40 % (181 MB)
106 01:36:53.324532 progress 45 % (203 MB)
107 01:36:53.905579 progress 50 % (226 MB)
108 01:36:54.561171 progress 55 % (248 MB)
109 01:36:55.777583 progress 60 % (271 MB)
110 01:36:57.260672 progress 65 % (294 MB)
111 01:36:58.903681 progress 70 % (316 MB)
112 01:37:02.049595 progress 75 % (339 MB)
113 01:37:04.486068 progress 80 % (361 MB)
114 01:37:07.419681 progress 85 % (384 MB)
115 01:37:10.613784 progress 90 % (407 MB)
116 01:37:13.843504 progress 95 % (429 MB)
117 01:37:17.044752 progress 100 % (452 MB)
118 01:37:17.059196 452 MB downloaded in 30.90 s (14.64 MB/s)
119 01:37:17.059948 end: 1.4.1 http-download (duration 00:00:31) [common]
121 01:37:17.061896 end: 1.4 download-retry (duration 00:00:31) [common]
122 01:37:17.062467 start: 1.5 download-retry (timeout 00:09:28) [common]
123 01:37:17.063034 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 01:37:17.066592 downloading http://storage.kernelci.org/mainline/master/v6.12-rc1-46-g7ec462100ef91/arm64/defconfig/gcc-12/modules.tar.xz
125 01:37:17.067200 saving as /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/modules/modules.tar
126 01:37:17.067687 total size: 11617124 (11 MB)
127 01:37:17.068388 Using unxz to decompress xz
128 01:37:17.106293 progress 0 % (0 MB)
129 01:37:17.179846 progress 5 % (0 MB)
130 01:37:17.268733 progress 10 % (1 MB)
131 01:37:17.361767 progress 15 % (1 MB)
132 01:37:17.445395 progress 20 % (2 MB)
133 01:37:17.530772 progress 25 % (2 MB)
134 01:37:17.611864 progress 30 % (3 MB)
135 01:37:17.693174 progress 35 % (3 MB)
136 01:37:17.768112 progress 40 % (4 MB)
137 01:37:17.845486 progress 45 % (5 MB)
138 01:37:17.924302 progress 50 % (5 MB)
139 01:37:17.999485 progress 55 % (6 MB)
140 01:37:18.085635 progress 60 % (6 MB)
141 01:37:18.173160 progress 65 % (7 MB)
142 01:37:18.255417 progress 70 % (7 MB)
143 01:37:18.350382 progress 75 % (8 MB)
144 01:37:18.450821 progress 80 % (8 MB)
145 01:37:18.533900 progress 85 % (9 MB)
146 01:37:18.610574 progress 90 % (10 MB)
147 01:37:18.683917 progress 95 % (10 MB)
148 01:37:18.762183 progress 100 % (11 MB)
149 01:37:18.776269 11 MB downloaded in 1.71 s (6.48 MB/s)
150 01:37:18.776959 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:37:18.777843 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:37:18.778121 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 01:37:18.778392 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 01:37:34.724494 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/795690/extract-nfsrootfs-f1hui8dj
156 01:37:34.725093 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:37:34.725379 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 01:37:34.726103 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa
159 01:37:34.726551 makedir: /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin
160 01:37:34.726882 makedir: /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/tests
161 01:37:34.727195 makedir: /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/results
162 01:37:34.727524 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-add-keys
163 01:37:34.728072 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-add-sources
164 01:37:34.728599 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-background-process-start
165 01:37:34.729113 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-background-process-stop
166 01:37:34.729763 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-common-functions
167 01:37:34.730320 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-echo-ipv4
168 01:37:34.730808 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-install-packages
169 01:37:34.731305 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-installed-packages
170 01:37:34.731785 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-os-build
171 01:37:34.732379 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-probe-channel
172 01:37:34.732882 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-probe-ip
173 01:37:34.733386 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-target-ip
174 01:37:34.733881 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-target-mac
175 01:37:34.734352 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-target-storage
176 01:37:34.734834 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-case
177 01:37:34.735312 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-event
178 01:37:34.735782 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-feedback
179 01:37:34.736300 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-raise
180 01:37:34.736779 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-reference
181 01:37:34.737277 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-runner
182 01:37:34.737781 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-set
183 01:37:34.738259 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-test-shell
184 01:37:34.738744 Updating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-install-packages (oe)
185 01:37:34.739276 Updating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/bin/lava-installed-packages (oe)
186 01:37:34.739710 Creating /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/environment
187 01:37:34.740097 LAVA metadata
188 01:37:34.740358 - LAVA_JOB_ID=795690
189 01:37:34.740571 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:37:34.740929 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 01:37:34.741880 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:37:34.742185 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 01:37:34.742395 skipped lava-vland-overlay
194 01:37:34.742635 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:37:34.742886 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 01:37:34.743104 skipped lava-multinode-overlay
197 01:37:34.743341 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:37:34.743589 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 01:37:34.743831 Loading test definitions
200 01:37:34.744131 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 01:37:34.744353 Using /lava-795690 at stage 0
202 01:37:34.745512 uuid=795690_1.6.2.4.1 testdef=None
203 01:37:34.745818 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:37:34.746079 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 01:37:34.747809 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:37:34.748615 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 01:37:34.750748 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:37:34.751572 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 01:37:34.753645 runner path: /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 795690_1.6.2.4.1
212 01:37:34.754213 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:37:34.754972 Creating lava-test-runner.conf files
215 01:37:34.755170 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/795690/lava-overlay-db7lvqpa/lava-795690/0 for stage 0
216 01:37:34.755500 - 0_v4l2-decoder-conformance-h265
217 01:37:34.755833 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:37:34.756157 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 01:37:34.777832 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:37:34.778203 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 01:37:34.778459 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:37:34.778720 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:37:34.778979 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 01:37:35.395819 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:37:35.396322 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 01:37:35.396572 extracting modules file /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795690/extract-nfsrootfs-f1hui8dj
227 01:37:36.756371 extracting modules file /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk
228 01:37:38.160610 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:37:38.161088 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 01:37:38.161360 [common] Applying overlay to NFS
231 01:37:38.161573 [common] Applying overlay /var/lib/lava/dispatcher/tmp/795690/compress-overlay-zdx4ihy5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/795690/extract-nfsrootfs-f1hui8dj
232 01:37:38.190820 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:37:38.191234 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 01:37:38.191508 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 01:37:38.191739 Converting downloaded kernel to a uImage
236 01:37:38.192076 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/kernel/Image /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/kernel/uImage
237 01:37:38.721708 output: Image Name:
238 01:37:38.722097 output: Created: Thu Oct 3 01:37:38 2024
239 01:37:38.722309 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:37:38.722515 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 01:37:38.722716 output: Load Address: 01080000
242 01:37:38.722914 output: Entry Point: 01080000
243 01:37:38.723111 output:
244 01:37:38.723445 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 01:37:38.723714 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 01:37:38.724014 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 01:37:38.724285 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:37:38.724545 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 01:37:38.724797 Building ramdisk /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk
250 01:37:40.907514 >> 166772 blocks
251 01:37:48.793007 Adding RAMdisk u-boot header.
252 01:37:48.793453 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk.cpio.gz.uboot
253 01:37:49.047343 output: Image Name:
254 01:37:49.047763 output: Created: Thu Oct 3 01:37:48 2024
255 01:37:49.047974 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:37:49.048414 output: Data Size: 23422897 Bytes = 22873.92 KiB = 22.34 MiB
257 01:37:49.048815 output: Load Address: 00000000
258 01:37:49.049210 output: Entry Point: 00000000
259 01:37:49.049603 output:
260 01:37:49.050654 rename /var/lib/lava/dispatcher/tmp/795690/extract-overlay-ramdisk-1ajamv3c/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
261 01:37:49.051375 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:37:49.051916 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 01:37:49.052484 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 01:37:49.052943 No LXC device requested
265 01:37:49.053439 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:37:49.053944 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 01:37:49.054435 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:37:49.054844 Checking files for TFTP limit of 4294967296 bytes.
269 01:37:49.057602 end: 1 tftp-deploy (duration 00:01:04) [common]
270 01:37:49.058199 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:37:49.058721 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:37:49.059213 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:37:49.059707 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:37:49.060264 Using kernel file from prepare-kernel: 795690/tftp-deploy-7kx9ywwl/kernel/uImage
275 01:37:49.060888 substitutions:
276 01:37:49.061288 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:37:49.061683 - {DTB_ADDR}: 0x01070000
278 01:37:49.062076 - {DTB}: 795690/tftp-deploy-7kx9ywwl/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:37:49.062469 - {INITRD}: 795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
280 01:37:49.062860 - {KERNEL_ADDR}: 0x01080000
281 01:37:49.063244 - {KERNEL}: 795690/tftp-deploy-7kx9ywwl/kernel/uImage
282 01:37:49.063632 - {LAVA_MAC}: None
283 01:37:49.064086 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/795690/extract-nfsrootfs-f1hui8dj
284 01:37:49.064491 - {NFS_SERVER_IP}: 192.168.6.2
285 01:37:49.064879 - {PRESEED_CONFIG}: None
286 01:37:49.065264 - {PRESEED_LOCAL}: None
287 01:37:49.065649 - {RAMDISK_ADDR}: 0x08000000
288 01:37:49.066029 - {RAMDISK}: 795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
289 01:37:49.066415 - {ROOT_PART}: None
290 01:37:49.066796 - {ROOT}: None
291 01:37:49.067175 - {SERVER_IP}: 192.168.6.2
292 01:37:49.067556 - {TEE_ADDR}: 0x83000000
293 01:37:49.067938 - {TEE}: None
294 01:37:49.068351 Parsed boot commands:
295 01:37:49.068728 - setenv autoload no
296 01:37:49.069110 - setenv initrd_high 0xffffffff
297 01:37:49.069490 - setenv fdt_high 0xffffffff
298 01:37:49.069868 - dhcp
299 01:37:49.070248 - setenv serverip 192.168.6.2
300 01:37:49.070624 - tftpboot 0x01080000 795690/tftp-deploy-7kx9ywwl/kernel/uImage
301 01:37:49.071007 - tftpboot 0x08000000 795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
302 01:37:49.071385 - tftpboot 0x01070000 795690/tftp-deploy-7kx9ywwl/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:37:49.071761 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/795690/extract-nfsrootfs-f1hui8dj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:37:49.072181 - bootm 0x01080000 0x08000000 0x01070000
305 01:37:49.072681 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:37:49.074156 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:37:49.074572 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:37:49.090091 Setting prompt string to ['lava-test: # ']
310 01:37:49.091601 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:37:49.092236 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:37:49.092793 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:37:49.093437 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:37:49.094637 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:37:49.139114 >> OK - accepted request
316 01:37:49.141221 Returned 0 in 0 seconds
317 01:37:49.242403 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:37:49.244046 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:37:49.244625 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:37:49.245133 Setting prompt string to ['Hit any key to stop autoboot']
322 01:37:49.245586 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:37:49.247146 Trying 192.168.56.21...
324 01:37:49.247615 Connected to conserv1.
325 01:37:49.248064 Escape character is '^]'.
326 01:37:49.248479
327 01:37:49.248891 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:37:49.249298
329 01:37:56.915588 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:37:56.916027 bl2_stage_init 0x01
331 01:37:56.916421 bl2_stage_init 0x81
332 01:37:56.921148 hw id: 0x0000 - pwm id 0x01
333 01:37:56.921589 bl2_stage_init 0xc1
334 01:37:56.925935 bl2_stage_init 0x02
335 01:37:56.926360
336 01:37:56.926762 L0:00000000
337 01:37:56.927167 L1:00000703
338 01:37:56.927555 L2:00008067
339 01:37:56.931476 L3:15000000
340 01:37:56.931906 S1:00000000
341 01:37:56.932338 B2:20282000
342 01:37:56.932734 B1:a0f83180
343 01:37:56.933125
344 01:37:56.933514 TE: 71487
345 01:37:56.933904
346 01:37:56.942632 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:37:56.943062
348 01:37:56.943456 Board ID = 1
349 01:37:56.943845 Set cpu clk to 24M
350 01:37:56.944268 Set clk81 to 24M
351 01:37:56.946051 Use GP1_pll as DSU clk.
352 01:37:56.951631 DSU clk: 1200 Mhz
353 01:37:56.952073 CPU clk: 1200 MHz
354 01:37:56.952463 Set clk81 to 166.6M
355 01:37:56.957168 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:37:56.957587 board id: 1
357 01:37:56.966609 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:37:56.978410 fw parse done
359 01:37:56.984355 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:37:57.027639 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:37:57.038697 PIEI prepare done
362 01:37:57.039116 fastboot data load
363 01:37:57.039511 fastboot data verify
364 01:37:57.044242 verify result: 266
365 01:37:57.049951 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:37:57.050367 LPDDR4 probe
367 01:37:57.050756 ddr clk to 1584MHz
368 01:37:57.057835 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:37:57.094550
370 01:37:57.094970 dmc_version 0001
371 01:37:57.101982 Check phy result
372 01:37:57.108675 INFO : End of CA training
373 01:37:57.109089 INFO : End of initialization
374 01:37:57.114195 INFO : Training has run successfully!
375 01:37:57.114610 Check phy result
376 01:37:57.119775 INFO : End of initialization
377 01:37:57.120218 INFO : End of read enable training
378 01:37:57.125382 INFO : End of fine write leveling
379 01:37:57.131019 INFO : End of Write leveling coarse delay
380 01:37:57.131434 INFO : Training has run successfully!
381 01:37:57.131824 Check phy result
382 01:37:57.136652 INFO : End of initialization
383 01:37:57.137065 INFO : End of read dq deskew training
384 01:37:57.142162 INFO : End of MPR read delay center optimization
385 01:37:57.147780 INFO : End of write delay center optimization
386 01:37:57.153398 INFO : End of read delay center optimization
387 01:37:57.153816 INFO : End of max read latency training
388 01:37:57.158973 INFO : Training has run successfully!
389 01:37:57.159385 1D training succeed
390 01:37:57.168184 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:37:57.215617 Check phy result
392 01:37:57.216091 INFO : End of initialization
393 01:37:57.242906 INFO : End of 2D read delay Voltage center optimization
394 01:37:57.268257 INFO : End of 2D read delay Voltage center optimization
395 01:37:57.324766 INFO : End of 2D write delay Voltage center optimization
396 01:37:57.378648 INFO : End of 2D write delay Voltage center optimization
397 01:37:57.384216 INFO : Training has run successfully!
398 01:37:57.384643
399 01:37:57.385052 channel==0
400 01:37:57.389992 RxClkDly_Margin_A0==78 ps 8
401 01:37:57.390415 TxDqDly_Margin_A0==88 ps 9
402 01:37:57.395448 RxClkDly_Margin_A1==69 ps 7
403 01:37:57.395866 TxDqDly_Margin_A1==88 ps 9
404 01:37:57.396362 TrainedVREFDQ_A0==74
405 01:37:57.401073 TrainedVREFDQ_A1==74
406 01:37:57.401340 VrefDac_Margin_A0==24
407 01:37:57.401553 DeviceVref_Margin_A0==40
408 01:37:57.406614 VrefDac_Margin_A1==23
409 01:37:57.406879 DeviceVref_Margin_A1==40
410 01:37:57.407091
411 01:37:57.407298
412 01:37:57.407503 channel==1
413 01:37:57.412224 RxClkDly_Margin_A0==88 ps 9
414 01:37:57.412473 TxDqDly_Margin_A0==98 ps 10
415 01:37:57.417934 RxClkDly_Margin_A1==78 ps 8
416 01:37:57.418178 TxDqDly_Margin_A1==88 ps 9
417 01:37:57.423437 TrainedVREFDQ_A0==78
418 01:37:57.423687 TrainedVREFDQ_A1==78
419 01:37:57.423901 VrefDac_Margin_A0==22
420 01:37:57.429016 DeviceVref_Margin_A0==36
421 01:37:57.429262 VrefDac_Margin_A1==20
422 01:37:57.429473 DeviceVref_Margin_A1==36
423 01:37:57.434638
424 01:37:57.434885 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:37:57.435097
426 01:37:57.468257 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000014 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 01:37:57.468642 2D training succeed
428 01:37:57.473957 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:37:57.479418 auto size-- 65535DDR cs0 size: 2048MB
430 01:37:57.479669 DDR cs1 size: 2048MB
431 01:37:57.485033 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:37:57.485279 cs0 DataBus test pass
433 01:37:57.490630 cs1 DataBus test pass
434 01:37:57.490877 cs0 AddrBus test pass
435 01:37:57.491082 cs1 AddrBus test pass
436 01:37:57.491286
437 01:37:57.496226 100bdlr_step_size ps== 471
438 01:37:57.496484 result report
439 01:37:57.501841 boot times 0Enable ddr reg access
440 01:37:57.507061 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:37:57.520810 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:37:58.180223 bl2z: ptr: 05129330, size: 00001e40
443 01:37:58.188209 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:37:58.188614 MVN_1=0x00000000
445 01:37:58.188859 MVN_2=0x00000000
446 01:37:58.199754 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:37:58.200064 OPS=0x04
448 01:37:58.200284 ring efuse init
449 01:37:58.202586 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:37:58.209026 [0.017354 Inits done]
451 01:37:58.209391 secure task start!
452 01:37:58.209708 high task start!
453 01:37:58.210020 low task start!
454 01:37:58.212388 run into bl31
455 01:37:58.222066 NOTICE: BL31: v1.3(release):4fc40b1
456 01:37:58.229839 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:37:58.230111 NOTICE: BL31: G12A normal boot!
458 01:37:58.245347 NOTICE: BL31: BL33 decompress pass
459 01:37:58.250093 ERROR: Error initializing runtime service opteed_fast
460 01:38:00.960490 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:38:00.960961 bl2_stage_init 0x01
462 01:38:00.961209 bl2_stage_init 0x81
463 01:38:00.966165 hw id: 0x0000 - pwm id 0x01
464 01:38:00.966799 bl2_stage_init 0xc1
465 01:38:00.971364 bl2_stage_init 0x02
466 01:38:00.971968
467 01:38:00.972463 L0:00000000
468 01:38:00.972903 L1:00000703
469 01:38:00.973319 L2:00008067
470 01:38:00.973705 L3:15000000
471 01:38:00.976897 S1:00000000
472 01:38:00.977388 B2:20282000
473 01:38:00.977777 B1:a0f83180
474 01:38:00.978159
475 01:38:00.978544 TE: 67766
476 01:38:00.978927
477 01:38:00.982466 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:38:00.988069
479 01:38:00.988579 Board ID = 1
480 01:38:00.988968 Set cpu clk to 24M
481 01:38:00.989355 Set clk81 to 24M
482 01:38:00.991495 Use GP1_pll as DSU clk.
483 01:38:00.992221 DSU clk: 1200 Mhz
484 01:38:00.997023 CPU clk: 1200 MHz
485 01:38:00.997577 Set clk81 to 166.6M
486 01:38:01.002590 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:38:01.003055 board id: 1
488 01:38:01.012450 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:38:01.023071 fw parse done
490 01:38:01.029016 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:38:01.071657 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:38:01.082679 PIEI prepare done
493 01:38:01.083160 fastboot data load
494 01:38:01.083555 fastboot data verify
495 01:38:01.088266 verify result: 266
496 01:38:01.093859 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:38:01.094309 LPDDR4 probe
498 01:38:01.094698 ddr clk to 1584MHz
499 01:38:01.101788 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 01:38:01.139078
501 01:38:01.139539 dmc_version 0001
502 01:38:01.145792 Check phy result
503 01:38:01.151685 INFO : End of CA training
504 01:38:01.152171 INFO : End of initialization
505 01:38:01.157259 INFO : Training has run successfully!
506 01:38:01.157704 Check phy result
507 01:38:01.162894 INFO : End of initialization
508 01:38:01.163500 INFO : End of read enable training
509 01:38:01.168509 INFO : End of fine write leveling
510 01:38:01.175387 INFO : End of Write leveling coarse delay
511 01:38:01.175829 INFO : Training has run successfully!
512 01:38:01.176286 Check phy result
513 01:38:01.179584 INFO : End of initialization
514 01:38:01.180033 INFO : End of read dq deskew training
515 01:38:01.185186 INFO : End of MPR read delay center optimization
516 01:38:01.190789 INFO : End of write delay center optimization
517 01:38:01.196422 INFO : End of read delay center optimization
518 01:38:01.196844 INFO : End of max read latency training
519 01:38:01.202009 INFO : Training has run successfully!
520 01:38:01.202449 1D training succeed
521 01:38:01.211151 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 01:38:01.258772 Check phy result
523 01:38:01.259221 INFO : End of initialization
524 01:38:01.281205 INFO : End of 2D read delay Voltage center optimization
525 01:38:01.300335 INFO : End of 2D read delay Voltage center optimization
526 01:38:01.352164 INFO : End of 2D write delay Voltage center optimization
527 01:38:01.401289 INFO : End of 2D write delay Voltage center optimization
528 01:38:01.407075 INFO : Training has run successfully!
529 01:38:01.407505
530 01:38:01.407909 channel==0
531 01:38:01.412484 RxClkDly_Margin_A0==78 ps 8
532 01:38:01.412925 TxDqDly_Margin_A0==98 ps 10
533 01:38:01.418055 RxClkDly_Margin_A1==88 ps 9
534 01:38:01.418485 TxDqDly_Margin_A1==98 ps 10
535 01:38:01.418890 TrainedVREFDQ_A0==74
536 01:38:01.423663 TrainedVREFDQ_A1==74
537 01:38:01.424115 VrefDac_Margin_A0==24
538 01:38:01.424518 DeviceVref_Margin_A0==40
539 01:38:01.429285 VrefDac_Margin_A1==23
540 01:38:01.429719 DeviceVref_Margin_A1==40
541 01:38:01.430118
542 01:38:01.430514
543 01:38:01.434837 channel==1
544 01:38:01.435263 RxClkDly_Margin_A0==88 ps 9
545 01:38:01.435661 TxDqDly_Margin_A0==98 ps 10
546 01:38:01.440487 RxClkDly_Margin_A1==78 ps 8
547 01:38:01.440922 TxDqDly_Margin_A1==88 ps 9
548 01:38:01.446074 TrainedVREFDQ_A0==78
549 01:38:01.446542 TrainedVREFDQ_A1==78
550 01:38:01.446953 VrefDac_Margin_A0==22
551 01:38:01.451660 DeviceVref_Margin_A0==36
552 01:38:01.452119 VrefDac_Margin_A1==22
553 01:38:01.457274 DeviceVref_Margin_A1==36
554 01:38:01.457710
555 01:38:01.458115 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 01:38:01.458513
557 01:38:01.490868 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
558 01:38:01.491335 2D training succeed
559 01:38:01.496490 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 01:38:01.502054 auto size-- 65535DDR cs0 size: 2048MB
561 01:38:01.502486 DDR cs1 size: 2048MB
562 01:38:01.507648 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 01:38:01.508105 cs0 DataBus test pass
564 01:38:01.513292 cs1 DataBus test pass
565 01:38:01.513718 cs0 AddrBus test pass
566 01:38:01.514116 cs1 AddrBus test pass
567 01:38:01.514510
568 01:38:01.518838 100bdlr_step_size ps== 478
569 01:38:01.519273 result report
570 01:38:01.524478 boot times 0Enable ddr reg access
571 01:38:01.529720 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 01:38:01.543561 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 01:38:02.197585 bl2z: ptr: 05129330, size: 00001e40
574 01:38:02.204843 0.0;M3 CHK:0;cm4_sp_mode 0
575 01:38:02.205311 MVN_1=0x00000000
576 01:38:02.205721 MVN_2=0x00000000
577 01:38:02.216344 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 01:38:02.216791 OPS=0x04
579 01:38:02.217198 ring efuse init
580 01:38:02.219309 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 01:38:02.226798 [0.017310 Inits done]
582 01:38:02.227242 secure task start!
583 01:38:02.227646 high task start!
584 01:38:02.228075 low task start!
585 01:38:02.229735 run into bl31
586 01:38:02.238331 NOTICE: BL31: v1.3(release):4fc40b1
587 01:38:02.246123 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 01:38:02.246566 NOTICE: BL31: G12A normal boot!
589 01:38:02.261735 NOTICE: BL31: BL33 decompress pass
590 01:38:02.267443 ERROR: Error initializing runtime service opteed_fast
591 01:38:03.660649 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 01:38:03.661259 bl2_stage_init 0x01
593 01:38:03.661679 bl2_stage_init 0x81
594 01:38:03.666193 hw id: 0x0000 - pwm id 0x01
595 01:38:03.666646 bl2_stage_init 0xc1
596 01:38:03.671755 bl2_stage_init 0x02
597 01:38:03.672229
598 01:38:03.672642 L0:00000000
599 01:38:03.673042 L1:00000703
600 01:38:03.673438 L2:00008067
601 01:38:03.673832 L3:15000000
602 01:38:03.677334 S1:00000000
603 01:38:03.677767 B2:20282000
604 01:38:03.678169 B1:a0f83180
605 01:38:03.678564
606 01:38:03.678961 TE: 67651
607 01:38:03.679354
608 01:38:03.682907 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 01:38:03.683349
610 01:38:03.688525 Board ID = 1
611 01:38:03.688954 Set cpu clk to 24M
612 01:38:03.689355 Set clk81 to 24M
613 01:38:03.694144 Use GP1_pll as DSU clk.
614 01:38:03.694594 DSU clk: 1200 Mhz
615 01:38:03.694997 CPU clk: 1200 MHz
616 01:38:03.699738 Set clk81 to 166.6M
617 01:38:03.705318 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 01:38:03.705758 board id: 1
619 01:38:03.712573 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 01:38:03.723163 fw parse done
621 01:38:03.729145 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 01:38:03.771833 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 01:38:03.782764 PIEI prepare done
624 01:38:03.783204 fastboot data load
625 01:38:03.783610 fastboot data verify
626 01:38:03.788325 verify result: 266
627 01:38:03.793922 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 01:38:03.794360 LPDDR4 probe
629 01:38:03.794758 ddr clk to 1584MHz
630 01:38:03.801900 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 01:38:03.839164
632 01:38:03.839616 dmc_version 0001
633 01:38:03.845884 Check phy result
634 01:38:03.851821 INFO : End of CA training
635 01:38:03.852290 INFO : End of initialization
636 01:38:03.857340 INFO : Training has run successfully!
637 01:38:03.857772 Check phy result
638 01:38:03.862958 INFO : End of initialization
639 01:38:03.863385 INFO : End of read enable training
640 01:38:03.868565 INFO : End of fine write leveling
641 01:38:03.874160 INFO : End of Write leveling coarse delay
642 01:38:03.874594 INFO : Training has run successfully!
643 01:38:03.874991 Check phy result
644 01:38:03.879828 INFO : End of initialization
645 01:38:03.880293 INFO : End of read dq deskew training
646 01:38:03.885352 INFO : End of MPR read delay center optimization
647 01:38:03.890950 INFO : End of write delay center optimization
648 01:38:03.896560 INFO : End of read delay center optimization
649 01:38:03.896993 INFO : End of max read latency training
650 01:38:03.902152 INFO : Training has run successfully!
651 01:38:03.902580 1D training succeed
652 01:38:03.911313 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 01:38:03.958947 Check phy result
654 01:38:03.959391 INFO : End of initialization
655 01:38:03.981284 INFO : End of 2D read delay Voltage center optimization
656 01:38:04.000432 INFO : End of 2D read delay Voltage center optimization
657 01:38:04.052324 INFO : End of 2D write delay Voltage center optimization
658 01:38:04.101561 INFO : End of 2D write delay Voltage center optimization
659 01:38:04.107051 INFO : Training has run successfully!
660 01:38:04.107505
661 01:38:04.107918 channel==0
662 01:38:04.112665 RxClkDly_Margin_A0==78 ps 8
663 01:38:04.113103 TxDqDly_Margin_A0==98 ps 10
664 01:38:04.118269 RxClkDly_Margin_A1==88 ps 9
665 01:38:04.118700 TxDqDly_Margin_A1==88 ps 9
666 01:38:04.119111 TrainedVREFDQ_A0==74
667 01:38:04.123841 TrainedVREFDQ_A1==74
668 01:38:04.124370 VrefDac_Margin_A0==23
669 01:38:04.124785 DeviceVref_Margin_A0==40
670 01:38:04.129507 VrefDac_Margin_A1==23
671 01:38:04.129985 DeviceVref_Margin_A1==40
672 01:38:04.130434
673 01:38:04.130894
674 01:38:04.131331 channel==1
675 01:38:04.135090 RxClkDly_Margin_A0==78 ps 8
676 01:38:04.135724 TxDqDly_Margin_A0==88 ps 9
677 01:38:04.140667 RxClkDly_Margin_A1==78 ps 8
678 01:38:04.140978 TxDqDly_Margin_A1==88 ps 9
679 01:38:04.146286 TrainedVREFDQ_A0==75
680 01:38:04.146577 TrainedVREFDQ_A1==75
681 01:38:04.146803 VrefDac_Margin_A0==22
682 01:38:04.151907 DeviceVref_Margin_A0==39
683 01:38:04.152223 VrefDac_Margin_A1==22
684 01:38:04.152448 DeviceVref_Margin_A1==39
685 01:38:04.157501
686 01:38:04.157920 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 01:38:04.158282
688 01:38:04.191086 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
689 01:38:04.191634 2D training succeed
690 01:38:04.196659 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 01:38:04.202247 auto size-- 65535DDR cs0 size: 2048MB
692 01:38:04.202694 DDR cs1 size: 2048MB
693 01:38:04.207849 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 01:38:04.208332 cs0 DataBus test pass
695 01:38:04.213498 cs1 DataBus test pass
696 01:38:04.213943 cs0 AddrBus test pass
697 01:38:04.214355 cs1 AddrBus test pass
698 01:38:04.214756
699 01:38:04.219067 100bdlr_step_size ps== 478
700 01:38:04.219515 result report
701 01:38:04.224651 boot times 0Enable ddr reg access
702 01:38:04.229746 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 01:38:04.243591 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 01:38:04.899331 bl2z: ptr: 05129330, size: 00001e40
705 01:38:04.905821 0.0;M3 CHK:0;cm4_sp_mode 0
706 01:38:04.906348 MVN_1=0x00000000
707 01:38:04.906779 MVN_2=0x00000000
708 01:38:04.917276 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 01:38:04.917771 OPS=0x04
710 01:38:04.918191 ring efuse init
711 01:38:04.922866 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 01:38:04.923348 [0.017319 Inits done]
713 01:38:04.923763 secure task start!
714 01:38:04.931004 high task start!
715 01:38:04.931482 low task start!
716 01:38:04.931894 run into bl31
717 01:38:04.939580 NOTICE: BL31: v1.3(release):4fc40b1
718 01:38:04.947453 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 01:38:04.947934 NOTICE: BL31: G12A normal boot!
720 01:38:04.963251 NOTICE: BL31: BL33 decompress pass
721 01:38:04.967770 ERROR: Error initializing runtime service opteed_fast
722 01:38:05.764049
723 01:38:05.764674
724 01:38:05.769279 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 01:38:05.769762
726 01:38:05.772750 Model: Libre Computer AML-S905D3-CC Solitude
727 01:38:05.919810 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 01:38:05.935174 DRAM: 2 GiB (effective 3.8 GiB)
729 01:38:06.036197 Core: 406 devices, 33 uclasses, devicetree: separate
730 01:38:06.042099 WDT: Not starting watchdog@f0d0
731 01:38:06.067199 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 01:38:06.080435 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 01:38:06.085371 ** Bad device specification mmc 0 **
734 01:38:06.095447 Card did not respond to voltage select! : -110
735 01:38:06.103079 ** Bad device specification mmc 0 **
736 01:38:06.103536 Couldn't find partition mmc 0
737 01:38:06.111424 Card did not respond to voltage select! : -110
738 01:38:06.116927 ** Bad device specification mmc 0 **
739 01:38:06.117393 Couldn't find partition mmc 0
740 01:38:06.121986 Error: could not access storage.
741 01:38:06.417508 Net: eth0: ethernet@ff3f0000
742 01:38:06.418167 starting USB...
743 01:38:06.662321 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 01:38:06.662944 Starting the controller
745 01:38:06.669097 USB XHCI 1.10
746 01:38:08.225558 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 01:38:08.233834 scanning usb for storage devices... 0 Storage Device(s) found
749 01:38:08.285393 Hit any key to stop autoboot: 1
750 01:38:08.286217 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 01:38:08.286871 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 01:38:08.287361 Setting prompt string to ['=>']
753 01:38:08.287848 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 01:38:08.299926 0
755 01:38:08.300841 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 01:38:08.402054 => setenv autoload no
758 01:38:08.403070 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 01:38:08.408195 setenv autoload no
761 01:38:08.509700 => setenv initrd_high 0xffffffff
762 01:38:08.510649 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 01:38:08.515104 setenv initrd_high 0xffffffff
765 01:38:08.616606 => setenv fdt_high 0xffffffff
766 01:38:08.617502 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 01:38:08.621777 setenv fdt_high 0xffffffff
769 01:38:08.723252 => dhcp
770 01:38:08.724144 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 01:38:08.728100 dhcp
772 01:38:09.683950 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 01:38:09.684633 Speed: 1000, full duplex
774 01:38:09.685126 BOOTP broadcast 1
775 01:38:09.931919 BOOTP broadcast 2
776 01:38:10.433200 BOOTP broadcast 3
777 01:38:11.434056 BOOTP broadcast 4
778 01:38:13.435123 BOOTP broadcast 5
779 01:38:13.455699 DHCP client bound to address 192.168.6.12 (3771 ms)
781 01:38:13.557358 => setenv serverip 192.168.6.2
782 01:38:13.558336 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
783 01:38:13.562703 setenv serverip 192.168.6.2
785 01:38:13.664275 => tftpboot 0x01080000 795690/tftp-deploy-7kx9ywwl/kernel/uImage
786 01:38:13.665087 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
787 01:38:13.672104 tftpboot 0x01080000 795690/tftp-deploy-7kx9ywwl/kernel/uImage
788 01:38:13.672587 Speed: 1000, full duplex
789 01:38:13.672997 Using ethernet@ff3f0000 device
790 01:38:13.677899 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
791 01:38:13.683384 Filename '795690/tftp-deploy-7kx9ywwl/kernel/uImage'.
792 01:38:13.686652 Load address: 0x1080000
793 01:38:18.408474 Loading: *################################################## 43.6 MiB
794 01:38:18.409080 9.2 MiB/s
795 01:38:18.409509 done
796 01:38:18.412017 Bytes transferred = 45713984 (2b98a40 hex)
798 01:38:18.513576 => tftpboot 0x08000000 795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
799 01:38:18.514294 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:31)
800 01:38:18.521025 tftpboot 0x08000000 795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot
801 01:38:18.521494 Speed: 1000, full duplex
802 01:38:18.521884 Using ethernet@ff3f0000 device
803 01:38:18.526530 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
804 01:38:18.535382 Filename '795690/tftp-deploy-7kx9ywwl/ramdisk/ramdisk.cpio.gz.uboot'.
805 01:38:18.535865 Load address: 0x8000000
806 01:38:26.013486 Loading: *###########T ###################################### UDP wrong checksum 00000005 0000cabd
807 01:38:30.072720 UDP wrong checksum 000000ff 000039ad
808 01:38:30.093811 UDP wrong checksum 000000ff 0000be9f
809 01:38:31.013756 T UDP wrong checksum 00000005 0000cabd
810 01:38:41.014937 T T UDP wrong checksum 00000005 0000cabd
811 01:38:43.418680 UDP wrong checksum 000000ff 0000927f
812 01:38:43.432990 UDP wrong checksum 000000ff 00001572
813 01:39:01.020128 T T T T UDP wrong checksum 00000005 0000cabd
814 01:39:05.765694 UDP wrong checksum 000000ff 0000a49b
815 01:39:05.797161 UDP wrong checksum 000000ff 00003d8e
816 01:39:06.853026 T UDP wrong checksum 000000ff 0000d2b6
817 01:39:06.882304 UDP wrong checksum 000000ff 00005ba9
818 01:39:16.023896 T
819 01:39:16.024368 Retry count exceeded; starting again
821 01:39:16.025571 end: 2.4.3 bootloader-commands (duration 00:01:08) [common]
824 01:39:16.026757 end: 2.4 uboot-commands (duration 00:01:27) [common]
826 01:39:16.027549 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
828 01:39:16.028183 end: 2 uboot-action (duration 00:01:27) [common]
830 01:39:16.029226 Cleaning after the job
831 01:39:16.029583 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/ramdisk
832 01:39:16.030419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/kernel
833 01:39:16.045733 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/dtb
834 01:39:16.046535 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/nfsrootfs
835 01:39:16.094541 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/795690/tftp-deploy-7kx9ywwl/modules
836 01:39:16.101276 start: 4.1 power-off (timeout 00:00:30) [common]
837 01:39:16.101872 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
838 01:39:16.135601 >> OK - accepted request
839 01:39:16.138472 Returned 0 in 0 seconds
840 01:39:16.239270 end: 4.1 power-off (duration 00:00:00) [common]
842 01:39:16.240279 start: 4.2 read-feedback (timeout 00:10:00) [common]
843 01:39:16.240919 Listened to connection for namespace 'common' for up to 1s
844 01:39:17.241864 Finalising connection for namespace 'common'
845 01:39:17.242359 Disconnecting from shell: Finalise
846 01:39:17.242652 =>
847 01:39:17.343469 end: 4.2 read-feedback (duration 00:00:01) [common]
848 01:39:17.343909 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/795690
849 01:39:19.638068 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/795690
850 01:39:19.638684 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.