Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:41:42.502452 lava-dispatcher, installed at version: 2024.01
2 22:41:42.503256 start: 0 validate
3 22:41:42.503721 Start time: 2024-10-08 22:41:42.503693+00:00 (UTC)
4 22:41:42.504319 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:41:42.504865 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
6 22:41:42.544241 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:41:42.544869 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-50-g5b7c893ed5ed0%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 22:41:42.577389 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:41:42.577992 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-50-g5b7c893ed5ed0%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:41:42.613840 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:41:42.614564 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-50-g5b7c893ed5ed0%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 22:41:42.654974 validate duration: 0.15
14 22:41:42.655801 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 22:41:42.656143 start: 1.1 download-retry (timeout 00:10:00) [common]
16 22:41:42.656435 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 22:41:42.657010 Not decompressing ramdisk as can be used compressed.
18 22:41:42.657422 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
19 22:41:42.657677 saving as /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/ramdisk/rootfs.cpio.gz
20 22:41:42.657938 total size: 47897469 (45 MB)
21 22:41:42.698810 progress 0 % (0 MB)
22 22:41:42.730071 progress 5 % (2 MB)
23 22:41:42.760647 progress 10 % (4 MB)
24 22:41:42.789537 progress 15 % (6 MB)
25 22:41:42.818087 progress 20 % (9 MB)
26 22:41:42.847391 progress 25 % (11 MB)
27 22:41:42.876683 progress 30 % (13 MB)
28 22:41:42.906149 progress 35 % (16 MB)
29 22:41:42.934852 progress 40 % (18 MB)
30 22:41:42.963783 progress 45 % (20 MB)
31 22:41:42.992500 progress 50 % (22 MB)
32 22:41:43.022543 progress 55 % (25 MB)
33 22:41:43.052190 progress 60 % (27 MB)
34 22:41:43.081196 progress 65 % (29 MB)
35 22:41:43.109793 progress 70 % (32 MB)
36 22:41:43.138089 progress 75 % (34 MB)
37 22:41:43.167523 progress 80 % (36 MB)
38 22:41:43.196519 progress 85 % (38 MB)
39 22:41:43.224935 progress 90 % (41 MB)
40 22:41:43.254881 progress 95 % (43 MB)
41 22:41:43.282935 progress 100 % (45 MB)
42 22:41:43.283671 45 MB downloaded in 0.63 s (73.00 MB/s)
43 22:41:43.284261 end: 1.1.1 http-download (duration 00:00:01) [common]
45 22:41:43.285147 end: 1.1 download-retry (duration 00:00:01) [common]
46 22:41:43.285436 start: 1.2 download-retry (timeout 00:09:59) [common]
47 22:41:43.285704 start: 1.2.1 http-download (timeout 00:09:59) [common]
48 22:41:43.286182 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-50-g5b7c893ed5ed0/arm64/defconfig/gcc-12/kernel/Image
49 22:41:43.286425 saving as /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/kernel/Image
50 22:41:43.286632 total size: 45713920 (43 MB)
51 22:41:43.286844 No compression specified
52 22:41:43.323202 progress 0 % (0 MB)
53 22:41:43.356775 progress 5 % (2 MB)
54 22:41:43.390316 progress 10 % (4 MB)
55 22:41:43.423287 progress 15 % (6 MB)
56 22:41:43.456594 progress 20 % (8 MB)
57 22:41:43.489618 progress 25 % (10 MB)
58 22:41:43.523335 progress 30 % (13 MB)
59 22:41:43.555957 progress 35 % (15 MB)
60 22:41:43.589163 progress 40 % (17 MB)
61 22:41:43.621757 progress 45 % (19 MB)
62 22:41:43.654892 progress 50 % (21 MB)
63 22:41:43.688387 progress 55 % (24 MB)
64 22:41:43.721942 progress 60 % (26 MB)
65 22:41:43.755229 progress 65 % (28 MB)
66 22:41:43.789101 progress 70 % (30 MB)
67 22:41:43.823799 progress 75 % (32 MB)
68 22:41:43.852019 progress 80 % (34 MB)
69 22:41:43.879484 progress 85 % (37 MB)
70 22:41:43.907254 progress 90 % (39 MB)
71 22:41:43.935218 progress 95 % (41 MB)
72 22:41:43.962330 progress 100 % (43 MB)
73 22:41:43.962851 43 MB downloaded in 0.68 s (64.47 MB/s)
74 22:41:43.963333 end: 1.2.1 http-download (duration 00:00:01) [common]
76 22:41:43.964158 end: 1.2 download-retry (duration 00:00:01) [common]
77 22:41:43.964437 start: 1.3 download-retry (timeout 00:09:59) [common]
78 22:41:43.964699 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 22:41:43.965167 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-50-g5b7c893ed5ed0/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 22:41:43.965436 saving as /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 22:41:43.965644 total size: 53209 (0 MB)
82 22:41:43.965854 No compression specified
83 22:41:44.011525 progress 61 % (0 MB)
84 22:41:44.012400 progress 100 % (0 MB)
85 22:41:44.012942 0 MB downloaded in 0.05 s (1.07 MB/s)
86 22:41:44.013425 end: 1.3.1 http-download (duration 00:00:00) [common]
88 22:41:44.014233 end: 1.3 download-retry (duration 00:00:00) [common]
89 22:41:44.014493 start: 1.4 download-retry (timeout 00:09:59) [common]
90 22:41:44.014754 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 22:41:44.015295 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-50-g5b7c893ed5ed0/arm64/defconfig/gcc-12/modules.tar.xz
92 22:41:44.015551 saving as /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/modules/modules.tar
93 22:41:44.015758 total size: 11613728 (11 MB)
94 22:41:44.015970 Using unxz to decompress xz
95 22:41:44.048037 progress 0 % (0 MB)
96 22:41:44.109570 progress 5 % (0 MB)
97 22:41:44.189710 progress 10 % (1 MB)
98 22:41:44.277963 progress 15 % (1 MB)
99 22:41:44.370622 progress 20 % (2 MB)
100 22:41:44.455630 progress 25 % (2 MB)
101 22:41:44.534905 progress 30 % (3 MB)
102 22:41:44.619246 progress 35 % (3 MB)
103 22:41:44.696022 progress 40 % (4 MB)
104 22:41:44.774494 progress 45 % (5 MB)
105 22:41:44.857074 progress 50 % (5 MB)
106 22:41:44.936233 progress 55 % (6 MB)
107 22:41:45.022534 progress 60 % (6 MB)
108 22:41:45.115790 progress 65 % (7 MB)
109 22:41:45.216697 progress 70 % (7 MB)
110 22:41:45.309731 progress 75 % (8 MB)
111 22:41:45.405492 progress 80 % (8 MB)
112 22:41:45.510938 progress 85 % (9 MB)
113 22:41:45.610676 progress 90 % (9 MB)
114 22:41:45.712334 progress 95 % (10 MB)
115 22:41:45.797462 progress 100 % (11 MB)
116 22:41:45.813159 11 MB downloaded in 1.80 s (6.16 MB/s)
117 22:41:45.814092 end: 1.4.1 http-download (duration 00:00:02) [common]
119 22:41:45.815709 end: 1.4 download-retry (duration 00:00:02) [common]
120 22:41:45.816298 start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
121 22:41:45.816826 start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
122 22:41:45.817313 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 22:41:45.817835 start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
124 22:41:45.818831 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7
125 22:41:45.819715 makedir: /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin
126 22:41:45.820463 makedir: /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/tests
127 22:41:45.821099 makedir: /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/results
128 22:41:45.821718 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-add-keys
129 22:41:45.822665 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-add-sources
130 22:41:45.823575 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-background-process-start
131 22:41:45.824551 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-background-process-stop
132 22:41:45.825526 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-common-functions
133 22:41:45.826419 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-echo-ipv4
134 22:41:45.827354 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-install-packages
135 22:41:45.828320 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-installed-packages
136 22:41:45.829211 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-os-build
137 22:41:45.830086 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-probe-channel
138 22:41:45.830961 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-probe-ip
139 22:41:45.831843 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-target-ip
140 22:41:45.832763 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-target-mac
141 22:41:45.833639 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-target-storage
142 22:41:45.834531 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-case
143 22:41:45.835409 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-event
144 22:41:45.836309 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-feedback
145 22:41:45.837284 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-raise
146 22:41:45.838280 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-reference
147 22:41:45.839268 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-runner
148 22:41:45.840227 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-set
149 22:41:45.841208 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-test-shell
150 22:41:45.842184 Updating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-install-packages (oe)
151 22:41:45.843202 Updating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/bin/lava-installed-packages (oe)
152 22:41:45.844114 Creating /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/environment
153 22:41:45.844885 LAVA metadata
154 22:41:45.845453 - LAVA_JOB_ID=823649
155 22:41:45.845921 - LAVA_DISPATCHER_IP=192.168.6.2
156 22:41:45.846599 start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
157 22:41:45.848456 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 22:41:45.849049 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
159 22:41:45.849498 skipped lava-vland-overlay
160 22:41:45.850011 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 22:41:45.850544 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
162 22:41:45.851024 skipped lava-multinode-overlay
163 22:41:45.851517 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 22:41:45.852044 start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
165 22:41:45.852534 Loading test definitions
166 22:41:45.853086 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
167 22:41:45.853524 Using /lava-823649 at stage 0
168 22:41:45.855713 uuid=823649_1.5.2.4.1 testdef=None
169 22:41:45.856277 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 22:41:45.856558 start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
171 22:41:45.858395 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 22:41:45.859231 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
174 22:41:45.861425 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 22:41:45.862287 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
177 22:41:45.864398 runner path: /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/0/tests/0_igt-gpu-panfrost test_uuid 823649_1.5.2.4.1
178 22:41:45.864995 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 22:41:45.865807 Creating lava-test-runner.conf files
181 22:41:45.866016 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/823649/lava-overlay-12z72sn7/lava-823649/0 for stage 0
182 22:41:45.866364 - 0_igt-gpu-panfrost
183 22:41:45.866722 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 22:41:45.867005 start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
185 22:41:45.890729 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 22:41:45.891176 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 22:41:45.891446 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 22:41:45.891718 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 22:41:45.891999 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 22:41:52.772288 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
191 22:41:52.772733 start: 1.5.4 extract-modules (timeout 00:09:50) [common]
192 22:41:52.772983 extracting modules file /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/modules/modules.tar to /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk
193 22:41:54.417262 end: 1.5.4 extract-modules (duration 00:00:02) [common]
194 22:41:54.417809 start: 1.5.5 apply-overlay-tftp (timeout 00:09:48) [common]
195 22:41:54.418148 [common] Applying overlay /var/lib/lava/dispatcher/tmp/823649/compress-overlay-3lqn4dk5/overlay-1.5.2.5.tar.gz to ramdisk
196 22:41:54.418418 [common] Applying overlay /var/lib/lava/dispatcher/tmp/823649/compress-overlay-3lqn4dk5/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk
197 22:41:54.455442 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 22:41:54.456016 start: 1.5.6 prepare-kernel (timeout 00:09:48) [common]
199 22:41:54.456371 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:48) [common]
200 22:41:54.456657 Converting downloaded kernel to a uImage
201 22:41:54.457039 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/kernel/Image /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/kernel/uImage
202 22:41:54.911022 output: Image Name:
203 22:41:54.911402 output: Created: Tue Oct 8 22:41:54 2024
204 22:41:54.911614 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 22:41:54.911820 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 22:41:54.912057 output: Load Address: 01080000
207 22:41:54.912265 output: Entry Point: 01080000
208 22:41:54.912466 output:
209 22:41:54.912799 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 22:41:54.913062 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 22:41:54.913331 start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
212 22:41:54.913582 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 22:41:54.913838 start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
214 22:41:54.914092 Building ramdisk /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk
215 22:42:02.066133 >> 502361 blocks
216 22:42:23.169102 Adding RAMdisk u-boot header.
217 22:42:23.169562 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk.cpio.gz.uboot
218 22:42:23.871217 output: Image Name:
219 22:42:23.872041 output: Created: Tue Oct 8 22:42:23 2024
220 22:42:23.872509 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 22:42:23.872927 output: Data Size: 65705547 Bytes = 64165.57 KiB = 62.66 MiB
222 22:42:23.873351 output: Load Address: 00000000
223 22:42:23.873757 output: Entry Point: 00000000
224 22:42:23.874148 output:
225 22:42:23.875484 rename /var/lib/lava/dispatcher/tmp/823649/extract-overlay-ramdisk-9fl8ztvq/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
226 22:42:23.876408 end: 1.5.8 compress-ramdisk (duration 00:00:29) [common]
227 22:42:23.877068 end: 1.5 prepare-tftp-overlay (duration 00:00:38) [common]
228 22:42:23.877631 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:19) [common]
229 22:42:23.878116 No LXC device requested
230 22:42:23.878617 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 22:42:23.879124 start: 1.7 deploy-device-env (timeout 00:09:19) [common]
232 22:42:23.879618 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 22:42:23.880087 Checking files for TFTP limit of 4294967296 bytes.
234 22:42:23.881678 end: 1 tftp-deploy (duration 00:00:41) [common]
235 22:42:23.882071 start: 2 uboot-action (timeout 00:05:00) [common]
236 22:42:23.882385 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 22:42:23.882665 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 22:42:23.882987 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 22:42:23.883468 Using kernel file from prepare-kernel: 823649/tftp-deploy-w6fhfr3v/kernel/uImage
240 22:42:23.884028 substitutions:
241 22:42:23.884283 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 22:42:23.884497 - {DTB_ADDR}: 0x01070000
243 22:42:23.884708 - {DTB}: 823649/tftp-deploy-w6fhfr3v/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 22:42:23.884921 - {INITRD}: 823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
245 22:42:23.885127 - {KERNEL_ADDR}: 0x01080000
246 22:42:23.885330 - {KERNEL}: 823649/tftp-deploy-w6fhfr3v/kernel/uImage
247 22:42:23.885534 - {LAVA_MAC}: None
248 22:42:23.885766 - {PRESEED_CONFIG}: None
249 22:42:23.885974 - {PRESEED_LOCAL}: None
250 22:42:23.886176 - {RAMDISK_ADDR}: 0x08000000
251 22:42:23.886377 - {RAMDISK}: 823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
252 22:42:23.886583 - {ROOT_PART}: None
253 22:42:23.886785 - {ROOT}: None
254 22:42:23.886988 - {SERVER_IP}: 192.168.6.2
255 22:42:23.887194 - {TEE_ADDR}: 0x83000000
256 22:42:23.887404 - {TEE}: None
257 22:42:23.887610 Parsed boot commands:
258 22:42:23.887807 - setenv autoload no
259 22:42:23.888030 - setenv initrd_high 0xffffffff
260 22:42:23.888241 - setenv fdt_high 0xffffffff
261 22:42:23.888443 - dhcp
262 22:42:23.888649 - setenv serverip 192.168.6.2
263 22:42:23.888852 - tftpboot 0x01080000 823649/tftp-deploy-w6fhfr3v/kernel/uImage
264 22:42:23.889057 - tftpboot 0x08000000 823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
265 22:42:23.889260 - tftpboot 0x01070000 823649/tftp-deploy-w6fhfr3v/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 22:42:23.889470 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 22:42:23.889678 - bootm 0x01080000 0x08000000 0x01070000
268 22:42:23.889979 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 22:42:23.890794 start: 2.3 connect-device (timeout 00:05:00) [common]
271 22:42:23.891051 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 22:42:23.904345 Setting prompt string to ['lava-test: # ']
273 22:42:23.905547 end: 2.3 connect-device (duration 00:00:00) [common]
274 22:42:23.906033 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 22:42:23.906426 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 22:42:23.906763 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 22:42:23.907646 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 22:42:23.965687 >> OK - accepted request
279 22:42:23.968540 Returned 0 in 0 seconds
280 22:42:24.070177 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 22:42:24.071289 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 22:42:24.071651 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 22:42:24.072017 Setting prompt string to ['Hit any key to stop autoboot']
285 22:42:24.072323 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 22:42:24.073377 Trying 192.168.56.21...
287 22:42:24.073893 Connected to conserv1.
288 22:42:24.074178 Escape character is '^]'.
289 22:42:24.074415
290 22:42:24.074652 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 22:42:24.074899
292 22:42:31.224647 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 22:42:31.225097 bl2_stage_init 0x01
294 22:42:31.225346 bl2_stage_init 0x81
295 22:42:31.230177 hw id: 0x0000 - pwm id 0x01
296 22:42:31.230520 bl2_stage_init 0xc1
297 22:42:31.235788 bl2_stage_init 0x02
298 22:42:31.236162
299 22:42:31.236419 L0:00000000
300 22:42:31.236637 L1:00000703
301 22:42:31.236849 L2:00008067
302 22:42:31.237059 L3:15000000
303 22:42:31.241704 S1:00000000
304 22:42:31.242035 B2:20282000
305 22:42:31.242266 B1:a0f83180
306 22:42:31.242477
307 22:42:31.242686 TE: 68348
308 22:42:31.242892
309 22:42:31.247266 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 22:42:31.247743
311 22:42:31.252934 Board ID = 1
312 22:42:31.253385 Set cpu clk to 24M
313 22:42:31.253725 Set clk81 to 24M
314 22:42:31.258521 Use GP1_pll as DSU clk.
315 22:42:31.258978 DSU clk: 1200 Mhz
316 22:42:31.259330 CPU clk: 1200 MHz
317 22:42:31.264119 Set clk81 to 166.6M
318 22:42:31.270170 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 22:42:31.270634 board id: 1
320 22:42:31.276729 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 22:42:31.287570 fw parse done
322 22:42:31.293586 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 22:42:31.336755 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 22:42:31.347799 PIEI prepare done
325 22:42:31.348181 fastboot data load
326 22:42:31.348402 fastboot data verify
327 22:42:31.353355 verify result: 266
328 22:42:31.358909 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 22:42:31.359387 LPDDR4 probe
330 22:42:31.359723 ddr clk to 1584MHz
331 22:42:31.366943 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 22:42:31.404844
333 22:42:31.405237 dmc_version 0001
334 22:42:31.411822 Check phy result
335 22:42:31.417722 INFO : End of CA training
336 22:42:31.418179 INFO : End of initialization
337 22:42:31.423352 INFO : Training has run successfully!
338 22:42:31.423671 Check phy result
339 22:42:31.429557 INFO : End of initialization
340 22:42:31.429882 INFO : End of read enable training
341 22:42:31.432293 INFO : End of fine write leveling
342 22:42:31.437896 INFO : End of Write leveling coarse delay
343 22:42:31.443441 INFO : Training has run successfully!
344 22:42:31.443768 Check phy result
345 22:42:31.444000 INFO : End of initialization
346 22:42:31.449059 INFO : End of read dq deskew training
347 22:42:31.452388 INFO : End of MPR read delay center optimization
348 22:42:31.457966 INFO : End of write delay center optimization
349 22:42:31.463653 INFO : End of read delay center optimization
350 22:42:31.464018 INFO : End of max read latency training
351 22:42:31.469180 INFO : Training has run successfully!
352 22:42:31.469508 1D training succeed
353 22:42:31.477356 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 22:42:31.525717 Check phy result
355 22:42:31.526314 INFO : End of initialization
356 22:42:31.553016 INFO : End of 2D read delay Voltage center optimization
357 22:42:31.577161 INFO : End of 2D read delay Voltage center optimization
358 22:42:31.634074 INFO : End of 2D write delay Voltage center optimization
359 22:42:31.687925 INFO : End of 2D write delay Voltage center optimization
360 22:42:31.694529 INFO : Training has run successfully!
361 22:42:31.695038
362 22:42:31.695505 channel==0
363 22:42:31.699086 RxClkDly_Margin_A0==78 ps 8
364 22:42:31.699627 TxDqDly_Margin_A0==88 ps 9
365 22:42:31.702348 RxClkDly_Margin_A1==88 ps 9
366 22:42:31.702842 TxDqDly_Margin_A1==98 ps 10
367 22:42:31.707952 TrainedVREFDQ_A0==74
368 22:42:31.708550 TrainedVREFDQ_A1==75
369 22:42:31.708977 VrefDac_Margin_A0==22
370 22:42:31.714792 DeviceVref_Margin_A0==40
371 22:42:31.715357 VrefDac_Margin_A1==23
372 22:42:31.719071 DeviceVref_Margin_A1==39
373 22:42:31.719657
374 22:42:31.720132
375 22:42:31.720621 channel==1
376 22:42:31.721045 RxClkDly_Margin_A0==78 ps 8
377 22:42:31.724692 TxDqDly_Margin_A0==98 ps 10
378 22:42:31.725269 RxClkDly_Margin_A1==78 ps 8
379 22:42:31.730867 TxDqDly_Margin_A1==88 ps 9
380 22:42:31.731407 TrainedVREFDQ_A0==78
381 22:42:31.731843 TrainedVREFDQ_A1==78
382 22:42:31.735848 VrefDac_Margin_A0==22
383 22:42:31.736455 DeviceVref_Margin_A0==36
384 22:42:31.741663 VrefDac_Margin_A1==22
385 22:42:31.742092 DeviceVref_Margin_A1==36
386 22:42:31.742597
387 22:42:31.746997 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 22:42:31.747424
389 22:42:31.775057 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
390 22:42:31.780583 2D training succeed
391 22:42:31.786180 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 22:42:31.786668 auto size-- 65535DDR cs0 size: 2048MB
393 22:42:31.791820 DDR cs1 size: 2048MB
394 22:42:31.792383 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 22:42:31.797452 cs0 DataBus test pass
396 22:42:31.798006 cs1 DataBus test pass
397 22:42:31.798430 cs0 AddrBus test pass
398 22:42:31.802970 cs1 AddrBus test pass
399 22:42:31.803436
400 22:42:31.803849 100bdlr_step_size ps== 478
401 22:42:31.804297 result report
402 22:42:31.808588 boot times 0Enable ddr reg access
403 22:42:31.816272 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 22:42:31.830014 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 22:42:32.490001 bl2z: ptr: 05129330, size: 00001e40
406 22:42:32.499185 0.0;M3 CHK:0;cm4_sp_mode 0
407 22:42:32.499827 MVN_1=0x00000000
408 22:42:32.500397 MVN_2=0x00000000
409 22:42:32.510707 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 22:42:32.511313 OPS=0x04
411 22:42:32.511784 ring efuse init
412 22:42:32.513637 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 22:42:32.519812 [0.017354 Inits done]
414 22:42:32.520347 secure task start!
415 22:42:32.520802 high task start!
416 22:42:32.521245 low task start!
417 22:42:32.524037 run into bl31
418 22:42:32.532703 NOTICE: BL31: v1.3(release):4fc40b1
419 22:42:32.540483 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 22:42:32.541049 NOTICE: BL31: G12A normal boot!
421 22:42:32.561296 NOTICE: BL31: BL33 decompress pass
422 22:42:32.562228 ERROR: Error initializing runtime service opteed_fast
423 22:42:35.278046 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 22:42:35.278485 bl2_stage_init 0x01
425 22:42:35.278705 bl2_stage_init 0x81
426 22:42:35.283722 hw id: 0x0000 - pwm id 0x01
427 22:42:35.284338 bl2_stage_init 0xc1
428 22:42:35.289089 bl2_stage_init 0x02
429 22:42:35.289601
430 22:42:35.290077 L0:00000000
431 22:42:35.290513 L1:00000703
432 22:42:35.290942 L2:00008067
433 22:42:35.291366 L3:15000000
434 22:42:35.294780 S1:00000000
435 22:42:35.295337 B2:20282000
436 22:42:35.295787 B1:a0f83180
437 22:42:35.296276
438 22:42:35.296718 TE: 70582
439 22:42:35.297156
440 22:42:35.300305 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 22:42:35.300836
442 22:42:35.306030 Board ID = 1
443 22:42:35.306547 Set cpu clk to 24M
444 22:42:35.306981 Set clk81 to 24M
445 22:42:35.311484 Use GP1_pll as DSU clk.
446 22:42:35.312032 DSU clk: 1200 Mhz
447 22:42:35.312486 CPU clk: 1200 MHz
448 22:42:35.317079 Set clk81 to 166.6M
449 22:42:35.322744 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 22:42:35.323332 board id: 1
451 22:42:35.329966 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 22:42:35.340894 fw parse done
453 22:42:35.346759 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 22:42:35.389910 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 22:42:35.401159 PIEI prepare done
456 22:42:35.401764 fastboot data load
457 22:42:35.402217 fastboot data verify
458 22:42:35.406709 verify result: 266
459 22:42:35.412316 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 22:42:35.412940 LPDDR4 probe
461 22:42:35.413422 ddr clk to 1584MHz
462 22:42:35.420307 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 22:42:35.458085
464 22:42:35.458762 dmc_version 0001
465 22:42:35.465074 Check phy result
466 22:42:35.471076 INFO : End of CA training
467 22:42:35.471670 INFO : End of initialization
468 22:42:35.476612 INFO : Training has run successfully!
469 22:42:35.477178 Check phy result
470 22:42:35.482194 INFO : End of initialization
471 22:42:35.482742 INFO : End of read enable training
472 22:42:35.487883 INFO : End of fine write leveling
473 22:42:35.493440 INFO : End of Write leveling coarse delay
474 22:42:35.494041 INFO : Training has run successfully!
475 22:42:35.494514 Check phy result
476 22:42:35.499023 INFO : End of initialization
477 22:42:35.499588 INFO : End of read dq deskew training
478 22:42:35.505642 INFO : End of MPR read delay center optimization
479 22:42:35.511333 INFO : End of write delay center optimization
480 22:42:35.517632 INFO : End of read delay center optimization
481 22:42:35.518225 INFO : End of max read latency training
482 22:42:35.522713 INFO : Training has run successfully!
483 22:42:35.523269 1D training succeed
484 22:42:35.530918 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 22:42:35.579004 Check phy result
486 22:42:35.579610 INFO : End of initialization
487 22:42:35.606635 INFO : End of 2D read delay Voltage center optimization
488 22:42:35.630480 INFO : End of 2D read delay Voltage center optimization
489 22:42:35.687281 INFO : End of 2D write delay Voltage center optimization
490 22:42:35.741718 INFO : End of 2D write delay Voltage center optimization
491 22:42:35.746693 INFO : Training has run successfully!
492 22:42:35.747180
493 22:42:35.747590 channel==0
494 22:42:35.752326 RxClkDly_Margin_A0==78 ps 8
495 22:42:35.752807 TxDqDly_Margin_A0==98 ps 10
496 22:42:35.758202 RxClkDly_Margin_A1==88 ps 9
497 22:42:35.758677 TxDqDly_Margin_A1==88 ps 9
498 22:42:35.759082 TrainedVREFDQ_A0==74
499 22:42:35.763419 TrainedVREFDQ_A1==75
500 22:42:35.763883 VrefDac_Margin_A0==23
501 22:42:35.764315 DeviceVref_Margin_A0==40
502 22:42:35.769112 VrefDac_Margin_A1==23
503 22:42:35.769582 DeviceVref_Margin_A1==39
504 22:42:35.769984
505 22:42:35.770373
506 22:42:35.770759 channel==1
507 22:42:35.774735 RxClkDly_Margin_A0==78 ps 8
508 22:42:35.775233 TxDqDly_Margin_A0==98 ps 10
509 22:42:35.780321 RxClkDly_Margin_A1==88 ps 9
510 22:42:35.780802 TxDqDly_Margin_A1==88 ps 9
511 22:42:35.785920 TrainedVREFDQ_A0==78
512 22:42:35.786421 TrainedVREFDQ_A1==75
513 22:42:35.786845 VrefDac_Margin_A0==23
514 22:42:35.791513 DeviceVref_Margin_A0==36
515 22:42:35.792020 VrefDac_Margin_A1==23
516 22:42:35.797202 DeviceVref_Margin_A1==38
517 22:42:35.797679
518 22:42:35.798109 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 22:42:35.798509
520 22:42:35.830679 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000016 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000016 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
521 22:42:35.831252 2D training succeed
522 22:42:35.836306 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 22:42:35.841905 auto size-- 65535DDR cs0 size: 2048MB
524 22:42:35.842383 DDR cs1 size: 2048MB
525 22:42:35.847579 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 22:42:35.848085 cs0 DataBus test pass
527 22:42:35.853139 cs1 DataBus test pass
528 22:42:35.853611 cs0 AddrBus test pass
529 22:42:35.854016 cs1 AddrBus test pass
530 22:42:35.854406
531 22:42:35.858631 100bdlr_step_size ps== 471
532 22:42:35.859130 result report
533 22:42:35.864307 boot times 0Enable ddr reg access
534 22:42:35.869471 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 22:42:35.883311 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 22:42:36.542150 bl2z: ptr: 05129330, size: 00001e40
537 22:42:36.552222 0.0;M3 CHK:0;cm4_sp_mode 0
538 22:42:36.552584 MVN_1=0x00000000
539 22:42:36.552810 MVN_2=0x00000000
540 22:42:36.563563 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 22:42:36.563879 OPS=0x04
542 22:42:36.564129 ring efuse init
543 22:42:36.566457 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 22:42:36.572149 [0.017355 Inits done]
545 22:42:36.572559 secure task start!
546 22:42:36.572871 high task start!
547 22:42:36.573195 low task start!
548 22:42:36.576389 run into bl31
549 22:42:36.585205 NOTICE: BL31: v1.3(release):4fc40b1
550 22:42:36.592844 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 22:42:36.593162 NOTICE: BL31: G12A normal boot!
552 22:42:36.608457 NOTICE: BL31: BL33 decompress pass
553 22:42:36.613305 ERROR: Error initializing runtime service opteed_fast
554 22:42:37.979580 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 22:42:37.980023 bl2_stage_init 0x01
556 22:42:37.980264 bl2_stage_init 0x81
557 22:42:37.985214 hw id: 0x0000 - pwm id 0x01
558 22:42:37.985544 bl2_stage_init 0xc1
559 22:42:37.985771 bl2_stage_init 0x02
560 22:42:37.985984
561 22:42:37.990797 L0:00000000
562 22:42:37.991262 L1:00000703
563 22:42:37.991621 L2:00008067
564 22:42:37.991959 L3:15000000
565 22:42:37.992333 S1:00000000
566 22:42:37.996443 B2:20282000
567 22:42:37.996893 B1:a0f83180
568 22:42:37.997144
569 22:42:37.997364 TE: 71649
570 22:42:37.997582
571 22:42:38.002037 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 22:42:38.002500
573 22:42:38.002860 Board ID = 1
574 22:42:38.007736 Set cpu clk to 24M
575 22:42:38.008299 Set clk81 to 24M
576 22:42:38.008744 Use GP1_pll as DSU clk.
577 22:42:38.013230 DSU clk: 1200 Mhz
578 22:42:38.013566 CPU clk: 1200 MHz
579 22:42:38.013787 Set clk81 to 166.6M
580 22:42:38.019694 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 22:42:38.024353 board id: 1
582 22:42:38.028938 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 22:42:38.040826 fw parse done
584 22:42:38.046196 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 22:42:38.090000 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 22:42:38.101247 PIEI prepare done
587 22:42:38.101659 fastboot data load
588 22:42:38.101893 fastboot data verify
589 22:42:38.106655 verify result: 266
590 22:42:38.112263 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 22:42:38.112723 LPDDR4 probe
592 22:42:38.113075 ddr clk to 1584MHz
593 22:42:38.120384 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 22:42:38.158222
595 22:42:38.158626 dmc_version 0001
596 22:42:38.164211 Check phy result
597 22:42:38.171149 INFO : End of CA training
598 22:42:38.171741 INFO : End of initialization
599 22:42:38.176748 INFO : Training has run successfully!
600 22:42:38.177137 Check phy result
601 22:42:38.182274 INFO : End of initialization
602 22:42:38.182937 INFO : End of read enable training
603 22:42:38.187906 INFO : End of fine write leveling
604 22:42:38.193492 INFO : End of Write leveling coarse delay
605 22:42:38.193981 INFO : Training has run successfully!
606 22:42:38.194240 Check phy result
607 22:42:38.199043 INFO : End of initialization
608 22:42:38.199551 INFO : End of read dq deskew training
609 22:42:38.204623 INFO : End of MPR read delay center optimization
610 22:42:38.210263 INFO : End of write delay center optimization
611 22:42:38.215838 INFO : End of read delay center optimization
612 22:42:38.216216 INFO : End of max read latency training
613 22:42:38.221502 INFO : Training has run successfully!
614 22:42:38.222218 1D training succeed
615 22:42:38.230641 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 22:42:38.278157 Check phy result
617 22:42:38.278785 INFO : End of initialization
618 22:42:38.306410 INFO : End of 2D read delay Voltage center optimization
619 22:42:38.330563 INFO : End of 2D read delay Voltage center optimization
620 22:42:38.387157 INFO : End of 2D write delay Voltage center optimization
621 22:42:38.441016 INFO : End of 2D write delay Voltage center optimization
622 22:42:38.446544 INFO : Training has run successfully!
623 22:42:38.446811
624 22:42:38.447024 channel==0
625 22:42:38.452173 RxClkDly_Margin_A0==88 ps 9
626 22:42:38.452423 TxDqDly_Margin_A0==98 ps 10
627 22:42:38.457699 RxClkDly_Margin_A1==88 ps 9
628 22:42:38.457943 TxDqDly_Margin_A1==88 ps 9
629 22:42:38.458149 TrainedVREFDQ_A0==74
630 22:42:38.463330 TrainedVREFDQ_A1==76
631 22:42:38.463578 VrefDac_Margin_A0==23
632 22:42:38.463782 DeviceVref_Margin_A0==40
633 22:42:38.468901 VrefDac_Margin_A1==23
634 22:42:38.469159 DeviceVref_Margin_A1==38
635 22:42:38.469365
636 22:42:38.469571
637 22:42:38.469772 channel==1
638 22:42:38.474624 RxClkDly_Margin_A0==78 ps 8
639 22:42:38.475355 TxDqDly_Margin_A0==98 ps 10
640 22:42:38.480177 RxClkDly_Margin_A1==88 ps 9
641 22:42:38.480641 TxDqDly_Margin_A1==88 ps 9
642 22:42:38.485768 TrainedVREFDQ_A0==78
643 22:42:38.486248 TrainedVREFDQ_A1==75
644 22:42:38.486647 VrefDac_Margin_A0==23
645 22:42:38.491292 DeviceVref_Margin_A0==36
646 22:42:38.491725 VrefDac_Margin_A1==22
647 22:42:38.497136 DeviceVref_Margin_A1==39
648 22:42:38.497575
649 22:42:38.497969 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 22:42:38.498360
651 22:42:38.530482 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
652 22:42:38.531033 2D training succeed
653 22:42:38.536167 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 22:42:38.541735 auto size-- 65535DDR cs0 size: 2048MB
655 22:42:38.542176 DDR cs1 size: 2048MB
656 22:42:38.547307 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 22:42:38.547753 cs0 DataBus test pass
658 22:42:38.552989 cs1 DataBus test pass
659 22:42:38.553479 cs0 AddrBus test pass
660 22:42:38.553853 cs1 AddrBus test pass
661 22:42:38.554118
662 22:42:38.558606 100bdlr_step_size ps== 485
663 22:42:38.558943 result report
664 22:42:38.564159 boot times 0Enable ddr reg access
665 22:42:38.569376 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 22:42:38.583121 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 22:42:39.241089 bl2z: ptr: 05129330, size: 00001e40
668 22:42:39.249989 0.0;M3 CHK:0;cm4_sp_mode 0
669 22:42:39.250383 MVN_1=0x00000000
670 22:42:39.250702 MVN_2=0x00000000
671 22:42:39.261708 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 22:42:39.262528 OPS=0x04
673 22:42:39.263152 ring efuse init
674 22:42:39.264378 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 22:42:39.271127 [0.017354 Inits done]
676 22:42:39.271935 secure task start!
677 22:42:39.272584 high task start!
678 22:42:39.273105 low task start!
679 22:42:39.274401 run into bl31
680 22:42:39.283826 NOTICE: BL31: v1.3(release):4fc40b1
681 22:42:39.290835 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 22:42:39.291499 NOTICE: BL31: G12A normal boot!
683 22:42:39.307246 NOTICE: BL31: BL33 decompress pass
684 22:42:39.312026 ERROR: Error initializing runtime service opteed_fast
685 22:42:40.107107
686 22:42:40.107878
687 22:42:40.112505 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 22:42:40.113110
689 22:42:40.116012 Model: Libre Computer AML-S905D3-CC Solitude
690 22:42:40.262958 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 22:42:40.277746 DRAM: 2 GiB (effective 3.8 GiB)
692 22:42:40.379322 Core: 406 devices, 33 uclasses, devicetree: separate
693 22:42:40.385062 WDT: Not starting watchdog@f0d0
694 22:42:40.410251 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 22:42:40.422421 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 22:42:40.426410 ** Bad device specification mmc 0 **
697 22:42:40.437416 Card did not respond to voltage select! : -110
698 22:42:40.445028 ** Bad device specification mmc 0 **
699 22:42:40.445468 Couldn't find partition mmc 0
700 22:42:40.453375 Card did not respond to voltage select! : -110
701 22:42:40.458892 ** Bad device specification mmc 0 **
702 22:42:40.459321 Couldn't find partition mmc 0
703 22:42:40.463942 Error: could not access storage.
704 22:42:40.760464 Net: eth0: ethernet@ff3f0000
705 22:42:40.761107 starting USB...
706 22:42:41.005066 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 22:42:41.005674 Starting the controller
708 22:42:41.011794 USB XHCI 1.10
709 22:42:42.565667 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 22:42:42.573903 scanning usb for storage devices... 0 Storage Device(s) found
712 22:42:42.625553 Hit any key to stop autoboot: 1
713 22:42:42.626830 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 22:42:42.627519 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 22:42:42.627902 Setting prompt string to ['=>']
716 22:42:42.628262 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 22:42:42.639939 0
718 22:42:42.641283 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 22:42:42.742623 => setenv autoload no
721 22:42:42.743437 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 22:42:42.747961 setenv autoload no
724 22:42:42.849724 => setenv initrd_high 0xffffffff
725 22:42:42.850492 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 22:42:42.855246 setenv initrd_high 0xffffffff
728 22:42:42.957001 => setenv fdt_high 0xffffffff
729 22:42:42.958104 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 22:42:42.962188 setenv fdt_high 0xffffffff
732 22:42:43.064105 => dhcp
733 22:42:43.064940 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
734 22:42:43.068284 dhcp
735 22:42:43.574468 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
736 22:42:43.574916 Speed: 1000, full duplex
737 22:42:43.575190 BOOTP broadcast 1
738 22:42:43.823123 BOOTP broadcast 2
739 22:42:44.325786 BOOTP broadcast 3
740 22:42:45.376191 BOOTP broadcast 4
741 22:42:47.326405 BOOTP broadcast 5
742 22:42:47.337735 DHCP client bound to address 192.168.6.12 (3762 ms)
744 22:42:47.439029 => setenv serverip 192.168.6.2
745 22:42:47.439825 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
746 22:42:47.444343 setenv serverip 192.168.6.2
748 22:42:47.545757 => tftpboot 0x01080000 823649/tftp-deploy-w6fhfr3v/kernel/uImage
749 22:42:47.546501 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
750 22:42:47.554769 tftpboot 0x01080000 823649/tftp-deploy-w6fhfr3v/kernel/uImage
751 22:42:47.555224 Speed: 1000, full duplex
752 22:42:47.555446 Using ethernet@ff3f0000 device
753 22:42:47.560428 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 22:42:47.567443 Filename '823649/tftp-deploy-w6fhfr3v/kernel/uImage'.
755 22:42:47.569308 Load address: 0x1080000
756 22:42:51.326276 Loading: *################################################## 43.6 MiB
757 22:42:51.326713 11.6 MiB/s
758 22:42:51.326945 done
759 22:42:51.330642 Bytes transferred = 45713984 (2b98a40 hex)
761 22:42:51.431805 => tftpboot 0x08000000 823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
762 22:42:51.432702 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
763 22:42:51.439229 tftpboot 0x08000000 823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot
764 22:42:51.439586 Speed: 1000, full duplex
765 22:42:51.439814 Using ethernet@ff3f0000 device
766 22:42:51.444723 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
767 22:42:51.454467 Filename '823649/tftp-deploy-w6fhfr3v/ramdisk/ramdisk.cpio.gz.uboot'.
768 22:42:51.455050 Load address: 0x8000000
769 22:42:53.508217 Loading: *######### UDP wrong checksum 00000005 0000f50b
770 22:43:02.212754 T ######################################## UDP wrong checksum 0000000f 0000f9e0
771 22:43:02.735120 UDP wrong checksum 000000ff 00002e0f
772 22:43:02.814500 UDP wrong checksum 000000ff 0000b701
773 22:43:07.212959 T UDP wrong checksum 0000000f 0000f9e0
774 22:43:13.815306 T UDP wrong checksum 000000ff 00009b5a
775 22:43:13.834225 UDP wrong checksum 000000ff 0000384d
776 22:43:17.215149 T UDP wrong checksum 0000000f 0000f9e0
777 22:43:34.807134 T T T UDP wrong checksum 000000ff 00005b3f
778 22:43:34.829504 UDP wrong checksum 000000ff 0000f131
779 22:43:37.218529 T UDP wrong checksum 0000000f 0000f9e0
780 22:43:52.223096 T T
781 22:43:52.223718 Retry count exceeded; starting again
783 22:43:52.225220 end: 2.4.3 bootloader-commands (duration 00:01:10) [common]
786 22:43:52.227112 end: 2.4 uboot-commands (duration 00:01:28) [common]
788 22:43:52.228594 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
790 22:43:52.229636 end: 2 uboot-action (duration 00:01:28) [common]
792 22:43:52.231166 Cleaning after the job
793 22:43:52.231711 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/ramdisk
794 22:43:52.233296 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/kernel
795 22:43:52.241047 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/dtb
796 22:43:52.242291 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/823649/tftp-deploy-w6fhfr3v/modules
797 22:43:52.248608 start: 4.1 power-off (timeout 00:00:30) [common]
798 22:43:52.249633 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
799 22:43:52.285074 >> OK - accepted request
800 22:43:52.287056 Returned 0 in 0 seconds
801 22:43:52.388037 end: 4.1 power-off (duration 00:00:00) [common]
803 22:43:52.389791 start: 4.2 read-feedback (timeout 00:10:00) [common]
804 22:43:52.390925 Listened to connection for namespace 'common' for up to 1s
805 22:43:53.391646 Finalising connection for namespace 'common'
806 22:43:53.392156 Disconnecting from shell: Finalise
807 22:43:53.392460 =>
808 22:43:53.493144 end: 4.2 read-feedback (duration 00:00:01) [common]
809 22:43:53.493649 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/823649
810 22:43:54.122898 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/823649
811 22:43:54.123488 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.