Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:41:43.644380 lava-dispatcher, installed at version: 2024.01
2 01:41:43.645191 start: 0 validate
3 01:41:43.645674 Start time: 2024-10-10 01:41:43.645642+00:00 (UTC)
4 01:41:43.646214 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:41:43.646744 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fbuildroot%2Fbuildroot-baseline%2F20230703.0%2Farm64%2Frootfs.cpio.gz exists
6 01:41:43.684356 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:41:43.684915 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-74-gd3d1556696c1a%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:41:43.718861 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:41:43.719520 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-74-gd3d1556696c1a%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:41:44.764602 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:41:44.765091 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc2-74-gd3d1556696c1a%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
12 01:41:44.802941 validate duration: 1.16
14 01:41:44.803812 start: 1 tftp-deploy (timeout 00:10:00) [common]
15 01:41:44.804171 start: 1.1 download-retry (timeout 00:10:00) [common]
16 01:41:44.804486 start: 1.1.1 http-download (timeout 00:10:00) [common]
17 01:41:44.805086 Not decompressing ramdisk as can be used compressed.
18 01:41:44.805514 downloading http://storage.kernelci.org/images/rootfs/buildroot/buildroot-baseline/20230703.0/arm64/rootfs.cpio.gz
19 01:41:44.805784 saving as /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/ramdisk/rootfs.cpio.gz
20 01:41:44.806056 total size: 8181887 (7 MB)
21 01:41:44.844484 progress 0 % (0 MB)
22 01:41:44.856225 progress 5 % (0 MB)
23 01:41:44.867168 progress 10 % (0 MB)
24 01:41:44.875273 progress 15 % (1 MB)
25 01:41:44.880550 progress 20 % (1 MB)
26 01:41:44.886158 progress 25 % (1 MB)
27 01:41:44.891340 progress 30 % (2 MB)
28 01:41:44.897002 progress 35 % (2 MB)
29 01:41:44.902250 progress 40 % (3 MB)
30 01:41:44.907876 progress 45 % (3 MB)
31 01:41:44.913129 progress 50 % (3 MB)
32 01:41:44.918731 progress 55 % (4 MB)
33 01:41:44.923901 progress 60 % (4 MB)
34 01:41:44.929556 progress 65 % (5 MB)
35 01:41:44.934712 progress 70 % (5 MB)
36 01:41:44.940248 progress 75 % (5 MB)
37 01:41:44.945422 progress 80 % (6 MB)
38 01:41:44.951000 progress 85 % (6 MB)
39 01:41:44.956258 progress 90 % (7 MB)
40 01:41:44.961450 progress 95 % (7 MB)
41 01:41:44.966169 progress 100 % (7 MB)
42 01:41:44.966803 7 MB downloaded in 0.16 s (48.55 MB/s)
43 01:41:44.967359 end: 1.1.1 http-download (duration 00:00:00) [common]
45 01:41:44.968288 end: 1.1 download-retry (duration 00:00:00) [common]
46 01:41:44.968600 start: 1.2 download-retry (timeout 00:10:00) [common]
47 01:41:44.968884 start: 1.2.1 http-download (timeout 00:10:00) [common]
48 01:41:44.969366 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-74-gd3d1556696c1a/arm64/defconfig/gcc-12/kernel/Image
49 01:41:44.969612 saving as /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/kernel/Image
50 01:41:44.969826 total size: 45713920 (43 MB)
51 01:41:44.970042 No compression specified
52 01:41:45.002510 progress 0 % (0 MB)
53 01:41:45.030769 progress 5 % (2 MB)
54 01:41:45.061543 progress 10 % (4 MB)
55 01:41:45.091779 progress 15 % (6 MB)
56 01:41:45.119225 progress 20 % (8 MB)
57 01:41:45.146249 progress 25 % (10 MB)
58 01:41:45.173660 progress 30 % (13 MB)
59 01:41:45.200953 progress 35 % (15 MB)
60 01:41:45.228380 progress 40 % (17 MB)
61 01:41:45.255365 progress 45 % (19 MB)
62 01:41:45.282922 progress 50 % (21 MB)
63 01:41:45.310728 progress 55 % (24 MB)
64 01:41:45.338398 progress 60 % (26 MB)
65 01:41:45.365727 progress 65 % (28 MB)
66 01:41:45.393261 progress 70 % (30 MB)
67 01:41:45.421003 progress 75 % (32 MB)
68 01:41:45.448591 progress 80 % (34 MB)
69 01:41:45.475492 progress 85 % (37 MB)
70 01:41:45.503044 progress 90 % (39 MB)
71 01:41:45.530392 progress 95 % (41 MB)
72 01:41:45.557071 progress 100 % (43 MB)
73 01:41:45.557598 43 MB downloaded in 0.59 s (74.17 MB/s)
74 01:41:45.558087 end: 1.2.1 http-download (duration 00:00:01) [common]
76 01:41:45.558908 end: 1.2 download-retry (duration 00:00:01) [common]
77 01:41:45.559185 start: 1.3 download-retry (timeout 00:09:59) [common]
78 01:41:45.559445 start: 1.3.1 http-download (timeout 00:09:59) [common]
79 01:41:45.559911 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-74-gd3d1556696c1a/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
80 01:41:45.560219 saving as /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/dtb/meson-sm1-s905d3-libretech-cc.dtb
81 01:41:45.560431 total size: 53209 (0 MB)
82 01:41:45.560639 No compression specified
83 01:41:45.599449 progress 61 % (0 MB)
84 01:41:45.600312 progress 100 % (0 MB)
85 01:41:45.600858 0 MB downloaded in 0.04 s (1.26 MB/s)
86 01:41:45.601346 end: 1.3.1 http-download (duration 00:00:00) [common]
88 01:41:45.602153 end: 1.3 download-retry (duration 00:00:00) [common]
89 01:41:45.602414 start: 1.4 download-retry (timeout 00:09:59) [common]
90 01:41:45.602675 start: 1.4.1 http-download (timeout 00:09:59) [common]
91 01:41:45.603126 downloading http://storage.kernelci.org/mainline/master/v6.12-rc2-74-gd3d1556696c1a/arm64/defconfig/gcc-12/modules.tar.xz
92 01:41:45.603376 saving as /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/modules/modules.tar
93 01:41:45.603580 total size: 11595820 (11 MB)
94 01:41:45.603788 Using unxz to decompress xz
95 01:41:45.640719 progress 0 % (0 MB)
96 01:41:45.706774 progress 5 % (0 MB)
97 01:41:45.780447 progress 10 % (1 MB)
98 01:41:45.859334 progress 15 % (1 MB)
99 01:41:45.934116 progress 20 % (2 MB)
100 01:41:46.008915 progress 25 % (2 MB)
101 01:41:46.086445 progress 30 % (3 MB)
102 01:41:46.157598 progress 35 % (3 MB)
103 01:41:46.235370 progress 40 % (4 MB)
104 01:41:46.318898 progress 45 % (5 MB)
105 01:41:46.393881 progress 50 % (5 MB)
106 01:41:46.475223 progress 55 % (6 MB)
107 01:41:46.554684 progress 60 % (6 MB)
108 01:41:46.637168 progress 65 % (7 MB)
109 01:41:46.711938 progress 70 % (7 MB)
110 01:41:46.792400 progress 75 % (8 MB)
111 01:41:46.873348 progress 80 % (8 MB)
112 01:41:46.947944 progress 85 % (9 MB)
113 01:41:47.019176 progress 90 % (9 MB)
114 01:41:47.117296 progress 95 % (10 MB)
115 01:41:47.207756 progress 100 % (11 MB)
116 01:41:47.221801 11 MB downloaded in 1.62 s (6.83 MB/s)
117 01:41:47.222365 end: 1.4.1 http-download (duration 00:00:02) [common]
119 01:41:47.223220 end: 1.4 download-retry (duration 00:00:02) [common]
120 01:41:47.223491 start: 1.5 prepare-tftp-overlay (timeout 00:09:58) [common]
121 01:41:47.223757 start: 1.5.1 extract-nfsrootfs (timeout 00:09:58) [common]
122 01:41:47.224230 end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
123 01:41:47.225107 start: 1.5.2 lava-overlay (timeout 00:09:58) [common]
124 01:41:47.226391 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx
125 01:41:47.227479 makedir: /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin
126 01:41:47.228399 makedir: /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/tests
127 01:41:47.229204 makedir: /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/results
128 01:41:47.229991 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-add-keys
129 01:41:47.231208 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-add-sources
130 01:41:47.232617 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-background-process-start
131 01:41:47.233871 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-background-process-stop
132 01:41:47.235104 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-common-functions
133 01:41:47.236314 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-echo-ipv4
134 01:41:47.237476 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-install-packages
135 01:41:47.238611 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-installed-packages
136 01:41:47.239722 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-os-build
137 01:41:47.240911 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-probe-channel
138 01:41:47.242051 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-probe-ip
139 01:41:47.243186 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-target-ip
140 01:41:47.244349 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-target-mac
141 01:41:47.245506 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-target-storage
142 01:41:47.246654 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-case
143 01:41:47.247792 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-event
144 01:41:47.248963 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-feedback
145 01:41:47.250105 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-raise
146 01:41:47.251228 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-reference
147 01:41:47.252396 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-runner
148 01:41:47.253556 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-set
149 01:41:47.254667 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-test-shell
150 01:41:47.255814 Updating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-install-packages (oe)
151 01:41:47.257112 Updating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/bin/lava-installed-packages (oe)
152 01:41:47.258165 Creating /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/environment
153 01:41:47.259064 LAVA metadata
154 01:41:47.259692 - LAVA_JOB_ID=830684
155 01:41:47.260291 - LAVA_DISPATCHER_IP=192.168.6.2
156 01:41:47.261125 start: 1.5.2.1 ssh-authorize (timeout 00:09:58) [common]
157 01:41:47.263446 end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
158 01:41:47.264200 start: 1.5.2.2 lava-vland-overlay (timeout 00:09:58) [common]
159 01:41:47.264484 skipped lava-vland-overlay
160 01:41:47.264787 end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
161 01:41:47.265120 start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:58) [common]
162 01:41:47.265397 skipped lava-multinode-overlay
163 01:41:47.265697 end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
164 01:41:47.266015 start: 1.5.2.4 test-definition (timeout 00:09:58) [common]
165 01:41:47.266318 Loading test definitions
166 01:41:47.266660 start: 1.5.2.4.1 inline-repo-action (timeout 00:09:58) [common]
167 01:41:47.266941 Using /lava-830684 at stage 0
168 01:41:47.268383 uuid=830684_1.5.2.4.1 testdef=None
169 01:41:47.268781 end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
170 01:41:47.269115 start: 1.5.2.4.2 test-overlay (timeout 00:09:58) [common]
171 01:41:47.271286 end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
173 01:41:47.272320 start: 1.5.2.4.3 test-install-overlay (timeout 00:09:58) [common]
174 01:41:47.275052 end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
176 01:41:47.276131 start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:58) [common]
177 01:41:47.278778 runner path: /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/0/tests/0_dmesg test_uuid 830684_1.5.2.4.1
178 01:41:47.279470 end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
180 01:41:47.280458 Creating lava-test-runner.conf files
181 01:41:47.280710 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/830684/lava-overlay-1b8sedfx/lava-830684/0 for stage 0
182 01:41:47.281112 - 0_dmesg
183 01:41:47.281553 end: 1.5.2.4 test-definition (duration 00:00:00) [common]
184 01:41:47.281901 start: 1.5.2.5 compress-overlay (timeout 00:09:58) [common]
185 01:41:47.310414 end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
186 01:41:47.310886 start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
187 01:41:47.311215 end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
188 01:41:47.311544 end: 1.5.2 lava-overlay (duration 00:00:00) [common]
189 01:41:47.311867 start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
190 01:41:48.231084 end: 1.5.3 extract-overlay-ramdisk (duration 00:00:01) [common]
191 01:41:48.231528 start: 1.5.4 extract-modules (timeout 00:09:57) [common]
192 01:41:48.231815 extracting modules file /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/modules/modules.tar to /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk
193 01:41:49.590920 end: 1.5.4 extract-modules (duration 00:00:01) [common]
194 01:41:49.591449 start: 1.5.5 apply-overlay-tftp (timeout 00:09:55) [common]
195 01:41:49.591758 [common] Applying overlay /var/lib/lava/dispatcher/tmp/830684/compress-overlay-hbo4sgn3/overlay-1.5.2.5.tar.gz to ramdisk
196 01:41:49.592013 [common] Applying overlay /var/lib/lava/dispatcher/tmp/830684/compress-overlay-hbo4sgn3/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk
197 01:41:49.623851 end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
198 01:41:49.624347 start: 1.5.6 prepare-kernel (timeout 00:09:55) [common]
199 01:41:49.624623 start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:55) [common]
200 01:41:49.624854 Converting downloaded kernel to a uImage
201 01:41:49.625179 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/kernel/Image /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/kernel/uImage
202 01:41:50.099097 output: Image Name:
203 01:41:50.099518 output: Created: Thu Oct 10 01:41:49 2024
204 01:41:50.099729 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
205 01:41:50.099936 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
206 01:41:50.100176 output: Load Address: 01080000
207 01:41:50.100378 output: Entry Point: 01080000
208 01:41:50.100575 output:
209 01:41:50.100908 end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
210 01:41:50.101170 end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
211 01:41:50.101440 start: 1.5.7 configure-preseed-file (timeout 00:09:55) [common]
212 01:41:50.101692 end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
213 01:41:50.101946 start: 1.5.8 compress-ramdisk (timeout 00:09:55) [common]
214 01:41:50.102200 Building ramdisk /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk
215 01:41:52.438953 >> 181557 blocks
216 01:42:00.853701 Adding RAMdisk u-boot header.
217 01:42:00.854138 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk.cpio.gz.uboot
218 01:42:01.181671 output: Image Name:
219 01:42:01.182094 output: Created: Thu Oct 10 01:42:00 2024
220 01:42:01.182303 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
221 01:42:01.182507 output: Data Size: 26053525 Bytes = 25442.90 KiB = 24.85 MiB
222 01:42:01.182708 output: Load Address: 00000000
223 01:42:01.182907 output: Entry Point: 00000000
224 01:42:01.183107 output:
225 01:42:01.183750 rename /var/lib/lava/dispatcher/tmp/830684/extract-overlay-ramdisk-hhqc7cxh/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
226 01:42:01.184328 end: 1.5.8 compress-ramdisk (duration 00:00:11) [common]
227 01:42:01.184881 end: 1.5 prepare-tftp-overlay (duration 00:00:14) [common]
228 01:42:01.185404 start: 1.6 lxc-create-udev-rule-action (timeout 00:09:44) [common]
229 01:42:01.185859 No LXC device requested
230 01:42:01.186355 end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
231 01:42:01.186857 start: 1.7 deploy-device-env (timeout 00:09:44) [common]
232 01:42:01.187343 end: 1.7 deploy-device-env (duration 00:00:00) [common]
233 01:42:01.187752 Checking files for TFTP limit of 4294967296 bytes.
234 01:42:01.190494 end: 1 tftp-deploy (duration 00:00:16) [common]
235 01:42:01.191118 start: 2 uboot-action (timeout 00:05:00) [common]
236 01:42:01.191642 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
237 01:42:01.192174 end: 2.1 uboot-from-media (duration 00:00:00) [common]
238 01:42:01.192685 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
239 01:42:01.193225 Using kernel file from prepare-kernel: 830684/tftp-deploy-63yj80lb/kernel/uImage
240 01:42:01.193848 substitutions:
241 01:42:01.194257 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
242 01:42:01.194658 - {DTB_ADDR}: 0x01070000
243 01:42:01.195051 - {DTB}: 830684/tftp-deploy-63yj80lb/dtb/meson-sm1-s905d3-libretech-cc.dtb
244 01:42:01.195449 - {INITRD}: 830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
245 01:42:01.195841 - {KERNEL_ADDR}: 0x01080000
246 01:42:01.196291 - {KERNEL}: 830684/tftp-deploy-63yj80lb/kernel/uImage
247 01:42:01.196690 - {LAVA_MAC}: None
248 01:42:01.197119 - {PRESEED_CONFIG}: None
249 01:42:01.197512 - {PRESEED_LOCAL}: None
250 01:42:01.197899 - {RAMDISK_ADDR}: 0x08000000
251 01:42:01.198285 - {RAMDISK}: 830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
252 01:42:01.198676 - {ROOT_PART}: None
253 01:42:01.199065 - {ROOT}: None
254 01:42:01.199450 - {SERVER_IP}: 192.168.6.2
255 01:42:01.199845 - {TEE_ADDR}: 0x83000000
256 01:42:01.200266 - {TEE}: None
257 01:42:01.200659 Parsed boot commands:
258 01:42:01.201037 - setenv autoload no
259 01:42:01.201423 - setenv initrd_high 0xffffffff
260 01:42:01.201810 - setenv fdt_high 0xffffffff
261 01:42:01.202199 - dhcp
262 01:42:01.202587 - setenv serverip 192.168.6.2
263 01:42:01.202972 - tftpboot 0x01080000 830684/tftp-deploy-63yj80lb/kernel/uImage
264 01:42:01.203362 - tftpboot 0x08000000 830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
265 01:42:01.203753 - tftpboot 0x01070000 830684/tftp-deploy-63yj80lb/dtb/meson-sm1-s905d3-libretech-cc.dtb
266 01:42:01.204175 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
267 01:42:01.204578 - bootm 0x01080000 0x08000000 0x01070000
268 01:42:01.205090 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
270 01:42:01.206580 start: 2.3 connect-device (timeout 00:05:00) [common]
271 01:42:01.207030 [common] connect-device Connecting to device using 'telnet conserv1 3008'
272 01:42:01.221397 Setting prompt string to ['lava-test: # ']
273 01:42:01.222938 end: 2.3 connect-device (duration 00:00:00) [common]
274 01:42:01.223540 start: 2.4 uboot-commands (timeout 00:05:00) [common]
275 01:42:01.224115 start: 2.4.1 reset-device (timeout 00:05:00) [common]
276 01:42:01.224641 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
277 01:42:01.225811 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
278 01:42:01.264921 >> OK - accepted request
279 01:42:01.267085 Returned 0 in 0 seconds
280 01:42:01.368215 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
282 01:42:01.369803 end: 2.4.1 reset-device (duration 00:00:00) [common]
283 01:42:01.370363 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
284 01:42:01.370860 Setting prompt string to ['Hit any key to stop autoboot']
285 01:42:01.371308 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
286 01:42:01.372917 Trying 192.168.56.21...
287 01:42:01.373396 Connected to conserv1.
288 01:42:01.373801 Escape character is '^]'.
289 01:42:01.374223
290 01:42:01.374649 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
291 01:42:01.375077
292 01:42:08.961485 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
293 01:42:08.962108 bl2_stage_init 0x01
294 01:42:08.962561 bl2_stage_init 0x81
295 01:42:08.967155 hw id: 0x0000 - pwm id 0x01
296 01:42:08.967780 bl2_stage_init 0xc1
297 01:42:08.972746 bl2_stage_init 0x02
298 01:42:08.973339
299 01:42:08.973882 L0:00000000
300 01:42:08.974416 L1:00000703
301 01:42:08.974936 L2:00008067
302 01:42:08.975451 L3:15000000
303 01:42:08.978278 S1:00000000
304 01:42:08.978833 B2:20282000
305 01:42:08.979362 B1:a0f83180
306 01:42:08.979875
307 01:42:08.980446 TE: 70709
308 01:42:08.980982
309 01:42:08.983742 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
310 01:42:08.984337
311 01:42:08.989361 Board ID = 1
312 01:42:08.989945 Set cpu clk to 24M
313 01:42:08.990481 Set clk81 to 24M
314 01:42:08.994908 Use GP1_pll as DSU clk.
315 01:42:08.995473 DSU clk: 1200 Mhz
316 01:42:08.996027 CPU clk: 1200 MHz
317 01:42:09.000579 Set clk81 to 166.6M
318 01:42:09.006230 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
319 01:42:09.006789 board id: 1
320 01:42:09.013358 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
321 01:42:09.024020 fw parse done
322 01:42:09.030013 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
323 01:42:09.072620 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
324 01:42:09.083596 PIEI prepare done
325 01:42:09.084215 fastboot data load
326 01:42:09.084764 fastboot data verify
327 01:42:09.089065 verify result: 266
328 01:42:09.094684 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
329 01:42:09.095243 LPDDR4 probe
330 01:42:09.095776 ddr clk to 1584MHz
331 01:42:09.102652 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
332 01:42:09.140017
333 01:42:09.140639 dmc_version 0001
334 01:42:09.146636 Check phy result
335 01:42:09.152568 INFO : End of CA training
336 01:42:09.153136 INFO : End of initialization
337 01:42:09.158154 INFO : Training has run successfully!
338 01:42:09.158713 Check phy result
339 01:42:09.163779 INFO : End of initialization
340 01:42:09.164361 INFO : End of read enable training
341 01:42:09.169323 INFO : End of fine write leveling
342 01:42:09.174913 INFO : End of Write leveling coarse delay
343 01:42:09.175466 INFO : Training has run successfully!
344 01:42:09.176013 Check phy result
345 01:42:09.180562 INFO : End of initialization
346 01:42:09.181116 INFO : End of read dq deskew training
347 01:42:09.186171 INFO : End of MPR read delay center optimization
348 01:42:09.191748 INFO : End of write delay center optimization
349 01:42:09.197304 INFO : End of read delay center optimization
350 01:42:09.197857 INFO : End of max read latency training
351 01:42:09.202959 INFO : Training has run successfully!
352 01:42:09.203532 1D training succeed
353 01:42:09.212148 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
354 01:42:09.260654 Check phy result
355 01:42:09.261256 INFO : End of initialization
356 01:42:09.282075 INFO : End of 2D read delay Voltage center optimization
357 01:42:09.300359 INFO : End of 2D read delay Voltage center optimization
358 01:42:09.353175 INFO : End of 2D write delay Voltage center optimization
359 01:42:09.402424 INFO : End of 2D write delay Voltage center optimization
360 01:42:09.408133 INFO : Training has run successfully!
361 01:42:09.408662
362 01:42:09.409133 channel==0
363 01:42:09.413647 RxClkDly_Margin_A0==88 ps 9
364 01:42:09.414173 TxDqDly_Margin_A0==98 ps 10
365 01:42:09.419137 RxClkDly_Margin_A1==88 ps 9
366 01:42:09.419678 TxDqDly_Margin_A1==88 ps 9
367 01:42:09.420200 TrainedVREFDQ_A0==74
368 01:42:09.424831 TrainedVREFDQ_A1==74
369 01:42:09.425367 VrefDac_Margin_A0==23
370 01:42:09.425831 DeviceVref_Margin_A0==40
371 01:42:09.430364 VrefDac_Margin_A1==23
372 01:42:09.430892 DeviceVref_Margin_A1==40
373 01:42:09.431365
374 01:42:09.431821
375 01:42:09.432309 channel==1
376 01:42:09.436095 RxClkDly_Margin_A0==78 ps 8
377 01:42:09.436625 TxDqDly_Margin_A0==98 ps 10
378 01:42:09.441546 RxClkDly_Margin_A1==78 ps 8
379 01:42:09.442077 TxDqDly_Margin_A1==88 ps 9
380 01:42:09.447176 TrainedVREFDQ_A0==78
381 01:42:09.447700 TrainedVREFDQ_A1==77
382 01:42:09.448204 VrefDac_Margin_A0==23
383 01:42:09.452815 DeviceVref_Margin_A0==36
384 01:42:09.453337 VrefDac_Margin_A1==20
385 01:42:09.458376 DeviceVref_Margin_A1==37
386 01:42:09.458898
387 01:42:09.459363 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
388 01:42:09.459815
389 01:42:09.491815 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000016 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
390 01:42:09.492467 2D training succeed
391 01:42:09.497454 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
392 01:42:09.503020 auto size-- 65535DDR cs0 size: 2048MB
393 01:42:09.503555 DDR cs1 size: 2048MB
394 01:42:09.508645 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
395 01:42:09.509172 cs0 DataBus test pass
396 01:42:09.514277 cs1 DataBus test pass
397 01:42:09.514803 cs0 AddrBus test pass
398 01:42:09.515261 cs1 AddrBus test pass
399 01:42:09.515704
400 01:42:09.519854 100bdlr_step_size ps== 478
401 01:42:09.520440 result report
402 01:42:09.525453 boot times 0Enable ddr reg access
403 01:42:09.530705 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
404 01:42:09.544468 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
405 01:42:10.199333 bl2z: ptr: 05129330, size: 00001e40
406 01:42:10.205308 0.0;M3 CHK:0;cm4_sp_mode 0
407 01:42:10.205893 MVN_1=0x00000000
408 01:42:10.206372 MVN_2=0x00000000
409 01:42:10.216767 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
410 01:42:10.217291 OPS=0x04
411 01:42:10.217763 ring efuse init
412 01:42:10.222424 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
413 01:42:10.222941 [0.017319 Inits done]
414 01:42:10.223401 secure task start!
415 01:42:10.229715 high task start!
416 01:42:10.230220 low task start!
417 01:42:10.230677 run into bl31
418 01:42:10.238210 NOTICE: BL31: v1.3(release):4fc40b1
419 01:42:10.246024 NOTICE: BL31: Built : 15:57:33, May 22 2019
420 01:42:10.246633 NOTICE: BL31: G12A normal boot!
421 01:42:10.261656 NOTICE: BL31: BL33 decompress pass
422 01:42:10.267182 ERROR: Error initializing runtime service opteed_fast
423 01:42:13.011705 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
424 01:42:13.012410 bl2_stage_init 0x01
425 01:42:13.012911 bl2_stage_init 0x81
426 01:42:13.017417 hw id: 0x0000 - pwm id 0x01
427 01:42:13.017983 bl2_stage_init 0xc1
428 01:42:13.018469 bl2_stage_init 0x02
429 01:42:13.018938
430 01:42:13.022983 L0:00000000
431 01:42:13.023575 L1:00000703
432 01:42:13.024055 L2:00008067
433 01:42:13.024495 L3:15000000
434 01:42:13.024922 S1:00000000
435 01:42:13.028541 B2:20282000
436 01:42:13.029099 B1:a0f83180
437 01:42:13.029537
438 01:42:13.029971 TE: 69032
439 01:42:13.030404
440 01:42:13.034197 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
441 01:42:13.034746
442 01:42:13.039829 Board ID = 1
443 01:42:13.040436 Set cpu clk to 24M
444 01:42:13.040878 Set clk81 to 24M
445 01:42:13.045476 Use GP1_pll as DSU clk.
446 01:42:13.046038 DSU clk: 1200 Mhz
447 01:42:13.046473 CPU clk: 1200 MHz
448 01:42:13.046900 Set clk81 to 166.6M
449 01:42:13.056528 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
450 01:42:13.057140 board id: 1
451 01:42:13.063001 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
452 01:42:13.073680 fw parse done
453 01:42:13.079173 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
454 01:42:13.122225 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
455 01:42:13.133226 PIEI prepare done
456 01:42:13.133817 fastboot data load
457 01:42:13.134262 fastboot data verify
458 01:42:13.138693 verify result: 266
459 01:42:13.144401 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
460 01:42:13.144947 LPDDR4 probe
461 01:42:13.145387 ddr clk to 1584MHz
462 01:42:13.152363 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
463 01:42:13.189542
464 01:42:13.190089 dmc_version 0001
465 01:42:13.196301 Check phy result
466 01:42:13.202182 INFO : End of CA training
467 01:42:13.202691 INFO : End of initialization
468 01:42:13.207833 INFO : Training has run successfully!
469 01:42:13.208458 Check phy result
470 01:42:13.213378 INFO : End of initialization
471 01:42:13.213914 INFO : End of read enable training
472 01:42:13.218987 INFO : End of fine write leveling
473 01:42:13.224593 INFO : End of Write leveling coarse delay
474 01:42:13.225113 INFO : Training has run successfully!
475 01:42:13.225569 Check phy result
476 01:42:13.230151 INFO : End of initialization
477 01:42:13.230714 INFO : End of read dq deskew training
478 01:42:13.235842 INFO : End of MPR read delay center optimization
479 01:42:13.241421 INFO : End of write delay center optimization
480 01:42:13.246990 INFO : End of read delay center optimization
481 01:42:13.247545 INFO : End of max read latency training
482 01:42:13.252595 INFO : Training has run successfully!
483 01:42:13.253167 1D training succeed
484 01:42:13.261710 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
485 01:42:13.308454 Check phy result
486 01:42:13.309028 INFO : End of initialization
487 01:42:13.331729 INFO : End of 2D read delay Voltage center optimization
488 01:42:13.350930 INFO : End of 2D read delay Voltage center optimization
489 01:42:13.402769 INFO : End of 2D write delay Voltage center optimization
490 01:42:13.452033 INFO : End of 2D write delay Voltage center optimization
491 01:42:13.457625 INFO : Training has run successfully!
492 01:42:13.458162
493 01:42:13.458627 channel==0
494 01:42:13.463236 RxClkDly_Margin_A0==88 ps 9
495 01:42:13.463753 TxDqDly_Margin_A0==98 ps 10
496 01:42:13.468773 RxClkDly_Margin_A1==88 ps 9
497 01:42:13.469290 TxDqDly_Margin_A1==88 ps 9
498 01:42:13.469743 TrainedVREFDQ_A0==74
499 01:42:13.474343 TrainedVREFDQ_A1==74
500 01:42:13.474866 VrefDac_Margin_A0==24
501 01:42:13.475324 DeviceVref_Margin_A0==40
502 01:42:13.479969 VrefDac_Margin_A1==23
503 01:42:13.480518 DeviceVref_Margin_A1==40
504 01:42:13.480977
505 01:42:13.481428
506 01:42:13.481872 channel==1
507 01:42:13.485552 RxClkDly_Margin_A0==78 ps 8
508 01:42:13.486071 TxDqDly_Margin_A0==88 ps 9
509 01:42:13.491241 RxClkDly_Margin_A1==78 ps 8
510 01:42:13.491763 TxDqDly_Margin_A1==98 ps 10
511 01:42:13.496738 TrainedVREFDQ_A0==75
512 01:42:13.497256 TrainedVREFDQ_A1==78
513 01:42:13.497714 VrefDac_Margin_A0==22
514 01:42:13.502368 DeviceVref_Margin_A0==39
515 01:42:13.502885 VrefDac_Margin_A1==22
516 01:42:13.507971 DeviceVref_Margin_A1==36
517 01:42:13.508518
518 01:42:13.508975 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
519 01:42:13.509420
520 01:42:13.541511 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000016 00000017 00000019 00000019 00000018 00000019 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
521 01:42:13.542071 2D training succeed
522 01:42:13.547234 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
523 01:42:13.552801 auto size-- 65535DDR cs0 size: 2048MB
524 01:42:13.553246 DDR cs1 size: 2048MB
525 01:42:13.558272 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
526 01:42:13.558645 cs0 DataBus test pass
527 01:42:13.563971 cs1 DataBus test pass
528 01:42:13.564558 cs0 AddrBus test pass
529 01:42:13.565017 cs1 AddrBus test pass
530 01:42:13.565463
531 01:42:13.569601 100bdlr_step_size ps== 478
532 01:42:13.570145 result report
533 01:42:13.575239 boot times 0Enable ddr reg access
534 01:42:13.581174 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
535 01:42:13.594129 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
536 01:42:14.249857 bl2z: ptr: 05129330, size: 00001e40
537 01:42:14.255505 0.0;M3 CHK:0;cm4_sp_mode 0
538 01:42:14.256115 MVN_1=0x00000000
539 01:42:14.256590 MVN_2=0x00000000
540 01:42:14.261081 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
541 01:42:14.261645 OPS=0x04
542 01:42:14.267099 ring efuse init
543 01:42:14.272627 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
544 01:42:14.273190 [0.017319 Inits done]
545 01:42:14.273656 secure task start!
546 01:42:14.279329 high task start!
547 01:42:14.279888 low task start!
548 01:42:14.280397 run into bl31
549 01:42:14.287974 NOTICE: BL31: v1.3(release):4fc40b1
550 01:42:14.295746 NOTICE: BL31: Built : 15:57:33, May 22 2019
551 01:42:14.296337 NOTICE: BL31: G12A normal boot!
552 01:42:14.311351 NOTICE: BL31: BL33 decompress pass
553 01:42:14.316955 ERROR: Error initializing runtime service opteed_fast
554 01:42:15.710881 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
555 01:42:15.711508 bl2_stage_init 0x01
556 01:42:15.711967 bl2_stage_init 0x81
557 01:42:15.716266 hw id: 0x0000 - pwm id 0x01
558 01:42:15.716770 bl2_stage_init 0xc1
559 01:42:15.717216 bl2_stage_init 0x02
560 01:42:15.717649
561 01:42:15.721834 L0:00000000
562 01:42:15.722324 L1:00000703
563 01:42:15.722761 L2:00008067
564 01:42:15.723194 L3:15000000
565 01:42:15.723621 S1:00000000
566 01:42:15.727317 B2:20282000
567 01:42:15.727796 B1:a0f83180
568 01:42:15.728271
569 01:42:15.728710 TE: 68850
570 01:42:15.729144
571 01:42:15.732994 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
572 01:42:15.733635
573 01:42:15.738722 Board ID = 1
574 01:42:15.739338 Set cpu clk to 24M
575 01:42:15.739809 Set clk81 to 24M
576 01:42:15.744349 Use GP1_pll as DSU clk.
577 01:42:15.744984 DSU clk: 1200 Mhz
578 01:42:15.745458 CPU clk: 1200 MHz
579 01:42:15.745913 Set clk81 to 166.6M
580 01:42:15.755380 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
581 01:42:15.756023 board id: 1
582 01:42:15.761809 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
583 01:42:15.772598 fw parse done
584 01:42:15.778372 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
585 01:42:15.820914 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
586 01:42:15.831872 PIEI prepare done
587 01:42:15.832406 fastboot data load
588 01:42:15.832857 fastboot data verify
589 01:42:15.837473 verify result: 266
590 01:42:15.843035 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
591 01:42:15.843521 LPDDR4 probe
592 01:42:15.843959 ddr clk to 1584MHz
593 01:42:15.850980 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
594 01:42:15.888292
595 01:42:15.888653 dmc_version 0001
596 01:42:15.894906 Check phy result
597 01:42:15.900805 INFO : End of CA training
598 01:42:15.901066 INFO : End of initialization
599 01:42:15.906515 INFO : Training has run successfully!
600 01:42:15.907533 Check phy result
601 01:42:15.912151 INFO : End of initialization
602 01:42:15.912724 INFO : End of read enable training
603 01:42:15.917639 INFO : End of fine write leveling
604 01:42:15.923275 INFO : End of Write leveling coarse delay
605 01:42:15.923727 INFO : Training has run successfully!
606 01:42:15.924270 Check phy result
607 01:42:15.928852 INFO : End of initialization
608 01:42:15.929299 INFO : End of read dq deskew training
609 01:42:15.934457 INFO : End of MPR read delay center optimization
610 01:42:15.940228 INFO : End of write delay center optimization
611 01:42:15.945695 INFO : End of read delay center optimization
612 01:42:15.946149 INFO : End of max read latency training
613 01:42:15.951266 INFO : Training has run successfully!
614 01:42:15.951707 1D training succeed
615 01:42:15.960524 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
616 01:42:16.008044 Check phy result
617 01:42:16.008542 INFO : End of initialization
618 01:42:16.030375 INFO : End of 2D read delay Voltage center optimization
619 01:42:16.049615 INFO : End of 2D read delay Voltage center optimization
620 01:42:16.101490 INFO : End of 2D write delay Voltage center optimization
621 01:42:16.150657 INFO : End of 2D write delay Voltage center optimization
622 01:42:16.156238 INFO : Training has run successfully!
623 01:42:16.156694
624 01:42:16.157097 channel==0
625 01:42:16.161761 RxClkDly_Margin_A0==88 ps 9
626 01:42:16.162205 TxDqDly_Margin_A0==98 ps 10
627 01:42:16.167512 RxClkDly_Margin_A1==88 ps 9
628 01:42:16.167949 TxDqDly_Margin_A1==88 ps 9
629 01:42:16.168703 TrainedVREFDQ_A0==74
630 01:42:16.173042 TrainedVREFDQ_A1==74
631 01:42:16.173558 VrefDac_Margin_A0==22
632 01:42:16.173958 DeviceVref_Margin_A0==40
633 01:42:16.178601 VrefDac_Margin_A1==23
634 01:42:16.179043 DeviceVref_Margin_A1==40
635 01:42:16.179435
636 01:42:16.179828
637 01:42:16.180251 channel==1
638 01:42:16.184198 RxClkDly_Margin_A0==88 ps 9
639 01:42:16.184635 TxDqDly_Margin_A0==98 ps 10
640 01:42:16.189822 RxClkDly_Margin_A1==88 ps 9
641 01:42:16.190328 TxDqDly_Margin_A1==78 ps 8
642 01:42:16.195495 TrainedVREFDQ_A0==78
643 01:42:16.195943 TrainedVREFDQ_A1==75
644 01:42:16.196371 VrefDac_Margin_A0==23
645 01:42:16.200965 DeviceVref_Margin_A0==36
646 01:42:16.201402 VrefDac_Margin_A1==22
647 01:42:16.206597 DeviceVref_Margin_A1==39
648 01:42:16.207033
649 01:42:16.207430 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
650 01:42:16.207819
651 01:42:16.240206 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
652 01:42:16.240715 2D training succeed
653 01:42:16.245805 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
654 01:42:16.251522 auto size-- 65535DDR cs0 size: 2048MB
655 01:42:16.252008 DDR cs1 size: 2048MB
656 01:42:16.256977 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
657 01:42:16.257427 cs0 DataBus test pass
658 01:42:16.262549 cs1 DataBus test pass
659 01:42:16.262992 cs0 AddrBus test pass
660 01:42:16.263391 cs1 AddrBus test pass
661 01:42:16.263778
662 01:42:16.268324 100bdlr_step_size ps== 464
663 01:42:16.268784 result report
664 01:42:16.273777 boot times 0Enable ddr reg access
665 01:42:16.278966 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
666 01:42:16.292771 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
667 01:42:16.948200 bl2z: ptr: 05129330, size: 00001e40
668 01:42:16.955870 0.0;M3 CHK:0;cm4_sp_mode 0
669 01:42:16.956373 MVN_1=0x00000000
670 01:42:16.956772 MVN_2=0x00000000
671 01:42:16.967384 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
672 01:42:16.967840 OPS=0x04
673 01:42:16.968272 ring efuse init
674 01:42:16.972983 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
675 01:42:16.973430 [0.017319 Inits done]
676 01:42:16.973825 secure task start!
677 01:42:16.980941 high task start!
678 01:42:16.981378 low task start!
679 01:42:16.981769 run into bl31
680 01:42:16.989612 NOTICE: BL31: v1.3(release):4fc40b1
681 01:42:16.997425 NOTICE: BL31: Built : 15:57:33, May 22 2019
682 01:42:16.997864 NOTICE: BL31: G12A normal boot!
683 01:42:17.012923 NOTICE: BL31: BL33 decompress pass
684 01:42:17.018670 ERROR: Error initializing runtime service opteed_fast
685 01:42:17.814038
686 01:42:17.814657
687 01:42:17.819501 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
688 01:42:17.819963
689 01:42:17.822934 Model: Libre Computer AML-S905D3-CC Solitude
690 01:42:17.969902 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
691 01:42:17.985324 DRAM: 2 GiB (effective 3.8 GiB)
692 01:42:18.086292 Core: 406 devices, 33 uclasses, devicetree: separate
693 01:42:18.092209 WDT: Not starting watchdog@f0d0
694 01:42:18.117303 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
695 01:42:18.129478 Loading Environment from FAT... Card did not respond to voltage select! : -110
696 01:42:18.134460 ** Bad device specification mmc 0 **
697 01:42:18.144521 Card did not respond to voltage select! : -110
698 01:42:18.152184 ** Bad device specification mmc 0 **
699 01:42:18.152616 Couldn't find partition mmc 0
700 01:42:18.160519 Card did not respond to voltage select! : -110
701 01:42:18.166044 ** Bad device specification mmc 0 **
702 01:42:18.166534 Couldn't find partition mmc 0
703 01:42:18.171091 Error: could not access storage.
704 01:42:18.467532 Net: eth0: ethernet@ff3f0000
705 01:42:18.468127 starting USB...
706 01:42:18.712182 Bus usb@ff500000: Register 3000140 NbrPorts 3
707 01:42:18.712687 Starting the controller
708 01:42:18.719195 USB XHCI 1.10
709 01:42:20.275542 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
710 01:42:20.283864 scanning usb for storage devices... 0 Storage Device(s) found
712 01:42:20.335364 Hit any key to stop autoboot: 1
713 01:42:20.336146 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
714 01:42:20.336751 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
715 01:42:20.337237 Setting prompt string to ['=>']
716 01:42:20.337723 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
717 01:42:20.349883 0
718 01:42:20.350745 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
720 01:42:20.451913 => setenv autoload no
721 01:42:20.452542 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
722 01:42:20.457290 setenv autoload no
724 01:42:20.558733 => setenv initrd_high 0xffffffff
725 01:42:20.559309 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
726 01:42:20.563657 setenv initrd_high 0xffffffff
728 01:42:20.668023 => setenv fdt_high 0xffffffff
729 01:42:20.668411 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
730 01:42:20.672875 setenv fdt_high 0xffffffff
732 01:42:20.773849 => dhcp
733 01:42:20.774698 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
734 01:42:20.778708 dhcp
735 01:42:21.734588 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
736 01:42:21.735131 Speed: 1000, full duplex
737 01:42:21.735562 BOOTP broadcast 1
738 01:42:21.983045 BOOTP broadcast 2
739 01:42:22.484074 BOOTP broadcast 3
740 01:42:23.485083 BOOTP broadcast 4
741 01:42:25.486184 BOOTP broadcast 5
742 01:42:25.497787 DHCP client bound to address 192.168.6.12 (3762 ms)
744 01:42:25.599222 => setenv serverip 192.168.6.2
745 01:42:25.600123 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
746 01:42:25.604532 setenv serverip 192.168.6.2
748 01:42:25.705974 => tftpboot 0x01080000 830684/tftp-deploy-63yj80lb/kernel/uImage
749 01:42:25.706856 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
750 01:42:25.713407 tftpboot 0x01080000 830684/tftp-deploy-63yj80lb/kernel/uImage
751 01:42:25.713888 Speed: 1000, full duplex
752 01:42:25.714300 Using ethernet@ff3f0000 device
753 01:42:25.718928 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
754 01:42:25.724516 Filename '830684/tftp-deploy-63yj80lb/kernel/uImage'.
755 01:42:25.728332 Load address: 0x1080000
756 01:42:29.151225 Loading: *################################################## 43.6 MiB
757 01:42:29.151635 12.7 MiB/s
758 01:42:29.151850 done
759 01:42:29.155395 Bytes transferred = 45713984 (2b98a40 hex)
761 01:42:29.256363 => tftpboot 0x08000000 830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
762 01:42:29.256830 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:32)
763 01:42:29.263622 tftpboot 0x08000000 830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot
764 01:42:29.264197 Speed: 1000, full duplex
765 01:42:29.264645 Using ethernet@ff3f0000 device
766 01:42:29.269266 TFTP from server 192.168.6.2; our IP address is 192.168.6.12
767 01:42:29.278932 Filename '830684/tftp-deploy-63yj80lb/ramdisk/ramdisk.cpio.gz.uboot'.
768 01:42:29.279441 Load address: 0x8000000
769 01:42:36.311808 Loading: *#########################################T ######## UDP wrong checksum 00000005 0000e26f
770 01:42:41.311853 T UDP wrong checksum 00000005 0000e26f
771 01:42:51.313004 T T UDP wrong checksum 00000005 0000e26f
772 01:42:54.096114 UDP wrong checksum 00000005 0000f14a
773 01:42:59.608117 T UDP wrong checksum 000000ff 0000011d
774 01:42:59.637490 UDP wrong checksum 000000ff 0000990f
775 01:43:03.768471 T UDP wrong checksum 000000ff 0000f29e
776 01:43:03.798827 UDP wrong checksum 000000ff 00008c91
777 01:43:11.316265 T UDP wrong checksum 00000005 0000e26f
778 01:43:16.179769 T UDP wrong checksum 000000ff 0000b9f8
779 01:43:16.219233 UDP wrong checksum 000000ff 000049eb
780 01:43:26.321553 T T
781 01:43:26.321983 Retry count exceeded; starting again
783 01:43:26.322882 end: 2.4.3 bootloader-commands (duration 00:01:06) [common]
786 01:43:26.323838 end: 2.4 uboot-commands (duration 00:01:25) [common]
788 01:43:26.325254 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
790 01:43:26.326377 end: 2 uboot-action (duration 00:01:25) [common]
792 01:43:26.328053 Cleaning after the job
793 01:43:26.328633 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/ramdisk
794 01:43:26.329879 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/kernel
795 01:43:26.380334 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/dtb
796 01:43:26.381186 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/830684/tftp-deploy-63yj80lb/modules
797 01:43:26.398865 start: 4.1 power-off (timeout 00:00:30) [common]
798 01:43:26.399487 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
799 01:43:26.429756 >> OK - accepted request
800 01:43:26.431516 Returned 0 in 0 seconds
801 01:43:26.532374 end: 4.1 power-off (duration 00:00:00) [common]
803 01:43:26.533406 start: 4.2 read-feedback (timeout 00:10:00) [common]
804 01:43:26.534131 Listened to connection for namespace 'common' for up to 1s
805 01:43:27.535756 Finalising connection for namespace 'common'
806 01:43:27.536567 Disconnecting from shell: Finalise
807 01:43:27.537128 =>
808 01:43:27.638237 end: 4.2 read-feedback (duration 00:00:01) [common]
809 01:43:27.639002 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/830684
810 01:43:27.964056 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/830684
811 01:43:27.964714 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.