Boot log: meson-sm1-s905d3-libretech-cc

    1 04:16:45.000071  lava-dispatcher, installed at version: 2024.01
    2 04:16:45.000858  start: 0 validate
    3 04:16:45.001326  Start time: 2024-10-22 04:16:45.001297+00:00 (UTC)
    4 04:16:45.001873  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 04:16:45.002404  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-igt%2F20240313.0%2Farm64%2Frootfs.cpio.gz exists
    6 04:16:45.045735  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 04:16:45.046305  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc4-47-gc2ee9f594da8%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
    8 04:16:45.079610  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 04:16:45.080256  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc4-47-gc2ee9f594da8%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 04:16:45.109497  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 04:16:45.110251  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc4-47-gc2ee9f594da8%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
   12 04:16:45.150884  validate duration: 0.15
   14 04:16:45.151756  start: 1 tftp-deploy (timeout 00:10:00) [common]
   15 04:16:45.152123  start: 1.1 download-retry (timeout 00:10:00) [common]
   16 04:16:45.152450  start: 1.1.1 http-download (timeout 00:10:00) [common]
   17 04:16:45.153068  Not decompressing ramdisk as can be used compressed.
   18 04:16:45.153505  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-igt/20240313.0/arm64/rootfs.cpio.gz
   19 04:16:45.153787  saving as /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/ramdisk/rootfs.cpio.gz
   20 04:16:45.154069  total size: 47897469 (45 MB)
   21 04:16:45.196273  progress   0 % (0 MB)
   22 04:16:45.226980  progress   5 % (2 MB)
   23 04:16:45.256861  progress  10 % (4 MB)
   24 04:16:45.286551  progress  15 % (6 MB)
   25 04:16:45.316447  progress  20 % (9 MB)
   26 04:16:45.345999  progress  25 % (11 MB)
   27 04:16:45.375765  progress  30 % (13 MB)
   28 04:16:45.405617  progress  35 % (16 MB)
   29 04:16:45.435503  progress  40 % (18 MB)
   30 04:16:45.465171  progress  45 % (20 MB)
   31 04:16:45.494968  progress  50 % (22 MB)
   32 04:16:45.525074  progress  55 % (25 MB)
   33 04:16:45.555289  progress  60 % (27 MB)
   34 04:16:45.585373  progress  65 % (29 MB)
   35 04:16:45.615378  progress  70 % (32 MB)
   36 04:16:45.645309  progress  75 % (34 MB)
   37 04:16:45.675204  progress  80 % (36 MB)
   38 04:16:45.705153  progress  85 % (38 MB)
   39 04:16:45.737335  progress  90 % (41 MB)
   40 04:16:45.767189  progress  95 % (43 MB)
   41 04:16:45.796318  progress 100 % (45 MB)
   42 04:16:45.797058  45 MB downloaded in 0.64 s (71.04 MB/s)
   43 04:16:45.797627  end: 1.1.1 http-download (duration 00:00:01) [common]
   45 04:16:45.798526  end: 1.1 download-retry (duration 00:00:01) [common]
   46 04:16:45.798823  start: 1.2 download-retry (timeout 00:09:59) [common]
   47 04:16:45.799101  start: 1.2.1 http-download (timeout 00:09:59) [common]
   48 04:16:45.799569  downloading http://storage.kernelci.org/mainline/master/v6.12-rc4-47-gc2ee9f594da8/arm64/defconfig/clang-16/kernel/Image
   49 04:16:45.799825  saving as /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/kernel/Image
   50 04:16:45.800067  total size: 37814784 (36 MB)
   51 04:16:45.800286  No compression specified
   52 04:16:45.843211  progress   0 % (0 MB)
   53 04:16:45.868325  progress   5 % (1 MB)
   54 04:16:45.893686  progress  10 % (3 MB)
   55 04:16:45.918054  progress  15 % (5 MB)
   56 04:16:45.941802  progress  20 % (7 MB)
   57 04:16:45.966862  progress  25 % (9 MB)
   58 04:16:45.991234  progress  30 % (10 MB)
   59 04:16:46.015357  progress  35 % (12 MB)
   60 04:16:46.040041  progress  40 % (14 MB)
   61 04:16:46.064277  progress  45 % (16 MB)
   62 04:16:46.088379  progress  50 % (18 MB)
   63 04:16:46.112820  progress  55 % (19 MB)
   64 04:16:46.136957  progress  60 % (21 MB)
   65 04:16:46.160929  progress  65 % (23 MB)
   66 04:16:46.184720  progress  70 % (25 MB)
   67 04:16:46.208883  progress  75 % (27 MB)
   68 04:16:46.233315  progress  80 % (28 MB)
   69 04:16:46.258293  progress  85 % (30 MB)
   70 04:16:46.283342  progress  90 % (32 MB)
   71 04:16:46.308022  progress  95 % (34 MB)
   72 04:16:46.331525  progress 100 % (36 MB)
   73 04:16:46.332057  36 MB downloaded in 0.53 s (67.79 MB/s)
   74 04:16:46.332608  end: 1.2.1 http-download (duration 00:00:01) [common]
   76 04:16:46.333540  end: 1.2 download-retry (duration 00:00:01) [common]
   77 04:16:46.333867  start: 1.3 download-retry (timeout 00:09:59) [common]
   78 04:16:46.334185  start: 1.3.1 http-download (timeout 00:09:59) [common]
   79 04:16:46.334704  downloading http://storage.kernelci.org/mainline/master/v6.12-rc4-47-gc2ee9f594da8/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   80 04:16:46.335026  saving as /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/dtb/meson-sm1-s905d3-libretech-cc.dtb
   81 04:16:46.335272  total size: 53209 (0 MB)
   82 04:16:46.335510  No compression specified
   83 04:16:46.380186  progress  61 % (0 MB)
   84 04:16:46.381074  progress 100 % (0 MB)
   85 04:16:46.381675  0 MB downloaded in 0.05 s (1.09 MB/s)
   86 04:16:46.382223  end: 1.3.1 http-download (duration 00:00:00) [common]
   88 04:16:46.383156  end: 1.3 download-retry (duration 00:00:00) [common]
   89 04:16:46.383470  start: 1.4 download-retry (timeout 00:09:59) [common]
   90 04:16:46.383786  start: 1.4.1 http-download (timeout 00:09:59) [common]
   91 04:16:46.384313  downloading http://storage.kernelci.org/mainline/master/v6.12-rc4-47-gc2ee9f594da8/arm64/defconfig/clang-16/modules.tar.xz
   92 04:16:46.384608  saving as /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/modules/modules.tar
   93 04:16:46.384849  total size: 11768964 (11 MB)
   94 04:16:46.385090  Using unxz to decompress xz
   95 04:16:46.424186  progress   0 % (0 MB)
   96 04:16:46.487576  progress   5 % (0 MB)
   97 04:16:46.568656  progress  10 % (1 MB)
   98 04:16:46.658050  progress  15 % (1 MB)
   99 04:16:46.755003  progress  20 % (2 MB)
  100 04:16:46.837631  progress  25 % (2 MB)
  101 04:16:46.917643  progress  30 % (3 MB)
  102 04:16:47.002725  progress  35 % (3 MB)
  103 04:16:47.084052  progress  40 % (4 MB)
  104 04:16:47.162743  progress  45 % (5 MB)
  105 04:16:47.248272  progress  50 % (5 MB)
  106 04:16:47.333847  progress  55 % (6 MB)
  107 04:16:47.417828  progress  60 % (6 MB)
  108 04:16:47.494204  progress  65 % (7 MB)
  109 04:16:47.576795  progress  70 % (7 MB)
  110 04:16:47.655807  progress  75 % (8 MB)
  111 04:16:47.732962  progress  80 % (9 MB)
  112 04:16:47.817852  progress  85 % (9 MB)
  113 04:16:47.900982  progress  90 % (10 MB)
  114 04:16:47.981225  progress  95 % (10 MB)
  115 04:16:48.061755  progress 100 % (11 MB)
  116 04:16:48.072528  11 MB downloaded in 1.69 s (6.65 MB/s)
  117 04:16:48.073470  end: 1.4.1 http-download (duration 00:00:02) [common]
  119 04:16:48.075298  end: 1.4 download-retry (duration 00:00:02) [common]
  120 04:16:48.075886  start: 1.5 prepare-tftp-overlay (timeout 00:09:57) [common]
  121 04:16:48.076531  start: 1.5.1 extract-nfsrootfs (timeout 00:09:57) [common]
  122 04:16:48.077091  end: 1.5.1 extract-nfsrootfs (duration 00:00:00) [common]
  123 04:16:48.077657  start: 1.5.2 lava-overlay (timeout 00:09:57) [common]
  124 04:16:48.078721  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6
  125 04:16:48.079648  makedir: /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin
  126 04:16:48.080465  makedir: /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/tests
  127 04:16:48.081165  makedir: /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/results
  128 04:16:48.081851  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-add-keys
  129 04:16:48.082894  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-add-sources
  130 04:16:48.083905  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-background-process-start
  131 04:16:48.085004  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-background-process-stop
  132 04:16:48.086078  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-common-functions
  133 04:16:48.087074  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-echo-ipv4
  134 04:16:48.088137  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-install-packages
  135 04:16:48.089187  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-installed-packages
  136 04:16:48.090160  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-os-build
  137 04:16:48.091128  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-probe-channel
  138 04:16:48.092133  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-probe-ip
  139 04:16:48.093128  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-target-ip
  140 04:16:48.094099  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-target-mac
  141 04:16:48.095062  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-target-storage
  142 04:16:48.096142  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-case
  143 04:16:48.097167  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-event
  144 04:16:48.098135  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-feedback
  145 04:16:48.099100  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-raise
  146 04:16:48.100095  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-reference
  147 04:16:48.101091  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-runner
  148 04:16:48.102070  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-set
  149 04:16:48.103051  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-test-shell
  150 04:16:48.104212  Updating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-install-packages (oe)
  151 04:16:48.105427  Updating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/bin/lava-installed-packages (oe)
  152 04:16:48.106359  Creating /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/environment
  153 04:16:48.107154  LAVA metadata
  154 04:16:48.107708  - LAVA_JOB_ID=878993
  155 04:16:48.108245  - LAVA_DISPATCHER_IP=192.168.6.2
  156 04:16:48.108972  start: 1.5.2.1 ssh-authorize (timeout 00:09:57) [common]
  157 04:16:48.110948  end: 1.5.2.1 ssh-authorize (duration 00:00:00) [common]
  158 04:16:48.111614  start: 1.5.2.2 lava-vland-overlay (timeout 00:09:57) [common]
  159 04:16:48.112122  skipped lava-vland-overlay
  160 04:16:48.112677  end: 1.5.2.2 lava-vland-overlay (duration 00:00:00) [common]
  161 04:16:48.113253  start: 1.5.2.3 lava-multinode-overlay (timeout 00:09:57) [common]
  162 04:16:48.113730  skipped lava-multinode-overlay
  163 04:16:48.114267  end: 1.5.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  164 04:16:48.114825  start: 1.5.2.4 test-definition (timeout 00:09:57) [common]
  165 04:16:48.115348  Loading test definitions
  166 04:16:48.115952  start: 1.5.2.4.1 inline-repo-action (timeout 00:09:57) [common]
  167 04:16:48.116495  Using /lava-878993 at stage 0
  168 04:16:48.118648  uuid=878993_1.5.2.4.1 testdef=None
  169 04:16:48.119231  end: 1.5.2.4.1 inline-repo-action (duration 00:00:00) [common]
  170 04:16:48.119758  start: 1.5.2.4.2 test-overlay (timeout 00:09:57) [common]
  171 04:16:48.121782  end: 1.5.2.4.2 test-overlay (duration 00:00:00) [common]
  173 04:16:48.122659  start: 1.5.2.4.3 test-install-overlay (timeout 00:09:57) [common]
  174 04:16:48.124919  end: 1.5.2.4.3 test-install-overlay (duration 00:00:00) [common]
  176 04:16:48.125877  start: 1.5.2.4.4 test-runscript-overlay (timeout 00:09:57) [common]
  177 04:16:48.128133  runner path: /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/0/tests/0_igt-gpu-panfrost test_uuid 878993_1.5.2.4.1
  178 04:16:48.128790  end: 1.5.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  180 04:16:48.129663  Creating lava-test-runner.conf files
  181 04:16:48.129875  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/878993/lava-overlay-7s08p9b6/lava-878993/0 for stage 0
  182 04:16:48.130223  - 0_igt-gpu-panfrost
  183 04:16:48.130601  end: 1.5.2.4 test-definition (duration 00:00:00) [common]
  184 04:16:48.130905  start: 1.5.2.5 compress-overlay (timeout 00:09:57) [common]
  185 04:16:48.154563  end: 1.5.2.5 compress-overlay (duration 00:00:00) [common]
  186 04:16:48.154966  start: 1.5.2.6 persistent-nfs-overlay (timeout 00:09:57) [common]
  187 04:16:48.155249  end: 1.5.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  188 04:16:48.155528  end: 1.5.2 lava-overlay (duration 00:00:00) [common]
  189 04:16:48.155800  start: 1.5.3 extract-overlay-ramdisk (timeout 00:09:57) [common]
  190 04:16:54.892375  end: 1.5.3 extract-overlay-ramdisk (duration 00:00:07) [common]
  191 04:16:54.892853  start: 1.5.4 extract-modules (timeout 00:09:50) [common]
  192 04:16:54.893109  extracting modules file /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/modules/modules.tar to /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk
  193 04:16:56.303836  end: 1.5.4 extract-modules (duration 00:00:01) [common]
  194 04:16:56.304354  start: 1.5.5 apply-overlay-tftp (timeout 00:09:49) [common]
  195 04:16:56.304643  [common] Applying overlay /var/lib/lava/dispatcher/tmp/878993/compress-overlay-p_jmf92_/overlay-1.5.2.5.tar.gz to ramdisk
  196 04:16:56.304866  [common] Applying overlay /var/lib/lava/dispatcher/tmp/878993/compress-overlay-p_jmf92_/overlay-1.5.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk
  197 04:16:56.334664  end: 1.5.5 apply-overlay-tftp (duration 00:00:00) [common]
  198 04:16:56.335047  start: 1.5.6 prepare-kernel (timeout 00:09:49) [common]
  199 04:16:56.335328  start: 1.5.6.1 uboot-prepare-kernel (timeout 00:09:49) [common]
  200 04:16:56.335565  Converting downloaded kernel to a uImage
  201 04:16:56.335870  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/kernel/Image /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/kernel/uImage
  202 04:16:56.744791  output: Image Name:   
  203 04:16:56.745209  output: Created:      Tue Oct 22 04:16:56 2024
  204 04:16:56.745423  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  205 04:16:56.745631  output: Data Size:    37814784 Bytes = 36928.50 KiB = 36.06 MiB
  206 04:16:56.745837  output: Load Address: 01080000
  207 04:16:56.746042  output: Entry Point:  01080000
  208 04:16:56.746245  output: 
  209 04:16:56.746582  end: 1.5.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  210 04:16:56.746859  end: 1.5.6 prepare-kernel (duration 00:00:00) [common]
  211 04:16:56.747136  start: 1.5.7 configure-preseed-file (timeout 00:09:48) [common]
  212 04:16:56.747397  end: 1.5.7 configure-preseed-file (duration 00:00:00) [common]
  213 04:16:56.747660  start: 1.5.8 compress-ramdisk (timeout 00:09:48) [common]
  214 04:16:56.747915  Building ramdisk /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk
  215 04:17:03.362461  >> 508982 blocks

  216 04:17:23.904643  Adding RAMdisk u-boot header.
  217 04:17:23.905316  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk.cpio.gz.uboot
  218 04:17:24.582710  output: Image Name:   
  219 04:17:24.583135  output: Created:      Tue Oct 22 04:17:23 2024
  220 04:17:24.583346  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  221 04:17:24.583552  output: Data Size:    66417089 Bytes = 64860.44 KiB = 63.34 MiB
  222 04:17:24.583755  output: Load Address: 00000000
  223 04:17:24.583956  output: Entry Point:  00000000
  224 04:17:24.584397  output: 
  225 04:17:24.585498  rename /var/lib/lava/dispatcher/tmp/878993/extract-overlay-ramdisk-60qgktx1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  226 04:17:24.586273  end: 1.5.8 compress-ramdisk (duration 00:00:28) [common]
  227 04:17:24.586868  end: 1.5 prepare-tftp-overlay (duration 00:00:37) [common]
  228 04:17:24.587445  start: 1.6 lxc-create-udev-rule-action (timeout 00:09:21) [common]
  229 04:17:24.587942  No LXC device requested
  230 04:17:24.588534  end: 1.6 lxc-create-udev-rule-action (duration 00:00:00) [common]
  231 04:17:24.589099  start: 1.7 deploy-device-env (timeout 00:09:21) [common]
  232 04:17:24.589645  end: 1.7 deploy-device-env (duration 00:00:00) [common]
  233 04:17:24.590096  Checking files for TFTP limit of 4294967296 bytes.
  234 04:17:24.593326  end: 1 tftp-deploy (duration 00:00:39) [common]
  235 04:17:24.594070  start: 2 uboot-action (timeout 00:05:00) [common]
  236 04:17:24.594652  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  237 04:17:24.595208  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  238 04:17:24.595762  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  239 04:17:24.596377  Using kernel file from prepare-kernel: 878993/tftp-deploy-dgjp1kvs/kernel/uImage
  240 04:17:24.597068  substitutions:
  241 04:17:24.597525  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  242 04:17:24.597973  - {DTB_ADDR}: 0x01070000
  243 04:17:24.598416  - {DTB}: 878993/tftp-deploy-dgjp1kvs/dtb/meson-sm1-s905d3-libretech-cc.dtb
  244 04:17:24.598861  - {INITRD}: 878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  245 04:17:24.599301  - {KERNEL_ADDR}: 0x01080000
  246 04:17:24.599739  - {KERNEL}: 878993/tftp-deploy-dgjp1kvs/kernel/uImage
  247 04:17:24.600214  - {LAVA_MAC}: None
  248 04:17:24.600703  - {PRESEED_CONFIG}: None
  249 04:17:24.601147  - {PRESEED_LOCAL}: None
  250 04:17:24.601582  - {RAMDISK_ADDR}: 0x08000000
  251 04:17:24.602012  - {RAMDISK}: 878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  252 04:17:24.602452  - {ROOT_PART}: None
  253 04:17:24.602884  - {ROOT}: None
  254 04:17:24.603316  - {SERVER_IP}: 192.168.6.2
  255 04:17:24.603865  - {TEE_ADDR}: 0x83000000
  256 04:17:24.604378  - {TEE}: None
  257 04:17:24.604820  Parsed boot commands:
  258 04:17:24.605244  - setenv autoload no
  259 04:17:24.605680  - setenv initrd_high 0xffffffff
  260 04:17:24.606145  - setenv fdt_high 0xffffffff
  261 04:17:24.606586  - dhcp
  262 04:17:24.607016  - setenv serverip 192.168.6.2
  263 04:17:24.607454  - tftpboot 0x01080000 878993/tftp-deploy-dgjp1kvs/kernel/uImage
  264 04:17:24.607885  - tftpboot 0x08000000 878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  265 04:17:24.608356  - tftpboot 0x01070000 878993/tftp-deploy-dgjp1kvs/dtb/meson-sm1-s905d3-libretech-cc.dtb
  266 04:17:24.608792  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/ram0 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  267 04:17:24.609227  - bootm 0x01080000 0x08000000 0x01070000
  268 04:17:24.609782  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  270 04:17:24.611433  start: 2.3 connect-device (timeout 00:05:00) [common]
  271 04:17:24.611923  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  272 04:17:24.627495  Setting prompt string to ['lava-test: # ']
  273 04:17:24.629241  end: 2.3 connect-device (duration 00:00:00) [common]
  274 04:17:24.630043  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  275 04:17:24.630717  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  276 04:17:24.631369  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  277 04:17:24.632721  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  278 04:17:24.667555  >> OK - accepted request

  279 04:17:24.670651  Returned 0 in 0 seconds
  280 04:17:24.772394  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  282 04:17:24.774265  end: 2.4.1 reset-device (duration 00:00:00) [common]
  283 04:17:24.775002  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  284 04:17:24.775615  Setting prompt string to ['Hit any key to stop autoboot']
  285 04:17:24.776216  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  286 04:17:24.778179  Trying 192.168.56.21...
  287 04:17:24.778767  Connected to conserv1.
  288 04:17:24.779291  Escape character is '^]'.
  289 04:17:24.779815  
  290 04:17:24.780414  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  291 04:17:24.780972  
  292 04:17:32.309203  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  293 04:17:32.309933  bl2_stage_init 0x01
  294 04:17:32.310418  bl2_stage_init 0x81
  295 04:17:32.314741  hw id: 0x0000 - pwm id 0x01
  296 04:17:32.315262  bl2_stage_init 0xc1
  297 04:17:32.320320  bl2_stage_init 0x02
  298 04:17:32.320819  
  299 04:17:32.321281  L0:00000000
  300 04:17:32.321727  L1:00000703
  301 04:17:32.322169  L2:00008067
  302 04:17:32.322600  L3:15000000
  303 04:17:32.325896  S1:00000000
  304 04:17:32.326440  B2:20282000
  305 04:17:32.326886  B1:a0f83180
  306 04:17:32.327319  
  307 04:17:32.327811  TE: 68166
  308 04:17:32.328289  
  309 04:17:32.331485  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  310 04:17:32.331962  
  311 04:17:32.337096  Board ID = 1
  312 04:17:32.337640  Set cpu clk to 24M
  313 04:17:32.338118  Set clk81 to 24M
  314 04:17:32.342736  Use GP1_pll as DSU clk.
  315 04:17:32.343248  DSU clk: 1200 Mhz
  316 04:17:32.343718  CPU clk: 1200 MHz
  317 04:17:32.348252  Set clk81 to 166.6M
  318 04:17:32.353820  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  319 04:17:32.354321  board id: 1
  320 04:17:32.361066  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  321 04:17:32.371677  fw parse done
  322 04:17:32.377659  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  323 04:17:32.420307  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  324 04:17:32.431221  PIEI prepare done
  325 04:17:32.431730  fastboot data load
  326 04:17:32.432275  fastboot data verify
  327 04:17:32.436903  verify result: 266
  328 04:17:32.442485  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  329 04:17:32.442964  LPDDR4 probe
  330 04:17:32.443413  ddr clk to 1584MHz
  331 04:17:32.450556  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  332 04:17:32.487679  
  333 04:17:32.488226  dmc_version 0001
  334 04:17:32.494371  Check phy result
  335 04:17:32.500244  INFO : End of CA training
  336 04:17:32.500734  INFO : End of initialization
  337 04:17:32.505898  INFO : Training has run successfully!
  338 04:17:32.506399  Check phy result
  339 04:17:32.511487  INFO : End of initialization
  340 04:17:32.512019  INFO : End of read enable training
  341 04:17:32.514802  INFO : End of fine write leveling
  342 04:17:32.520272  INFO : End of Write leveling coarse delay
  343 04:17:32.525910  INFO : Training has run successfully!
  344 04:17:32.526395  Check phy result
  345 04:17:32.526846  INFO : End of initialization
  346 04:17:32.531572  INFO : End of read dq deskew training
  347 04:17:32.537160  INFO : End of MPR read delay center optimization
  348 04:17:32.537672  INFO : End of write delay center optimization
  349 04:17:32.542772  INFO : End of read delay center optimization
  350 04:17:32.548342  INFO : End of max read latency training
  351 04:17:32.548841  INFO : Training has run successfully!
  352 04:17:32.553961  1D training succeed
  353 04:17:32.559951  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  354 04:17:32.607466  Check phy result
  355 04:17:32.608042  INFO : End of initialization
  356 04:17:32.629789  INFO : End of 2D read delay Voltage center optimization
  357 04:17:32.648977  INFO : End of 2D read delay Voltage center optimization
  358 04:17:32.700860  INFO : End of 2D write delay Voltage center optimization
  359 04:17:32.750029  INFO : End of 2D write delay Voltage center optimization
  360 04:17:32.755561  INFO : Training has run successfully!
  361 04:17:32.756103  
  362 04:17:32.756578  channel==0
  363 04:17:32.761194  RxClkDly_Margin_A0==78 ps 8
  364 04:17:32.761693  TxDqDly_Margin_A0==98 ps 10
  365 04:17:32.764581  RxClkDly_Margin_A1==69 ps 7
  366 04:17:32.765069  TxDqDly_Margin_A1==98 ps 10
  367 04:17:32.770207  TrainedVREFDQ_A0==74
  368 04:17:32.770707  TrainedVREFDQ_A1==75
  369 04:17:32.771162  VrefDac_Margin_A0==23
  370 04:17:32.775837  DeviceVref_Margin_A0==40
  371 04:17:32.776352  VrefDac_Margin_A1==23
  372 04:17:32.781406  DeviceVref_Margin_A1==39
  373 04:17:32.781899  
  374 04:17:32.782365  
  375 04:17:32.782822  channel==1
  376 04:17:32.783277  RxClkDly_Margin_A0==88 ps 9
  377 04:17:32.786982  TxDqDly_Margin_A0==98 ps 10
  378 04:17:32.787499  RxClkDly_Margin_A1==78 ps 8
  379 04:17:32.792545  TxDqDly_Margin_A1==88 ps 9
  380 04:17:32.793036  TrainedVREFDQ_A0==78
  381 04:17:32.793489  TrainedVREFDQ_A1==78
  382 04:17:32.798273  VrefDac_Margin_A0==22
  383 04:17:32.798769  DeviceVref_Margin_A0==36
  384 04:17:32.803761  VrefDac_Margin_A1==22
  385 04:17:32.804289  DeviceVref_Margin_A1==36
  386 04:17:32.804743  
  387 04:17:32.809318   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  388 04:17:32.809809  
  389 04:17:32.837341  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  390 04:17:32.842906  2D training succeed
  391 04:17:32.848521  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  392 04:17:32.849013  auto size-- 65535DDR cs0 size: 2048MB
  393 04:17:32.854155  DDR cs1 size: 2048MB
  394 04:17:32.854643  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  395 04:17:32.859783  cs0 DataBus test pass
  396 04:17:32.860330  cs1 DataBus test pass
  397 04:17:32.860800  cs0 AddrBus test pass
  398 04:17:32.865362  cs1 AddrBus test pass
  399 04:17:32.865853  
  400 04:17:32.866307  100bdlr_step_size ps== 478
  401 04:17:32.866757  result report
  402 04:17:32.870946  boot times 0Enable ddr reg access
  403 04:17:32.878438  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  404 04:17:32.892265  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  405 04:17:33.547434  bl2z: ptr: 05129330, size: 00001e40
  406 04:17:33.552944  0.0;M3 CHK:0;cm4_sp_mode 0
  407 04:17:33.553460  MVN_1=0x00000000
  408 04:17:33.553928  MVN_2=0x00000000
  409 04:17:33.564595  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  410 04:17:33.565142  OPS=0x04
  411 04:17:33.565621  ring efuse init
  412 04:17:33.570146  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  413 04:17:33.570657  [0.017310 Inits done]
  414 04:17:33.571107  secure task start!
  415 04:17:33.577614  high task start!
  416 04:17:33.578117  low task start!
  417 04:17:33.578581  run into bl31
  418 04:17:33.586114  NOTICE:  BL31: v1.3(release):4fc40b1
  419 04:17:33.594017  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  420 04:17:33.594529  NOTICE:  BL31: G12A normal boot!
  421 04:17:33.609345  NOTICE:  BL31: BL33 decompress pass
  422 04:17:33.614998  ERROR:   Error initializing runtime service opteed_fast
  423 04:17:36.362835  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  424 04:17:36.363515  bl2_stage_init 0x01
  425 04:17:36.364083  bl2_stage_init 0x81
  426 04:17:36.368340  hw id: 0x0000 - pwm id 0x01
  427 04:17:36.368847  bl2_stage_init 0xc1
  428 04:17:36.372964  bl2_stage_init 0x02
  429 04:17:36.373464  
  430 04:17:36.373925  L0:00000000
  431 04:17:36.374371  L1:00000703
  432 04:17:36.374823  L2:00008067
  433 04:17:36.378567  L3:15000000
  434 04:17:36.379082  S1:00000000
  435 04:17:36.379515  B2:20282000
  436 04:17:36.379941  B1:a0f83180
  437 04:17:36.380415  
  438 04:17:36.380847  TE: 70640
  439 04:17:36.381271  
  440 04:17:36.389629  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  441 04:17:36.390098  
  442 04:17:36.390525  Board ID = 1
  443 04:17:36.390944  Set cpu clk to 24M
  444 04:17:36.391366  Set clk81 to 24M
  445 04:17:36.395121  Use GP1_pll as DSU clk.
  446 04:17:36.395596  DSU clk: 1200 Mhz
  447 04:17:36.396056  CPU clk: 1200 MHz
  448 04:17:36.400819  Set clk81 to 166.6M
  449 04:17:36.406519  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  450 04:17:36.406979  board id: 1
  451 04:17:36.414623  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  452 04:17:36.425504  fw parse done
  453 04:17:36.431459  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  454 04:17:36.474575  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  455 04:17:36.485790  PIEI prepare done
  456 04:17:36.486270  fastboot data load
  457 04:17:36.486711  fastboot data verify
  458 04:17:36.491331  verify result: 266
  459 04:17:36.496923  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  460 04:17:36.497406  LPDDR4 probe
  461 04:17:36.497845  ddr clk to 1584MHz
  462 04:17:36.504930  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  463 04:17:36.542640  
  464 04:17:36.543126  dmc_version 0001
  465 04:17:36.549823  Check phy result
  466 04:17:36.555773  INFO : End of CA training
  467 04:17:36.556280  INFO : End of initialization
  468 04:17:36.561292  INFO : Training has run successfully!
  469 04:17:36.561769  Check phy result
  470 04:17:36.566863  INFO : End of initialization
  471 04:17:36.567337  INFO : End of read enable training
  472 04:17:36.572484  INFO : End of fine write leveling
  473 04:17:36.578070  INFO : End of Write leveling coarse delay
  474 04:17:36.578556  INFO : Training has run successfully!
  475 04:17:36.579001  Check phy result
  476 04:17:36.583680  INFO : End of initialization
  477 04:17:36.584188  INFO : End of read dq deskew training
  478 04:17:36.589246  INFO : End of MPR read delay center optimization
  479 04:17:36.594866  INFO : End of write delay center optimization
  480 04:17:36.600491  INFO : End of read delay center optimization
  481 04:17:36.600970  INFO : End of max read latency training
  482 04:17:36.606106  INFO : Training has run successfully!
  483 04:17:36.606583  1D training succeed
  484 04:17:36.615296  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  485 04:17:36.663555  Check phy result
  486 04:17:36.664091  INFO : End of initialization
  487 04:17:36.690920  INFO : End of 2D read delay Voltage center optimization
  488 04:17:36.714967  INFO : End of 2D read delay Voltage center optimization
  489 04:17:36.771730  INFO : End of 2D write delay Voltage center optimization
  490 04:17:36.825596  INFO : End of 2D write delay Voltage center optimization
  491 04:17:36.831219  INFO : Training has run successfully!
  492 04:17:36.831717  
  493 04:17:36.832224  channel==0
  494 04:17:36.836828  RxClkDly_Margin_A0==78 ps 8
  495 04:17:36.837316  TxDqDly_Margin_A0==98 ps 10
  496 04:17:36.842532  RxClkDly_Margin_A1==69 ps 7
  497 04:17:36.843011  TxDqDly_Margin_A1==88 ps 9
  498 04:17:36.843456  TrainedVREFDQ_A0==74
  499 04:17:36.848170  TrainedVREFDQ_A1==74
  500 04:17:36.848660  VrefDac_Margin_A0==24
  501 04:17:36.849105  DeviceVref_Margin_A0==40
  502 04:17:36.853641  VrefDac_Margin_A1==23
  503 04:17:36.854127  DeviceVref_Margin_A1==40
  504 04:17:36.854570  
  505 04:17:36.855012  
  506 04:17:36.855452  channel==1
  507 04:17:36.859863  RxClkDly_Margin_A0==88 ps 9
  508 04:17:36.860392  TxDqDly_Margin_A0==98 ps 10
  509 04:17:36.864850  RxClkDly_Margin_A1==78 ps 8
  510 04:17:36.865340  TxDqDly_Margin_A1==88 ps 9
  511 04:17:36.870339  TrainedVREFDQ_A0==78
  512 04:17:36.870825  TrainedVREFDQ_A1==77
  513 04:17:36.871262  VrefDac_Margin_A0==23
  514 04:17:36.875920  DeviceVref_Margin_A0==36
  515 04:17:36.876408  VrefDac_Margin_A1==22
  516 04:17:36.881537  DeviceVref_Margin_A1==37
  517 04:17:36.881995  
  518 04:17:36.882424   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  519 04:17:36.882851  
  520 04:17:36.915137  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  521 04:17:36.915668  2D training succeed
  522 04:17:36.920718  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  523 04:17:36.926349  auto size-- 65535DDR cs0 size: 2048MB
  524 04:17:36.926828  DDR cs1 size: 2048MB
  525 04:17:36.931923  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  526 04:17:36.932432  cs0 DataBus test pass
  527 04:17:36.937541  cs1 DataBus test pass
  528 04:17:36.938009  cs0 AddrBus test pass
  529 04:17:36.938442  cs1 AddrBus test pass
  530 04:17:36.938867  
  531 04:17:36.943117  100bdlr_step_size ps== 485
  532 04:17:36.943600  result report
  533 04:17:36.948691  boot times 0Enable ddr reg access
  534 04:17:36.953985  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  535 04:17:36.967776  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  536 04:17:37.627549  bl2z: ptr: 05129330, size: 00001e40
  537 04:17:37.636234  0.0;M3 CHK:0;cm4_sp_mode 0
  538 04:17:37.636736  MVN_1=0x00000000
  539 04:17:37.637183  MVN_2=0x00000000
  540 04:17:37.647706  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  541 04:17:37.648213  OPS=0x04
  542 04:17:37.648665  ring efuse init
  543 04:17:37.653326  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  544 04:17:37.653831  [0.017354 Inits done]
  545 04:17:37.654294  secure task start!
  546 04:17:37.660898  high task start!
  547 04:17:37.661386  low task start!
  548 04:17:37.661827  run into bl31
  549 04:17:37.669424  NOTICE:  BL31: v1.3(release):4fc40b1
  550 04:17:37.677262  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  551 04:17:37.677743  NOTICE:  BL31: G12A normal boot!
  552 04:17:37.692739  NOTICE:  BL31: BL33 decompress pass
  553 04:17:37.698451  ERROR:   Error initializing runtime service opteed_fast
  554 04:17:39.061393  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  555 04:17:39.062030  bl2_stage_init 0x01
  556 04:17:39.062498  bl2_stage_init 0x81
  557 04:17:39.066949  hw id: 0x0000 - pwm id 0x01
  558 04:17:39.067440  bl2_stage_init 0xc1
  559 04:17:39.072529  bl2_stage_init 0x02
  560 04:17:39.073016  
  561 04:17:39.073472  L0:00000000
  562 04:17:39.073915  L1:00000703
  563 04:17:39.074355  L2:00008067
  564 04:17:39.074790  L3:15000000
  565 04:17:39.078192  S1:00000000
  566 04:17:39.078679  B2:20282000
  567 04:17:39.079124  B1:a0f83180
  568 04:17:39.079572  
  569 04:17:39.080071  TE: 70505
  570 04:17:39.080539  
  571 04:17:39.083731  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  572 04:17:39.084247  
  573 04:17:39.089337  Board ID = 1
  574 04:17:39.089828  Set cpu clk to 24M
  575 04:17:39.090272  Set clk81 to 24M
  576 04:17:39.094938  Use GP1_pll as DSU clk.
  577 04:17:39.095422  DSU clk: 1200 Mhz
  578 04:17:39.095867  CPU clk: 1200 MHz
  579 04:17:39.100545  Set clk81 to 166.6M
  580 04:17:39.106153  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  581 04:17:39.106647  board id: 1
  582 04:17:39.113370  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  583 04:17:39.124315  fw parse done
  584 04:17:39.130185  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  585 04:17:39.173375  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  586 04:17:39.184577  PIEI prepare done
  587 04:17:39.185063  fastboot data load
  588 04:17:39.185517  fastboot data verify
  589 04:17:39.190116  verify result: 266
  590 04:17:39.195688  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  591 04:17:39.196232  LPDDR4 probe
  592 04:17:39.196682  ddr clk to 1584MHz
  593 04:17:39.203658  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  594 04:17:39.241468  
  595 04:17:39.241970  dmc_version 0001
  596 04:17:39.248428  Check phy result
  597 04:17:39.254437  INFO : End of CA training
  598 04:17:39.254922  INFO : End of initialization
  599 04:17:39.260009  INFO : Training has run successfully!
  600 04:17:39.260494  Check phy result
  601 04:17:39.265641  INFO : End of initialization
  602 04:17:39.266140  INFO : End of read enable training
  603 04:17:39.271161  INFO : End of fine write leveling
  604 04:17:39.276762  INFO : End of Write leveling coarse delay
  605 04:17:39.277244  INFO : Training has run successfully!
  606 04:17:39.277701  Check phy result
  607 04:17:39.282392  INFO : End of initialization
  608 04:17:39.282881  INFO : End of read dq deskew training
  609 04:17:39.287964  INFO : End of MPR read delay center optimization
  610 04:17:39.293541  INFO : End of write delay center optimization
  611 04:17:39.299152  INFO : End of read delay center optimization
  612 04:17:39.299640  INFO : End of max read latency training
  613 04:17:39.304764  INFO : Training has run successfully!
  614 04:17:39.305250  1D training succeed
  615 04:17:39.313968  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  616 04:17:39.362441  Check phy result
  617 04:17:39.362964  INFO : End of initialization
  618 04:17:39.389659  INFO : End of 2D read delay Voltage center optimization
  619 04:17:39.413787  INFO : End of 2D read delay Voltage center optimization
  620 04:17:39.470604  INFO : End of 2D write delay Voltage center optimization
  621 04:17:39.524506  INFO : End of 2D write delay Voltage center optimization
  622 04:17:39.530053  INFO : Training has run successfully!
  623 04:17:39.530539  
  624 04:17:39.530993  channel==0
  625 04:17:39.535605  RxClkDly_Margin_A0==88 ps 9
  626 04:17:39.536118  TxDqDly_Margin_A0==98 ps 10
  627 04:17:39.541217  RxClkDly_Margin_A1==78 ps 8
  628 04:17:39.541709  TxDqDly_Margin_A1==98 ps 10
  629 04:17:39.542173  TrainedVREFDQ_A0==74
  630 04:17:39.546759  TrainedVREFDQ_A1==74
  631 04:17:39.547251  VrefDac_Margin_A0==24
  632 04:17:39.547707  DeviceVref_Margin_A0==40
  633 04:17:39.552496  VrefDac_Margin_A1==23
  634 04:17:39.552988  DeviceVref_Margin_A1==40
  635 04:17:39.553429  
  636 04:17:39.553862  
  637 04:17:39.557960  channel==1
  638 04:17:39.558435  RxClkDly_Margin_A0==78 ps 8
  639 04:17:39.558874  TxDqDly_Margin_A0==98 ps 10
  640 04:17:39.563657  RxClkDly_Margin_A1==78 ps 8
  641 04:17:39.564152  TxDqDly_Margin_A1==78 ps 8
  642 04:17:39.569278  TrainedVREFDQ_A0==78
  643 04:17:39.569765  TrainedVREFDQ_A1==75
  644 04:17:39.570208  VrefDac_Margin_A0==22
  645 04:17:39.574787  DeviceVref_Margin_A0==36
  646 04:17:39.575280  VrefDac_Margin_A1==22
  647 04:17:39.580460  DeviceVref_Margin_A1==39
  648 04:17:39.580944  
  649 04:17:39.581406   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  650 04:17:39.581858  
  651 04:17:39.613960  soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000063
  652 04:17:39.614500  2D training succeed
  653 04:17:39.619538  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  654 04:17:39.625224  auto size-- 65535DDR cs0 size: 2048MB
  655 04:17:39.625717  DDR cs1 size: 2048MB
  656 04:17:39.630829  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  657 04:17:39.631314  cs0 DataBus test pass
  658 04:17:39.636460  cs1 DataBus test pass
  659 04:17:39.636947  cs0 AddrBus test pass
  660 04:17:39.637395  cs1 AddrBus test pass
  661 04:17:39.637829  
  662 04:17:39.642011  100bdlr_step_size ps== 471
  663 04:17:39.642503  result report
  664 04:17:39.647536  boot times 0Enable ddr reg access
  665 04:17:39.652818  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  666 04:17:39.666822  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  667 04:17:40.326797  bl2z: ptr: 05129330, size: 00001e40
  668 04:17:40.336139  0.0;M3 CHK:0;cm4_sp_mode 0
  669 04:17:40.336753  MVN_1=0x00000000
  670 04:17:40.337213  MVN_2=0x00000000
  671 04:17:40.347584  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  672 04:17:40.348199  OPS=0x04
  673 04:17:40.348660  ring efuse init
  674 04:17:40.353275  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  675 04:17:40.353834  [0.017354 Inits done]
  676 04:17:40.354294  secure task start!
  677 04:17:40.361470  high task start!
  678 04:17:40.362238  low task start!
  679 04:17:40.362727  run into bl31
  680 04:17:40.370010  NOTICE:  BL31: v1.3(release):4fc40b1
  681 04:17:40.378814  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  682 04:17:40.380308  NOTICE:  BL31: G12A normal boot!
  683 04:17:40.393323  NOTICE:  BL31: BL33 decompress pass
  684 04:17:40.398962  ERROR:   Error initializing runtime service opteed_fast
  685 04:17:41.193242  
  686 04:17:41.193868  
  687 04:17:41.198719  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  688 04:17:41.199610  
  689 04:17:41.202142  Model: Libre Computer AML-S905D3-CC Solitude
  690 04:17:41.348971  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  691 04:17:41.364349  DRAM:  2 GiB (effective 3.8 GiB)
  692 04:17:41.465302  Core:  406 devices, 33 uclasses, devicetree: separate
  693 04:17:41.471115  WDT:   Not starting watchdog@f0d0
  694 04:17:41.496337  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  695 04:17:41.508515  Loading Environment from FAT... Card did not respond to voltage select! : -110
  696 04:17:41.513535  ** Bad device specification mmc 0 **
  697 04:17:41.523551  Card did not respond to voltage select! : -110
  698 04:17:41.531189  ** Bad device specification mmc 0 **
  699 04:17:41.531707  Couldn't find partition mmc 0
  700 04:17:41.539511  Card did not respond to voltage select! : -110
  701 04:17:41.545058  ** Bad device specification mmc 0 **
  702 04:17:41.545577  Couldn't find partition mmc 0
  703 04:17:41.550093  Error: could not access storage.
  704 04:17:41.847561  Net:   eth0: ethernet@ff3f0000
  705 04:17:41.848214  starting USB...
  706 04:17:42.092434  Bus usb@ff500000: Register 3000140 NbrPorts 3
  707 04:17:42.093051  Starting the controller
  708 04:17:42.099404  USB XHCI 1.10
  709 04:17:43.653854  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  710 04:17:43.662188         scanning usb for storage devices... 0 Storage Device(s) found
  712 04:17:43.713852  Hit any key to stop autoboot:  1 
  713 04:17:43.714784  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  714 04:17:43.715453  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  715 04:17:43.716087  Setting prompt string to ['=>']
  716 04:17:43.716658  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  717 04:17:43.728342   0 
  718 04:17:43.729361  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  720 04:17:43.830695  => setenv autoload no
  721 04:17:43.831760  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  722 04:17:43.837269  setenv autoload no
  724 04:17:43.938918  => setenv initrd_high 0xffffffff
  725 04:17:43.939925  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  726 04:17:43.944432  setenv initrd_high 0xffffffff
  728 04:17:44.046053  => setenv fdt_high 0xffffffff
  729 04:17:44.047050  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  730 04:17:44.051618  setenv fdt_high 0xffffffff
  732 04:17:44.153330  => dhcp
  733 04:17:44.154158  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  734 04:17:44.158483  dhcp
  735 04:17:45.215307  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  736 04:17:45.216037  Speed: 1000, full duplex
  737 04:17:45.216529  BOOTP broadcast 1
  738 04:17:45.224907  DHCP client bound to address 192.168.6.21 (9 ms)
  740 04:17:45.326510  => setenv serverip 192.168.6.2
  741 04:17:45.327360  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  742 04:17:45.332442  setenv serverip 192.168.6.2
  744 04:17:45.434031  => tftpboot 0x01080000 878993/tftp-deploy-dgjp1kvs/kernel/uImage
  745 04:17:45.434829  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  746 04:17:45.441449  tftpboot 0x01080000 878993/tftp-deploy-dgjp1kvs/kernel/uImage
  747 04:17:45.441981  Speed: 1000, full duplex
  748 04:17:45.442436  Using ethernet@ff3f0000 device
  749 04:17:45.447023  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  750 04:17:45.452466  Filename '878993/tftp-deploy-dgjp1kvs/kernel/uImage'.
  751 04:17:45.456471  Load address: 0x1080000
  752 04:17:47.848363  Loading: *##################################################  36.1 MiB
  753 04:17:47.849038  	 15.1 MiB/s
  754 04:17:47.849520  done
  755 04:17:47.852613  Bytes transferred = 37814848 (2410240 hex)
  757 04:17:47.954233  => tftpboot 0x08000000 878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  758 04:17:47.954994  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
  759 04:17:47.961857  tftpboot 0x08000000 878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot
  760 04:17:47.962370  Speed: 1000, full duplex
  761 04:17:47.962807  Using ethernet@ff3f0000 device
  762 04:17:47.967301  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  763 04:17:47.977148  Filename '878993/tftp-deploy-dgjp1kvs/ramdisk/ramdisk.cpio.gz.uboot'.
  764 04:17:47.977689  Load address: 0x8000000
  765 04:17:57.371536  Loading: *##############################T ################### UDP wrong checksum 0000000f 000074de
  766 04:18:02.373276  T  UDP wrong checksum 0000000f 000074de
  767 04:18:12.375333  T T  UDP wrong checksum 0000000f 000074de
  768 04:18:32.379073  T T T T  UDP wrong checksum 0000000f 000074de
  769 04:18:47.382981  T T 
  770 04:18:47.383449  Retry count exceeded; starting again
  772 04:18:47.385368  end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
  775 04:18:47.387250  end: 2.4 uboot-commands (duration 00:01:23) [common]
  777 04:18:47.389082  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  779 04:18:47.390197  end: 2 uboot-action (duration 00:01:23) [common]
  781 04:18:47.391803  Cleaning after the job
  782 04:18:47.392455  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/ramdisk
  783 04:18:47.393911  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/kernel
  784 04:18:47.430510  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/dtb
  785 04:18:47.431392  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/878993/tftp-deploy-dgjp1kvs/modules
  786 04:18:47.452375  start: 4.1 power-off (timeout 00:00:30) [common]
  787 04:18:47.453148  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  788 04:18:47.488934  >> OK - accepted request

  789 04:18:47.490977  Returned 0 in 0 seconds
  790 04:18:47.592359  end: 4.1 power-off (duration 00:00:00) [common]
  792 04:18:47.593518  start: 4.2 read-feedback (timeout 00:10:00) [common]
  793 04:18:47.594351  Listened to connection for namespace 'common' for up to 1s
  794 04:18:48.594530  Finalising connection for namespace 'common'
  795 04:18:48.595292  Disconnecting from shell: Finalise
  796 04:18:48.595858  => 
  797 04:18:48.696944  end: 4.2 read-feedback (duration 00:00:01) [common]
  798 04:18:48.697659  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/878993
  799 04:18:49.354298  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/878993
  800 04:18:49.355098  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.