Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:31:22.834458 lava-dispatcher, installed at version: 2024.01
2 01:31:22.835287 start: 0 validate
3 01:31:22.835771 Start time: 2024-11-01 01:31:22.835739+00:00 (UTC)
4 01:31:22.836353 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:31:22.836909 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:31:22.879385 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:31:22.879920 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 01:31:22.908638 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:31:22.909245 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:31:22.940983 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:31:22.941546 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:31:22.976871 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:31:22.977384 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 01:31:23.018185 validate duration: 0.18
16 01:31:23.019027 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:31:23.019339 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:31:23.019640 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:31:23.020212 Not decompressing ramdisk as can be used compressed.
20 01:31:23.020652 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:31:23.020922 saving as /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/ramdisk/initrd.cpio.gz
22 01:31:23.021180 total size: 5628182 (5 MB)
23 01:31:23.061430 progress 0 % (0 MB)
24 01:31:23.069098 progress 5 % (0 MB)
25 01:31:23.076937 progress 10 % (0 MB)
26 01:31:23.083801 progress 15 % (0 MB)
27 01:31:23.088170 progress 20 % (1 MB)
28 01:31:23.091828 progress 25 % (1 MB)
29 01:31:23.095867 progress 30 % (1 MB)
30 01:31:23.100121 progress 35 % (1 MB)
31 01:31:23.103653 progress 40 % (2 MB)
32 01:31:23.107587 progress 45 % (2 MB)
33 01:31:23.111197 progress 50 % (2 MB)
34 01:31:23.115207 progress 55 % (2 MB)
35 01:31:23.119157 progress 60 % (3 MB)
36 01:31:23.122691 progress 65 % (3 MB)
37 01:31:23.126676 progress 70 % (3 MB)
38 01:31:23.130280 progress 75 % (4 MB)
39 01:31:23.134222 progress 80 % (4 MB)
40 01:31:23.137740 progress 85 % (4 MB)
41 01:31:23.141687 progress 90 % (4 MB)
42 01:31:23.145475 progress 95 % (5 MB)
43 01:31:23.148731 progress 100 % (5 MB)
44 01:31:23.149382 5 MB downloaded in 0.13 s (41.88 MB/s)
45 01:31:23.149936 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:31:23.150832 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:31:23.151127 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:31:23.151401 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:31:23.151874 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 01:31:23.152150 saving as /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/kernel/Image
52 01:31:23.152362 total size: 65665536 (62 MB)
53 01:31:23.152573 No compression specified
54 01:31:23.187273 progress 0 % (0 MB)
55 01:31:23.227887 progress 5 % (3 MB)
56 01:31:23.266934 progress 10 % (6 MB)
57 01:31:23.306960 progress 15 % (9 MB)
58 01:31:23.346119 progress 20 % (12 MB)
59 01:31:23.385598 progress 25 % (15 MB)
60 01:31:23.424654 progress 30 % (18 MB)
61 01:31:23.463898 progress 35 % (21 MB)
62 01:31:23.503038 progress 40 % (25 MB)
63 01:31:23.543367 progress 45 % (28 MB)
64 01:31:23.583552 progress 50 % (31 MB)
65 01:31:23.624959 progress 55 % (34 MB)
66 01:31:23.664065 progress 60 % (37 MB)
67 01:31:23.702937 progress 65 % (40 MB)
68 01:31:23.742281 progress 70 % (43 MB)
69 01:31:23.781002 progress 75 % (46 MB)
70 01:31:23.820410 progress 80 % (50 MB)
71 01:31:23.860084 progress 85 % (53 MB)
72 01:31:23.899602 progress 90 % (56 MB)
73 01:31:23.938618 progress 95 % (59 MB)
74 01:31:23.976929 progress 100 % (62 MB)
75 01:31:23.977697 62 MB downloaded in 0.83 s (75.88 MB/s)
76 01:31:23.978181 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:31:23.979000 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:31:23.979275 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:31:23.979539 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:31:23.980032 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:31:23.980318 saving as /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:31:23.980529 total size: 54703 (0 MB)
84 01:31:23.980742 No compression specified
85 01:31:24.018506 progress 59 % (0 MB)
86 01:31:24.019388 progress 100 % (0 MB)
87 01:31:24.020014 0 MB downloaded in 0.04 s (1.32 MB/s)
88 01:31:24.020519 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:31:24.021374 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:31:24.021651 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:31:24.021927 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:31:24.022402 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:31:24.022653 saving as /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/nfsrootfs/full.rootfs.tar
95 01:31:24.022867 total size: 107552908 (102 MB)
96 01:31:24.023088 Using unxz to decompress xz
97 01:31:24.060906 progress 0 % (0 MB)
98 01:31:24.698992 progress 5 % (5 MB)
99 01:31:25.418319 progress 10 % (10 MB)
100 01:31:26.136286 progress 15 % (15 MB)
101 01:31:26.897181 progress 20 % (20 MB)
102 01:31:27.462708 progress 25 % (25 MB)
103 01:31:28.083102 progress 30 % (30 MB)
104 01:31:28.824606 progress 35 % (35 MB)
105 01:31:29.188417 progress 40 % (41 MB)
106 01:31:29.621372 progress 45 % (46 MB)
107 01:31:30.313822 progress 50 % (51 MB)
108 01:31:30.998266 progress 55 % (56 MB)
109 01:31:31.761402 progress 60 % (61 MB)
110 01:31:32.649305 progress 65 % (66 MB)
111 01:31:33.383662 progress 70 % (71 MB)
112 01:31:34.142937 progress 75 % (76 MB)
113 01:31:34.818782 progress 80 % (82 MB)
114 01:31:35.525141 progress 85 % (87 MB)
115 01:31:36.255799 progress 90 % (92 MB)
116 01:31:37.020244 progress 95 % (97 MB)
117 01:31:37.761758 progress 100 % (102 MB)
118 01:31:37.773578 102 MB downloaded in 13.75 s (7.46 MB/s)
119 01:31:37.774387 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:31:37.776279 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:31:37.776871 start: 1.5 download-retry (timeout 00:09:45) [common]
123 01:31:37.777446 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 01:31:37.778345 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 01:31:37.778857 saving as /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/modules/modules.tar
126 01:31:37.779312 total size: 16419048 (15 MB)
127 01:31:37.779779 Using unxz to decompress xz
128 01:31:37.825606 progress 0 % (0 MB)
129 01:31:37.931011 progress 5 % (0 MB)
130 01:31:38.044563 progress 10 % (1 MB)
131 01:31:38.157203 progress 15 % (2 MB)
132 01:31:38.269883 progress 20 % (3 MB)
133 01:31:38.377681 progress 25 % (3 MB)
134 01:31:38.493385 progress 30 % (4 MB)
135 01:31:38.603669 progress 35 % (5 MB)
136 01:31:38.716431 progress 40 % (6 MB)
137 01:31:38.835439 progress 45 % (7 MB)
138 01:31:38.951709 progress 50 % (7 MB)
139 01:31:39.068207 progress 55 % (8 MB)
140 01:31:39.183682 progress 60 % (9 MB)
141 01:31:39.298898 progress 65 % (10 MB)
142 01:31:39.414141 progress 70 % (10 MB)
143 01:31:39.528846 progress 75 % (11 MB)
144 01:31:39.643886 progress 80 % (12 MB)
145 01:31:39.775279 progress 85 % (13 MB)
146 01:31:39.883259 progress 90 % (14 MB)
147 01:31:40.018648 progress 95 % (14 MB)
148 01:31:40.147562 progress 100 % (15 MB)
149 01:31:40.159302 15 MB downloaded in 2.38 s (6.58 MB/s)
150 01:31:40.159897 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:31:40.161666 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:31:40.162240 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 01:31:40.162810 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 01:31:50.176658 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/919767/extract-nfsrootfs-4nui7dot
156 01:31:50.177268 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:31:50.177560 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 01:31:50.178169 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf
159 01:31:50.178617 makedir: /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin
160 01:31:50.178945 makedir: /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/tests
161 01:31:50.179264 makedir: /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/results
162 01:31:50.179592 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-add-keys
163 01:31:50.180176 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-add-sources
164 01:31:50.180724 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-background-process-start
165 01:31:50.181219 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-background-process-stop
166 01:31:50.181779 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-common-functions
167 01:31:50.182281 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-echo-ipv4
168 01:31:50.182784 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-install-packages
169 01:31:50.183335 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-installed-packages
170 01:31:50.183822 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-os-build
171 01:31:50.184351 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-probe-channel
172 01:31:50.184907 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-probe-ip
173 01:31:50.185394 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-target-ip
174 01:31:50.185871 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-target-mac
175 01:31:50.186341 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-target-storage
176 01:31:50.186819 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-case
177 01:31:50.187324 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-event
178 01:31:50.187838 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-feedback
179 01:31:50.188355 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-raise
180 01:31:50.188833 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-reference
181 01:31:50.189312 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-runner
182 01:31:50.189786 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-set
183 01:31:50.190251 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-test-shell
184 01:31:50.190733 Updating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-install-packages (oe)
185 01:31:50.191259 Updating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/bin/lava-installed-packages (oe)
186 01:31:50.191693 Creating /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/environment
187 01:31:50.192083 LAVA metadata
188 01:31:50.192346 - LAVA_JOB_ID=919767
189 01:31:50.192560 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:31:50.192920 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 01:31:50.193880 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:31:50.194187 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 01:31:50.194394 skipped lava-vland-overlay
194 01:31:50.194638 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:31:50.194890 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 01:31:50.195106 skipped lava-multinode-overlay
197 01:31:50.195347 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:31:50.195597 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 01:31:50.195843 Loading test definitions
200 01:31:50.196146 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 01:31:50.196373 Using /lava-919767 at stage 0
202 01:31:50.197559 uuid=919767_1.6.2.4.1 testdef=None
203 01:31:50.197859 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:31:50.198122 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 01:31:50.199907 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:31:50.200716 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 01:31:50.202992 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:31:50.203807 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 01:31:50.205983 runner path: /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/0/tests/0_dmesg test_uuid 919767_1.6.2.4.1
212 01:31:50.206549 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:31:50.207295 Creating lava-test-runner.conf files
215 01:31:50.207495 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/919767/lava-overlay-235vlnbf/lava-919767/0 for stage 0
216 01:31:50.207845 - 0_dmesg
217 01:31:50.208248 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:31:50.208527 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 01:31:50.229941 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:31:50.230332 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 01:31:50.230593 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:31:50.230858 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:31:50.231120 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 01:31:50.872391 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:31:50.872894 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 01:31:50.873150 extracting modules file /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919767/extract-nfsrootfs-4nui7dot
227 01:31:52.745861 extracting modules file /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk
228 01:31:54.601362 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 01:31:54.601846 start: 1.6.5 apply-overlay-tftp (timeout 00:09:28) [common]
230 01:31:54.602123 [common] Applying overlay to NFS
231 01:31:54.602334 [common] Applying overlay /var/lib/lava/dispatcher/tmp/919767/compress-overlay-afxbru4j/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/919767/extract-nfsrootfs-4nui7dot
232 01:31:54.631735 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:31:54.632155 start: 1.6.6 prepare-kernel (timeout 00:09:28) [common]
234 01:31:54.632427 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:28) [common]
235 01:31:54.632655 Converting downloaded kernel to a uImage
236 01:31:54.632963 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/kernel/Image /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/kernel/uImage
237 01:31:55.300614 output: Image Name:
238 01:31:55.301051 output: Created: Fri Nov 1 01:31:54 2024
239 01:31:55.301264 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:31:55.301468 output: Data Size: 65665536 Bytes = 64126.50 KiB = 62.62 MiB
241 01:31:55.301670 output: Load Address: 01080000
242 01:31:55.301869 output: Entry Point: 01080000
243 01:31:55.302067 output:
244 01:31:55.302403 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 01:31:55.302671 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 01:31:55.302940 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 01:31:55.303193 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:31:55.303450 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 01:31:55.303723 Building ramdisk /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk
250 01:31:58.471395 >> 242908 blocks
251 01:32:08.989265 Adding RAMdisk u-boot header.
252 01:32:08.989981 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk.cpio.gz.uboot
253 01:32:09.334037 output: Image Name:
254 01:32:09.334466 output: Created: Fri Nov 1 01:32:08 2024
255 01:32:09.334681 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:32:09.334888 output: Data Size: 31443447 Bytes = 30706.49 KiB = 29.99 MiB
257 01:32:09.335090 output: Load Address: 00000000
258 01:32:09.335291 output: Entry Point: 00000000
259 01:32:09.335489 output:
260 01:32:09.336175 rename /var/lib/lava/dispatcher/tmp/919767/extract-overlay-ramdisk-f8y3_azg/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
261 01:32:09.336965 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 01:32:09.337586 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 01:32:09.338207 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 01:32:09.338708 No LXC device requested
265 01:32:09.339260 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:32:09.339823 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 01:32:09.340416 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:32:09.340877 Checking files for TFTP limit of 4294967296 bytes.
269 01:32:09.343787 end: 1 tftp-deploy (duration 00:00:46) [common]
270 01:32:09.344445 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:32:09.345024 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:32:09.345573 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:32:09.346123 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:32:09.346697 Using kernel file from prepare-kernel: 919767/tftp-deploy-6jgvrszq/kernel/uImage
275 01:32:09.347388 substitutions:
276 01:32:09.347836 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:32:09.348319 - {DTB_ADDR}: 0x01070000
278 01:32:09.348761 - {DTB}: 919767/tftp-deploy-6jgvrszq/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:32:09.349201 - {INITRD}: 919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
280 01:32:09.349640 - {KERNEL_ADDR}: 0x01080000
281 01:32:09.350074 - {KERNEL}: 919767/tftp-deploy-6jgvrszq/kernel/uImage
282 01:32:09.350505 - {LAVA_MAC}: None
283 01:32:09.350978 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/919767/extract-nfsrootfs-4nui7dot
284 01:32:09.351413 - {NFS_SERVER_IP}: 192.168.6.2
285 01:32:09.351842 - {PRESEED_CONFIG}: None
286 01:32:09.352303 - {PRESEED_LOCAL}: None
287 01:32:09.352734 - {RAMDISK_ADDR}: 0x08000000
288 01:32:09.353161 - {RAMDISK}: 919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
289 01:32:09.353588 - {ROOT_PART}: None
290 01:32:09.354014 - {ROOT}: None
291 01:32:09.354444 - {SERVER_IP}: 192.168.6.2
292 01:32:09.354867 - {TEE_ADDR}: 0x83000000
293 01:32:09.355291 - {TEE}: None
294 01:32:09.355724 Parsed boot commands:
295 01:32:09.356173 - setenv autoload no
296 01:32:09.356606 - setenv initrd_high 0xffffffff
297 01:32:09.357034 - setenv fdt_high 0xffffffff
298 01:32:09.357459 - dhcp
299 01:32:09.357884 - setenv serverip 192.168.6.2
300 01:32:09.358310 - tftpboot 0x01080000 919767/tftp-deploy-6jgvrszq/kernel/uImage
301 01:32:09.358735 - tftpboot 0x08000000 919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
302 01:32:09.359163 - tftpboot 0x01070000 919767/tftp-deploy-6jgvrszq/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:32:09.359592 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/919767/extract-nfsrootfs-4nui7dot,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:32:09.360057 - bootm 0x01080000 0x08000000 0x01070000
305 01:32:09.360614 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:32:09.362234 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:32:09.362690 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:32:09.377576 Setting prompt string to ['lava-test: # ']
310 01:32:09.379159 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:32:09.379811 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:32:09.380459 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:32:09.381041 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:32:09.382261 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:32:09.420273 >> OK - accepted request
316 01:32:09.422076 Returned 0 in 0 seconds
317 01:32:09.523204 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:32:09.525036 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:32:09.525646 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:32:09.526203 Setting prompt string to ['Hit any key to stop autoboot']
322 01:32:09.526716 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:32:09.528450 Trying 192.168.56.21...
324 01:32:09.528990 Connected to conserv1.
325 01:32:09.529447 Escape character is '^]'.
326 01:32:09.529906
327 01:32:09.530368 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 01:32:09.530835
329 01:32:21.172827 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:32:21.173471 bl2_stage_init 0x01
331 01:32:21.173922 bl2_stage_init 0x81
332 01:32:21.178503 hw id: 0x0000 - pwm id 0x01
333 01:32:21.178995 bl2_stage_init 0xc1
334 01:32:21.179432 bl2_stage_init 0x02
335 01:32:21.179865
336 01:32:21.184085 L0:00000000
337 01:32:21.184562 L1:20000703
338 01:32:21.184995 L2:00008067
339 01:32:21.185430 L3:14000000
340 01:32:21.189677 B2:00402000
341 01:32:21.190133 B1:e0f83180
342 01:32:21.190563
343 01:32:21.190991 TE: 58167
344 01:32:21.191425
345 01:32:21.195146 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:32:21.195610
347 01:32:21.196089 Board ID = 1
348 01:32:21.200784 Set A53 clk to 24M
349 01:32:21.201248 Set A73 clk to 24M
350 01:32:21.201679 Set clk81 to 24M
351 01:32:21.206455 A53 clk: 1200 MHz
352 01:32:21.206910 A73 clk: 1200 MHz
353 01:32:21.207335 CLK81: 166.6M
354 01:32:21.207758 smccc: 00012abd
355 01:32:21.212113 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:32:21.217554 board id: 1
357 01:32:21.223525 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:32:21.234191 fw parse done
359 01:32:21.240178 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:32:21.282773 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:32:21.293684 PIEI prepare done
362 01:32:21.294138 fastboot data load
363 01:32:21.294574 fastboot data verify
364 01:32:21.299182 verify result: 266
365 01:32:21.304757 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:32:21.305217 LPDDR4 probe
367 01:32:21.305648 ddr clk to 1584MHz
368 01:32:21.312789 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:32:21.350097
370 01:32:21.350556 dmc_version 0001
371 01:32:21.356846 Check phy result
372 01:32:21.362693 INFO : End of CA training
373 01:32:21.363155 INFO : End of initialization
374 01:32:21.368196 INFO : Training has run successfully!
375 01:32:21.368653 Check phy result
376 01:32:21.373841 INFO : End of initialization
377 01:32:21.374298 INFO : End of read enable training
378 01:32:21.377074 INFO : End of fine write leveling
379 01:32:21.382728 INFO : End of Write leveling coarse delay
380 01:32:21.388231 INFO : Training has run successfully!
381 01:32:21.388686 Check phy result
382 01:32:21.389118 INFO : End of initialization
383 01:32:21.393835 INFO : End of read dq deskew training
384 01:32:21.399404 INFO : End of MPR read delay center optimization
385 01:32:21.399874 INFO : End of write delay center optimization
386 01:32:21.405029 INFO : End of read delay center optimization
387 01:32:21.410755 INFO : End of max read latency training
388 01:32:21.411210 INFO : Training has run successfully!
389 01:32:21.416220 1D training succeed
390 01:32:21.422187 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:32:21.469919 Check phy result
392 01:32:21.470387 INFO : End of initialization
393 01:32:21.492202 INFO : End of 2D read delay Voltage center optimization
394 01:32:21.512281 INFO : End of 2D read delay Voltage center optimization
395 01:32:21.564234 INFO : End of 2D write delay Voltage center optimization
396 01:32:21.613455 INFO : End of 2D write delay Voltage center optimization
397 01:32:21.619053 INFO : Training has run successfully!
398 01:32:21.619512
399 01:32:21.619949 channel==0
400 01:32:21.624759 RxClkDly_Margin_A0==88 ps 9
401 01:32:21.625219 TxDqDly_Margin_A0==98 ps 10
402 01:32:21.630206 RxClkDly_Margin_A1==88 ps 9
403 01:32:21.630667 TxDqDly_Margin_A1==98 ps 10
404 01:32:21.631104 TrainedVREFDQ_A0==74
405 01:32:21.635841 TrainedVREFDQ_A1==74
406 01:32:21.636337 VrefDac_Margin_A0==24
407 01:32:21.636771 DeviceVref_Margin_A0==40
408 01:32:21.641425 VrefDac_Margin_A1==24
409 01:32:21.641883 DeviceVref_Margin_A1==40
410 01:32:21.642313
411 01:32:21.642745
412 01:32:21.647096 channel==1
413 01:32:21.647565 RxClkDly_Margin_A0==98 ps 10
414 01:32:21.648031 TxDqDly_Margin_A0==88 ps 9
415 01:32:21.652600 RxClkDly_Margin_A1==98 ps 10
416 01:32:21.653059 TxDqDly_Margin_A1==88 ps 9
417 01:32:21.658261 TrainedVREFDQ_A0==77
418 01:32:21.658727 TrainedVREFDQ_A1==77
419 01:32:21.659158 VrefDac_Margin_A0==22
420 01:32:21.663793 DeviceVref_Margin_A0==37
421 01:32:21.664279 VrefDac_Margin_A1==22
422 01:32:21.669502 DeviceVref_Margin_A1==37
423 01:32:21.669956
424 01:32:21.670389 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:32:21.670815
426 01:32:21.703069 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 01:32:21.703652 2D training succeed
428 01:32:21.708705 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:32:21.714134 auto size-- 65535DDR cs0 size: 2048MB
430 01:32:21.714610 DDR cs1 size: 2048MB
431 01:32:21.719753 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:32:21.720263 cs0 DataBus test pass
433 01:32:21.725307 cs1 DataBus test pass
434 01:32:21.725775 cs0 AddrBus test pass
435 01:32:21.726206 cs1 AddrBus test pass
436 01:32:21.726633
437 01:32:21.730934 100bdlr_step_size ps== 420
438 01:32:21.731408 result report
439 01:32:21.736520 boot times 0Enable ddr reg access
440 01:32:21.741888 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:32:21.755320 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:32:22.327490 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:32:22.328185 MVN_1=0x00000000
444 01:32:22.332862 MVN_2=0x00000000
445 01:32:22.338631 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:32:22.339098 OPS=0x10
447 01:32:22.339538 ring efuse init
448 01:32:22.340006 chipver efuse init
449 01:32:22.344241 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:32:22.349853 [0.018961 Inits done]
451 01:32:22.350330 secure task start!
452 01:32:22.350771 high task start!
453 01:32:22.354480 low task start!
454 01:32:22.354943 run into bl31
455 01:32:22.361107 NOTICE: BL31: v1.3(release):4fc40b1
456 01:32:22.368885 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:32:22.369366 NOTICE: BL31: G12A normal boot!
458 01:32:22.394230 NOTICE: BL31: BL33 decompress pass
459 01:32:22.399930 ERROR: Error initializing runtime service opteed_fast
460 01:32:23.633042
461 01:32:23.633720
462 01:32:23.648258 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:32:23.648757
464 01:32:23.649207 Model: Libre Computer AML-A311D-CC Alta
465 01:32:23.849612 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:32:23.873110 DRAM: 2 GiB (effective 3.8 GiB)
467 01:32:24.016287 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:32:24.021915 WDT: Not starting watchdog@f0d0
469 01:32:24.057390 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:32:24.066602 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:32:24.071745 ** Bad device specification mmc 0 **
472 01:32:24.082120 Card did not respond to voltage select! : -110
473 01:32:24.089672 ** Bad device specification mmc 0 **
474 01:32:24.090146 Couldn't find partition mmc 0
475 01:32:24.098115 Card did not respond to voltage select! : -110
476 01:32:24.103448 ** Bad device specification mmc 0 **
477 01:32:24.103915 Couldn't find partition mmc 0
478 01:32:24.108533 Error: could not access storage.
479 01:32:25.373223 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:32:25.373789 bl2_stage_init 0x01
481 01:32:25.374255 bl2_stage_init 0x81
482 01:32:25.378694 hw id: 0x0000 - pwm id 0x01
483 01:32:25.379167 bl2_stage_init 0xc1
484 01:32:25.379620 bl2_stage_init 0x02
485 01:32:25.380127
486 01:32:25.384263 L0:00000000
487 01:32:25.384737 L1:20000703
488 01:32:25.385182 L2:00008067
489 01:32:25.385623 L3:14000000
490 01:32:25.389890 B2:00402000
491 01:32:25.390354 B1:e0f83180
492 01:32:25.390798
493 01:32:25.391236 TE: 58124
494 01:32:25.391674
495 01:32:25.396662 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:32:25.397145
497 01:32:25.397594 Board ID = 1
498 01:32:25.402384 Set A53 clk to 24M
499 01:32:25.402874 Set A73 clk to 24M
500 01:32:25.403324 Set clk81 to 24M
501 01:32:25.408184 A53 clk: 1200 MHz
502 01:32:25.408659 A73 clk: 1200 MHz
503 01:32:25.409107 CLK81: 166.6M
504 01:32:25.409554 smccc: 00012a92
505 01:32:25.412245 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:32:25.417885 board id: 1
507 01:32:25.423809 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:32:25.434580 fw parse done
509 01:32:25.440466 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:32:25.482143 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:32:25.493854 PIEI prepare done
512 01:32:25.494319 fastboot data load
513 01:32:25.494768 fastboot data verify
514 01:32:25.499520 verify result: 266
515 01:32:25.505227 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:32:25.505718 LPDDR4 probe
517 01:32:25.506166 ddr clk to 1584MHz
518 01:32:25.513084 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:32:25.550217
520 01:32:25.550707 dmc_version 0001
521 01:32:25.557160 Check phy result
522 01:32:25.562990 INFO : End of CA training
523 01:32:25.563464 INFO : End of initialization
524 01:32:25.568588 INFO : Training has run successfully!
525 01:32:25.569067 Check phy result
526 01:32:25.574203 INFO : End of initialization
527 01:32:25.574676 INFO : End of read enable training
528 01:32:25.579755 INFO : End of fine write leveling
529 01:32:25.585304 INFO : End of Write leveling coarse delay
530 01:32:25.585773 INFO : Training has run successfully!
531 01:32:25.586221 Check phy result
532 01:32:25.590896 INFO : End of initialization
533 01:32:25.591360 INFO : End of read dq deskew training
534 01:32:25.596526 INFO : End of MPR read delay center optimization
535 01:32:25.602227 INFO : End of write delay center optimization
536 01:32:25.607709 INFO : End of read delay center optimization
537 01:32:25.608232 INFO : End of max read latency training
538 01:32:25.613308 INFO : Training has run successfully!
539 01:32:25.613773 1D training succeed
540 01:32:25.622532 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:32:25.671058 Check phy result
542 01:32:25.671532 INFO : End of initialization
543 01:32:25.692732 INFO : End of 2D read delay Voltage center optimization
544 01:32:25.713059 INFO : End of 2D read delay Voltage center optimization
545 01:32:25.764857 INFO : End of 2D write delay Voltage center optimization
546 01:32:25.814468 INFO : End of 2D write delay Voltage center optimization
547 01:32:25.820882 INFO : Training has run successfully!
548 01:32:25.821347
549 01:32:25.821811 channel==0
550 01:32:25.825510 RxClkDly_Margin_A0==88 ps 9
551 01:32:25.825980 TxDqDly_Margin_A0==98 ps 10
552 01:32:25.831088 RxClkDly_Margin_A1==88 ps 9
553 01:32:25.831556 TxDqDly_Margin_A1==98 ps 10
554 01:32:25.832051 TrainedVREFDQ_A0==74
555 01:32:25.836724 TrainedVREFDQ_A1==74
556 01:32:25.837206 VrefDac_Margin_A0==24
557 01:32:25.837652 DeviceVref_Margin_A0==40
558 01:32:25.842357 VrefDac_Margin_A1==24
559 01:32:25.842825 DeviceVref_Margin_A1==40
560 01:32:25.843269
561 01:32:25.843706
562 01:32:25.847949 channel==1
563 01:32:25.848442 RxClkDly_Margin_A0==98 ps 10
564 01:32:25.848885 TxDqDly_Margin_A0==88 ps 9
565 01:32:25.853443 RxClkDly_Margin_A1==88 ps 9
566 01:32:25.853920 TxDqDly_Margin_A1==88 ps 9
567 01:32:25.859053 TrainedVREFDQ_A0==77
568 01:32:25.859520 TrainedVREFDQ_A1==77
569 01:32:25.859964 VrefDac_Margin_A0==22
570 01:32:25.864655 DeviceVref_Margin_A0==37
571 01:32:25.865122 VrefDac_Margin_A1==24
572 01:32:25.870290 DeviceVref_Margin_A1==37
573 01:32:25.870769
574 01:32:25.871215 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:32:25.871655
576 01:32:25.903915 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000017 00000018 00000015 00000017 00000018 00000017 00000018 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 0000005f
577 01:32:25.904451 2D training succeed
578 01:32:25.909470 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:32:25.915062 auto size-- 65535DDR cs0 size: 2048MB
580 01:32:25.915534 DDR cs1 size: 2048MB
581 01:32:25.920664 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:32:25.921132 cs0 DataBus test pass
583 01:32:25.926312 cs1 DataBus test pass
584 01:32:25.926780 cs0 AddrBus test pass
585 01:32:25.927224 cs1 AddrBus test pass
586 01:32:25.927660
587 01:32:25.934584 100bdlr_step_size ps== 420
588 01:32:25.935070 result report
589 01:32:25.938402 boot times 0Enable ddr reg access
590 01:32:25.943760 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:32:25.956261 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:32:26.530125 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:32:26.530717 MVN_1=0x00000000
594 01:32:26.535362 MVN_2=0x00000000
595 01:32:26.541101 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:32:26.541615 OPS=0x10
597 01:32:26.542089 ring efuse init
598 01:32:26.542553 chipver efuse init
599 01:32:26.549361 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:32:26.549888 [0.018961 Inits done]
601 01:32:26.556846 secure task start!
602 01:32:26.557307 high task start!
603 01:32:26.557734 low task start!
604 01:32:26.558158 run into bl31
605 01:32:26.563502 NOTICE: BL31: v1.3(release):4fc40b1
606 01:32:26.571413 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:32:26.571888 NOTICE: BL31: G12A normal boot!
608 01:32:26.596703 NOTICE: BL31: BL33 decompress pass
609 01:32:26.602393 ERROR: Error initializing runtime service opteed_fast
610 01:32:27.835467
611 01:32:27.836183
612 01:32:27.843955 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:32:27.844519
614 01:32:27.844980 Model: Libre Computer AML-A311D-CC Alta
615 01:32:28.052230 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:32:28.075611 DRAM: 2 GiB (effective 3.8 GiB)
617 01:32:28.218697 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:32:28.224598 WDT: Not starting watchdog@f0d0
619 01:32:28.256694 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:32:28.269145 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:32:28.276700 ** Bad device specification mmc 0 **
622 01:32:28.284491 Card did not respond to voltage select! : -110
623 01:32:28.292294 ** Bad device specification mmc 0 **
624 01:32:28.292771 Couldn't find partition mmc 0
625 01:32:28.300436 Card did not respond to voltage select! : -110
626 01:32:28.305929 ** Bad device specification mmc 0 **
627 01:32:28.306402 Couldn't find partition mmc 0
628 01:32:28.310813 Error: could not access storage.
629 01:32:28.653680 Net: eth0: ethernet@ff3f0000
630 01:32:28.654094 starting USB...
631 01:32:28.905457 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:32:28.906008 Starting the controller
633 01:32:28.912062 USB XHCI 1.10
634 01:32:30.623480 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 01:32:30.623934 bl2_stage_init 0x01
636 01:32:30.624206 bl2_stage_init 0x81
637 01:32:30.629044 hw id: 0x0000 - pwm id 0x01
638 01:32:30.629342 bl2_stage_init 0xc1
639 01:32:30.629566 bl2_stage_init 0x02
640 01:32:30.629777
641 01:32:30.634401 L0:00000000
642 01:32:30.634668 L1:20000703
643 01:32:30.634881 L2:00008067
644 01:32:30.635088 L3:14000000
645 01:32:30.637519 B2:00402000
646 01:32:30.637953 B1:e0f83180
647 01:32:30.638358
648 01:32:30.638644 TE: 58167
649 01:32:30.638855
650 01:32:30.648661 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 01:32:30.649183
652 01:32:30.649643 Board ID = 1
653 01:32:30.650090 Set A53 clk to 24M
654 01:32:30.650531 Set A73 clk to 24M
655 01:32:30.654228 Set clk81 to 24M
656 01:32:30.654715 A53 clk: 1200 MHz
657 01:32:30.655161 A73 clk: 1200 MHz
658 01:32:30.657838 CLK81: 166.6M
659 01:32:30.658329 smccc: 00012abd
660 01:32:30.665537 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 01:32:30.669015 board id: 1
662 01:32:30.674165 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 01:32:30.684775 fw parse done
664 01:32:30.690682 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 01:32:30.733183 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 01:32:30.744171 PIEI prepare done
667 01:32:30.744662 fastboot data load
668 01:32:30.745115 fastboot data verify
669 01:32:30.749749 verify result: 266
670 01:32:30.755327 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 01:32:30.755830 LPDDR4 probe
672 01:32:30.756335 ddr clk to 1584MHz
673 01:32:30.763298 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 01:32:30.800564
675 01:32:30.801076 dmc_version 0001
676 01:32:30.807271 Check phy result
677 01:32:30.813178 INFO : End of CA training
678 01:32:30.813808 INFO : End of initialization
679 01:32:30.818788 INFO : Training has run successfully!
680 01:32:30.819364 Check phy result
681 01:32:30.824357 INFO : End of initialization
682 01:32:30.824862 INFO : End of read enable training
683 01:32:30.830034 INFO : End of fine write leveling
684 01:32:30.835537 INFO : End of Write leveling coarse delay
685 01:32:30.836052 INFO : Training has run successfully!
686 01:32:30.836511 Check phy result
687 01:32:30.841106 INFO : End of initialization
688 01:32:30.841592 INFO : End of read dq deskew training
689 01:32:30.846647 INFO : End of MPR read delay center optimization
690 01:32:30.852355 INFO : End of write delay center optimization
691 01:32:30.858033 INFO : End of read delay center optimization
692 01:32:30.858515 INFO : End of max read latency training
693 01:32:30.863551 INFO : Training has run successfully!
694 01:32:30.864068 1D training succeed
695 01:32:30.872748 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 01:32:30.920323 Check phy result
697 01:32:30.920825 INFO : End of initialization
698 01:32:30.942809 INFO : End of 2D read delay Voltage center optimization
699 01:32:30.962247 INFO : End of 2D read delay Voltage center optimization
700 01:32:31.015174 INFO : End of 2D write delay Voltage center optimization
701 01:32:31.064494 INFO : End of 2D write delay Voltage center optimization
702 01:32:31.070184 INFO : Training has run successfully!
703 01:32:31.070659
704 01:32:31.071109 channel==0
705 01:32:31.075667 RxClkDly_Margin_A0==88 ps 9
706 01:32:31.076182 TxDqDly_Margin_A0==98 ps 10
707 01:32:31.078963 RxClkDly_Margin_A1==88 ps 9
708 01:32:31.079428 TxDqDly_Margin_A1==98 ps 10
709 01:32:31.084540 TrainedVREFDQ_A0==74
710 01:32:31.085031 TrainedVREFDQ_A1==75
711 01:32:31.090107 VrefDac_Margin_A0==24
712 01:32:31.090585 DeviceVref_Margin_A0==40
713 01:32:31.091034 VrefDac_Margin_A1==24
714 01:32:31.095773 DeviceVref_Margin_A1==39
715 01:32:31.096276
716 01:32:31.096725
717 01:32:31.097165 channel==1
718 01:32:31.097600 RxClkDly_Margin_A0==98 ps 10
719 01:32:31.099190 TxDqDly_Margin_A0==98 ps 10
720 01:32:31.104770 RxClkDly_Margin_A1==98 ps 10
721 01:32:31.105247 TxDqDly_Margin_A1==98 ps 10
722 01:32:31.110325 TrainedVREFDQ_A0==77
723 01:32:31.110802 TrainedVREFDQ_A1==77
724 01:32:31.111252 VrefDac_Margin_A0==22
725 01:32:31.115948 DeviceVref_Margin_A0==37
726 01:32:31.116456 VrefDac_Margin_A1==22
727 01:32:31.116902 DeviceVref_Margin_A1==37
728 01:32:31.117340
729 01:32:31.124893 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 01:32:31.125372
731 01:32:31.150822 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 01:32:31.156334 2D training succeed
733 01:32:31.161874 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 01:32:31.167415 auto size-- 65535DDR cs0 size: 2048MB
735 01:32:31.167885 DDR cs1 size: 2048MB
736 01:32:31.173020 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 01:32:31.173496 cs0 DataBus test pass
738 01:32:31.173941 cs1 DataBus test pass
739 01:32:31.178643 cs0 AddrBus test pass
740 01:32:31.179119 cs1 AddrBus test pass
741 01:32:31.179563
742 01:32:31.180033 100bdlr_step_size ps== 420
743 01:32:31.184236 result report
744 01:32:31.184709 boot times 0Enable ddr reg access
745 01:32:31.193080 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 01:32:31.206553 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 01:32:31.780277 0.0;M3 CHK:0;cm4_sp_mode 0
748 01:32:31.780895 MVN_1=0x00000000
749 01:32:31.785742 MVN_2=0x00000000
750 01:32:31.791518 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 01:32:31.792107 OPS=0x10
752 01:32:31.792553 ring efuse init
753 01:32:31.792981 chipver efuse init
754 01:32:31.799707 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 01:32:31.800224 [0.018961 Inits done]
756 01:32:31.807247 secure task start!
757 01:32:31.807709 high task start!
758 01:32:31.808176 low task start!
759 01:32:31.808603 run into bl31
760 01:32:31.814032 NOTICE: BL31: v1.3(release):4fc40b1
761 01:32:31.821730 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 01:32:31.822204 NOTICE: BL31: G12A normal boot!
763 01:32:31.847091 NOTICE: BL31: BL33 decompress pass
764 01:32:31.852752 ERROR: Error initializing runtime service opteed_fast
765 01:32:33.085759
766 01:32:33.086204
767 01:32:33.094276 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 01:32:33.094918
769 01:32:33.095372 Model: Libre Computer AML-A311D-CC Alta
770 01:32:33.302716 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 01:32:33.325987 DRAM: 2 GiB (effective 3.8 GiB)
772 01:32:33.468974 Core: 408 devices, 31 uclasses, devicetree: separate
773 01:32:33.474803 WDT: Not starting watchdog@f0d0
774 01:32:33.507034 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 01:32:33.519336 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 01:32:33.524296 ** Bad device specification mmc 0 **
777 01:32:33.534668 Card did not respond to voltage select! : -110
778 01:32:33.542312 ** Bad device specification mmc 0 **
779 01:32:33.542795 Couldn't find partition mmc 0
780 01:32:33.550709 Card did not respond to voltage select! : -110
781 01:32:33.556343 ** Bad device specification mmc 0 **
782 01:32:33.556841 Couldn't find partition mmc 0
783 01:32:33.561161 Error: could not access storage.
784 01:32:33.903784 Net: eth0: ethernet@ff3f0000
785 01:32:33.904411 starting USB...
786 01:32:34.155528 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 01:32:34.156146 Starting the controller
788 01:32:34.162542 USB XHCI 1.10
789 01:32:36.323455 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 01:32:36.323893 bl2_stage_init 0x01
791 01:32:36.324212 bl2_stage_init 0x81
792 01:32:36.329048 hw id: 0x0000 - pwm id 0x01
793 01:32:36.329339 bl2_stage_init 0xc1
794 01:32:36.329567 bl2_stage_init 0x02
795 01:32:36.329786
796 01:32:36.334553 L0:00000000
797 01:32:36.334833 L1:20000703
798 01:32:36.335063 L2:00008067
799 01:32:36.335286 L3:14000000
800 01:32:36.337471 B2:00402000
801 01:32:36.337737 B1:e0f83180
802 01:32:36.337954
803 01:32:36.338174 TE: 58167
804 01:32:36.338392
805 01:32:36.348792 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 01:32:36.349082
807 01:32:36.349313 Board ID = 1
808 01:32:36.349531 Set A53 clk to 24M
809 01:32:36.349751 Set A73 clk to 24M
810 01:32:36.354379 Set clk81 to 24M
811 01:32:36.354652 A53 clk: 1200 MHz
812 01:32:36.354877 A73 clk: 1200 MHz
813 01:32:36.359965 CLK81: 166.6M
814 01:32:36.360254 smccc: 00012abe
815 01:32:36.365541 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 01:32:36.365817 board id: 1
817 01:32:36.374156 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 01:32:36.384613 fw parse done
819 01:32:36.390698 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 01:32:36.433220 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 01:32:36.444138 PIEI prepare done
822 01:32:36.444432 fastboot data load
823 01:32:36.444670 fastboot data verify
824 01:32:36.449766 verify result: 266
825 01:32:36.455330 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 01:32:36.455603 LPDDR4 probe
827 01:32:36.455828 ddr clk to 1584MHz
828 01:32:36.463294 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 01:32:36.500540
830 01:32:36.500870 dmc_version 0001
831 01:32:36.507223 Check phy result
832 01:32:36.513136 INFO : End of CA training
833 01:32:36.513421 INFO : End of initialization
834 01:32:36.518769 INFO : Training has run successfully!
835 01:32:36.519042 Check phy result
836 01:32:36.524297 INFO : End of initialization
837 01:32:36.524569 INFO : End of read enable training
838 01:32:36.527583 INFO : End of fine write leveling
839 01:32:36.533120 INFO : End of Write leveling coarse delay
840 01:32:36.538753 INFO : Training has run successfully!
841 01:32:36.539027 Check phy result
842 01:32:36.539241 INFO : End of initialization
843 01:32:36.544383 INFO : End of read dq deskew training
844 01:32:36.549972 INFO : End of MPR read delay center optimization
845 01:32:36.550242 INFO : End of write delay center optimization
846 01:32:36.555586 INFO : End of read delay center optimization
847 01:32:36.561147 INFO : End of max read latency training
848 01:32:36.561428 INFO : Training has run successfully!
849 01:32:36.566778 1D training succeed
850 01:32:36.572744 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 01:32:36.620279 Check phy result
852 01:32:36.620627 INFO : End of initialization
853 01:32:36.642021 INFO : End of 2D read delay Voltage center optimization
854 01:32:36.662262 INFO : End of 2D read delay Voltage center optimization
855 01:32:36.714431 INFO : End of 2D write delay Voltage center optimization
856 01:32:36.763706 INFO : End of 2D write delay Voltage center optimization
857 01:32:36.769288 INFO : Training has run successfully!
858 01:32:36.769568
859 01:32:36.769801 channel==0
860 01:32:36.774812 RxClkDly_Margin_A0==88 ps 9
861 01:32:36.775084 TxDqDly_Margin_A0==98 ps 10
862 01:32:36.780476 RxClkDly_Margin_A1==88 ps 9
863 01:32:36.780749 TxDqDly_Margin_A1==98 ps 10
864 01:32:36.780975 TrainedVREFDQ_A0==74
865 01:32:36.785965 TrainedVREFDQ_A1==74
866 01:32:36.786240 VrefDac_Margin_A0==25
867 01:32:36.786456 DeviceVref_Margin_A0==40
868 01:32:36.791649 VrefDac_Margin_A1==25
869 01:32:36.791909 DeviceVref_Margin_A1==40
870 01:32:36.792144
871 01:32:36.792349
872 01:32:36.797227 channel==1
873 01:32:36.797505 RxClkDly_Margin_A0==98 ps 10
874 01:32:36.797718 TxDqDly_Margin_A0==88 ps 9
875 01:32:36.802802 RxClkDly_Margin_A1==88 ps 9
876 01:32:36.803071 TxDqDly_Margin_A1==98 ps 10
877 01:32:36.808574 TrainedVREFDQ_A0==76
878 01:32:36.808833 TrainedVREFDQ_A1==77
879 01:32:36.809044 VrefDac_Margin_A0==22
880 01:32:36.814066 DeviceVref_Margin_A0==38
881 01:32:36.814320 VrefDac_Margin_A1==24
882 01:32:36.819580 DeviceVref_Margin_A1==37
883 01:32:36.819848
884 01:32:36.820098 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 01:32:36.820313
886 01:32:36.853172 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 01:32:36.853506 2D training succeed
888 01:32:36.858802 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 01:32:36.864414 auto size-- 65535DDR cs0 size: 2048MB
890 01:32:36.864674 DDR cs1 size: 2048MB
891 01:32:36.869971 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 01:32:36.870228 cs0 DataBus test pass
893 01:32:36.875591 cs1 DataBus test pass
894 01:32:36.875843 cs0 AddrBus test pass
895 01:32:36.876084 cs1 AddrBus test pass
896 01:32:36.876294
897 01:32:36.881196 100bdlr_step_size ps== 420
898 01:32:36.881452 result report
899 01:32:36.886817 boot times 0Enable ddr reg access
900 01:32:36.892189 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 01:32:36.905660 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 01:32:37.479363 0.0;M3 CHK:0;cm4_sp_mode 0
903 01:32:37.480072 MVN_1=0x00000000
904 01:32:37.484892 MVN_2=0x00000000
905 01:32:37.490609 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 01:32:37.491089 OPS=0x10
907 01:32:37.491545 ring efuse init
908 01:32:37.492031 chipver efuse init
909 01:32:37.496188 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 01:32:37.501851 [0.018961 Inits done]
911 01:32:37.502321 secure task start!
912 01:32:37.502768 high task start!
913 01:32:37.506381 low task start!
914 01:32:37.506849 run into bl31
915 01:32:37.513020 NOTICE: BL31: v1.3(release):4fc40b1
916 01:32:37.520938 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 01:32:37.521419 NOTICE: BL31: G12A normal boot!
918 01:32:37.546286 NOTICE: BL31: BL33 decompress pass
919 01:32:37.551925 ERROR: Error initializing runtime service opteed_fast
920 01:32:38.784867
921 01:32:38.785441
922 01:32:38.792354 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 01:32:38.792837
924 01:32:38.793293 Model: Libre Computer AML-A311D-CC Alta
925 01:32:39.000601 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 01:32:39.024075 DRAM: 2 GiB (effective 3.8 GiB)
927 01:32:39.168166 Core: 408 devices, 31 uclasses, devicetree: separate
928 01:32:39.173914 WDT: Not starting watchdog@f0d0
929 01:32:39.206195 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 01:32:39.218639 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 01:32:39.222736 ** Bad device specification mmc 0 **
932 01:32:39.233915 Card did not respond to voltage select! : -110
933 01:32:39.240651 ** Bad device specification mmc 0 **
934 01:32:39.241118 Couldn't find partition mmc 0
935 01:32:39.249919 Card did not respond to voltage select! : -110
936 01:32:39.255433 ** Bad device specification mmc 0 **
937 01:32:39.255903 Couldn't find partition mmc 0
938 01:32:39.259497 Error: could not access storage.
939 01:32:39.603056 Net: eth0: ethernet@ff3f0000
940 01:32:39.603599 starting USB...
941 01:32:39.855886 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 01:32:39.856447 Starting the controller
943 01:32:39.862801 USB XHCI 1.10
944 01:32:41.723239 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
945 01:32:41.723851 bl2_stage_init 0x81
946 01:32:41.728818 hw id: 0x0000 - pwm id 0x01
947 01:32:41.729319 bl2_stage_init 0xc1
948 01:32:41.729769 bl2_stage_init 0x02
949 01:32:41.730213
950 01:32:41.734537 L0:00000000
951 01:32:41.735017 L1:20000703
952 01:32:41.735463 L2:00008067
953 01:32:41.735901 L3:14000000
954 01:32:41.736374 B2:00402000
955 01:32:41.740039 B1:e0f83180
956 01:32:41.740521
957 01:32:41.740972 TE: 58150
958 01:32:41.741414
959 01:32:41.745610 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
960 01:32:41.746112
961 01:32:41.746563 Board ID = 1
962 01:32:41.751221 Set A53 clk to 24M
963 01:32:41.751711 Set A73 clk to 24M
964 01:32:41.752201 Set clk81 to 24M
965 01:32:41.756832 A53 clk: 1200 MHz
966 01:32:41.757317 A73 clk: 1200 MHz
967 01:32:41.757761 CLK81: 166.6M
968 01:32:41.758199 smccc: 00012aac
969 01:32:41.762425 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
970 01:32:41.768088 board id: 1
971 01:32:41.772827 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
972 01:32:41.784468 fw parse done
973 01:32:41.789600 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
974 01:32:41.832158 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
975 01:32:41.843970 PIEI prepare done
976 01:32:41.844491 fastboot data load
977 01:32:41.844923 fastboot data verify
978 01:32:41.849551 verify result: 266
979 01:32:41.855154 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
980 01:32:41.855625 LPDDR4 probe
981 01:32:41.856084 ddr clk to 1584MHz
982 01:32:41.862374 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
983 01:32:41.900358
984 01:32:41.900837 dmc_version 0001
985 01:32:41.907080 Check phy result
986 01:32:41.912933 INFO : End of CA training
987 01:32:41.913392 INFO : End of initialization
988 01:32:41.918570 INFO : Training has run successfully!
989 01:32:41.919084 Check phy result
990 01:32:41.924178 INFO : End of initialization
991 01:32:41.924673 INFO : End of read enable training
992 01:32:41.927468 INFO : End of fine write leveling
993 01:32:41.933386 INFO : End of Write leveling coarse delay
994 01:32:41.938909 INFO : Training has run successfully!
995 01:32:41.939375 Check phy result
996 01:32:41.939816 INFO : End of initialization
997 01:32:41.944317 INFO : End of read dq deskew training
998 01:32:41.949903 INFO : End of MPR read delay center optimization
999 01:32:41.950376 INFO : End of write delay center optimization
1000 01:32:41.955655 INFO : End of read delay center optimization
1001 01:32:41.961048 INFO : End of max read latency training
1002 01:32:41.961528 INFO : Training has run successfully!
1003 01:32:41.966637 1D training succeed
1004 01:32:41.971944 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
1005 01:32:42.019541 Check phy result
1006 01:32:42.020059 INFO : End of initialization
1007 01:32:42.041644 INFO : End of 2D read delay Voltage center optimization
1008 01:32:42.060150 INFO : End of 2D read delay Voltage center optimization
1009 01:32:42.112991 INFO : End of 2D write delay Voltage center optimization
1010 01:32:42.162159 INFO : End of 2D write delay Voltage center optimization
1011 01:32:42.167665 INFO : Training has run successfully!
1012 01:32:42.168198
1013 01:32:42.168661 channel==0
1014 01:32:42.173393 RxClkDly_Margin_A0==88 ps 9
1015 01:32:42.173878 TxDqDly_Margin_A0==98 ps 10
1016 01:32:42.176600 RxClkDly_Margin_A1==88 ps 9
1017 01:32:42.177068 TxDqDly_Margin_A1==98 ps 10
1018 01:32:42.182218 TrainedVREFDQ_A0==74
1019 01:32:42.182693 TrainedVREFDQ_A1==74
1020 01:32:42.187752 VrefDac_Margin_A0==25
1021 01:32:42.188267 DeviceVref_Margin_A0==40
1022 01:32:42.188718 VrefDac_Margin_A1==25
1023 01:32:42.193305 DeviceVref_Margin_A1==40
1024 01:32:42.193774
1025 01:32:42.194219
1026 01:32:42.194656 channel==1
1027 01:32:42.195090 RxClkDly_Margin_A0==88 ps 9
1028 01:32:42.196813 TxDqDly_Margin_A0==88 ps 9
1029 01:32:42.202318 RxClkDly_Margin_A1==88 ps 9
1030 01:32:42.202812 TxDqDly_Margin_A1==88 ps 9
1031 01:32:42.203264 TrainedVREFDQ_A0==77
1032 01:32:42.207949 TrainedVREFDQ_A1==77
1033 01:32:42.208451 VrefDac_Margin_A0==23
1034 01:32:42.213527 DeviceVref_Margin_A0==37
1035 01:32:42.213998 VrefDac_Margin_A1==24
1036 01:32:42.214441 DeviceVref_Margin_A1==37
1037 01:32:42.214875
1038 01:32:42.219129 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
1039 01:32:42.219604
1040 01:32:42.252716 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
1041 01:32:42.253250 2D training succeed
1042 01:32:42.258307 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
1043 01:32:42.263912 auto size-- 65535DDR cs0 size: 2048MB
1044 01:32:42.264427 DDR cs1 size: 2048MB
1045 01:32:42.269546 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
1046 01:32:42.270046 cs0 DataBus test pass
1047 01:32:42.270493 cs1 DataBus test pass
1048 01:32:42.275145 cs0 AddrBus test pass
1049 01:32:42.275617 cs1 AddrBus test pass
1050 01:32:42.276106
1051 01:32:42.280698 100bdlr_step_size ps== 420
1052 01:32:42.281181 result report
1053 01:32:42.281620 boot times 0Enable ddr reg access
1054 01:32:42.290387 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
1055 01:32:42.303881 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
1056 01:32:42.875967 0.0;M3 CHK:0;cm4_sp_mode 0
1057 01:32:42.876659 MVN_1=0x00000000
1058 01:32:42.881380 MVN_2=0x00000000
1059 01:32:42.887225 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
1060 01:32:42.887716 OPS=0x10
1061 01:32:42.888215 ring efuse init
1062 01:32:42.888660 chipver efuse init
1063 01:32:42.892724 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
1064 01:32:42.898323 [0.018961 Inits done]
1065 01:32:42.898799 secure task start!
1066 01:32:42.899244 high task start!
1067 01:32:42.902913 low task start!
1068 01:32:42.903389 run into bl31
1069 01:32:42.909677 NOTICE: BL31: v1.3(release):4fc40b1
1070 01:32:42.917437 NOTICE: BL31: Built : 15:58:17, May 22 2019
1071 01:32:42.917926 NOTICE: BL31: G12A normal boot!
1072 01:32:42.942748 NOTICE: BL31: BL33 decompress pass
1073 01:32:42.948417 ERROR: Error initializing runtime service opteed_fast
1074 01:32:44.181415
1075 01:32:44.182080
1076 01:32:44.189823 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
1077 01:32:44.190320
1078 01:32:44.190773 Model: Libre Computer AML-A311D-CC Alta
1079 01:32:44.398164 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
1080 01:32:44.421512 DRAM: 2 GiB (effective 3.8 GiB)
1081 01:32:44.564519 Core: 408 devices, 31 uclasses, devicetree: separate
1082 01:32:44.570401 WDT: Not starting watchdog@f0d0
1083 01:32:44.602666 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
1084 01:32:44.615092 Loading Environment from FAT... Card did not respond to voltage select! : -110
1085 01:32:44.620156 ** Bad device specification mmc 0 **
1086 01:32:44.630417 Card did not respond to voltage select! : -110
1087 01:32:44.638076 ** Bad device specification mmc 0 **
1088 01:32:44.638558 Couldn't find partition mmc 0
1089 01:32:44.646403 Card did not respond to voltage select! : -110
1090 01:32:44.651924 ** Bad device specification mmc 0 **
1091 01:32:44.652447 Couldn't find partition mmc 0
1092 01:32:44.657014 Error: could not access storage.
1093 01:32:44.999445 Net: eth0: ethernet@ff3f0000
1094 01:32:45.000010 starting USB...
1095 01:32:45.251203 Bus usb@ff500000: Register 3000140 NbrPorts 3
1096 01:32:45.251730 Starting the controller
1097 01:32:45.258255 USB XHCI 1.10
1098 01:32:46.814795 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
1099 01:32:46.822988 scanning usb for storage devices... 0 Storage Device(s) found
1101 01:32:46.874818 Hit any key to stop autoboot: 1
1102 01:32:46.875653 end: 2.4.2 bootloader-interrupt (duration 00:00:37) [common]
1103 01:32:46.876359 start: 2.4.3 bootloader-commands (timeout 00:04:22) [common]
1104 01:32:46.876860 Setting prompt string to ['=>']
1105 01:32:46.877361 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:22)
1106 01:32:46.890412 0
1107 01:32:46.891306 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
1108 01:32:46.891829 Sending with 10 millisecond of delay
1110 01:32:48.026855 => setenv autoload no
1111 01:32:48.037713 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1112 01:32:48.043096 setenv autoload no
1113 01:32:48.043906 Sending with 10 millisecond of delay
1115 01:32:49.841667 => setenv initrd_high 0xffffffff
1116 01:32:49.852497 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:19)
1117 01:32:49.853415 setenv initrd_high 0xffffffff
1118 01:32:49.854169 Sending with 10 millisecond of delay
1120 01:32:51.470369 => setenv fdt_high 0xffffffff
1121 01:32:51.481150 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1122 01:32:51.482015 setenv fdt_high 0xffffffff
1123 01:32:51.482765 Sending with 10 millisecond of delay
1125 01:32:51.774608 => dhcp
1126 01:32:51.785292 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1127 01:32:51.786125 dhcp
1128 01:32:51.786595 Speed: 1000, full duplex
1129 01:32:51.787038 BOOTP broadcast 1
1130 01:32:51.794919 DHCP client bound to address 192.168.6.27 (9 ms)
1131 01:32:51.795671 Sending with 10 millisecond of delay
1133 01:32:53.472113 => setenv serverip 192.168.6.2
1134 01:32:53.482893 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:16)
1135 01:32:53.483812 setenv serverip 192.168.6.2
1136 01:32:53.484588 Sending with 10 millisecond of delay
1138 01:32:57.208067 => tftpboot 0x01080000 919767/tftp-deploy-6jgvrszq/kernel/uImage
1139 01:32:57.218902 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:12)
1140 01:32:57.219810 tftpboot 0x01080000 919767/tftp-deploy-6jgvrszq/kernel/uImage
1141 01:32:57.220343 Speed: 1000, full duplex
1142 01:32:57.220799 Using ethernet@ff3f0000 device
1143 01:32:57.221327 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1144 01:32:57.226848 Filename '919767/tftp-deploy-6jgvrszq/kernel/uImage'.
1145 01:32:57.230755 Load address: 0x1080000
1146 01:33:01.363299 Loading: *################################################## 62.6 MiB
1147 01:33:01.363929 15.1 MiB/s
1148 01:33:01.364409 done
1149 01:33:01.367701 Bytes transferred = 65665600 (3e9fa40 hex)
1150 01:33:01.368528 Sending with 10 millisecond of delay
1152 01:33:06.057408 => tftpboot 0x08000000 919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
1153 01:33:06.068313 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:03)
1154 01:33:06.069358 tftpboot 0x08000000 919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot
1155 01:33:06.069936 Speed: 1000, full duplex
1156 01:33:06.070481 Using ethernet@ff3f0000 device
1157 01:33:06.071113 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1158 01:33:06.082699 Filename '919767/tftp-deploy-6jgvrszq/ramdisk/ramdisk.cpio.gz.uboot'.
1159 01:33:06.083403 Load address: 0x8000000
1160 01:33:07.610792 Loading: *####################################### UDP wrong checksum 000000ff 0000e0b8
1161 01:33:07.632211 UDP wrong checksum 000000ff 000077ab
1162 01:33:08.035580 ########## UDP wrong checksum 00000007 00003ade
1163 01:33:13.036643 T UDP wrong checksum 00000007 00003ade
1164 01:33:23.296908 T T UDP wrong checksum 00000007 00003ade
1165 01:33:43.043599 T T T T UDP wrong checksum 00000007 00003ade
1166 01:34:03.048627 T T T
1167 01:34:03.049305 Retry count exceeded; starting again
1169 01:34:03.050745 end: 2.4.3 bootloader-commands (duration 00:01:16) [common]
1172 01:34:03.052669 end: 2.4 uboot-commands (duration 00:01:54) [common]
1174 01:34:03.054138 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1176 01:34:03.055218 end: 2 uboot-action (duration 00:01:54) [common]
1178 01:34:03.056838 Cleaning after the job
1179 01:34:03.057381 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/ramdisk
1180 01:34:03.058738 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/kernel
1181 01:34:03.116122 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/dtb
1182 01:34:03.117056 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/nfsrootfs
1183 01:34:03.263014 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919767/tftp-deploy-6jgvrszq/modules
1184 01:34:03.293816 start: 4.1 power-off (timeout 00:00:30) [common]
1185 01:34:03.294501 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1186 01:34:03.327728 >> OK - accepted request
1187 01:34:03.329782 Returned 0 in 0 seconds
1188 01:34:03.430628 end: 4.1 power-off (duration 00:00:00) [common]
1190 01:34:03.431695 start: 4.2 read-feedback (timeout 00:10:00) [common]
1191 01:34:03.432479 Listened to connection for namespace 'common' for up to 1s
1192 01:34:04.432331 Finalising connection for namespace 'common'
1193 01:34:04.432814 Disconnecting from shell: Finalise
1194 01:34:04.433102 =>
1195 01:34:04.533830 end: 4.2 read-feedback (duration 00:00:01) [common]
1196 01:34:04.534592 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/919767
1197 01:34:06.487945 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/919767
1198 01:34:06.488626 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.