Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:55:00.997372 lava-dispatcher, installed at version: 2024.01
2 00:55:00.998155 start: 0 validate
3 00:55:00.998634 Start time: 2024-11-01 00:55:00.998604+00:00 (UTC)
4 00:55:00.999180 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:55:00.999731 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:55:01.044008 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:55:01.044652 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 00:55:01.081882 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:55:01.082656 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:55:01.117075 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:55:01.117641 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:55:01.151473 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:55:01.152010 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 00:55:01.190194 validate duration: 0.19
16 00:55:01.191097 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:55:01.191437 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:55:01.191770 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:55:01.192497 Not decompressing ramdisk as can be used compressed.
20 00:55:01.193027 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 00:55:01.193525 saving as /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/ramdisk/initrd.cpio.gz
22 00:55:01.193869 total size: 5628182 (5 MB)
23 00:55:01.229486 progress 0 % (0 MB)
24 00:55:01.235753 progress 5 % (0 MB)
25 00:55:01.242560 progress 10 % (0 MB)
26 00:55:01.247916 progress 15 % (0 MB)
27 00:55:01.254053 progress 20 % (1 MB)
28 00:55:01.258676 progress 25 % (1 MB)
29 00:55:01.264410 progress 30 % (1 MB)
30 00:55:01.270183 progress 35 % (1 MB)
31 00:55:01.275652 progress 40 % (2 MB)
32 00:55:01.280320 progress 45 % (2 MB)
33 00:55:01.284525 progress 50 % (2 MB)
34 00:55:01.289320 progress 55 % (2 MB)
35 00:55:01.294363 progress 60 % (3 MB)
36 00:55:01.298682 progress 65 % (3 MB)
37 00:55:01.304819 progress 70 % (3 MB)
38 00:55:01.309768 progress 75 % (4 MB)
39 00:55:01.315507 progress 80 % (4 MB)
40 00:55:01.320505 progress 85 % (4 MB)
41 00:55:01.325767 progress 90 % (4 MB)
42 00:55:01.330753 progress 95 % (5 MB)
43 00:55:01.334975 progress 100 % (5 MB)
44 00:55:01.335700 5 MB downloaded in 0.14 s (37.85 MB/s)
45 00:55:01.336309 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:55:01.337263 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:55:01.337581 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:55:01.337869 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:55:01.338519 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/kernel/Image
51 00:55:01.338803 saving as /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/kernel/Image
52 00:55:01.339029 total size: 45713920 (43 MB)
53 00:55:01.339357 No compression specified
54 00:55:01.376243 progress 0 % (0 MB)
55 00:55:01.406310 progress 5 % (2 MB)
56 00:55:01.436498 progress 10 % (4 MB)
57 00:55:01.465783 progress 15 % (6 MB)
58 00:55:01.495460 progress 20 % (8 MB)
59 00:55:01.524551 progress 25 % (10 MB)
60 00:55:01.553794 progress 30 % (13 MB)
61 00:55:01.583603 progress 35 % (15 MB)
62 00:55:01.614114 progress 40 % (17 MB)
63 00:55:01.643796 progress 45 % (19 MB)
64 00:55:01.675975 progress 50 % (21 MB)
65 00:55:01.706874 progress 55 % (24 MB)
66 00:55:01.737348 progress 60 % (26 MB)
67 00:55:01.767212 progress 65 % (28 MB)
68 00:55:01.796373 progress 70 % (30 MB)
69 00:55:01.825062 progress 75 % (32 MB)
70 00:55:01.853886 progress 80 % (34 MB)
71 00:55:01.882507 progress 85 % (37 MB)
72 00:55:01.911406 progress 90 % (39 MB)
73 00:55:01.940432 progress 95 % (41 MB)
74 00:55:01.969062 progress 100 % (43 MB)
75 00:55:01.969640 43 MB downloaded in 0.63 s (69.13 MB/s)
76 00:55:01.970144 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:55:01.971003 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:55:01.971305 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:55:01.971592 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:55:01.972264 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:55:01.972562 saving as /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:55:01.972803 total size: 54703 (0 MB)
84 00:55:01.973038 No compression specified
85 00:55:02.027125 progress 59 % (0 MB)
86 00:55:02.028086 progress 100 % (0 MB)
87 00:55:02.029025 0 MB downloaded in 0.06 s (0.93 MB/s)
88 00:55:02.029843 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:55:02.030701 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:55:02.030972 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:55:02.031240 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:55:02.031765 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 00:55:02.032075 saving as /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/nfsrootfs/full.rootfs.tar
95 00:55:02.032294 total size: 107552908 (102 MB)
96 00:55:02.032512 Using unxz to decompress xz
97 00:55:02.078212 progress 0 % (0 MB)
98 00:55:02.812473 progress 5 % (5 MB)
99 00:55:03.561295 progress 10 % (10 MB)
100 00:55:04.303068 progress 15 % (15 MB)
101 00:55:05.073368 progress 20 % (20 MB)
102 00:55:05.653156 progress 25 % (25 MB)
103 00:55:06.296353 progress 30 % (30 MB)
104 00:55:07.040483 progress 35 % (35 MB)
105 00:55:07.406720 progress 40 % (41 MB)
106 00:55:07.853831 progress 45 % (46 MB)
107 00:55:08.570908 progress 50 % (51 MB)
108 00:55:09.281916 progress 55 % (56 MB)
109 00:55:10.062118 progress 60 % (61 MB)
110 00:55:10.841058 progress 65 % (66 MB)
111 00:55:11.585785 progress 70 % (71 MB)
112 00:55:12.358264 progress 75 % (76 MB)
113 00:55:13.032591 progress 80 % (82 MB)
114 00:55:13.748576 progress 85 % (87 MB)
115 00:55:14.490954 progress 90 % (92 MB)
116 00:55:15.216235 progress 95 % (97 MB)
117 00:55:15.973567 progress 100 % (102 MB)
118 00:55:15.986492 102 MB downloaded in 13.95 s (7.35 MB/s)
119 00:55:15.987501 end: 1.4.1 http-download (duration 00:00:14) [common]
121 00:55:15.989286 end: 1.4 download-retry (duration 00:00:14) [common]
122 00:55:15.989846 start: 1.5 download-retry (timeout 00:09:45) [common]
123 00:55:15.990395 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 00:55:15.991364 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/modules.tar.xz
125 00:55:15.991887 saving as /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/modules/modules.tar
126 00:55:15.992351 total size: 11592552 (11 MB)
127 00:55:15.992789 Using unxz to decompress xz
128 00:55:16.042489 progress 0 % (0 MB)
129 00:55:16.123398 progress 5 % (0 MB)
130 00:55:16.201516 progress 10 % (1 MB)
131 00:55:16.288377 progress 15 % (1 MB)
132 00:55:16.365656 progress 20 % (2 MB)
133 00:55:16.443156 progress 25 % (2 MB)
134 00:55:16.524235 progress 30 % (3 MB)
135 00:55:16.597775 progress 35 % (3 MB)
136 00:55:16.678639 progress 40 % (4 MB)
137 00:55:16.765234 progress 45 % (5 MB)
138 00:55:16.843398 progress 50 % (5 MB)
139 00:55:16.927314 progress 55 % (6 MB)
140 00:55:17.009188 progress 60 % (6 MB)
141 00:55:17.089906 progress 65 % (7 MB)
142 00:55:17.170336 progress 70 % (7 MB)
143 00:55:17.252178 progress 75 % (8 MB)
144 00:55:17.335358 progress 80 % (8 MB)
145 00:55:17.411824 progress 85 % (9 MB)
146 00:55:17.484901 progress 90 % (9 MB)
147 00:55:17.584524 progress 95 % (10 MB)
148 00:55:17.679343 progress 100 % (11 MB)
149 00:55:17.694926 11 MB downloaded in 1.70 s (6.49 MB/s)
150 00:55:17.695580 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:55:17.696909 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:55:17.697458 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:55:17.697973 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:55:28.526549 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/919423/extract-nfsrootfs-8m6rt4u5
156 00:55:28.527141 end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
157 00:55:28.527434 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 00:55:28.528142 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa
159 00:55:28.528599 makedir: /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin
160 00:55:28.528926 makedir: /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/tests
161 00:55:28.529239 makedir: /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/results
162 00:55:28.529580 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-add-keys
163 00:55:28.530194 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-add-sources
164 00:55:28.530736 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-background-process-start
165 00:55:28.531235 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-background-process-stop
166 00:55:28.531782 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-common-functions
167 00:55:28.532356 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-echo-ipv4
168 00:55:28.532854 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-install-packages
169 00:55:28.533365 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-installed-packages
170 00:55:28.533874 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-os-build
171 00:55:28.534394 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-probe-channel
172 00:55:28.534875 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-probe-ip
173 00:55:28.535349 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-target-ip
174 00:55:28.535825 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-target-mac
175 00:55:28.536333 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-target-storage
176 00:55:28.536839 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-case
177 00:55:28.537356 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-event
178 00:55:28.537836 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-feedback
179 00:55:28.538317 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-raise
180 00:55:28.538802 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-reference
181 00:55:28.539283 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-runner
182 00:55:28.539787 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-set
183 00:55:28.540321 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-test-shell
184 00:55:28.540819 Updating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-install-packages (oe)
185 00:55:28.541367 Updating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/bin/lava-installed-packages (oe)
186 00:55:28.541821 Creating /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/environment
187 00:55:28.542193 LAVA metadata
188 00:55:28.542453 - LAVA_JOB_ID=919423
189 00:55:28.542668 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:55:28.543038 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 00:55:28.544022 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:55:28.544345 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 00:55:28.544557 skipped lava-vland-overlay
194 00:55:28.544802 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:55:28.545058 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 00:55:28.545279 skipped lava-multinode-overlay
197 00:55:28.545521 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:55:28.545772 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 00:55:28.546018 Loading test definitions
200 00:55:28.546296 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 00:55:28.546519 Using /lava-919423 at stage 0
202 00:55:28.547851 uuid=919423_1.6.2.4.1 testdef=None
203 00:55:28.548194 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:55:28.548460 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 00:55:28.550308 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:55:28.551095 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 00:55:28.553433 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:55:28.554266 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 00:55:28.556534 runner path: /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/0/tests/0_dmesg test_uuid 919423_1.6.2.4.1
212 00:55:28.557108 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:55:28.557874 Creating lava-test-runner.conf files
215 00:55:28.558075 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/919423/lava-overlay-qzh_3caa/lava-919423/0 for stage 0
216 00:55:28.558412 - 0_dmesg
217 00:55:28.558749 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:55:28.559021 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 00:55:28.580786 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:55:28.581191 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 00:55:28.581451 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:55:28.581717 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:55:28.581978 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 00:55:29.204737 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:55:29.205214 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 00:55:29.205464 extracting modules file /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919423/extract-nfsrootfs-8m6rt4u5
227 00:55:30.568101 extracting modules file /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk
228 00:55:32.417315 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:55:32.417911 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 00:55:32.418285 [common] Applying overlay to NFS
231 00:55:32.418569 [common] Applying overlay /var/lib/lava/dispatcher/tmp/919423/compress-overlay-z_uyvn07/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/919423/extract-nfsrootfs-8m6rt4u5
232 00:55:32.456295 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:55:32.456861 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 00:55:32.457215 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 00:55:32.457495 Converting downloaded kernel to a uImage
236 00:55:32.457883 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/kernel/Image /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/kernel/uImage
237 00:55:32.957223 output: Image Name:
238 00:55:32.957640 output: Created: Fri Nov 1 00:55:32 2024
239 00:55:32.957851 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:55:32.958056 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 00:55:32.958258 output: Load Address: 01080000
242 00:55:32.958460 output: Entry Point: 01080000
243 00:55:32.958657 output:
244 00:55:32.958993 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 00:55:32.959261 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 00:55:32.959529 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 00:55:32.959783 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:55:32.960086 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 00:55:32.960359 Building ramdisk /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk
250 00:55:35.119956 >> 166820 blocks
251 00:55:42.925808 Adding RAMdisk u-boot header.
252 00:55:42.926524 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk.cpio.gz.uboot
253 00:55:43.171403 output: Image Name:
254 00:55:43.171840 output: Created: Fri Nov 1 00:55:42 2024
255 00:55:43.172174 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:55:43.172634 output: Data Size: 23431521 Bytes = 22882.34 KiB = 22.35 MiB
257 00:55:43.173082 output: Load Address: 00000000
258 00:55:43.173518 output: Entry Point: 00000000
259 00:55:43.173950 output:
260 00:55:43.175065 rename /var/lib/lava/dispatcher/tmp/919423/extract-overlay-ramdisk-a4pa_10s/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
261 00:55:43.175884 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 00:55:43.176544 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 00:55:43.177132 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:18) [common]
264 00:55:43.177632 No LXC device requested
265 00:55:43.178193 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:55:43.178757 start: 1.8 deploy-device-env (timeout 00:09:18) [common]
267 00:55:43.179302 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:55:43.179756 Checking files for TFTP limit of 4294967296 bytes.
269 00:55:43.182739 end: 1 tftp-deploy (duration 00:00:42) [common]
270 00:55:43.183410 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:55:43.184022 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:55:43.184592 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:55:43.185148 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:55:43.185735 Using kernel file from prepare-kernel: 919423/tftp-deploy-ji94g733/kernel/uImage
275 00:55:43.186436 substitutions:
276 00:55:43.186895 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:55:43.187342 - {DTB_ADDR}: 0x01070000
278 00:55:43.187784 - {DTB}: 919423/tftp-deploy-ji94g733/dtb/meson-g12b-a311d-libretech-cc.dtb
279 00:55:43.188270 - {INITRD}: 919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
280 00:55:43.188712 - {KERNEL_ADDR}: 0x01080000
281 00:55:43.189145 - {KERNEL}: 919423/tftp-deploy-ji94g733/kernel/uImage
282 00:55:43.189576 - {LAVA_MAC}: None
283 00:55:43.190057 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/919423/extract-nfsrootfs-8m6rt4u5
284 00:55:43.190494 - {NFS_SERVER_IP}: 192.168.6.2
285 00:55:43.190927 - {PRESEED_CONFIG}: None
286 00:55:43.191356 - {PRESEED_LOCAL}: None
287 00:55:43.191784 - {RAMDISK_ADDR}: 0x08000000
288 00:55:43.192239 - {RAMDISK}: 919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
289 00:55:43.192675 - {ROOT_PART}: None
290 00:55:43.193103 - {ROOT}: None
291 00:55:43.193532 - {SERVER_IP}: 192.168.6.2
292 00:55:43.193955 - {TEE_ADDR}: 0x83000000
293 00:55:43.194381 - {TEE}: None
294 00:55:43.194810 Parsed boot commands:
295 00:55:43.195225 - setenv autoload no
296 00:55:43.195653 - setenv initrd_high 0xffffffff
297 00:55:43.196107 - setenv fdt_high 0xffffffff
298 00:55:43.196538 - dhcp
299 00:55:43.196965 - setenv serverip 192.168.6.2
300 00:55:43.197391 - tftpboot 0x01080000 919423/tftp-deploy-ji94g733/kernel/uImage
301 00:55:43.197818 - tftpboot 0x08000000 919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
302 00:55:43.198247 - tftpboot 0x01070000 919423/tftp-deploy-ji94g733/dtb/meson-g12b-a311d-libretech-cc.dtb
303 00:55:43.198673 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/919423/extract-nfsrootfs-8m6rt4u5,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:55:43.199110 - bootm 0x01080000 0x08000000 0x01070000
305 00:55:43.199688 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:55:43.201352 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:55:43.201816 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 00:55:43.218515 Setting prompt string to ['lava-test: # ']
310 00:55:43.220174 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:55:43.220833 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:55:43.221446 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:55:43.222023 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:55:43.223249 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 00:55:43.261919 >> OK - accepted request
316 00:55:43.264339 Returned 0 in 0 seconds
317 00:55:43.365611 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:55:43.367493 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:55:43.368229 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:55:43.368817 Setting prompt string to ['Hit any key to stop autoboot']
322 00:55:43.369349 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:55:43.371068 Trying 192.168.56.21...
324 00:55:43.371612 Connected to conserv1.
325 00:55:43.372205 Escape character is '^]'.
326 00:55:43.372705
327 00:55:43.373198 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 00:55:43.373693
329 00:55:54.949278 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 00:55:54.949959 bl2_stage_init 0x01
331 00:55:54.950418 bl2_stage_init 0x81
332 00:55:54.954841 hw id: 0x0000 - pwm id 0x01
333 00:55:54.955347 bl2_stage_init 0xc1
334 00:55:54.955796 bl2_stage_init 0x02
335 00:55:54.956294
336 00:55:54.960452 L0:00000000
337 00:55:54.960943 L1:20000703
338 00:55:54.961382 L2:00008067
339 00:55:54.961824 L3:14000000
340 00:55:54.963261 B2:00402000
341 00:55:54.963728 B1:e0f83180
342 00:55:54.964199
343 00:55:54.964637 TE: 58167
344 00:55:54.965073
345 00:55:54.974460 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 00:55:54.974953
347 00:55:54.975394 Board ID = 1
348 00:55:54.975826 Set A53 clk to 24M
349 00:55:54.976294 Set A73 clk to 24M
350 00:55:54.980077 Set clk81 to 24M
351 00:55:54.980542 A53 clk: 1200 MHz
352 00:55:54.980975 A73 clk: 1200 MHz
353 00:55:54.985635 CLK81: 166.6M
354 00:55:54.986100 smccc: 00012abe
355 00:55:54.991269 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 00:55:54.991744 board id: 1
357 00:55:54.999915 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:55:55.010533 fw parse done
359 00:55:55.016504 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:55:55.059236 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:55:55.069979 PIEI prepare done
362 00:55:55.070463 fastboot data load
363 00:55:55.070909 fastboot data verify
364 00:55:55.075633 verify result: 266
365 00:55:55.081228 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 00:55:55.081767 LPDDR4 probe
367 00:55:55.082210 ddr clk to 1584MHz
368 00:55:55.089219 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:55:55.126708
370 00:55:55.127252 dmc_version 0001
371 00:55:55.133177 Check phy result
372 00:55:55.139004 INFO : End of CA training
373 00:55:55.139474 INFO : End of initialization
374 00:55:55.144620 INFO : Training has run successfully!
375 00:55:55.145088 Check phy result
376 00:55:55.150202 INFO : End of initialization
377 00:55:55.150671 INFO : End of read enable training
378 00:55:55.153483 INFO : End of fine write leveling
379 00:55:55.159061 INFO : End of Write leveling coarse delay
380 00:55:55.164621 INFO : Training has run successfully!
381 00:55:55.165100 Check phy result
382 00:55:55.165542 INFO : End of initialization
383 00:55:55.170197 INFO : End of read dq deskew training
384 00:55:55.175778 INFO : End of MPR read delay center optimization
385 00:55:55.176327 INFO : End of write delay center optimization
386 00:55:55.181395 INFO : End of read delay center optimization
387 00:55:55.186992 INFO : End of max read latency training
388 00:55:55.187486 INFO : Training has run successfully!
389 00:55:55.192584 1D training succeed
390 00:55:55.198578 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:55:55.246174 Check phy result
392 00:55:55.246694 INFO : End of initialization
393 00:55:55.268002 INFO : End of 2D read delay Voltage center optimization
394 00:55:55.288207 INFO : End of 2D read delay Voltage center optimization
395 00:55:55.340291 INFO : End of 2D write delay Voltage center optimization
396 00:55:55.389563 INFO : End of 2D write delay Voltage center optimization
397 00:55:55.395226 INFO : Training has run successfully!
398 00:55:55.395693
399 00:55:55.396180 channel==0
400 00:55:55.400845 RxClkDly_Margin_A0==88 ps 9
401 00:55:55.401328 TxDqDly_Margin_A0==98 ps 10
402 00:55:55.406610 RxClkDly_Margin_A1==88 ps 9
403 00:55:55.407074 TxDqDly_Margin_A1==98 ps 10
404 00:55:55.407519 TrainedVREFDQ_A0==74
405 00:55:55.412032 TrainedVREFDQ_A1==74
406 00:55:55.412505 VrefDac_Margin_A0==25
407 00:55:55.412944 DeviceVref_Margin_A0==40
408 00:55:55.417534 VrefDac_Margin_A1==25
409 00:55:55.417994 DeviceVref_Margin_A1==40
410 00:55:55.418430
411 00:55:55.418868
412 00:55:55.423203 channel==1
413 00:55:55.423667 RxClkDly_Margin_A0==98 ps 10
414 00:55:55.424137 TxDqDly_Margin_A0==88 ps 9
415 00:55:55.428834 RxClkDly_Margin_A1==88 ps 9
416 00:55:55.429304 TxDqDly_Margin_A1==88 ps 9
417 00:55:55.434411 TrainedVREFDQ_A0==76
418 00:55:55.434879 TrainedVREFDQ_A1==77
419 00:55:55.435321 VrefDac_Margin_A0==22
420 00:55:55.440034 DeviceVref_Margin_A0==38
421 00:55:55.440499 VrefDac_Margin_A1==24
422 00:55:55.445531 DeviceVref_Margin_A1==37
423 00:55:55.445991
424 00:55:55.446430 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:55:55.446867
426 00:55:55.479083 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 00:55:55.479655 2D training succeed
428 00:55:55.484671 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:55:55.490297 auto size-- 65535DDR cs0 size: 2048MB
430 00:55:55.490758 DDR cs1 size: 2048MB
431 00:55:55.495831 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:55:55.496326 cs0 DataBus test pass
433 00:55:55.501490 cs1 DataBus test pass
434 00:55:55.501949 cs0 AddrBus test pass
435 00:55:55.502386 cs1 AddrBus test pass
436 00:55:55.502852
437 00:55:55.507099 100bdlr_step_size ps== 420
438 00:55:55.507579 result report
439 00:55:55.512701 boot times 0Enable ddr reg access
440 00:55:55.517935 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:55:55.531514 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 00:55:56.104472 0.0;M3 CHK:0;cm4_sp_mode 0
443 00:55:56.104888 MVN_1=0x00000000
444 00:55:56.109903 MVN_2=0x00000000
445 00:55:56.115676 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 00:55:56.115975 OPS=0x10
447 00:55:56.116224 ring efuse init
448 00:55:56.116431 chipver efuse init
449 00:55:56.123963 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 00:55:56.124302 [0.018961 Inits done]
451 00:55:56.124514 secure task start!
452 00:55:56.131500 high task start!
453 00:55:56.131778 low task start!
454 00:55:56.132003 run into bl31
455 00:55:56.138121 NOTICE: BL31: v1.3(release):4fc40b1
456 00:55:56.145958 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 00:55:56.146318 NOTICE: BL31: G12A normal boot!
458 00:55:56.171350 NOTICE: BL31: BL33 decompress pass
459 00:55:56.176974 ERROR: Error initializing runtime service opteed_fast
460 00:55:57.409935
461 00:55:57.410580
462 00:55:57.418270 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 00:55:57.418753
464 00:55:57.419175 Model: Libre Computer AML-A311D-CC Alta
465 00:55:57.626729 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 00:55:57.650048 DRAM: 2 GiB (effective 3.8 GiB)
467 00:55:57.793108 Core: 408 devices, 31 uclasses, devicetree: separate
468 00:55:57.798899 WDT: Not starting watchdog@f0d0
469 00:55:57.831158 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 00:55:57.843686 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 00:55:57.848643 ** Bad device specification mmc 0 **
472 00:55:57.858958 Card did not respond to voltage select! : -110
473 00:55:57.866587 ** Bad device specification mmc 0 **
474 00:55:57.867037 Couldn't find partition mmc 0
475 00:55:57.874925 Card did not respond to voltage select! : -110
476 00:55:57.880444 ** Bad device specification mmc 0 **
477 00:55:57.880883 Couldn't find partition mmc 0
478 00:55:57.885516 Error: could not access storage.
479 00:55:59.149514 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 00:55:59.150130 bl2_stage_init 0x01
481 00:55:59.150553 bl2_stage_init 0x81
482 00:55:59.155062 hw id: 0x0000 - pwm id 0x01
483 00:55:59.155503 bl2_stage_init 0xc1
484 00:55:59.155916 bl2_stage_init 0x02
485 00:55:59.156394
486 00:55:59.160643 L0:00000000
487 00:55:59.161098 L1:20000703
488 00:55:59.161511 L2:00008067
489 00:55:59.161914 L3:14000000
490 00:55:59.163536 B2:00402000
491 00:55:59.164005 B1:e0f83180
492 00:55:59.164419
493 00:55:59.164826 TE: 58124
494 00:55:59.165233
495 00:55:59.174734 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 00:55:59.175227
497 00:55:59.175642 Board ID = 1
498 00:55:59.176079 Set A53 clk to 24M
499 00:55:59.176495 Set A73 clk to 24M
500 00:55:59.180325 Set clk81 to 24M
501 00:55:59.180783 A53 clk: 1200 MHz
502 00:55:59.181196 A73 clk: 1200 MHz
503 00:55:59.185925 CLK81: 166.6M
504 00:55:59.186393 smccc: 00012a92
505 00:55:59.191519 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 00:55:59.191974 board id: 1
507 00:55:59.200125 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 00:55:59.210949 fw parse done
509 00:55:59.216747 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 00:55:59.259360 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 00:55:59.270247 PIEI prepare done
512 00:55:59.270711 fastboot data load
513 00:55:59.271127 fastboot data verify
514 00:55:59.275937 verify result: 266
515 00:55:59.281556 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 00:55:59.282032 LPDDR4 probe
517 00:55:59.282445 ddr clk to 1584MHz
518 00:55:59.289502 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 00:55:59.326788
520 00:55:59.327264 dmc_version 0001
521 00:55:59.333421 Check phy result
522 00:55:59.339277 INFO : End of CA training
523 00:55:59.339711 INFO : End of initialization
524 00:55:59.344960 INFO : Training has run successfully!
525 00:55:59.345397 Check phy result
526 00:55:59.350491 INFO : End of initialization
527 00:55:59.350917 INFO : End of read enable training
528 00:55:59.356146 INFO : End of fine write leveling
529 00:55:59.361675 INFO : End of Write leveling coarse delay
530 00:55:59.361989 INFO : Training has run successfully!
531 00:55:59.362208 Check phy result
532 00:55:59.367241 INFO : End of initialization
533 00:55:59.367493 INFO : End of read dq deskew training
534 00:55:59.372918 INFO : End of MPR read delay center optimization
535 00:55:59.378477 INFO : End of write delay center optimization
536 00:55:59.384099 INFO : End of read delay center optimization
537 00:55:59.384350 INFO : End of max read latency training
538 00:55:59.389676 INFO : Training has run successfully!
539 00:55:59.389930 1D training succeed
540 00:55:59.398849 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 00:55:59.446479 Check phy result
542 00:55:59.446807 INFO : End of initialization
543 00:55:59.468378 INFO : End of 2D read delay Voltage center optimization
544 00:55:59.488503 INFO : End of 2D read delay Voltage center optimization
545 00:55:59.540557 INFO : End of 2D write delay Voltage center optimization
546 00:55:59.590049 INFO : End of 2D write delay Voltage center optimization
547 00:55:59.595453 INFO : Training has run successfully!
548 00:55:59.595720
549 00:55:59.595937 channel==0
550 00:55:59.601101 RxClkDly_Margin_A0==88 ps 9
551 00:55:59.601585 TxDqDly_Margin_A0==98 ps 10
552 00:55:59.604406 RxClkDly_Margin_A1==88 ps 9
553 00:55:59.604852 TxDqDly_Margin_A1==98 ps 10
554 00:55:59.610006 TrainedVREFDQ_A0==74
555 00:55:59.610475 TrainedVREFDQ_A1==74
556 00:55:59.610898 VrefDac_Margin_A0==25
557 00:55:59.615633 DeviceVref_Margin_A0==40
558 00:55:59.616114 VrefDac_Margin_A1==25
559 00:55:59.621229 DeviceVref_Margin_A1==40
560 00:55:59.621676
561 00:55:59.622092
562 00:55:59.622502 channel==1
563 00:55:59.622904 RxClkDly_Margin_A0==98 ps 10
564 00:55:59.626788 TxDqDly_Margin_A0==98 ps 10
565 00:55:59.627251 RxClkDly_Margin_A1==98 ps 10
566 00:55:59.632405 TxDqDly_Margin_A1==88 ps 9
567 00:55:59.632879 TrainedVREFDQ_A0==77
568 00:55:59.633302 TrainedVREFDQ_A1==77
569 00:55:59.637960 VrefDac_Margin_A0==22
570 00:55:59.638414 DeviceVref_Margin_A0==37
571 00:55:59.643629 VrefDac_Margin_A1==22
572 00:55:59.644101 DeviceVref_Margin_A1==37
573 00:55:59.644517
574 00:55:59.649207 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 00:55:59.649646
576 00:55:59.677214 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
577 00:55:59.682793 2D training succeed
578 00:55:59.688409 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 00:55:59.688886 auto size-- 65535DDR cs0 size: 2048MB
580 00:55:59.693979 DDR cs1 size: 2048MB
581 00:55:59.694442 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 00:55:59.699609 cs0 DataBus test pass
583 00:55:59.700106 cs1 DataBus test pass
584 00:55:59.700542 cs0 AddrBus test pass
585 00:55:59.705202 cs1 AddrBus test pass
586 00:55:59.705675
587 00:55:59.706097 100bdlr_step_size ps== 420
588 00:55:59.706528 result report
589 00:55:59.710817 boot times 0Enable ddr reg access
590 00:55:59.718509 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 00:55:59.732246 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 00:56:00.305700 0.0;M3 CHK:0;cm4_sp_mode 0
593 00:56:00.306135 MVN_1=0x00000000
594 00:56:00.312178 MVN_2=0x00000000
595 00:56:00.316914 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 00:56:00.317248 OPS=0x10
597 00:56:00.317492 ring efuse init
598 00:56:00.317716 chipver efuse init
599 00:56:00.322490 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 00:56:00.328129 [0.018961 Inits done]
601 00:56:00.328458 secure task start!
602 00:56:00.328736 high task start!
603 00:56:00.332664 low task start!
604 00:56:00.332977 run into bl31
605 00:56:00.339359 NOTICE: BL31: v1.3(release):4fc40b1
606 00:56:00.347135 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 00:56:00.347437 NOTICE: BL31: G12A normal boot!
608 00:56:00.372605 NOTICE: BL31: BL33 decompress pass
609 00:56:00.378320 ERROR: Error initializing runtime service opteed_fast
610 00:56:01.611419
611 00:56:01.611869
612 00:56:01.619756 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 00:56:01.620476
614 00:56:01.621023 Model: Libre Computer AML-A311D-CC Alta
615 00:56:01.828243 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 00:56:01.851716 DRAM: 2 GiB (effective 3.8 GiB)
617 00:56:01.994559 Core: 408 devices, 31 uclasses, devicetree: separate
618 00:56:02.000304 WDT: Not starting watchdog@f0d0
619 00:56:02.032610 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 00:56:02.044943 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 00:56:02.049932 ** Bad device specification mmc 0 **
622 00:56:02.060377 Card did not respond to voltage select! : -110
623 00:56:02.067894 ** Bad device specification mmc 0 **
624 00:56:02.068506 Couldn't find partition mmc 0
625 00:56:02.076368 Card did not respond to voltage select! : -110
626 00:56:02.081709 ** Bad device specification mmc 0 **
627 00:56:02.082296 Couldn't find partition mmc 0
628 00:56:02.086871 Error: could not access storage.
629 00:56:02.429554 Net: eth0: ethernet@ff3f0000
630 00:56:02.430237 starting USB...
631 00:56:02.681251 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 00:56:02.681887 Starting the controller
633 00:56:02.688315 USB XHCI 1.10
634 00:56:04.399842 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 00:56:04.400308 bl2_stage_init 0x01
636 00:56:04.400555 bl2_stage_init 0x81
637 00:56:04.405339 hw id: 0x0000 - pwm id 0x01
638 00:56:04.405889 bl2_stage_init 0xc1
639 00:56:04.406369 bl2_stage_init 0x02
640 00:56:04.407192
641 00:56:04.411115 L0:00000000
642 00:56:04.411650 L1:20000703
643 00:56:04.412152 L2:00008067
644 00:56:04.412614 L3:14000000
645 00:56:04.413836 B2:00402000
646 00:56:04.416642 B1:e0f83180
647 00:56:04.417870
648 00:56:04.418729 TE: 58167
649 00:56:04.419192
650 00:56:04.425099 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 00:56:04.425675
652 00:56:04.426154 Board ID = 1
653 00:56:04.426603 Set A53 clk to 24M
654 00:56:04.427062 Set A73 clk to 24M
655 00:56:04.430525 Set clk81 to 24M
656 00:56:04.430918 A53 clk: 1200 MHz
657 00:56:04.431176 A73 clk: 1200 MHz
658 00:56:04.436169 CLK81: 166.6M
659 00:56:04.436483 smccc: 00012abe
660 00:56:04.441959 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 00:56:04.442285 board id: 1
662 00:56:04.447519 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 00:56:04.461202 fw parse done
664 00:56:04.467102 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 00:56:04.509803 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 00:56:04.520657 PIEI prepare done
667 00:56:04.521014 fastboot data load
668 00:56:04.521271 fastboot data verify
669 00:56:04.526170 verify result: 266
670 00:56:04.531801 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 00:56:04.532230 LPDDR4 probe
672 00:56:04.532543 ddr clk to 1584MHz
673 00:56:04.539876 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 00:56:04.577226
675 00:56:04.577874 dmc_version 0001
676 00:56:04.584065 Check phy result
677 00:56:04.589764 INFO : End of CA training
678 00:56:04.590337 INFO : End of initialization
679 00:56:04.595362 INFO : Training has run successfully!
680 00:56:04.595712 Check phy result
681 00:56:04.600822 INFO : End of initialization
682 00:56:04.601221 INFO : End of read enable training
683 00:56:04.606487 INFO : End of fine write leveling
684 00:56:04.612067 INFO : End of Write leveling coarse delay
685 00:56:04.612393 INFO : Training has run successfully!
686 00:56:04.612641 Check phy result
687 00:56:04.617650 INFO : End of initialization
688 00:56:04.618077 INFO : End of read dq deskew training
689 00:56:04.623192 INFO : End of MPR read delay center optimization
690 00:56:04.628844 INFO : End of write delay center optimization
691 00:56:04.634446 INFO : End of read delay center optimization
692 00:56:04.634900 INFO : End of max read latency training
693 00:56:04.640203 INFO : Training has run successfully!
694 00:56:04.640663 1D training succeed
695 00:56:04.649330 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 00:56:04.697006 Check phy result
697 00:56:04.697542 INFO : End of initialization
698 00:56:04.718558 INFO : End of 2D read delay Voltage center optimization
699 00:56:04.737777 INFO : End of 2D read delay Voltage center optimization
700 00:56:04.789921 INFO : End of 2D write delay Voltage center optimization
701 00:56:04.839103 INFO : End of 2D write delay Voltage center optimization
702 00:56:04.844439 INFO : Training has run successfully!
703 00:56:04.844987
704 00:56:04.845420 channel==0
705 00:56:04.850036 RxClkDly_Margin_A0==88 ps 9
706 00:56:04.850491 TxDqDly_Margin_A0==98 ps 10
707 00:56:04.853302 RxClkDly_Margin_A1==88 ps 9
708 00:56:04.853750 TxDqDly_Margin_A1==98 ps 10
709 00:56:04.859409 TrainedVREFDQ_A0==74
710 00:56:04.859896 TrainedVREFDQ_A1==74
711 00:56:04.864540 VrefDac_Margin_A0==25
712 00:56:04.865044 DeviceVref_Margin_A0==40
713 00:56:04.865489 VrefDac_Margin_A1==25
714 00:56:04.870120 DeviceVref_Margin_A1==40
715 00:56:04.870602
716 00:56:04.871026
717 00:56:04.871445 channel==1
718 00:56:04.871851 RxClkDly_Margin_A0==88 ps 9
719 00:56:04.873617 TxDqDly_Margin_A0==98 ps 10
720 00:56:04.879129 RxClkDly_Margin_A1==88 ps 9
721 00:56:04.879611 TxDqDly_Margin_A1==88 ps 9
722 00:56:04.880080 TrainedVREFDQ_A0==77
723 00:56:04.884755 TrainedVREFDQ_A1==77
724 00:56:04.885264 VrefDac_Margin_A0==23
725 00:56:04.890286 DeviceVref_Margin_A0==37
726 00:56:04.890858 VrefDac_Margin_A1==24
727 00:56:04.891338 DeviceVref_Margin_A1==37
728 00:56:04.891806
729 00:56:04.895966 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 00:56:04.896552
731 00:56:04.929537 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 00:56:04.930194 2D training succeed
733 00:56:04.935188 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 00:56:04.940740 auto size-- 65535DDR cs0 size: 2048MB
735 00:56:04.941323 DDR cs1 size: 2048MB
736 00:56:04.946341 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 00:56:04.946910 cs0 DataBus test pass
738 00:56:04.947385 cs1 DataBus test pass
739 00:56:04.951944 cs0 AddrBus test pass
740 00:56:04.952595 cs1 AddrBus test pass
741 00:56:04.953076
742 00:56:04.957564 100bdlr_step_size ps== 420
743 00:56:04.958131 result report
744 00:56:04.958603 boot times 0Enable ddr reg access
745 00:56:04.967298 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 00:56:04.980771 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 00:56:05.552912 0.0;M3 CHK:0;cm4_sp_mode 0
748 00:56:05.553579 MVN_1=0x00000000
749 00:56:05.558327 MVN_2=0x00000000
750 00:56:05.564243 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 00:56:05.564823 OPS=0x10
752 00:56:05.565276 ring efuse init
753 00:56:05.565714 chipver efuse init
754 00:56:05.572380 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 00:56:05.572938 [0.018961 Inits done]
756 00:56:05.573386 secure task start!
757 00:56:05.579920 high task start!
758 00:56:05.580472 low task start!
759 00:56:05.580912 run into bl31
760 00:56:05.586509 NOTICE: BL31: v1.3(release):4fc40b1
761 00:56:05.594343 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 00:56:05.594879 NOTICE: BL31: G12A normal boot!
763 00:56:05.620291 NOTICE: BL31: BL33 decompress pass
764 00:56:05.626211 ERROR: Error initializing runtime service opteed_fast
765 00:56:06.858964
766 00:56:06.859381
767 00:56:06.867408 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 00:56:06.868097
769 00:56:06.868586 Model: Libre Computer AML-A311D-CC Alta
770 00:56:07.075848 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 00:56:07.099166 DRAM: 2 GiB (effective 3.8 GiB)
772 00:56:07.242109 Core: 408 devices, 31 uclasses, devicetree: separate
773 00:56:07.248162 WDT: Not starting watchdog@f0d0
774 00:56:07.280349 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 00:56:07.292738 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 00:56:07.297765 ** Bad device specification mmc 0 **
777 00:56:07.308143 Card did not respond to voltage select! : -110
778 00:56:07.315783 ** Bad device specification mmc 0 **
779 00:56:07.316400 Couldn't find partition mmc 0
780 00:56:07.324169 Card did not respond to voltage select! : -110
781 00:56:07.329461 ** Bad device specification mmc 0 **
782 00:56:07.330015 Couldn't find partition mmc 0
783 00:56:07.334629 Error: could not access storage.
784 00:56:07.678089 Net: eth0: ethernet@ff3f0000
785 00:56:07.678768 starting USB...
786 00:56:07.929951 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 00:56:07.930567 Starting the controller
788 00:56:07.936955 USB XHCI 1.10
789 00:56:10.101588 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 00:56:10.102383 bl2_stage_init 0x01
791 00:56:10.103458 bl2_stage_init 0x81
792 00:56:10.107028 hw id: 0x0000 - pwm id 0x01
793 00:56:10.107596 bl2_stage_init 0xc1
794 00:56:10.108095 bl2_stage_init 0x02
795 00:56:10.108554
796 00:56:10.112690 L0:00000000
797 00:56:10.113300 L1:20000703
798 00:56:10.113764 L2:00008067
799 00:56:10.114216 L3:14000000
800 00:56:10.118213 B2:00402000
801 00:56:10.118745 B1:e0f83180
802 00:56:10.119200
803 00:56:10.119757 TE: 58167
804 00:56:10.120782
805 00:56:10.123855 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 00:56:10.124442
807 00:56:10.124908 Board ID = 1
808 00:56:10.129488 Set A53 clk to 24M
809 00:56:10.130168 Set A73 clk to 24M
810 00:56:10.130671 Set clk81 to 24M
811 00:56:10.135020 A53 clk: 1200 MHz
812 00:56:10.135562 A73 clk: 1200 MHz
813 00:56:10.136047 CLK81: 166.6M
814 00:56:10.136498 smccc: 00012abd
815 00:56:10.140703 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 00:56:10.147711 board id: 1
817 00:56:10.152027 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 00:56:10.162665 fw parse done
819 00:56:10.168806 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 00:56:10.211167 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 00:56:10.221957 PIEI prepare done
822 00:56:10.222335 fastboot data load
823 00:56:10.222573 fastboot data verify
824 00:56:10.227548 verify result: 266
825 00:56:10.233349 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 00:56:10.233801 LPDDR4 probe
827 00:56:10.234074 ddr clk to 1584MHz
828 00:56:10.241247 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 00:56:10.278563
830 00:56:10.278986 dmc_version 0001
831 00:56:10.285368 Check phy result
832 00:56:10.291085 INFO : End of CA training
833 00:56:10.291456 INFO : End of initialization
834 00:56:10.296523 INFO : Training has run successfully!
835 00:56:10.296864 Check phy result
836 00:56:10.302118 INFO : End of initialization
837 00:56:10.302447 INFO : End of read enable training
838 00:56:10.305495 INFO : End of fine write leveling
839 00:56:10.311139 INFO : End of Write leveling coarse delay
840 00:56:10.316761 INFO : Training has run successfully!
841 00:56:10.317354 Check phy result
842 00:56:10.317835 INFO : End of initialization
843 00:56:10.322391 INFO : End of read dq deskew training
844 00:56:10.327865 INFO : End of MPR read delay center optimization
845 00:56:10.328203 INFO : End of write delay center optimization
846 00:56:10.333638 INFO : End of read delay center optimization
847 00:56:10.339215 INFO : End of max read latency training
848 00:56:10.339776 INFO : Training has run successfully!
849 00:56:10.344775 1D training succeed
850 00:56:10.350732 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 00:56:10.398372 Check phy result
852 00:56:10.399347 INFO : End of initialization
853 00:56:10.420098 INFO : End of 2D read delay Voltage center optimization
854 00:56:10.440341 INFO : End of 2D read delay Voltage center optimization
855 00:56:10.492230 INFO : End of 2D write delay Voltage center optimization
856 00:56:10.541706 INFO : End of 2D write delay Voltage center optimization
857 00:56:10.547126 INFO : Training has run successfully!
858 00:56:10.547472
859 00:56:10.547726 channel==0
860 00:56:10.552905 RxClkDly_Margin_A0==88 ps 9
861 00:56:10.553504 TxDqDly_Margin_A0==98 ps 10
862 00:56:10.558527 RxClkDly_Margin_A1==88 ps 9
863 00:56:10.559114 TxDqDly_Margin_A1==98 ps 10
864 00:56:10.559623 TrainedVREFDQ_A0==74
865 00:56:10.564117 TrainedVREFDQ_A1==75
866 00:56:10.564715 VrefDac_Margin_A0==25
867 00:56:10.565217 DeviceVref_Margin_A0==40
868 00:56:10.569752 VrefDac_Margin_A1==25
869 00:56:10.570294 DeviceVref_Margin_A1==39
870 00:56:10.570770
871 00:56:10.571260
872 00:56:10.575252 channel==1
873 00:56:10.575846 RxClkDly_Margin_A0==98 ps 10
874 00:56:10.576385 TxDqDly_Margin_A0==88 ps 9
875 00:56:10.580901 RxClkDly_Margin_A1==88 ps 9
876 00:56:10.581472 TxDqDly_Margin_A1==88 ps 9
877 00:56:10.586521 TrainedVREFDQ_A0==77
878 00:56:10.587113 TrainedVREFDQ_A1==77
879 00:56:10.587598 VrefDac_Margin_A0==22
880 00:56:10.591977 DeviceVref_Margin_A0==37
881 00:56:10.592591 VrefDac_Margin_A1==24
882 00:56:10.597777 DeviceVref_Margin_A1==37
883 00:56:10.598408
884 00:56:10.598909 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 00:56:10.599384
886 00:56:10.631146 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
887 00:56:10.631847 2D training succeed
888 00:56:10.636755 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 00:56:10.642390 auto size-- 65535DDR cs0 size: 2048MB
890 00:56:10.642982 DDR cs1 size: 2048MB
891 00:56:10.647944 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 00:56:10.648567 cs0 DataBus test pass
893 00:56:10.653622 cs1 DataBus test pass
894 00:56:10.654196 cs0 AddrBus test pass
895 00:56:10.654677 cs1 AddrBus test pass
896 00:56:10.655146
897 00:56:10.659123 100bdlr_step_size ps== 420
898 00:56:10.659699 result report
899 00:56:10.664697 boot times 0Enable ddr reg access
900 00:56:10.669990 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 00:56:10.683479 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 00:56:11.257160 0.0;M3 CHK:0;cm4_sp_mode 0
903 00:56:11.257873 MVN_1=0x00000000
904 00:56:11.262646 MVN_2=0x00000000
905 00:56:11.268412 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 00:56:11.268984 OPS=0x10
907 00:56:11.269462 ring efuse init
908 00:56:11.269947 chipver efuse init
909 00:56:11.274189 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 00:56:11.279618 [0.018961 Inits done]
911 00:56:11.280239 secure task start!
912 00:56:11.280740 high task start!
913 00:56:11.284191 low task start!
914 00:56:11.284725 run into bl31
915 00:56:11.290790 NOTICE: BL31: v1.3(release):4fc40b1
916 00:56:11.298772 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 00:56:11.299341 NOTICE: BL31: G12A normal boot!
918 00:56:11.324584 NOTICE: BL31: BL33 decompress pass
919 00:56:11.330235 ERROR: Error initializing runtime service opteed_fast
920 00:56:12.564652
921 00:56:12.565291
922 00:56:12.571391 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 00:56:12.571892
924 00:56:12.572372 Model: Libre Computer AML-A311D-CC Alta
925 00:56:12.780592 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 00:56:12.803343 DRAM: 2 GiB (effective 3.8 GiB)
927 00:56:12.946302 Core: 408 devices, 31 uclasses, devicetree: separate
928 00:56:12.952672 WDT: Not starting watchdog@f0d0
929 00:56:12.984532 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 00:56:12.997221 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 00:56:13.002136 ** Bad device specification mmc 0 **
932 00:56:13.012353 Card did not respond to voltage select! : -110
933 00:56:13.020176 ** Bad device specification mmc 0 **
934 00:56:13.021072 Couldn't find partition mmc 0
935 00:56:13.028653 Card did not respond to voltage select! : -110
936 00:56:13.033750 ** Bad device specification mmc 0 **
937 00:56:13.034298 Couldn't find partition mmc 0
938 00:56:13.038780 Error: could not access storage.
939 00:56:13.381717 Net: eth0: ethernet@ff3f0000
940 00:56:13.382503 starting USB...
941 00:56:13.633257 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 00:56:13.633680 Starting the controller
943 00:56:13.640451 USB XHCI 1.10
944 00:56:15.193983 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 00:56:15.202346 scanning usb for storage devices... 0 Storage Device(s) found
947 00:56:15.254284 Hit any key to stop autoboot: 1
948 00:56:15.255344 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 00:56:15.256136 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 00:56:15.256678 Setting prompt string to ['=>']
951 00:56:15.257213 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 00:56:15.269775 0
953 00:56:15.270882 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 00:56:15.271429 Sending with 10 millisecond of delay
956 00:56:16.408169 => setenv autoload no
957 00:56:16.419085 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 00:56:16.425026 setenv autoload no
959 00:56:16.425936 Sending with 10 millisecond of delay
961 00:56:18.227278 => setenv initrd_high 0xffffffff
962 00:56:18.238124 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 00:56:18.238855 setenv initrd_high 0xffffffff
964 00:56:18.239396 Sending with 10 millisecond of delay
966 00:56:19.855859 => setenv fdt_high 0xffffffff
967 00:56:19.866636 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 00:56:19.867272 setenv fdt_high 0xffffffff
969 00:56:19.867835 Sending with 10 millisecond of delay
971 00:56:20.159787 => dhcp
972 00:56:20.170569 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 00:56:20.171278 dhcp
974 00:56:20.171555 Speed: 1000, full duplex
975 00:56:20.171781 BOOTP broadcast 1
976 00:56:20.183665 DHCP client bound to address 192.168.6.27 (12 ms)
977 00:56:20.184639 Sending with 10 millisecond of delay
979 00:56:21.862607 => setenv serverip 192.168.6.2
980 00:56:21.873263 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 00:56:21.874338 setenv serverip 192.168.6.2
982 00:56:21.875110 Sending with 10 millisecond of delay
984 00:56:25.600549 => tftpboot 0x01080000 919423/tftp-deploy-ji94g733/kernel/uImage
985 00:56:25.611164 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 00:56:25.611965 tftpboot 0x01080000 919423/tftp-deploy-ji94g733/kernel/uImage
987 00:56:25.612325 Speed: 1000, full duplex
988 00:56:25.612567 Using ethernet@ff3f0000 device
989 00:56:25.613948 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 00:56:25.619498 Filename '919423/tftp-deploy-ji94g733/kernel/uImage'.
991 00:56:25.623402 Load address: 0x1080000
992 00:56:28.572835 Loading: *################################################## 43.6 MiB
993 00:56:28.573520 14.8 MiB/s
994 00:56:28.573981 done
995 00:56:28.578435 Bytes transferred = 45713984 (2b98a40 hex)
996 00:56:28.579241 Sending with 10 millisecond of delay
998 00:56:33.266388 => tftpboot 0x08000000 919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
999 00:56:33.277207 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 00:56:33.278085 tftpboot 0x08000000 919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot
1001 00:56:33.278582 Speed: 1000, full duplex
1002 00:56:33.279048 Using ethernet@ff3f0000 device
1003 00:56:33.279907 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 00:56:33.288548 Filename '919423/tftp-deploy-ji94g733/ramdisk/ramdisk.cpio.gz.uboot'.
1005 00:56:33.289019 Load address: 0x8000000
1006 00:56:40.002373 Loading: *##############T ################################### UDP wrong checksum 00000005 0000cf24
1007 00:56:45.003051 T UDP wrong checksum 00000005 0000cf24
1008 00:56:55.006203 T T UDP wrong checksum 00000005 0000cf24
1009 00:57:15.009100 T T T T UDP wrong checksum 00000005 0000cf24
1010 00:57:30.014126 T T
1011 00:57:30.014758 Retry count exceeded; starting again
1013 00:57:30.016237 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1016 00:57:30.018153 end: 2.4 uboot-commands (duration 00:01:47) [common]
1018 00:57:30.019564 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1020 00:57:30.020600 end: 2 uboot-action (duration 00:01:47) [common]
1022 00:57:30.022100 Cleaning after the job
1023 00:57:30.022641 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/ramdisk
1024 00:57:30.024077 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/kernel
1025 00:57:30.055899 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/dtb
1026 00:57:30.057275 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/nfsrootfs
1027 00:57:30.089804 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919423/tftp-deploy-ji94g733/modules
1028 00:57:30.096488 start: 4.1 power-off (timeout 00:00:30) [common]
1029 00:57:30.097067 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1030 00:57:30.128251 >> OK - accepted request
1031 00:57:30.130238 Returned 0 in 0 seconds
1032 00:57:30.230924 end: 4.1 power-off (duration 00:00:00) [common]
1034 00:57:30.231836 start: 4.2 read-feedback (timeout 00:10:00) [common]
1035 00:57:30.232518 Listened to connection for namespace 'common' for up to 1s
1036 00:57:31.233489 Finalising connection for namespace 'common'
1037 00:57:31.234195 Disconnecting from shell: Finalise
1038 00:57:31.234698 =>
1039 00:57:31.335625 end: 4.2 read-feedback (duration 00:00:01) [common]
1040 00:57:31.336255 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/919423
1041 00:57:32.999182 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/919423
1042 00:57:32.999768 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.