Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:56:01.109965 lava-dispatcher, installed at version: 2024.01
2 00:56:01.110955 start: 0 validate
3 00:56:01.111546 Start time: 2024-11-01 00:56:01.111508+00:00 (UTC)
4 00:56:01.112230 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:56:01.112900 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:56:01.162486 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:56:01.163044 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 00:56:01.203426 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:56:01.204101 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:56:01.248268 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:56:01.248795 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:56:01.290221 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:56:01.290774 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 00:56:01.346110 validate duration: 0.23
16 00:56:01.347562 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:56:01.348188 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:56:01.348749 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:56:01.349949 Not decompressing ramdisk as can be used compressed.
20 00:56:01.350764 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:56:01.351284 saving as /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/ramdisk/initrd.cpio.gz
22 00:56:01.351820 total size: 5628169 (5 MB)
23 00:56:01.406505 progress 0 % (0 MB)
24 00:56:01.414320 progress 5 % (0 MB)
25 00:56:01.421197 progress 10 % (0 MB)
26 00:56:01.427291 progress 15 % (0 MB)
27 00:56:01.433841 progress 20 % (1 MB)
28 00:56:01.439338 progress 25 % (1 MB)
29 00:56:01.443593 progress 30 % (1 MB)
30 00:56:01.447932 progress 35 % (1 MB)
31 00:56:01.452314 progress 40 % (2 MB)
32 00:56:01.456631 progress 45 % (2 MB)
33 00:56:01.460433 progress 50 % (2 MB)
34 00:56:01.464708 progress 55 % (2 MB)
35 00:56:01.469112 progress 60 % (3 MB)
36 00:56:01.472995 progress 65 % (3 MB)
37 00:56:01.477178 progress 70 % (3 MB)
38 00:56:01.480902 progress 75 % (4 MB)
39 00:56:01.484932 progress 80 % (4 MB)
40 00:56:01.488483 progress 85 % (4 MB)
41 00:56:01.492934 progress 90 % (4 MB)
42 00:56:01.497240 progress 95 % (5 MB)
43 00:56:01.500666 progress 100 % (5 MB)
44 00:56:01.501350 5 MB downloaded in 0.15 s (35.90 MB/s)
45 00:56:01.501896 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:56:01.502790 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:56:01.503083 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:56:01.503356 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:56:01.503832 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/kernel/Image
51 00:56:01.504101 saving as /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/kernel/Image
52 00:56:01.504314 total size: 45713920 (43 MB)
53 00:56:01.504527 No compression specified
54 00:56:01.545000 progress 0 % (0 MB)
55 00:56:01.572965 progress 5 % (2 MB)
56 00:56:01.601121 progress 10 % (4 MB)
57 00:56:01.629277 progress 15 % (6 MB)
58 00:56:01.657887 progress 20 % (8 MB)
59 00:56:01.686310 progress 25 % (10 MB)
60 00:56:01.714032 progress 30 % (13 MB)
61 00:56:01.741636 progress 35 % (15 MB)
62 00:56:01.769623 progress 40 % (17 MB)
63 00:56:01.797293 progress 45 % (19 MB)
64 00:56:01.824930 progress 50 % (21 MB)
65 00:56:01.852735 progress 55 % (24 MB)
66 00:56:01.881160 progress 60 % (26 MB)
67 00:56:01.908532 progress 65 % (28 MB)
68 00:56:01.936336 progress 70 % (30 MB)
69 00:56:01.964204 progress 75 % (32 MB)
70 00:56:01.992355 progress 80 % (34 MB)
71 00:56:02.019625 progress 85 % (37 MB)
72 00:56:02.047380 progress 90 % (39 MB)
73 00:56:02.075069 progress 95 % (41 MB)
74 00:56:02.102432 progress 100 % (43 MB)
75 00:56:02.102985 43 MB downloaded in 0.60 s (72.82 MB/s)
76 00:56:02.103466 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:56:02.104327 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:56:02.104603 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:56:02.104869 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:56:02.105356 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:56:02.105646 saving as /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:56:02.105855 total size: 53209 (0 MB)
84 00:56:02.106065 No compression specified
85 00:56:02.143280 progress 61 % (0 MB)
86 00:56:02.144199 progress 100 % (0 MB)
87 00:56:02.144778 0 MB downloaded in 0.04 s (1.30 MB/s)
88 00:56:02.145268 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:56:02.146075 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:56:02.146339 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:56:02.146601 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:56:02.147067 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:56:02.147308 saving as /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/nfsrootfs/full.rootfs.tar
95 00:56:02.147512 total size: 120894716 (115 MB)
96 00:56:02.147720 Using unxz to decompress xz
97 00:56:02.188127 progress 0 % (0 MB)
98 00:56:02.996711 progress 5 % (5 MB)
99 00:56:03.850301 progress 10 % (11 MB)
100 00:56:04.647533 progress 15 % (17 MB)
101 00:56:05.392502 progress 20 % (23 MB)
102 00:56:05.988376 progress 25 % (28 MB)
103 00:56:06.847147 progress 30 % (34 MB)
104 00:56:07.764068 progress 35 % (40 MB)
105 00:56:08.188538 progress 40 % (46 MB)
106 00:56:08.604183 progress 45 % (51 MB)
107 00:56:09.329218 progress 50 % (57 MB)
108 00:56:10.219511 progress 55 % (63 MB)
109 00:56:11.007505 progress 60 % (69 MB)
110 00:56:11.770661 progress 65 % (74 MB)
111 00:56:12.551332 progress 70 % (80 MB)
112 00:56:13.386580 progress 75 % (86 MB)
113 00:56:14.186513 progress 80 % (92 MB)
114 00:56:14.956284 progress 85 % (98 MB)
115 00:56:15.995653 progress 90 % (103 MB)
116 00:56:16.968819 progress 95 % (109 MB)
117 00:56:17.900529 progress 100 % (115 MB)
118 00:56:17.914401 115 MB downloaded in 15.77 s (7.31 MB/s)
119 00:56:17.915037 end: 1.4.1 http-download (duration 00:00:16) [common]
121 00:56:17.915851 end: 1.4 download-retry (duration 00:00:16) [common]
122 00:56:17.916297 start: 1.5 download-retry (timeout 00:09:43) [common]
123 00:56:17.916864 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 00:56:17.917692 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/modules.tar.xz
125 00:56:17.918181 saving as /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/modules/modules.tar
126 00:56:17.918624 total size: 11592552 (11 MB)
127 00:56:17.919080 Using unxz to decompress xz
128 00:56:17.961717 progress 0 % (0 MB)
129 00:56:18.032180 progress 5 % (0 MB)
130 00:56:18.109714 progress 10 % (1 MB)
131 00:56:18.208257 progress 15 % (1 MB)
132 00:56:18.284637 progress 20 % (2 MB)
133 00:56:18.367378 progress 25 % (2 MB)
134 00:56:18.448328 progress 30 % (3 MB)
135 00:56:18.522720 progress 35 % (3 MB)
136 00:56:18.603326 progress 40 % (4 MB)
137 00:56:18.690310 progress 45 % (5 MB)
138 00:56:18.768411 progress 50 % (5 MB)
139 00:56:18.852495 progress 55 % (6 MB)
140 00:56:18.934117 progress 60 % (6 MB)
141 00:56:19.014511 progress 65 % (7 MB)
142 00:56:19.095381 progress 70 % (7 MB)
143 00:56:19.177341 progress 75 % (8 MB)
144 00:56:19.260573 progress 80 % (8 MB)
145 00:56:19.337448 progress 85 % (9 MB)
146 00:56:19.410952 progress 90 % (9 MB)
147 00:56:19.511873 progress 95 % (10 MB)
148 00:56:19.604341 progress 100 % (11 MB)
149 00:56:19.619310 11 MB downloaded in 1.70 s (6.50 MB/s)
150 00:56:19.620253 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:56:19.622458 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:56:19.623126 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:56:19.623785 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 00:56:36.417922 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/919413/extract-nfsrootfs-q5gaqsu7
156 00:56:36.418497 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:56:36.418783 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 00:56:36.419394 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x
159 00:56:36.419818 makedir: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin
160 00:56:36.420179 makedir: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/tests
161 00:56:36.420494 makedir: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/results
162 00:56:36.420841 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-add-keys
163 00:56:36.421437 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-add-sources
164 00:56:36.421985 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-background-process-start
165 00:56:36.422532 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-background-process-stop
166 00:56:36.423129 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-common-functions
167 00:56:36.423680 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-echo-ipv4
168 00:56:36.424257 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-install-packages
169 00:56:36.424804 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-installed-packages
170 00:56:36.425330 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-os-build
171 00:56:36.425851 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-probe-channel
172 00:56:36.426387 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-probe-ip
173 00:56:36.426914 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-target-ip
174 00:56:36.427433 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-target-mac
175 00:56:36.427922 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-target-storage
176 00:56:36.428525 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-case
177 00:56:36.429084 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-event
178 00:56:36.429577 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-feedback
179 00:56:36.430068 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-raise
180 00:56:36.430596 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-reference
181 00:56:36.431103 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-runner
182 00:56:36.431589 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-set
183 00:56:36.432091 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-test-shell
184 00:56:36.432624 Updating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-add-keys (debian)
185 00:56:36.433190 Updating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-add-sources (debian)
186 00:56:36.433766 Updating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-install-packages (debian)
187 00:56:36.434321 Updating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-installed-packages (debian)
188 00:56:36.434835 Updating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/bin/lava-os-build (debian)
189 00:56:36.435419 Creating /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/environment
190 00:56:36.435817 LAVA metadata
191 00:56:36.436110 - LAVA_JOB_ID=919413
192 00:56:36.436358 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:56:36.436735 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 00:56:36.437736 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:56:36.438053 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 00:56:36.438261 skipped lava-vland-overlay
197 00:56:36.438527 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:56:36.438788 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 00:56:36.439007 skipped lava-multinode-overlay
200 00:56:36.439249 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:56:36.439497 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 00:56:36.439746 Loading test definitions
203 00:56:36.440035 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 00:56:36.440263 Using /lava-919413 at stage 0
205 00:56:36.441317 uuid=919413_1.6.2.4.1 testdef=None
206 00:56:36.441612 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:56:36.441873 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 00:56:36.443420 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:56:36.444259 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 00:56:36.446169 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:56:36.446979 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 00:56:36.448803 runner path: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/0/tests/0_timesync-off test_uuid 919413_1.6.2.4.1
215 00:56:36.449334 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:56:36.450141 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 00:56:36.450360 Using /lava-919413 at stage 0
219 00:56:36.450708 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:56:36.450993 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/0/tests/1_kselftest-dt'
221 00:56:39.911142 Running '/usr/bin/git checkout kernelci.org
222 00:56:40.376856 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 00:56:40.379353 uuid=919413_1.6.2.4.5 testdef=None
224 00:56:40.379969 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:56:40.381517 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 00:56:40.388129 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:56:40.389963 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 00:56:40.397687 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:56:40.399462 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 00:56:40.408885 runner path: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/0/tests/1_kselftest-dt test_uuid 919413_1.6.2.4.5
234 00:56:40.409538 BOARD='meson-sm1-s905d3-libretech-cc'
235 00:56:40.409960 BRANCH='mainline'
236 00:56:40.410374 SKIPFILE='/dev/null'
237 00:56:40.410785 SKIP_INSTALL='True'
238 00:56:40.411194 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 00:56:40.411621 TST_CASENAME=''
240 00:56:40.412072 TST_CMDFILES='dt'
241 00:56:40.413380 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:56:40.415065 Creating lava-test-runner.conf files
244 00:56:40.415483 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/919413/lava-overlay-rytoij9x/lava-919413/0 for stage 0
245 00:56:40.416247 - 0_timesync-off
246 00:56:40.416768 - 1_kselftest-dt
247 00:56:40.417460 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:56:40.418027 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 00:57:03.618748 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:57:03.619204 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 00:57:03.619502 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:57:03.619809 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:57:03.620146 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 00:57:04.260836 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:57:04.261314 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 00:57:04.261566 extracting modules file /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919413/extract-nfsrootfs-q5gaqsu7
257 00:57:05.628585 extracting modules file /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk
258 00:57:07.025181 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:57:07.025666 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 00:57:07.025943 [common] Applying overlay to NFS
261 00:57:07.026158 [common] Applying overlay /var/lib/lava/dispatcher/tmp/919413/compress-overlay-ht3jsi4g/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/919413/extract-nfsrootfs-q5gaqsu7
262 00:57:09.775608 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:57:09.776102 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 00:57:09.776380 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 00:57:09.776610 Converting downloaded kernel to a uImage
266 00:57:09.776924 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/kernel/Image /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/kernel/uImage
267 00:57:10.255034 output: Image Name:
268 00:57:10.255462 output: Created: Fri Nov 1 00:57:09 2024
269 00:57:10.255687 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:57:10.255902 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 00:57:10.256148 output: Load Address: 01080000
272 00:57:10.256360 output: Entry Point: 01080000
273 00:57:10.256567 output:
274 00:57:10.256910 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:57:10.257191 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:57:10.257473 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 00:57:10.257739 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:57:10.258005 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 00:57:10.258268 Building ramdisk /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk
280 00:57:12.458155 >> 166820 blocks
281 00:57:20.194480 Adding RAMdisk u-boot header.
282 00:57:20.195139 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk.cpio.gz.uboot
283 00:57:20.448706 output: Image Name:
284 00:57:20.449124 output: Created: Fri Nov 1 00:57:20 2024
285 00:57:20.449331 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:57:20.449537 output: Data Size: 23434339 Bytes = 22885.10 KiB = 22.35 MiB
287 00:57:20.449740 output: Load Address: 00000000
288 00:57:20.449939 output: Entry Point: 00000000
289 00:57:20.450141 output:
290 00:57:20.450815 rename /var/lib/lava/dispatcher/tmp/919413/extract-overlay-ramdisk-llvn7edm/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
291 00:57:20.451240 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:57:20.451522 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 00:57:20.451796 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 00:57:20.452156 No LXC device requested
295 00:57:20.452732 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:57:20.453319 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 00:57:20.453864 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:57:20.454316 Checking files for TFTP limit of 4294967296 bytes.
299 00:57:20.457246 end: 1 tftp-deploy (duration 00:01:19) [common]
300 00:57:20.457880 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:57:20.458454 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:57:20.459000 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:57:20.459558 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:57:20.460165 Using kernel file from prepare-kernel: 919413/tftp-deploy-kzwwxrg1/kernel/uImage
305 00:57:20.460862 substitutions:
306 00:57:20.461312 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:57:20.461758 - {DTB_ADDR}: 0x01070000
308 00:57:20.462198 - {DTB}: 919413/tftp-deploy-kzwwxrg1/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 00:57:20.462638 - {INITRD}: 919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
310 00:57:20.463079 - {KERNEL_ADDR}: 0x01080000
311 00:57:20.463512 - {KERNEL}: 919413/tftp-deploy-kzwwxrg1/kernel/uImage
312 00:57:20.463949 - {LAVA_MAC}: None
313 00:57:20.464464 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/919413/extract-nfsrootfs-q5gaqsu7
314 00:57:20.464909 - {NFS_SERVER_IP}: 192.168.6.2
315 00:57:20.465342 - {PRESEED_CONFIG}: None
316 00:57:20.465775 - {PRESEED_LOCAL}: None
317 00:57:20.466207 - {RAMDISK_ADDR}: 0x08000000
318 00:57:20.466636 - {RAMDISK}: 919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
319 00:57:20.467063 - {ROOT_PART}: None
320 00:57:20.467489 - {ROOT}: None
321 00:57:20.467914 - {SERVER_IP}: 192.168.6.2
322 00:57:20.468372 - {TEE_ADDR}: 0x83000000
323 00:57:20.468802 - {TEE}: None
324 00:57:20.469230 Parsed boot commands:
325 00:57:20.469644 - setenv autoload no
326 00:57:20.470069 - setenv initrd_high 0xffffffff
327 00:57:20.470496 - setenv fdt_high 0xffffffff
328 00:57:20.470917 - dhcp
329 00:57:20.471339 - setenv serverip 192.168.6.2
330 00:57:20.471767 - tftpboot 0x01080000 919413/tftp-deploy-kzwwxrg1/kernel/uImage
331 00:57:20.472227 - tftpboot 0x08000000 919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
332 00:57:20.472659 - tftpboot 0x01070000 919413/tftp-deploy-kzwwxrg1/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 00:57:20.473091 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/919413/extract-nfsrootfs-q5gaqsu7,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:57:20.473534 - bootm 0x01080000 0x08000000 0x01070000
335 00:57:20.474085 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:57:20.475720 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:57:20.476270 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 00:57:20.492085 Setting prompt string to ['lava-test: # ']
340 00:57:20.493723 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:57:20.494383 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:57:20.495043 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:57:20.495743 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:57:20.496486 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 00:57:20.532125 >> OK - accepted request
346 00:57:20.534442 Returned 0 in 0 seconds
347 00:57:20.635581 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:57:20.637348 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:57:20.637954 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:57:20.638497 Setting prompt string to ['Hit any key to stop autoboot']
352 00:57:20.638978 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:57:20.640677 Trying 192.168.56.21...
354 00:57:20.641205 Connected to conserv1.
355 00:57:20.641659 Escape character is '^]'.
356 00:57:20.642115
357 00:57:20.642573 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:57:20.643028
359 00:57:28.484913 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 00:57:28.485337 bl2_stage_init 0x01
361 00:57:28.485571 bl2_stage_init 0x81
362 00:57:28.490526 hw id: 0x0000 - pwm id 0x01
363 00:57:28.490901 bl2_stage_init 0xc1
364 00:57:28.495143 bl2_stage_init 0x02
365 00:57:28.495510
366 00:57:28.495838 L0:00000000
367 00:57:28.496193 L1:00000703
368 00:57:28.496442 L2:00008067
369 00:57:28.500658 L3:15000000
370 00:57:28.500934 S1:00000000
371 00:57:28.501147 B2:20282000
372 00:57:28.501355 B1:a0f83180
373 00:57:28.501553
374 00:57:28.501755 TE: 69505
375 00:57:28.501954
376 00:57:28.512040 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 00:57:28.512422
378 00:57:28.512742 Board ID = 1
379 00:57:28.513050 Set cpu clk to 24M
380 00:57:28.513353 Set clk81 to 24M
381 00:57:28.517515 Use GP1_pll as DSU clk.
382 00:57:28.517864 DSU clk: 1200 Mhz
383 00:57:28.518168 CPU clk: 1200 MHz
384 00:57:28.523071 Set clk81 to 166.6M
385 00:57:28.528682 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 00:57:28.529031 board id: 1
387 00:57:28.536708 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:57:28.547333 fw parse done
389 00:57:28.553331 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:57:28.595949 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:57:28.607068 PIEI prepare done
392 00:57:28.607526 fastboot data load
393 00:57:28.607948 fastboot data verify
394 00:57:28.612503 verify result: 266
395 00:57:28.618227 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 00:57:28.618666 LPDDR4 probe
397 00:57:28.619075 ddr clk to 1584MHz
398 00:57:28.626089 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:57:28.663386
400 00:57:28.663887 dmc_version 0001
401 00:57:28.670053 Check phy result
402 00:57:28.675963 INFO : End of CA training
403 00:57:28.676426 INFO : End of initialization
404 00:57:28.681534 INFO : Training has run successfully!
405 00:57:28.681974 Check phy result
406 00:57:28.687206 INFO : End of initialization
407 00:57:28.687641 INFO : End of read enable training
408 00:57:28.692744 INFO : End of fine write leveling
409 00:57:28.698353 INFO : End of Write leveling coarse delay
410 00:57:28.698795 INFO : Training has run successfully!
411 00:57:28.699207 Check phy result
412 00:57:28.703969 INFO : End of initialization
413 00:57:28.704449 INFO : End of read dq deskew training
414 00:57:28.709533 INFO : End of MPR read delay center optimization
415 00:57:28.715212 INFO : End of write delay center optimization
416 00:57:28.720728 INFO : End of read delay center optimization
417 00:57:28.721230 INFO : End of max read latency training
418 00:57:28.726402 INFO : Training has run successfully!
419 00:57:28.726927 1D training succeed
420 00:57:28.735527 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:57:28.783133 Check phy result
422 00:57:28.783647 INFO : End of initialization
423 00:57:28.805478 INFO : End of 2D read delay Voltage center optimization
424 00:57:28.824621 INFO : End of 2D read delay Voltage center optimization
425 00:57:28.876527 INFO : End of 2D write delay Voltage center optimization
426 00:57:28.925696 INFO : End of 2D write delay Voltage center optimization
427 00:57:28.931254 INFO : Training has run successfully!
428 00:57:28.931715
429 00:57:28.932183 channel==0
430 00:57:28.936829 RxClkDly_Margin_A0==78 ps 8
431 00:57:28.937286 TxDqDly_Margin_A0==98 ps 10
432 00:57:28.942442 RxClkDly_Margin_A1==88 ps 9
433 00:57:28.942881 TxDqDly_Margin_A1==98 ps 10
434 00:57:28.943294 TrainedVREFDQ_A0==74
435 00:57:28.948056 TrainedVREFDQ_A1==75
436 00:57:28.948498 VrefDac_Margin_A0==24
437 00:57:28.948913 DeviceVref_Margin_A0==40
438 00:57:28.953686 VrefDac_Margin_A1==22
439 00:57:28.954187 DeviceVref_Margin_A1==39
440 00:57:28.954608
441 00:57:28.955018
442 00:57:28.959243 channel==1
443 00:57:28.959686 RxClkDly_Margin_A0==78 ps 8
444 00:57:28.960131 TxDqDly_Margin_A0==78 ps 8
445 00:57:28.964854 RxClkDly_Margin_A1==78 ps 8
446 00:57:28.965299 TxDqDly_Margin_A1==88 ps 9
447 00:57:28.970457 TrainedVREFDQ_A0==77
448 00:57:28.970903 TrainedVREFDQ_A1==75
449 00:57:28.971317 VrefDac_Margin_A0==22
450 00:57:28.976071 DeviceVref_Margin_A0==37
451 00:57:28.976521 VrefDac_Margin_A1==22
452 00:57:28.981651 DeviceVref_Margin_A1==39
453 00:57:28.982096
454 00:57:28.982510 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:57:28.982917
456 00:57:29.015273 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000017 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
457 00:57:29.015795 2D training succeed
458 00:57:29.020886 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:57:29.026444 auto size-- 65535DDR cs0 size: 2048MB
460 00:57:29.026888 DDR cs1 size: 2048MB
461 00:57:29.032069 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:57:29.032540 cs0 DataBus test pass
463 00:57:29.037635 cs1 DataBus test pass
464 00:57:29.038077 cs0 AddrBus test pass
465 00:57:29.038491 cs1 AddrBus test pass
466 00:57:29.038892
467 00:57:29.043247 100bdlr_step_size ps== 478
468 00:57:29.043696 result report
469 00:57:29.048873 boot times 0Enable ddr reg access
470 00:57:29.054117 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:57:29.067853 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 00:57:29.722566 bl2z: ptr: 05129330, size: 00001e40
473 00:57:29.729681 0.0;M3 CHK:0;cm4_sp_mode 0
474 00:57:29.730162 MVN_1=0x00000000
475 00:57:29.730582 MVN_2=0x00000000
476 00:57:29.741187 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 00:57:29.741647 OPS=0x04
478 00:57:29.742065 ring efuse init
479 00:57:29.746781 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 00:57:29.747251 [0.017319 Inits done]
481 00:57:29.747663 secure task start!
482 00:57:29.754670 high task start!
483 00:57:29.755190 low task start!
484 00:57:29.755616 run into bl31
485 00:57:29.763330 NOTICE: BL31: v1.3(release):4fc40b1
486 00:57:29.771068 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 00:57:29.771528 NOTICE: BL31: G12A normal boot!
488 00:57:29.786524 NOTICE: BL31: BL33 decompress pass
489 00:57:29.792237 ERROR: Error initializing runtime service opteed_fast
490 00:57:31.038833 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 00:57:31.039417 bl2_stage_init 0x01
492 00:57:31.039859 bl2_stage_init 0x81
493 00:57:31.044636 hw id: 0x0000 - pwm id 0x01
494 00:57:31.045158 bl2_stage_init 0xc1
495 00:57:31.045587 bl2_stage_init 0x02
496 00:57:31.045999
497 00:57:31.050104 L0:00000000
498 00:57:31.050613 L1:00000703
499 00:57:31.051007 L2:00008067
500 00:57:31.051390 L3:15000000
501 00:57:31.051773 S1:00000000
502 00:57:31.055601 B2:20282000
503 00:57:31.056051 B1:a0f83180
504 00:57:31.056440
505 00:57:31.056827 TE: 71072
506 00:57:31.057211
507 00:57:31.061310 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 00:57:31.061808
509 00:57:31.066822 Board ID = 1
510 00:57:31.067268 Set cpu clk to 24M
511 00:57:31.067658 Set clk81 to 24M
512 00:57:31.072528 Use GP1_pll as DSU clk.
513 00:57:31.072955 DSU clk: 1200 Mhz
514 00:57:31.073342 CPU clk: 1200 MHz
515 00:57:31.073726 Set clk81 to 166.6M
516 00:57:31.083623 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 00:57:31.084081 board id: 1
518 00:57:31.090042 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 00:57:31.100956 fw parse done
520 00:57:31.106879 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 00:57:31.150100 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 00:57:31.161201 PIEI prepare done
523 00:57:31.161709 fastboot data load
524 00:57:31.162100 fastboot data verify
525 00:57:31.166759 verify result: 266
526 00:57:31.174952 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 00:57:31.175376 LPDDR4 probe
528 00:57:31.175765 ddr clk to 1584MHz
529 00:57:32.538770 Load ddrfw from SPI< SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 00:57:32.539387 bl2_stage_init 0x01
531 00:57:32.539818 bl2_stage_init 0x81
532 00:57:32.544339 hw id: 0x0000 - pwm id 0x01
533 00:57:32.544793 bl2_stage_init 0xc1
534 00:57:32.545202 bl2_stage_init 0x02
535 00:57:32.545612
536 00:57:32.549917 L0:00000000
537 00:57:32.550362 L1:00000703
538 00:57:32.550769 L2:00008067
539 00:57:32.551170 L3:15000000
540 00:57:32.551570 S1:00000000
541 00:57:32.555638 B2:20282000
542 00:57:32.556126 B1:a0f83180
543 00:57:32.556543
544 00:57:32.556950 TE: 72708
545 00:57:32.557356
546 00:57:32.561123 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 00:57:32.561564
548 00:57:32.566736 Board ID = 1
549 00:57:32.567206 Set cpu clk to 24M
550 00:57:32.567670 Set clk81 to 24M
551 00:57:32.572325 Use GP1_pll as DSU clk.
552 00:57:32.572776 DSU clk: 1200 Mhz
553 00:57:32.573185 CPU clk: 1200 MHz
554 00:57:32.573588 Set clk81 to 166.6M
555 00:57:32.583600 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 00:57:32.584076 board id: 1
557 00:57:32.589942 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 00:57:32.600651 fw parse done
559 00:57:32.606554 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 00:57:32.649360 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 00:57:32.660181 PIEI prepare done
562 00:57:32.660632 fastboot data load
563 00:57:32.661044 fastboot data verify
564 00:57:32.665761 verify result: 266
565 00:57:32.671368 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 00:57:32.671873 LPDDR4 probe
567 00:57:32.672348 ddr clk to 1584MHz
568 00:57:32.679348 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 00:57:32.716587
570 00:57:32.717071 dmc_version 0001
571 00:57:32.723237 Check phy result
572 00:57:32.729169 INFO : End of CA training
573 00:57:32.729667 INFO : End of initialization
574 00:57:32.734843 INFO : Training has run successfully!
575 00:57:32.735617 Check phy result
576 00:57:32.740352 INFO : End of initialization
577 00:57:32.740812 INFO : End of read enable training
578 00:57:32.745938 INFO : End of fine write leveling
579 00:57:32.751541 INFO : End of Write leveling coarse delay
580 00:57:32.751974 INFO : Training has run successfully!
581 00:57:32.752421 Check phy result
582 00:57:32.757152 INFO : End of initialization
583 00:57:32.757591 INFO : End of read dq deskew training
584 00:57:32.762868 INFO : End of MPR read delay center optimization
585 00:57:32.768432 INFO : End of write delay center optimization
586 00:57:32.773965 INFO : End of read delay center optimization
587 00:57:32.774436 INFO : End of max read latency training
588 00:57:32.779564 INFO : Training has run successfully!
589 00:57:32.780048 1D training succeed
590 00:57:32.788774 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 00:57:32.836366 Check phy result
592 00:57:32.836821 INFO : End of initialization
593 00:57:32.860422 INFO : End of 2D read delay Voltage center optimization
594 00:57:32.879013 INFO : End of 2D read delay Voltage center optimization
595 00:57:32.929764 INFO : End of 2D write delay Voltage center optimization
596 00:57:32.978956 INFO : End of 2D write delay Voltage center optimization
597 00:57:32.984495 INFO : Training has run successfully!
598 00:57:32.984945
599 00:57:32.985359 channel==0
600 00:57:32.990091 RxClkDly_Margin_A0==78 ps 8
601 00:57:32.990529 TxDqDly_Margin_A0==98 ps 10
602 00:57:32.995758 RxClkDly_Margin_A1==69 ps 7
603 00:57:32.996245 TxDqDly_Margin_A1==98 ps 10
604 00:57:32.996660 TrainedVREFDQ_A0==74
605 00:57:33.001352 TrainedVREFDQ_A1==74
606 00:57:33.001793 VrefDac_Margin_A0==23
607 00:57:33.002197 DeviceVref_Margin_A0==40
608 00:57:33.006842 VrefDac_Margin_A1==23
609 00:57:33.007276 DeviceVref_Margin_A1==40
610 00:57:33.007680
611 00:57:33.008116
612 00:57:33.012395 channel==1
613 00:57:33.012835 RxClkDly_Margin_A0==78 ps 8
614 00:57:33.013244 TxDqDly_Margin_A0==88 ps 9
615 00:57:33.018107 RxClkDly_Margin_A1==78 ps 8
616 00:57:33.018543 TxDqDly_Margin_A1==98 ps 10
617 00:57:33.023653 TrainedVREFDQ_A0==75
618 00:57:33.024115 TrainedVREFDQ_A1==78
619 00:57:33.024528 VrefDac_Margin_A0==22
620 00:57:33.029235 DeviceVref_Margin_A0==39
621 00:57:33.029675 VrefDac_Margin_A1==22
622 00:57:33.034781 DeviceVref_Margin_A1==36
623 00:57:33.035222
624 00:57:33.035627 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 00:57:33.036062
626 00:57:33.068489 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 00:57:33.069005 2D training succeed
628 00:57:33.074068 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 00:57:33.079728 auto size-- 65535DDR cs0 size: 2048MB
630 00:57:33.080203 DDR cs1 size: 2048MB
631 00:57:33.085276 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 00:57:33.085721 cs0 DataBus test pass
633 00:57:33.090883 cs1 DataBus test pass
634 00:57:33.091323 cs0 AddrBus test pass
635 00:57:33.091730 cs1 AddrBus test pass
636 00:57:33.092164
637 00:57:33.096460 100bdlr_step_size ps== 478
638 00:57:33.096905 result report
639 00:57:33.102034 boot times 0Enable ddr reg access
640 00:57:33.107323 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 00:57:33.121206 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 00:57:33.776515 bl2z: ptr: 05129330, size: 00001e40
643 00:57:33.784278 0.0;M3 CHK:0;cm4_sp_mode 0
644 00:57:33.784749 MVN_1=0x00000000
645 00:57:33.785160 MVN_2=0x00000000
646 00:57:33.795830 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 00:57:33.796344 OPS=0x04
648 00:57:33.796766 ring efuse init
649 00:57:33.801364 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 00:57:33.801822 [0.017310 Inits done]
651 00:57:33.802233 secure task start!
652 00:57:33.809511 high task start!
653 00:57:33.809954 low task start!
654 00:57:33.810361 run into bl31
655 00:57:33.818157 NOTICE: BL31: v1.3(release):4fc40b1
656 00:57:33.825915 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 00:57:33.826357 NOTICE: BL31: G12A normal boot!
658 00:57:33.841378 NOTICE: BL31: BL33 decompress pass
659 00:57:33.847094 ERROR: Error initializing runtime service opteed_fast
660 00:57:35.085717 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 00:57:35.086311 bl2_stage_init 0x01
662 00:57:35.086861 bl2_stage_init 0x81
663 00:57:35.091343 hw id: 0x0000 - pwm id 0x01
664 00:57:35.091751 bl2_stage_init 0xc1
665 00:57:35.096409 bl2_stage_init 0x02
666 00:57:35.096844
667 00:57:35.097213 L0:00000000
668 00:57:35.097567 L1:00000703
669 00:57:35.097913 L2:00008067
670 00:57:35.102009 L3:15000000
671 00:57:35.102406 S1:00000000
672 00:57:35.102726 B2:20282000
673 00:57:35.103118 B1:a0f83180
674 00:57:35.103445
675 00:57:35.103820 TE: 69900
676 00:57:35.104163
677 00:57:35.113197 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 00:57:35.113622
679 00:57:35.113990 Board ID = 1
680 00:57:35.114339 Set cpu clk to 24M
681 00:57:35.114695 Set clk81 to 24M
682 00:57:35.116814 Use GP1_pll as DSU clk.
683 00:57:35.117119 DSU clk: 1200 Mhz
684 00:57:35.122295 CPU clk: 1200 MHz
685 00:57:35.122704 Set clk81 to 166.6M
686 00:57:35.127854 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 00:57:35.128298 board id: 1
688 00:57:35.137478 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 00:57:35.148160 fw parse done
690 00:57:35.154153 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 00:57:35.197129 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:57:35.207945 PIEI prepare done
693 00:57:35.208597 fastboot data load
694 00:57:35.208940 fastboot data verify
695 00:57:35.213528 verify result: 266
696 00:57:35.219023 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 00:57:35.219427 LPDDR4 probe
698 00:57:35.219709 ddr clk to 1584MHz
699 00:57:35.227021 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 00:57:35.264302
701 00:57:35.264766 dmc_version 0001
702 00:57:35.271252 Check phy result
703 00:57:35.276819 INFO : End of CA training
704 00:57:35.277250 INFO : End of initialization
705 00:57:35.282596 INFO : Training has run successfully!
706 00:57:35.283219 Check phy result
707 00:57:35.288211 INFO : End of initialization
708 00:57:35.288789 INFO : End of read enable training
709 00:57:35.293727 INFO : End of fine write leveling
710 00:57:35.299332 INFO : End of Write leveling coarse delay
711 00:57:35.299906 INFO : Training has run successfully!
712 00:57:35.300272 Check phy result
713 00:57:35.304886 INFO : End of initialization
714 00:57:35.305462 INFO : End of read dq deskew training
715 00:57:35.310633 INFO : End of MPR read delay center optimization
716 00:57:35.316238 INFO : End of write delay center optimization
717 00:57:35.321798 INFO : End of read delay center optimization
718 00:57:35.322206 INFO : End of max read latency training
719 00:57:35.327268 INFO : Training has run successfully!
720 00:57:35.327896 1D training succeed
721 00:57:35.336470 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 00:57:35.384124 Check phy result
723 00:57:35.384697 INFO : End of initialization
724 00:57:35.406759 INFO : End of 2D read delay Voltage center optimization
725 00:57:35.425727 INFO : End of 2D read delay Voltage center optimization
726 00:57:35.477594 INFO : End of 2D write delay Voltage center optimization
727 00:57:35.526743 INFO : End of 2D write delay Voltage center optimization
728 00:57:35.532336 INFO : Training has run successfully!
729 00:57:35.532813
730 00:57:35.533219 channel==0
731 00:57:35.537892 RxClkDly_Margin_A0==88 ps 9
732 00:57:35.538366 TxDqDly_Margin_A0==98 ps 10
733 00:57:35.543494 RxClkDly_Margin_A1==88 ps 9
734 00:57:35.543965 TxDqDly_Margin_A1==98 ps 10
735 00:57:35.544413 TrainedVREFDQ_A0==74
736 00:57:35.549075 TrainedVREFDQ_A1==75
737 00:57:35.549546 VrefDac_Margin_A0==24
738 00:57:35.549945 DeviceVref_Margin_A0==40
739 00:57:35.554628 VrefDac_Margin_A1==23
740 00:57:35.555097 DeviceVref_Margin_A1==39
741 00:57:35.555493
742 00:57:35.555886
743 00:57:35.560395 channel==1
744 00:57:35.560859 RxClkDly_Margin_A0==78 ps 8
745 00:57:35.561253 TxDqDly_Margin_A0==98 ps 10
746 00:57:35.565888 RxClkDly_Margin_A1==78 ps 8
747 00:57:35.566354 TxDqDly_Margin_A1==88 ps 9
748 00:57:35.571444 TrainedVREFDQ_A0==78
749 00:57:35.571910 TrainedVREFDQ_A1==75
750 00:57:35.572348 VrefDac_Margin_A0==22
751 00:57:35.577090 DeviceVref_Margin_A0==36
752 00:57:35.577553 VrefDac_Margin_A1==22
753 00:57:35.582681 DeviceVref_Margin_A1==39
754 00:57:35.583150
755 00:57:35.583545 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 00:57:35.583937
757 00:57:35.616256 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 00:57:35.616772 2D training succeed
759 00:57:35.621863 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 00:57:35.627283 auto size-- 65535DDR cs0 size: 2048MB
761 00:57:35.627753 DDR cs1 size: 2048MB
762 00:57:35.632876 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 00:57:35.633337 cs0 DataBus test pass
764 00:57:35.638506 cs1 DataBus test pass
765 00:57:35.638968 cs0 AddrBus test pass
766 00:57:35.639363 cs1 AddrBus test pass
767 00:57:35.639752
768 00:57:35.644238 100bdlr_step_size ps== 478
769 00:57:35.644716 result report
770 00:57:35.649726 boot times 0Enable ddr reg access
771 00:57:35.655001 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 00:57:35.668756 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 00:57:36.324748 bl2z: ptr: 05129330, size: 00001e40
774 00:57:36.331466 0.0;M3 CHK:0;cm4_sp_mode 0
775 00:57:36.331973 MVN_1=0x00000000
776 00:57:36.332416 MVN_2=0x00000000
777 00:57:36.342881 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 00:57:36.343389 OPS=0x04
779 00:57:36.343785 ring efuse init
780 00:57:36.348495 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 00:57:36.348970 [0.017319 Inits done]
782 00:57:36.349364 secure task start!
783 00:57:36.355684 high task start!
784 00:57:36.356171 low task start!
785 00:57:36.356563 run into bl31
786 00:57:36.364293 NOTICE: BL31: v1.3(release):4fc40b1
787 00:57:36.372074 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 00:57:36.372540 NOTICE: BL31: G12A normal boot!
789 00:57:36.387665 NOTICE: BL31: BL33 decompress pass
790 00:57:36.393348 ERROR: Error initializing runtime service opteed_fast
791 00:57:37.188695
792 00:57:37.189278
793 00:57:37.194121 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 00:57:37.194593
795 00:57:37.197619 Model: Libre Computer AML-S905D3-CC Solitude
796 00:57:37.344608 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 00:57:37.360050 DRAM: 2 GiB (effective 3.8 GiB)
798 00:57:37.460970 Core: 406 devices, 33 uclasses, devicetree: separate
799 00:57:37.466844 WDT: Not starting watchdog@f0d0
800 00:57:37.491896 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 00:57:37.504154 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 00:57:37.509150 ** Bad device specification mmc 0 **
803 00:57:37.519199 Card did not respond to voltage select! : -110
804 00:57:37.526838 ** Bad device specification mmc 0 **
805 00:57:37.527298 Couldn't find partition mmc 0
806 00:57:37.535187 Card did not respond to voltage select! : -110
807 00:57:37.540700 ** Bad device specification mmc 0 **
808 00:57:37.541164 Couldn't find partition mmc 0
809 00:57:37.545766 Error: could not access storage.
810 00:57:37.842086 Net: eth0: ethernet@ff3f0000
811 00:57:37.842613 starting USB...
812 00:57:38.086852 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 00:57:38.087383 Starting the controller
814 00:57:38.093802 USB XHCI 1.10
815 00:57:39.647159 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 00:57:39.655519 scanning usb for storage devices... 0 Storage Device(s) found
818 00:57:39.707191 Hit any key to stop autoboot: 1
819 00:57:39.708422 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 00:57:39.710014 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 00:57:39.710403 Setting prompt string to ['=>']
822 00:57:39.710749 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 00:57:39.721528 0
824 00:57:39.722352 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 00:57:39.823269 => setenv autoload no
827 00:57:39.824060 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 00:57:39.829024 setenv autoload no
830 00:57:39.930473 => setenv initrd_high 0xffffffff
831 00:57:39.931120 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 00:57:39.935502 setenv initrd_high 0xffffffff
834 00:57:40.036907 => setenv fdt_high 0xffffffff
835 00:57:40.037528 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 00:57:40.041909 setenv fdt_high 0xffffffff
838 00:57:40.143328 => dhcp
839 00:57:40.143969 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 00:57:40.148079 dhcp
841 00:57:41.104304 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 00:57:41.104922 Speed: 1000, full duplex
843 00:57:41.105342 BOOTP broadcast 1
844 00:57:41.112525 DHCP client bound to address 192.168.6.21 (8 ms)
846 00:57:41.214009 => setenv serverip 192.168.6.2
847 00:57:41.214741 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
848 00:57:41.219309 setenv serverip 192.168.6.2
850 00:57:41.320774 => tftpboot 0x01080000 919413/tftp-deploy-kzwwxrg1/kernel/uImage
851 00:57:41.321461 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
852 00:57:41.328232 tftpboot 0x01080000 919413/tftp-deploy-kzwwxrg1/kernel/uImage
853 00:57:41.328704 Speed: 1000, full duplex
854 00:57:41.329097 Using ethernet@ff3f0000 device
855 00:57:41.333683 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 00:57:41.339243 Filename '919413/tftp-deploy-kzwwxrg1/kernel/uImage'.
857 00:57:41.343040 Load address: 0x1080000
858 00:57:44.091365 Loading: *################################################## 43.6 MiB
859 00:57:44.092040 15.8 MiB/s
860 00:57:44.092480 done
861 00:57:44.095483 Bytes transferred = 45713984 (2b98a40 hex)
863 00:57:44.196992 => tftpboot 0x08000000 919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
864 00:57:44.197932 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
865 00:57:44.204776 tftpboot 0x08000000 919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot
866 00:57:44.205260 Speed: 1000, full duplex
867 00:57:44.205678 Using ethernet@ff3f0000 device
868 00:57:44.210266 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
869 00:57:44.219824 Filename '919413/tftp-deploy-kzwwxrg1/ramdisk/ramdisk.cpio.gz.uboot'.
870 00:57:44.220350 Load address: 0x8000000
871 00:57:45.793861 Loading: *################################################# UDP wrong checksum 00000005 00007ff4
872 00:57:50.795642 T UDP wrong checksum 00000005 00007ff4
873 00:58:00.797782 T T UDP wrong checksum 00000005 00007ff4
874 00:58:19.710473 T T T UDP wrong checksum 000000ff 00001154
875 00:58:19.750421 UDP wrong checksum 000000ff 00009b46
876 00:58:20.801772 T UDP wrong checksum 00000005 00007ff4
877 00:58:40.806655 T T T
878 00:58:40.807278 Retry count exceeded; starting again
880 00:58:40.808758 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
883 00:58:40.810690 end: 2.4 uboot-commands (duration 00:01:20) [common]
885 00:58:40.812115 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
887 00:58:40.813177 end: 2 uboot-action (duration 00:01:20) [common]
889 00:58:40.814684 Cleaning after the job
890 00:58:40.815219 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/ramdisk
891 00:58:40.816502 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/kernel
892 00:58:40.863374 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/dtb
893 00:58:40.864200 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/nfsrootfs
894 00:58:41.037506 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919413/tftp-deploy-kzwwxrg1/modules
895 00:58:41.058114 start: 4.1 power-off (timeout 00:00:30) [common]
896 00:58:41.058798 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
897 00:58:41.093138 >> OK - accepted request
898 00:58:41.095473 Returned 0 in 0 seconds
899 00:58:41.196243 end: 4.1 power-off (duration 00:00:00) [common]
901 00:58:41.197252 start: 4.2 read-feedback (timeout 00:10:00) [common]
902 00:58:41.197902 Listened to connection for namespace 'common' for up to 1s
903 00:58:42.198892 Finalising connection for namespace 'common'
904 00:58:42.199659 Disconnecting from shell: Finalise
905 00:58:42.199960 =>
906 00:58:42.300777 end: 4.2 read-feedback (duration 00:00:01) [common]
907 00:58:42.301476 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/919413
908 00:58:45.687175 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/919413
909 00:58:45.687872 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.