Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:11:01.626711 lava-dispatcher, installed at version: 2024.01
2 01:11:01.627484 start: 0 validate
3 01:11:01.628003 Start time: 2024-11-01 01:11:01.627953+00:00 (UTC)
4 01:11:01.628550 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:11:01.629090 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:11:01.674532 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:11:01.675068 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 01:11:01.708649 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:11:01.709299 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:11:01.742606 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:11:01.743112 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:11:01.777787 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:11:01.778331 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-161-g90602c251cda%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 01:11:01.817707 validate duration: 0.19
16 01:11:01.818657 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:11:01.818997 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:11:01.819316 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:11:01.819935 Not decompressing ramdisk as can be used compressed.
20 01:11:01.820465 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:11:01.820762 saving as /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/ramdisk/initrd.cpio.gz
22 01:11:01.821042 total size: 5628140 (5 MB)
23 01:11:01.862364 progress 0 % (0 MB)
24 01:11:01.867015 progress 5 % (0 MB)
25 01:11:01.871531 progress 10 % (0 MB)
26 01:11:01.875541 progress 15 % (0 MB)
27 01:11:01.879880 progress 20 % (1 MB)
28 01:11:01.883912 progress 25 % (1 MB)
29 01:11:01.888590 progress 30 % (1 MB)
30 01:11:01.893152 progress 35 % (1 MB)
31 01:11:01.897483 progress 40 % (2 MB)
32 01:11:01.902323 progress 45 % (2 MB)
33 01:11:01.906471 progress 50 % (2 MB)
34 01:11:01.911252 progress 55 % (2 MB)
35 01:11:01.915749 progress 60 % (3 MB)
36 01:11:01.919844 progress 65 % (3 MB)
37 01:11:01.924449 progress 70 % (3 MB)
38 01:11:01.928481 progress 75 % (4 MB)
39 01:11:01.932851 progress 80 % (4 MB)
40 01:11:01.936862 progress 85 % (4 MB)
41 01:11:01.941452 progress 90 % (4 MB)
42 01:11:01.945925 progress 95 % (5 MB)
43 01:11:01.949641 progress 100 % (5 MB)
44 01:11:01.950428 5 MB downloaded in 0.13 s (41.49 MB/s)
45 01:11:01.951085 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:11:01.952167 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:11:01.952558 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:11:01.952908 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:11:01.953600 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/kernel/Image
51 01:11:01.953920 saving as /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/kernel/Image
52 01:11:01.954180 total size: 45713920 (43 MB)
53 01:11:01.954444 No compression specified
54 01:11:01.990372 progress 0 % (0 MB)
55 01:11:02.020514 progress 5 % (2 MB)
56 01:11:02.049248 progress 10 % (4 MB)
57 01:11:02.078565 progress 15 % (6 MB)
58 01:11:02.108439 progress 20 % (8 MB)
59 01:11:02.136933 progress 25 % (10 MB)
60 01:11:02.166533 progress 30 % (13 MB)
61 01:11:02.195498 progress 35 % (15 MB)
62 01:11:02.224906 progress 40 % (17 MB)
63 01:11:02.253858 progress 45 % (19 MB)
64 01:11:02.282263 progress 50 % (21 MB)
65 01:11:02.312072 progress 55 % (24 MB)
66 01:11:02.341644 progress 60 % (26 MB)
67 01:11:02.370950 progress 65 % (28 MB)
68 01:11:02.400306 progress 70 % (30 MB)
69 01:11:02.429212 progress 75 % (32 MB)
70 01:11:02.458820 progress 80 % (34 MB)
71 01:11:02.487658 progress 85 % (37 MB)
72 01:11:02.517628 progress 90 % (39 MB)
73 01:11:02.547490 progress 95 % (41 MB)
74 01:11:02.576059 progress 100 % (43 MB)
75 01:11:02.576617 43 MB downloaded in 0.62 s (70.04 MB/s)
76 01:11:02.577097 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:11:02.577910 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:11:02.578182 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:11:02.578445 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:11:02.578912 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:11:02.579180 saving as /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:11:02.579385 total size: 54703 (0 MB)
84 01:11:02.579593 No compression specified
85 01:11:02.619461 progress 59 % (0 MB)
86 01:11:02.620422 progress 100 % (0 MB)
87 01:11:02.621088 0 MB downloaded in 0.04 s (1.25 MB/s)
88 01:11:02.621616 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:11:02.622646 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:11:02.623047 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:11:02.623396 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:11:02.623924 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:11:02.624261 saving as /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/nfsrootfs/full.rootfs.tar
95 01:11:02.624498 total size: 474398908 (452 MB)
96 01:11:02.624769 Using unxz to decompress xz
97 01:11:02.667010 progress 0 % (0 MB)
98 01:11:03.769305 progress 5 % (22 MB)
99 01:11:05.220742 progress 10 % (45 MB)
100 01:11:05.664378 progress 15 % (67 MB)
101 01:11:06.463794 progress 20 % (90 MB)
102 01:11:06.977799 progress 25 % (113 MB)
103 01:11:07.332359 progress 30 % (135 MB)
104 01:11:07.950231 progress 35 % (158 MB)
105 01:11:08.876775 progress 40 % (181 MB)
106 01:11:09.645622 progress 45 % (203 MB)
107 01:11:10.194506 progress 50 % (226 MB)
108 01:11:10.839113 progress 55 % (248 MB)
109 01:11:12.055467 progress 60 % (271 MB)
110 01:11:13.548137 progress 65 % (294 MB)
111 01:11:15.237370 progress 70 % (316 MB)
112 01:11:18.354522 progress 75 % (339 MB)
113 01:11:20.808717 progress 80 % (361 MB)
114 01:11:23.728462 progress 85 % (384 MB)
115 01:11:26.921783 progress 90 % (407 MB)
116 01:11:30.121803 progress 95 % (429 MB)
117 01:11:33.326973 progress 100 % (452 MB)
118 01:11:33.341004 452 MB downloaded in 30.72 s (14.73 MB/s)
119 01:11:33.341577 end: 1.4.1 http-download (duration 00:00:31) [common]
121 01:11:33.342391 end: 1.4 download-retry (duration 00:00:31) [common]
122 01:11:33.342656 start: 1.5 download-retry (timeout 00:09:28) [common]
123 01:11:33.342914 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 01:11:33.343548 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-161-g90602c251cda/arm64/defconfig/gcc-12/modules.tar.xz
125 01:11:33.343813 saving as /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/modules/modules.tar
126 01:11:33.344098 total size: 11592552 (11 MB)
127 01:11:33.344519 Using unxz to decompress xz
128 01:11:33.390684 progress 0 % (0 MB)
129 01:11:33.457611 progress 5 % (0 MB)
130 01:11:33.532035 progress 10 % (1 MB)
131 01:11:33.611871 progress 15 % (1 MB)
132 01:11:33.689011 progress 20 % (2 MB)
133 01:11:33.765103 progress 25 % (2 MB)
134 01:11:33.844193 progress 30 % (3 MB)
135 01:11:33.915628 progress 35 % (3 MB)
136 01:11:33.994036 progress 40 % (4 MB)
137 01:11:34.078112 progress 45 % (5 MB)
138 01:11:34.153566 progress 50 % (5 MB)
139 01:11:34.235557 progress 55 % (6 MB)
140 01:11:34.316980 progress 60 % (6 MB)
141 01:11:34.395998 progress 65 % (7 MB)
142 01:11:34.476707 progress 70 % (7 MB)
143 01:11:34.557411 progress 75 % (8 MB)
144 01:11:34.640011 progress 80 % (8 MB)
145 01:11:34.716376 progress 85 % (9 MB)
146 01:11:34.789193 progress 90 % (9 MB)
147 01:11:34.887325 progress 95 % (10 MB)
148 01:11:34.980248 progress 100 % (11 MB)
149 01:11:34.994008 11 MB downloaded in 1.65 s (6.70 MB/s)
150 01:11:34.994703 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:11:34.995544 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:11:34.995827 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 01:11:34.996278 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 01:11:50.615807 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/919372/extract-nfsrootfs-0u44fgze
156 01:11:50.616456 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:11:50.616746 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 01:11:50.617509 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn
159 01:11:50.617974 makedir: /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin
160 01:11:50.618306 makedir: /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/tests
161 01:11:50.618624 makedir: /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/results
162 01:11:50.619042 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-add-keys
163 01:11:50.619586 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-add-sources
164 01:11:50.620122 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-background-process-start
165 01:11:50.620624 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-background-process-stop
166 01:11:50.621158 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-common-functions
167 01:11:50.621654 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-echo-ipv4
168 01:11:50.622160 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-install-packages
169 01:11:50.622687 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-installed-packages
170 01:11:50.623165 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-os-build
171 01:11:50.623639 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-probe-channel
172 01:11:50.624145 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-probe-ip
173 01:11:50.624708 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-target-ip
174 01:11:50.625202 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-target-mac
175 01:11:50.625682 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-target-storage
176 01:11:50.626189 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-case
177 01:11:50.626702 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-event
178 01:11:50.627174 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-feedback
179 01:11:50.627652 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-raise
180 01:11:50.628176 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-reference
181 01:11:50.628667 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-runner
182 01:11:50.629151 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-set
183 01:11:50.629624 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-test-shell
184 01:11:50.630121 Updating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-install-packages (oe)
185 01:11:50.630681 Updating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/bin/lava-installed-packages (oe)
186 01:11:50.631121 Creating /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/environment
187 01:11:50.631490 LAVA metadata
188 01:11:50.631751 - LAVA_JOB_ID=919372
189 01:11:50.631966 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:11:50.632360 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 01:11:50.633313 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:11:50.633618 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 01:11:50.633825 skipped lava-vland-overlay
194 01:11:50.634064 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:11:50.634315 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 01:11:50.634531 skipped lava-multinode-overlay
197 01:11:50.634768 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:11:50.635015 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 01:11:50.635261 Loading test definitions
200 01:11:50.635534 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 01:11:50.635753 Using /lava-919372 at stage 0
202 01:11:50.636907 uuid=919372_1.6.2.4.1 testdef=None
203 01:11:50.637209 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:11:50.637466 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 01:11:50.639166 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:11:50.639951 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 01:11:50.642189 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:11:50.643016 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 01:11:50.645215 runner path: /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 919372_1.6.2.4.1
212 01:11:50.645842 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:11:50.646598 Creating lava-test-runner.conf files
215 01:11:50.646797 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/919372/lava-overlay-_r_0zbnn/lava-919372/0 for stage 0
216 01:11:50.647131 - 0_v4l2-decoder-conformance-h264
217 01:11:50.647475 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:11:50.647748 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 01:11:50.669289 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:11:50.669641 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 01:11:50.669895 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:11:50.670156 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:11:50.670416 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 01:11:51.281883 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:11:51.282352 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 01:11:51.282596 extracting modules file /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919372/extract-nfsrootfs-0u44fgze
227 01:11:52.656561 extracting modules file /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk
228 01:11:54.067589 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:11:54.068073 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 01:11:54.068356 [common] Applying overlay to NFS
231 01:11:54.068570 [common] Applying overlay /var/lib/lava/dispatcher/tmp/919372/compress-overlay-6tu9d7t5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/919372/extract-nfsrootfs-0u44fgze
232 01:11:54.097742 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:11:54.098097 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 01:11:54.098369 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 01:11:54.098596 Converting downloaded kernel to a uImage
236 01:11:54.098902 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/kernel/Image /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/kernel/uImage
237 01:11:54.550579 output: Image Name:
238 01:11:54.550997 output: Created: Fri Nov 1 01:11:54 2024
239 01:11:54.551204 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:11:54.551406 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 01:11:54.551605 output: Load Address: 01080000
242 01:11:54.551800 output: Entry Point: 01080000
243 01:11:54.552029 output:
244 01:11:54.552371 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:11:54.552637 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:11:54.552906 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 01:11:54.553158 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:11:54.553415 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 01:11:54.553666 Building ramdisk /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk
250 01:11:56.697231 >> 166820 blocks
251 01:12:04.389222 Adding RAMdisk u-boot header.
252 01:12:04.389655 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk.cpio.gz.uboot
253 01:12:04.649005 output: Image Name:
254 01:12:04.649425 output: Created: Fri Nov 1 01:12:04 2024
255 01:12:04.649636 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:12:04.649843 output: Data Size: 23434683 Bytes = 22885.43 KiB = 22.35 MiB
257 01:12:04.650044 output: Load Address: 00000000
258 01:12:04.650244 output: Entry Point: 00000000
259 01:12:04.650441 output:
260 01:12:04.651094 rename /var/lib/lava/dispatcher/tmp/919372/extract-overlay-ramdisk-m_lbc4ex/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
261 01:12:04.651518 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:12:04.651804 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 01:12:04.652215 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 01:12:04.652725 No LXC device requested
265 01:12:04.653280 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:12:04.653837 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 01:12:04.654378 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:12:04.654831 Checking files for TFTP limit of 4294967296 bytes.
269 01:12:04.657827 end: 1 tftp-deploy (duration 00:01:03) [common]
270 01:12:04.658458 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:12:04.659028 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:12:04.659571 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:12:04.660156 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:12:04.660744 Using kernel file from prepare-kernel: 919372/tftp-deploy-oyhx1sw_/kernel/uImage
275 01:12:04.661438 substitutions:
276 01:12:04.661882 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:12:04.662323 - {DTB_ADDR}: 0x01070000
278 01:12:04.662760 - {DTB}: 919372/tftp-deploy-oyhx1sw_/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:12:04.663198 - {INITRD}: 919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
280 01:12:04.663635 - {KERNEL_ADDR}: 0x01080000
281 01:12:04.664096 - {KERNEL}: 919372/tftp-deploy-oyhx1sw_/kernel/uImage
282 01:12:04.664534 - {LAVA_MAC}: None
283 01:12:04.665010 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/919372/extract-nfsrootfs-0u44fgze
284 01:12:04.665448 - {NFS_SERVER_IP}: 192.168.6.2
285 01:12:04.665878 - {PRESEED_CONFIG}: None
286 01:12:04.666304 - {PRESEED_LOCAL}: None
287 01:12:04.666731 - {RAMDISK_ADDR}: 0x08000000
288 01:12:04.667156 - {RAMDISK}: 919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
289 01:12:04.667583 - {ROOT_PART}: None
290 01:12:04.668032 - {ROOT}: None
291 01:12:04.668459 - {SERVER_IP}: 192.168.6.2
292 01:12:04.668886 - {TEE_ADDR}: 0x83000000
293 01:12:04.669313 - {TEE}: None
294 01:12:04.669741 Parsed boot commands:
295 01:12:04.670155 - setenv autoload no
296 01:12:04.670582 - setenv initrd_high 0xffffffff
297 01:12:04.671004 - setenv fdt_high 0xffffffff
298 01:12:04.671430 - dhcp
299 01:12:04.671851 - setenv serverip 192.168.6.2
300 01:12:04.672306 - tftpboot 0x01080000 919372/tftp-deploy-oyhx1sw_/kernel/uImage
301 01:12:04.672733 - tftpboot 0x08000000 919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
302 01:12:04.673154 - tftpboot 0x01070000 919372/tftp-deploy-oyhx1sw_/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:12:04.673578 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/919372/extract-nfsrootfs-0u44fgze,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:12:04.674016 - bootm 0x01080000 0x08000000 0x01070000
305 01:12:04.674560 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:12:04.676216 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:12:04.676681 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:12:04.693742 Setting prompt string to ['lava-test: # ']
310 01:12:04.695350 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:12:04.696017 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:12:04.696615 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:12:04.697185 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:12:04.698638 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:12:04.738462 >> OK - accepted request
316 01:12:04.740997 Returned 0 in 0 seconds
317 01:12:04.842303 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:12:04.844147 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:12:04.844770 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:12:04.845670 Setting prompt string to ['Hit any key to stop autoboot']
322 01:12:04.846258 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:12:04.848081 Trying 192.168.56.21...
324 01:12:04.848617 Connected to conserv1.
325 01:12:04.849075 Escape character is '^]'.
326 01:12:04.849543
327 01:12:04.850067 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:12:04.850548
329 01:12:15.915541 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:12:15.916031 bl2_stage_init 0x01
331 01:12:15.916286 bl2_stage_init 0x81
332 01:12:15.920830 hw id: 0x0000 - pwm id 0x01
333 01:12:15.921215 bl2_stage_init 0xc1
334 01:12:15.921433 bl2_stage_init 0x02
335 01:12:15.921637
336 01:12:15.926382 L0:00000000
337 01:12:15.926761 L1:20000703
338 01:12:15.926976 L2:00008067
339 01:12:15.927179 L3:14000000
340 01:12:15.929319 B2:00402000
341 01:12:15.929680 B1:e0f83180
342 01:12:15.929898
343 01:12:15.930103 TE: 58124
344 01:12:15.930305
345 01:12:15.940584 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:12:15.941014
347 01:12:15.941229 Board ID = 1
348 01:12:15.941435 Set A53 clk to 24M
349 01:12:15.941640 Set A73 clk to 24M
350 01:12:15.946135 Set clk81 to 24M
351 01:12:15.946502 A53 clk: 1200 MHz
352 01:12:15.946715 A73 clk: 1200 MHz
353 01:12:15.949621 CLK81: 166.6M
354 01:12:15.950007 smccc: 00012a92
355 01:12:15.955187 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:12:15.960788 board id: 1
357 01:12:15.965865 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:12:15.976563 fw parse done
359 01:12:15.981978 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:12:16.025066 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:12:16.036089 PIEI prepare done
362 01:12:16.036479 fastboot data load
363 01:12:16.036697 fastboot data verify
364 01:12:16.041721 verify result: 266
365 01:12:16.047182 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:12:16.047538 LPDDR4 probe
367 01:12:16.047747 ddr clk to 1584MHz
368 01:12:16.054356 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:12:16.093265
370 01:12:16.093689 dmc_version 0001
371 01:12:16.099157 Check phy result
372 01:12:16.105068 INFO : End of CA training
373 01:12:16.105425 INFO : End of initialization
374 01:12:16.110667 INFO : Training has run successfully!
375 01:12:16.111015 Check phy result
376 01:12:16.116362 INFO : End of initialization
377 01:12:16.116719 INFO : End of read enable training
378 01:12:16.121787 INFO : End of fine write leveling
379 01:12:16.127381 INFO : End of Write leveling coarse delay
380 01:12:16.127743 INFO : Training has run successfully!
381 01:12:16.127952 Check phy result
382 01:12:16.133024 INFO : End of initialization
383 01:12:16.133375 INFO : End of read dq deskew training
384 01:12:16.138606 INFO : End of MPR read delay center optimization
385 01:12:16.144206 INFO : End of write delay center optimization
386 01:12:16.149785 INFO : End of read delay center optimization
387 01:12:16.150139 INFO : End of max read latency training
388 01:12:16.155435 INFO : Training has run successfully!
389 01:12:16.155783 1D training succeed
390 01:12:16.164590 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:12:16.212274 Check phy result
392 01:12:16.212721 INFO : End of initialization
393 01:12:16.233957 INFO : End of 2D read delay Voltage center optimization
394 01:12:16.254188 INFO : End of 2D read delay Voltage center optimization
395 01:12:16.306894 INFO : End of 2D write delay Voltage center optimization
396 01:12:16.355806 INFO : End of 2D write delay Voltage center optimization
397 01:12:16.361481 INFO : Training has run successfully!
398 01:12:16.361958
399 01:12:16.362381 channel==0
400 01:12:16.366928 RxClkDly_Margin_A0==88 ps 9
401 01:12:16.367403 TxDqDly_Margin_A0==98 ps 10
402 01:12:16.372651 RxClkDly_Margin_A1==88 ps 9
403 01:12:16.373100 TxDqDly_Margin_A1==98 ps 10
404 01:12:16.373497 TrainedVREFDQ_A0==74
405 01:12:16.378206 TrainedVREFDQ_A1==74
406 01:12:16.378661 VrefDac_Margin_A0==25
407 01:12:16.379057 DeviceVref_Margin_A0==40
408 01:12:16.384147 VrefDac_Margin_A1==25
409 01:12:16.384605 DeviceVref_Margin_A1==40
410 01:12:16.384997
411 01:12:16.385384
412 01:12:16.389346 channel==1
413 01:12:16.389803 RxClkDly_Margin_A0==98 ps 10
414 01:12:16.390196 TxDqDly_Margin_A0==88 ps 9
415 01:12:16.395089 RxClkDly_Margin_A1==98 ps 10
416 01:12:16.395533 TxDqDly_Margin_A1==88 ps 9
417 01:12:16.400403 TrainedVREFDQ_A0==76
418 01:12:16.400849 TrainedVREFDQ_A1==77
419 01:12:16.401246 VrefDac_Margin_A0==22
420 01:12:16.406164 DeviceVref_Margin_A0==38
421 01:12:16.406609 VrefDac_Margin_A1==22
422 01:12:16.411664 DeviceVref_Margin_A1==37
423 01:12:16.412135
424 01:12:16.412532 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:12:16.412919
426 01:12:16.445112 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000018 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 01:12:16.445660 2D training succeed
428 01:12:16.451376 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:12:16.461935 auto size-- 65535DDR cs0 size: 2048MB
430 01:12:16.462609 DDR cs1 size: 2048MB
431 01:12:16.463152 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:12:16.463669 cs0 DataBus test pass
433 01:12:16.467571 cs1 DataBus test pass
434 01:12:16.468204 cs0 AddrBus test pass
435 01:12:16.468742 cs1 AddrBus test pass
436 01:12:16.469255
437 01:12:16.473098 100bdlr_step_size ps== 420
438 01:12:16.473754 result report
439 01:12:16.478791 boot times 0Enable ddr reg access
440 01:12:16.483044 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:12:16.497689 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:12:17.071215 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:12:17.071832 MVN_1=0x00000000
444 01:12:17.076776 MVN_2=0x00000000
445 01:12:17.082407 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:12:17.082883 OPS=0x10
447 01:12:17.083297 ring efuse init
448 01:12:17.083696 chipver efuse init
449 01:12:17.088155 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:12:17.093740 [0.018961 Inits done]
451 01:12:17.094393 secure task start!
452 01:12:17.094943 high task start!
453 01:12:17.098280 low task start!
454 01:12:17.098874 run into bl31
455 01:12:17.104896 NOTICE: BL31: v1.3(release):4fc40b1
456 01:12:17.112676 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:12:17.113272 NOTICE: BL31: G12A normal boot!
458 01:12:17.138163 NOTICE: BL31: BL33 decompress pass
459 01:12:17.143869 ERROR: Error initializing runtime service opteed_fast
460 01:12:18.376570
461 01:12:18.376950
462 01:12:18.385036 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:12:18.385341
464 01:12:18.385554 Model: Libre Computer AML-A311D-CC Alta
465 01:12:18.593593 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:12:18.616871 DRAM: 2 GiB (effective 3.8 GiB)
467 01:12:18.759860 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:12:18.765603 WDT: Not starting watchdog@f0d0
469 01:12:18.798057 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:12:18.810323 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:12:18.815302 ** Bad device specification mmc 0 **
472 01:12:18.825630 Card did not respond to voltage select! : -110
473 01:12:18.833259 ** Bad device specification mmc 0 **
474 01:12:18.833582 Couldn't find partition mmc 0
475 01:12:18.841618 Card did not respond to voltage select! : -110
476 01:12:18.847144 ** Bad device specification mmc 0 **
477 01:12:18.847452 Couldn't find partition mmc 0
478 01:12:18.852175 Error: could not access storage.
479 01:12:20.115439 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:12:20.115915 bl2_stage_init 0x01
481 01:12:20.116255 bl2_stage_init 0x81
482 01:12:20.120950 hw id: 0x0000 - pwm id 0x01
483 01:12:20.121399 bl2_stage_init 0xc1
484 01:12:20.121687 bl2_stage_init 0x02
485 01:12:20.121935
486 01:12:20.126567 L0:00000000
487 01:12:20.127012 L1:20000703
488 01:12:20.127406 L2:00008067
489 01:12:20.127780 L3:14000000
490 01:12:20.129445 B2:00402000
491 01:12:20.129756 B1:e0f83180
492 01:12:20.130005
493 01:12:20.130265 TE: 58124
494 01:12:20.130514
495 01:12:20.140745 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:12:20.141233
497 01:12:20.141631 Board ID = 1
498 01:12:20.142020 Set A53 clk to 24M
499 01:12:20.142399 Set A73 clk to 24M
500 01:12:20.146405 Set clk81 to 24M
501 01:12:20.146715 A53 clk: 1200 MHz
502 01:12:20.146965 A73 clk: 1200 MHz
503 01:12:20.151939 CLK81: 166.6M
504 01:12:20.152435 smccc: 00012a92
505 01:12:20.157499 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:12:20.157952 board id: 1
507 01:12:20.166095 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:12:20.176745 fw parse done
509 01:12:20.182778 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:12:20.225345 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:12:20.236302 PIEI prepare done
512 01:12:20.236794 fastboot data load
513 01:12:20.237085 fastboot data verify
514 01:12:20.241936 verify result: 266
515 01:12:20.247484 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:12:20.247879 LPDDR4 probe
517 01:12:20.248177 ddr clk to 1584MHz
518 01:12:20.255412 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:12:20.292758
520 01:12:20.293141 dmc_version 0001
521 01:12:20.299358 Check phy result
522 01:12:20.305257 INFO : End of CA training
523 01:12:20.305573 INFO : End of initialization
524 01:12:20.310846 INFO : Training has run successfully!
525 01:12:20.311329 Check phy result
526 01:12:20.316407 INFO : End of initialization
527 01:12:20.316724 INFO : End of read enable training
528 01:12:20.322022 INFO : End of fine write leveling
529 01:12:20.327615 INFO : End of Write leveling coarse delay
530 01:12:20.327922 INFO : Training has run successfully!
531 01:12:20.328201 Check phy result
532 01:12:20.333260 INFO : End of initialization
533 01:12:20.333719 INFO : End of read dq deskew training
534 01:12:20.338830 INFO : End of MPR read delay center optimization
535 01:12:20.344408 INFO : End of write delay center optimization
536 01:12:20.350034 INFO : End of read delay center optimization
537 01:12:20.350352 INFO : End of max read latency training
538 01:12:20.355607 INFO : Training has run successfully!
539 01:12:20.355915 1D training succeed
540 01:12:20.364816 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:12:20.412488 Check phy result
542 01:12:20.413024 INFO : End of initialization
543 01:12:20.433426 INFO : End of 2D read delay Voltage center optimization
544 01:12:20.453973 INFO : End of 2D read delay Voltage center optimization
545 01:12:20.506541 INFO : End of 2D write delay Voltage center optimization
546 01:12:20.555927 INFO : End of 2D write delay Voltage center optimization
547 01:12:20.561412 INFO : Training has run successfully!
548 01:12:20.561890
549 01:12:20.562187 channel==0
550 01:12:20.567006 RxClkDly_Margin_A0==88 ps 9
551 01:12:20.567473 TxDqDly_Margin_A0==98 ps 10
552 01:12:20.572636 RxClkDly_Margin_A1==88 ps 9
553 01:12:20.572971 TxDqDly_Margin_A1==98 ps 10
554 01:12:20.573233 TrainedVREFDQ_A0==74
555 01:12:20.578368 TrainedVREFDQ_A1==74
556 01:12:20.578841 VrefDac_Margin_A0==25
557 01:12:20.579256 DeviceVref_Margin_A0==40
558 01:12:20.583866 VrefDac_Margin_A1==25
559 01:12:20.584357 DeviceVref_Margin_A1==40
560 01:12:20.584648
561 01:12:20.584909
562 01:12:20.589397 channel==1
563 01:12:20.589862 RxClkDly_Margin_A0==98 ps 10
564 01:12:20.590276 TxDqDly_Margin_A0==98 ps 10
565 01:12:20.595001 RxClkDly_Margin_A1==98 ps 10
566 01:12:20.595474 TxDqDly_Margin_A1==88 ps 9
567 01:12:20.600626 TrainedVREFDQ_A0==77
568 01:12:20.600987 TrainedVREFDQ_A1==77
569 01:12:20.601249 VrefDac_Margin_A0==22
570 01:12:20.606281 DeviceVref_Margin_A0==37
571 01:12:20.606732 VrefDac_Margin_A1==22
572 01:12:20.611792 DeviceVref_Margin_A1==37
573 01:12:20.612266
574 01:12:20.612685 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:12:20.617430
576 01:12:20.645419 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 01:12:20.645999 2D training succeed
578 01:12:20.651042 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:12:20.656624 auto size-- 65535DDR cs0 size: 2048MB
580 01:12:20.657131 DDR cs1 size: 2048MB
581 01:12:20.662364 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:12:20.662701 cs0 DataBus test pass
583 01:12:20.667819 cs1 DataBus test pass
584 01:12:20.668388 cs0 AddrBus test pass
585 01:12:20.668851 cs1 AddrBus test pass
586 01:12:20.669149
587 01:12:20.673386 100bdlr_step_size ps== 420
588 01:12:20.673860 result report
589 01:12:20.679028 boot times 0Enable ddr reg access
590 01:12:20.684502 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:12:20.697902 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:12:21.271060 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:12:21.271539 MVN_1=0x00000000
594 01:12:21.276564 MVN_2=0x00000000
595 01:12:21.282383 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:12:21.282925 OPS=0x10
597 01:12:21.283366 ring efuse init
598 01:12:21.283797 chipver efuse init
599 01:12:21.287923 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:12:21.293447 [0.018961 Inits done]
601 01:12:21.293934 secure task start!
602 01:12:21.294368 high task start!
603 01:12:21.298024 low task start!
604 01:12:21.298492 run into bl31
605 01:12:21.304652 NOTICE: BL31: v1.3(release):4fc40b1
606 01:12:21.312513 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:12:21.312998 NOTICE: BL31: G12A normal boot!
608 01:12:21.337805 NOTICE: BL31: BL33 decompress pass
609 01:12:21.343516 ERROR: Error initializing runtime service opteed_fast
610 01:12:22.576689
611 01:12:22.577321
612 01:12:22.584121 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:12:22.584635
614 01:12:22.585118 Model: Libre Computer AML-A311D-CC Alta
615 01:12:22.793453 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:12:22.816945 DRAM: 2 GiB (effective 3.8 GiB)
617 01:12:22.959896 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:12:22.965703 WDT: Not starting watchdog@f0d0
619 01:12:22.997974 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:12:23.010284 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:12:23.015353 ** Bad device specification mmc 0 **
622 01:12:23.025579 Card did not respond to voltage select! : -110
623 01:12:23.032412 ** Bad device specification mmc 0 **
624 01:12:23.032924 Couldn't find partition mmc 0
625 01:12:23.041564 Card did not respond to voltage select! : -110
626 01:12:23.047092 ** Bad device specification mmc 0 **
627 01:12:23.047580 Couldn't find partition mmc 0
628 01:12:23.052160 Error: could not access storage.
629 01:12:23.394867 Net: eth0: ethernet@ff3f0000
630 01:12:23.395534 starting USB...
631 01:12:23.646549 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:12:23.647169 Starting the controller
633 01:12:23.653108 USB XHCI 1.10
634 01:12:25.365779 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 01:12:25.366446 bl2_stage_init 0x01
636 01:12:25.366923 bl2_stage_init 0x81
637 01:12:25.371295 hw id: 0x0000 - pwm id 0x01
638 01:12:25.371796 bl2_stage_init 0xc1
639 01:12:25.372289 bl2_stage_init 0x02
640 01:12:25.372742
641 01:12:25.376813 L0:00000000
642 01:12:25.377301 L1:20000703
643 01:12:25.377750 L2:00008067
644 01:12:25.378190 L3:14000000
645 01:12:25.379822 B2:00402000
646 01:12:25.380335 B1:e0f83180
647 01:12:25.380781
648 01:12:25.381225 TE: 58159
649 01:12:25.381664
650 01:12:25.391139 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 01:12:25.391636
652 01:12:25.392118 Board ID = 1
653 01:12:25.392563 Set A53 clk to 24M
654 01:12:25.393001 Set A73 clk to 24M
655 01:12:25.396562 Set clk81 to 24M
656 01:12:25.397046 A53 clk: 1200 MHz
657 01:12:25.397487 A73 clk: 1200 MHz
658 01:12:25.400204 CLK81: 166.6M
659 01:12:25.400686 smccc: 00012ab5
660 01:12:25.405795 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 01:12:25.411445 board id: 1
662 01:12:25.416367 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 01:12:25.427139 fw parse done
664 01:12:25.432976 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 01:12:25.475466 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 01:12:25.486457 PIEI prepare done
667 01:12:25.486930 fastboot data load
668 01:12:25.487375 fastboot data verify
669 01:12:25.492041 verify result: 266
670 01:12:25.497592 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 01:12:25.498071 LPDDR4 probe
672 01:12:25.498519 ddr clk to 1584MHz
673 01:12:25.505582 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 01:12:25.542893
675 01:12:25.543381 dmc_version 0001
676 01:12:25.549525 Check phy result
677 01:12:25.555425 INFO : End of CA training
678 01:12:25.555897 INFO : End of initialization
679 01:12:25.561036 INFO : Training has run successfully!
680 01:12:25.561517 Check phy result
681 01:12:25.566615 INFO : End of initialization
682 01:12:25.567086 INFO : End of read enable training
683 01:12:25.572229 INFO : End of fine write leveling
684 01:12:25.577801 INFO : End of Write leveling coarse delay
685 01:12:25.578279 INFO : Training has run successfully!
686 01:12:25.578724 Check phy result
687 01:12:25.583398 INFO : End of initialization
688 01:12:25.583870 INFO : End of read dq deskew training
689 01:12:25.589036 INFO : End of MPR read delay center optimization
690 01:12:25.594596 INFO : End of write delay center optimization
691 01:12:25.600216 INFO : End of read delay center optimization
692 01:12:25.600686 INFO : End of max read latency training
693 01:12:25.605781 INFO : Training has run successfully!
694 01:12:25.606252 1D training succeed
695 01:12:25.615068 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 01:12:25.662576 Check phy result
697 01:12:25.663051 INFO : End of initialization
698 01:12:25.685135 INFO : End of 2D read delay Voltage center optimization
699 01:12:25.704580 INFO : End of 2D read delay Voltage center optimization
700 01:12:25.756630 INFO : End of 2D write delay Voltage center optimization
701 01:12:25.806039 INFO : End of 2D write delay Voltage center optimization
702 01:12:25.811594 INFO : Training has run successfully!
703 01:12:25.812106
704 01:12:25.812561 channel==0
705 01:12:25.817159 RxClkDly_Margin_A0==88 ps 9
706 01:12:25.817648 TxDqDly_Margin_A0==98 ps 10
707 01:12:25.822774 RxClkDly_Margin_A1==88 ps 9
708 01:12:25.823247 TxDqDly_Margin_A1==98 ps 10
709 01:12:25.823700 TrainedVREFDQ_A0==74
710 01:12:25.828357 TrainedVREFDQ_A1==74
711 01:12:25.828835 VrefDac_Margin_A0==24
712 01:12:25.829278 DeviceVref_Margin_A0==40
713 01:12:25.834034 VrefDac_Margin_A1==24
714 01:12:25.834508 DeviceVref_Margin_A1==40
715 01:12:25.834949
716 01:12:25.835386
717 01:12:25.839560 channel==1
718 01:12:25.840050 RxClkDly_Margin_A0==98 ps 10
719 01:12:25.840500 TxDqDly_Margin_A0==88 ps 9
720 01:12:25.845138 RxClkDly_Margin_A1==88 ps 9
721 01:12:25.845619 TxDqDly_Margin_A1==88 ps 9
722 01:12:25.850794 TrainedVREFDQ_A0==77
723 01:12:25.851321 TrainedVREFDQ_A1==77
724 01:12:25.851774 VrefDac_Margin_A0==23
725 01:12:25.856354 DeviceVref_Margin_A0==37
726 01:12:25.856832 VrefDac_Margin_A1==24
727 01:12:25.862050 DeviceVref_Margin_A1==37
728 01:12:25.862530
729 01:12:25.862977 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 01:12:25.863417
731 01:12:25.895636 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000018 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
732 01:12:25.896187 2D training succeed
733 01:12:25.901155 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 01:12:25.909937 auto size-- 65535DDR cs0 size: 2048MB
735 01:12:25.910415 DDR cs1 size: 2048MB
736 01:12:25.912773 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 01:12:25.913246 cs0 DataBus test pass
738 01:12:25.918315 cs1 DataBus test pass
739 01:12:25.918817 cs0 AddrBus test pass
740 01:12:25.919262 cs1 AddrBus test pass
741 01:12:25.919702
742 01:12:25.924075 100bdlr_step_size ps== 420
743 01:12:25.924575 result report
744 01:12:25.929516 boot times 0Enable ddr reg access
745 01:12:25.934402 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 01:12:25.947907 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 01:12:26.521558 0.0;M3 CHK:0;cm4_sp_mode 0
748 01:12:26.522152 MVN_1=0x00000000
749 01:12:26.527173 MVN_2=0x00000000
750 01:12:26.532890 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 01:12:26.533453 OPS=0x10
752 01:12:26.533890 ring efuse init
753 01:12:26.534313 chipver efuse init
754 01:12:26.538411 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 01:12:26.544077 [0.018961 Inits done]
756 01:12:26.544549 secure task start!
757 01:12:26.544976 high task start!
758 01:12:26.548557 low task start!
759 01:12:26.549026 run into bl31
760 01:12:26.555241 NOTICE: BL31: v1.3(release):4fc40b1
761 01:12:26.563173 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 01:12:26.563646 NOTICE: BL31: G12A normal boot!
763 01:12:26.588486 NOTICE: BL31: BL33 decompress pass
764 01:12:26.594162 ERROR: Error initializing runtime service opteed_fast
765 01:12:27.827237
766 01:12:27.827897
767 01:12:27.835454 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 01:12:27.835969
769 01:12:27.836458 Model: Libre Computer AML-A311D-CC Alta
770 01:12:28.043928 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 01:12:28.067244 DRAM: 2 GiB (effective 3.8 GiB)
772 01:12:28.210344 Core: 408 devices, 31 uclasses, devicetree: separate
773 01:12:28.216177 WDT: Not starting watchdog@f0d0
774 01:12:28.248422 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 01:12:28.260843 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 01:12:28.265795 ** Bad device specification mmc 0 **
777 01:12:28.276164 Card did not respond to voltage select! : -110
778 01:12:28.283771 ** Bad device specification mmc 0 **
779 01:12:28.284338 Couldn't find partition mmc 0
780 01:12:28.292151 Card did not respond to voltage select! : -110
781 01:12:28.297628 ** Bad device specification mmc 0 **
782 01:12:28.298100 Couldn't find partition mmc 0
783 01:12:28.302691 Error: could not access storage.
784 01:12:28.645238 Net: eth0: ethernet@ff3f0000
785 01:12:28.645807 starting USB...
786 01:12:28.897057 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 01:12:28.897644 Starting the controller
788 01:12:28.903933 USB XHCI 1.10
789 01:12:31.067282 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 01:12:31.067920 bl2_stage_init 0x01
791 01:12:31.068428 bl2_stage_init 0x81
792 01:12:31.072956 hw id: 0x0000 - pwm id 0x01
793 01:12:31.073442 bl2_stage_init 0xc1
794 01:12:31.073891 bl2_stage_init 0x02
795 01:12:31.074328
796 01:12:31.078494 L0:00000000
797 01:12:31.078972 L1:20000703
798 01:12:31.079414 L2:00008067
799 01:12:31.079850 L3:14000000
800 01:12:31.083949 B2:00402000
801 01:12:31.084468 B1:e0f83180
802 01:12:31.084908
803 01:12:31.085350 TE: 58167
804 01:12:31.085788
805 01:12:31.089597 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 01:12:31.090085
807 01:12:31.090531 Board ID = 1
808 01:12:31.095157 Set A53 clk to 24M
809 01:12:31.095643 Set A73 clk to 24M
810 01:12:31.096121 Set clk81 to 24M
811 01:12:31.100874 A53 clk: 1200 MHz
812 01:12:31.101352 A73 clk: 1200 MHz
813 01:12:31.101797 CLK81: 166.6M
814 01:12:31.102232 smccc: 00012abe
815 01:12:31.106367 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 01:12:31.111954 board id: 1
817 01:12:31.118118 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 01:12:31.128414 fw parse done
819 01:12:31.134474 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 01:12:31.176998 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 01:12:31.187870 PIEI prepare done
822 01:12:31.188405 fastboot data load
823 01:12:31.188861 fastboot data verify
824 01:12:31.193597 verify result: 266
825 01:12:31.199127 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 01:12:31.199608 LPDDR4 probe
827 01:12:31.200086 ddr clk to 1584MHz
828 01:12:31.207140 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 01:12:31.244440
830 01:12:31.244942 dmc_version 0001
831 01:12:31.251081 Check phy result
832 01:12:31.256972 INFO : End of CA training
833 01:12:31.257445 INFO : End of initialization
834 01:12:31.262551 INFO : Training has run successfully!
835 01:12:31.263032 Check phy result
836 01:12:31.268193 INFO : End of initialization
837 01:12:31.268668 INFO : End of read enable training
838 01:12:31.273863 INFO : End of fine write leveling
839 01:12:31.279346 INFO : End of Write leveling coarse delay
840 01:12:31.279832 INFO : Training has run successfully!
841 01:12:31.280308 Check phy result
842 01:12:31.284972 INFO : End of initialization
843 01:12:31.285449 INFO : End of read dq deskew training
844 01:12:31.290552 INFO : End of MPR read delay center optimization
845 01:12:31.296192 INFO : End of write delay center optimization
846 01:12:31.301719 INFO : End of read delay center optimization
847 01:12:31.302199 INFO : End of max read latency training
848 01:12:31.307336 INFO : Training has run successfully!
849 01:12:31.307817 1D training succeed
850 01:12:31.316560 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 01:12:31.364156 Check phy result
852 01:12:31.364648 INFO : End of initialization
853 01:12:31.385945 INFO : End of 2D read delay Voltage center optimization
854 01:12:31.406201 INFO : End of 2D read delay Voltage center optimization
855 01:12:31.458287 INFO : End of 2D write delay Voltage center optimization
856 01:12:31.507620 INFO : End of 2D write delay Voltage center optimization
857 01:12:31.513158 INFO : Training has run successfully!
858 01:12:31.513642
859 01:12:31.514088 channel==0
860 01:12:31.518709 RxClkDly_Margin_A0==88 ps 9
861 01:12:31.519214 TxDqDly_Margin_A0==98 ps 10
862 01:12:31.522106 RxClkDly_Margin_A1==88 ps 9
863 01:12:31.522581 TxDqDly_Margin_A1==98 ps 10
864 01:12:31.527675 TrainedVREFDQ_A0==74
865 01:12:31.528266 TrainedVREFDQ_A1==74
866 01:12:31.528724 VrefDac_Margin_A0==25
867 01:12:31.533247 DeviceVref_Margin_A0==40
868 01:12:31.533778 VrefDac_Margin_A1==25
869 01:12:31.538968 DeviceVref_Margin_A1==40
870 01:12:31.539425
871 01:12:31.539850
872 01:12:31.540310 channel==1
873 01:12:31.540728 RxClkDly_Margin_A0==88 ps 9
874 01:12:31.544434 TxDqDly_Margin_A0==98 ps 10
875 01:12:31.544901 RxClkDly_Margin_A1==88 ps 9
876 01:12:31.550369 TxDqDly_Margin_A1==98 ps 10
877 01:12:31.550840 TrainedVREFDQ_A0==77
878 01:12:31.551270 TrainedVREFDQ_A1==77
879 01:12:31.555687 VrefDac_Margin_A0==22
880 01:12:31.556169 DeviceVref_Margin_A0==37
881 01:12:31.561205 VrefDac_Margin_A1==24
882 01:12:31.561673 DeviceVref_Margin_A1==37
883 01:12:31.562097
884 01:12:31.566872 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 01:12:31.567334
886 01:12:31.594858 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 01:12:31.600395 2D training succeed
888 01:12:31.606058 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 01:12:31.606596 auto size-- 65535DDR cs0 size: 2048MB
890 01:12:31.611643 DDR cs1 size: 2048MB
891 01:12:31.612147 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 01:12:31.617223 cs0 DataBus test pass
893 01:12:31.617684 cs1 DataBus test pass
894 01:12:31.618114 cs0 AddrBus test pass
895 01:12:31.622854 cs1 AddrBus test pass
896 01:12:31.623351
897 01:12:31.623784 100bdlr_step_size ps== 420
898 01:12:31.624252 result report
899 01:12:31.628344 boot times 0Enable ddr reg access
900 01:12:31.635396 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 01:12:31.649501 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 01:12:32.222548 0.0;M3 CHK:0;cm4_sp_mode 0
903 01:12:32.223210 MVN_1=0x00000000
904 01:12:32.227919 MVN_2=0x00000000
905 01:12:32.233676 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 01:12:32.234165 OPS=0x10
907 01:12:32.234614 ring efuse init
908 01:12:32.235057 chipver efuse init
909 01:12:32.239315 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 01:12:32.244916 [0.018960 Inits done]
911 01:12:32.245402 secure task start!
912 01:12:32.245843 high task start!
913 01:12:32.249443 low task start!
914 01:12:32.249917 run into bl31
915 01:12:32.256166 NOTICE: BL31: v1.3(release):4fc40b1
916 01:12:32.263945 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 01:12:32.264467 NOTICE: BL31: G12A normal boot!
918 01:12:32.289276 NOTICE: BL31: BL33 decompress pass
919 01:12:32.294969 ERROR: Error initializing runtime service opteed_fast
920 01:12:33.527966
921 01:12:33.528689
922 01:12:33.536246 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 01:12:33.536808
924 01:12:33.537283 Model: Libre Computer AML-A311D-CC Alta
925 01:12:33.744702 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 01:12:33.768183 DRAM: 2 GiB (effective 3.8 GiB)
927 01:12:33.911153 Core: 408 devices, 31 uclasses, devicetree: separate
928 01:12:33.916905 WDT: Not starting watchdog@f0d0
929 01:12:33.949177 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 01:12:33.961604 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 01:12:33.966574 ** Bad device specification mmc 0 **
932 01:12:33.976916 Card did not respond to voltage select! : -110
933 01:12:33.984559 ** Bad device specification mmc 0 **
934 01:12:33.985078 Couldn't find partition mmc 0
935 01:12:33.992897 Card did not respond to voltage select! : -110
936 01:12:33.998435 ** Bad device specification mmc 0 **
937 01:12:33.998940 Couldn't find partition mmc 0
938 01:12:34.003488 Error: could not access storage.
939 01:12:34.345633 Net: eth0: ethernet@ff3f0000
940 01:12:34.346231 starting USB...
941 01:12:34.597823 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 01:12:34.598459 Starting the controller
943 01:12:34.603902 USB XHCI 1.10
944 01:12:36.158899 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 01:12:36.166313 scanning usb for storage devices... 0 Storage Device(s) found
947 01:12:36.217980 Hit any key to stop autoboot: 1
948 01:12:36.219200 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
949 01:12:36.219950 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 01:12:36.220653 Setting prompt string to ['=>']
951 01:12:36.221178 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 01:12:36.224940 0
953 01:12:36.225605 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 01:12:36.226269 Sending with 10 millisecond of delay
956 01:12:37.361621 => setenv autoload no
957 01:12:37.373394 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 01:12:37.378917 setenv autoload no
959 01:12:37.379730 Sending with 10 millisecond of delay
961 01:12:39.177923 => setenv initrd_high 0xffffffff
962 01:12:39.188811 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 01:12:39.189879 setenv initrd_high 0xffffffff
964 01:12:39.190733 Sending with 10 millisecond of delay
966 01:12:40.807583 => setenv fdt_high 0xffffffff
967 01:12:40.818443 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 01:12:40.819317 setenv fdt_high 0xffffffff
969 01:12:40.820080 Sending with 10 millisecond of delay
971 01:12:41.112098 => dhcp
972 01:12:41.122928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
973 01:12:41.123849 dhcp
974 01:12:41.124408 Speed: 1000, full duplex
975 01:12:41.124893 BOOTP broadcast 1
976 01:12:41.136009 DHCP client bound to address 192.168.6.27 (13 ms)
977 01:12:41.136864 Sending with 10 millisecond of delay
979 01:12:42.814221 => setenv serverip 192.168.6.2
980 01:12:42.825067 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
981 01:12:42.826033 setenv serverip 192.168.6.2
982 01:12:42.826764 Sending with 10 millisecond of delay
984 01:12:46.550200 => tftpboot 0x01080000 919372/tftp-deploy-oyhx1sw_/kernel/uImage
985 01:12:46.561060 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 01:12:46.561976 tftpboot 0x01080000 919372/tftp-deploy-oyhx1sw_/kernel/uImage
987 01:12:46.562467 Speed: 1000, full duplex
988 01:12:46.562920 Using ethernet@ff3f0000 device
989 01:12:46.564110 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 01:12:46.569539 Filename '919372/tftp-deploy-oyhx1sw_/kernel/uImage'.
991 01:12:46.573350 Load address: 0x1080000
992 01:12:49.391680 Loading: *################################################## 43.6 MiB
993 01:12:49.392384 15.5 MiB/s
994 01:12:49.392863 done
995 01:12:49.396287 Bytes transferred = 45713984 (2b98a40 hex)
996 01:12:49.397148 Sending with 10 millisecond of delay
998 01:12:54.083643 => tftpboot 0x08000000 919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
999 01:12:54.094498 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 01:12:54.095386 tftpboot 0x08000000 919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot
1001 01:12:54.095871 Speed: 1000, full duplex
1002 01:12:54.096372 Using ethernet@ff3f0000 device
1003 01:12:54.097434 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 01:12:54.109213 Filename '919372/tftp-deploy-oyhx1sw_/ramdisk/ramdisk.cpio.gz.uboot'.
1005 01:12:54.109748 Load address: 0x8000000
1006 01:13:00.859670 Loading: *####################T ############################# UDP wrong checksum 00000005 000086c6
1007 01:13:05.860957 T UDP wrong checksum 00000005 000086c6
1008 01:13:15.864080 T T UDP wrong checksum 00000005 000086c6
1009 01:13:17.220759 UDP wrong checksum 000000ff 0000568b
1010 01:13:17.291892 UDP wrong checksum 000000ff 0000e07d
1011 01:13:17.980722 UDP wrong checksum 000000ff 0000acbb
1012 01:13:18.020501 UDP wrong checksum 000000ff 000031ae
1013 01:13:35.868037 T T T T UDP wrong checksum 00000005 000086c6
1014 01:13:50.803295 T T UDP wrong checksum 000000ff 000053d5
1015 01:13:50.814832 UDP wrong checksum 000000ff 0000e7c7
1016 01:13:50.872139
1017 01:13:50.872789 Retry count exceeded; starting again
1019 01:13:50.874201 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1022 01:13:50.876170 end: 2.4 uboot-commands (duration 00:01:46) [common]
1024 01:13:50.877601 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1026 01:13:50.878619 end: 2 uboot-action (duration 00:01:46) [common]
1028 01:13:50.880264 Cleaning after the job
1029 01:13:50.880827 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/ramdisk
1030 01:13:50.882295 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/kernel
1031 01:13:50.911586 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/dtb
1032 01:13:50.912606 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/nfsrootfs
1033 01:13:51.249286 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/919372/tftp-deploy-oyhx1sw_/modules
1034 01:13:51.271816 start: 4.1 power-off (timeout 00:00:30) [common]
1035 01:13:51.272485 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1036 01:13:51.304985 >> OK - accepted request
1037 01:13:51.307149 Returned 0 in 0 seconds
1038 01:13:51.408142 end: 4.1 power-off (duration 00:00:00) [common]
1040 01:13:51.409211 start: 4.2 read-feedback (timeout 00:10:00) [common]
1041 01:13:51.410144 Listened to connection for namespace 'common' for up to 1s
1042 01:13:52.410869 Finalising connection for namespace 'common'
1043 01:13:52.411435 Disconnecting from shell: Finalise
1044 01:13:52.411745 =>
1045 01:13:52.512527 end: 4.2 read-feedback (duration 00:00:01) [common]
1046 01:13:52.513027 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/919372
1047 01:13:55.146260 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/919372
1048 01:13:55.146937 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.