Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:40:09.108969 lava-dispatcher, installed at version: 2024.01
2 05:40:09.109761 start: 0 validate
3 05:40:09.110230 Start time: 2024-11-02 05:40:09.110200+00:00 (UTC)
4 05:40:09.110791 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:40:09.111325 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:40:09.152613 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:40:09.153214 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:40:09.179662 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:40:09.180303 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 05:40:09.211728 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:40:09.212256 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:40:09.251771 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:40:09.252685 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:40:09.301421 validate duration: 0.19
16 05:40:09.302989 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:40:09.303674 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:40:09.304347 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:40:09.305439 Not decompressing ramdisk as can be used compressed.
20 05:40:09.306292 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 05:40:09.306848 saving as /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/ramdisk/initrd.cpio.gz
22 05:40:09.307433 total size: 5628169 (5 MB)
23 05:40:09.350622 progress 0 % (0 MB)
24 05:40:09.358886 progress 5 % (0 MB)
25 05:40:09.367327 progress 10 % (0 MB)
26 05:40:09.374897 progress 15 % (0 MB)
27 05:40:09.383404 progress 20 % (1 MB)
28 05:40:09.390516 progress 25 % (1 MB)
29 05:40:09.395229 progress 30 % (1 MB)
30 05:40:09.399252 progress 35 % (1 MB)
31 05:40:09.402847 progress 40 % (2 MB)
32 05:40:09.406819 progress 45 % (2 MB)
33 05:40:09.410423 progress 50 % (2 MB)
34 05:40:09.414318 progress 55 % (2 MB)
35 05:40:09.418220 progress 60 % (3 MB)
36 05:40:09.421707 progress 65 % (3 MB)
37 05:40:09.425568 progress 70 % (3 MB)
38 05:40:09.429093 progress 75 % (4 MB)
39 05:40:09.433052 progress 80 % (4 MB)
40 05:40:09.436540 progress 85 % (4 MB)
41 05:40:09.440415 progress 90 % (4 MB)
42 05:40:09.444223 progress 95 % (5 MB)
43 05:40:09.447459 progress 100 % (5 MB)
44 05:40:09.448117 5 MB downloaded in 0.14 s (38.15 MB/s)
45 05:40:09.448666 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:40:09.449579 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:40:09.449886 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:40:09.450168 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:40:09.450651 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/kernel/Image
51 05:40:09.450900 saving as /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/kernel/Image
52 05:40:09.451117 total size: 45713920 (43 MB)
53 05:40:09.451333 No compression specified
54 05:40:09.484865 progress 0 % (0 MB)
55 05:40:09.512401 progress 5 % (2 MB)
56 05:40:09.539876 progress 10 % (4 MB)
57 05:40:09.567388 progress 15 % (6 MB)
58 05:40:09.594881 progress 20 % (8 MB)
59 05:40:09.622334 progress 25 % (10 MB)
60 05:40:09.649820 progress 30 % (13 MB)
61 05:40:09.677168 progress 35 % (15 MB)
62 05:40:09.704703 progress 40 % (17 MB)
63 05:40:09.735056 progress 45 % (19 MB)
64 05:40:09.762880 progress 50 % (21 MB)
65 05:40:09.790680 progress 55 % (24 MB)
66 05:40:09.818199 progress 60 % (26 MB)
67 05:40:09.845630 progress 65 % (28 MB)
68 05:40:09.873123 progress 70 % (30 MB)
69 05:40:09.900644 progress 75 % (32 MB)
70 05:40:09.928463 progress 80 % (34 MB)
71 05:40:09.956137 progress 85 % (37 MB)
72 05:40:09.983619 progress 90 % (39 MB)
73 05:40:10.011237 progress 95 % (41 MB)
74 05:40:10.038850 progress 100 % (43 MB)
75 05:40:10.039400 43 MB downloaded in 0.59 s (74.11 MB/s)
76 05:40:10.039870 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:40:10.040720 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:40:10.040993 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:40:10.041259 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:40:10.041703 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 05:40:10.041970 saving as /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 05:40:10.042177 total size: 53209 (0 MB)
84 05:40:10.042385 No compression specified
85 05:40:10.080687 progress 61 % (0 MB)
86 05:40:10.081892 progress 100 % (0 MB)
87 05:40:10.082441 0 MB downloaded in 0.04 s (1.26 MB/s)
88 05:40:10.082926 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:40:10.083731 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:40:10.084015 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:40:10.084286 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:40:10.084735 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 05:40:10.084971 saving as /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/nfsrootfs/full.rootfs.tar
95 05:40:10.085174 total size: 120894716 (115 MB)
96 05:40:10.085381 Using unxz to decompress xz
97 05:40:10.122320 progress 0 % (0 MB)
98 05:40:10.926719 progress 5 % (5 MB)
99 05:40:11.778384 progress 10 % (11 MB)
100 05:40:12.575105 progress 15 % (17 MB)
101 05:40:13.345452 progress 20 % (23 MB)
102 05:40:13.944339 progress 25 % (28 MB)
103 05:40:14.777512 progress 30 % (34 MB)
104 05:40:15.570752 progress 35 % (40 MB)
105 05:40:15.940611 progress 40 % (46 MB)
106 05:40:16.316288 progress 45 % (51 MB)
107 05:40:17.034749 progress 50 % (57 MB)
108 05:40:17.932583 progress 55 % (63 MB)
109 05:40:18.717172 progress 60 % (69 MB)
110 05:40:19.472289 progress 65 % (74 MB)
111 05:40:20.252419 progress 70 % (80 MB)
112 05:40:21.077940 progress 75 % (86 MB)
113 05:40:21.865392 progress 80 % (92 MB)
114 05:40:22.634465 progress 85 % (98 MB)
115 05:40:23.493435 progress 90 % (103 MB)
116 05:40:24.284204 progress 95 % (109 MB)
117 05:40:25.110955 progress 100 % (115 MB)
118 05:40:25.124331 115 MB downloaded in 15.04 s (7.67 MB/s)
119 05:40:25.124924 end: 1.4.1 http-download (duration 00:00:15) [common]
121 05:40:25.125748 end: 1.4 download-retry (duration 00:00:15) [common]
122 05:40:25.126012 start: 1.5 download-retry (timeout 00:09:44) [common]
123 05:40:25.126275 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 05:40:25.126856 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/modules.tar.xz
125 05:40:25.127118 saving as /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/modules/modules.tar
126 05:40:25.127325 total size: 11611500 (11 MB)
127 05:40:25.127536 Using unxz to decompress xz
128 05:40:25.167010 progress 0 % (0 MB)
129 05:40:25.234246 progress 5 % (0 MB)
130 05:40:25.309129 progress 10 % (1 MB)
131 05:40:25.388797 progress 15 % (1 MB)
132 05:40:25.464474 progress 20 % (2 MB)
133 05:40:25.541842 progress 25 % (2 MB)
134 05:40:25.619368 progress 30 % (3 MB)
135 05:40:25.696418 progress 35 % (3 MB)
136 05:40:25.770442 progress 40 % (4 MB)
137 05:40:25.853655 progress 45 % (5 MB)
138 05:40:25.932884 progress 50 % (5 MB)
139 05:40:26.009770 progress 55 % (6 MB)
140 05:40:26.088701 progress 60 % (6 MB)
141 05:40:26.171113 progress 65 % (7 MB)
142 05:40:26.251821 progress 70 % (7 MB)
143 05:40:26.326225 progress 75 % (8 MB)
144 05:40:26.406782 progress 80 % (8 MB)
145 05:40:26.486022 progress 85 % (9 MB)
146 05:40:26.553644 progress 90 % (9 MB)
147 05:40:26.650704 progress 95 % (10 MB)
148 05:40:26.746862 progress 100 % (11 MB)
149 05:40:26.758560 11 MB downloaded in 1.63 s (6.79 MB/s)
150 05:40:26.759155 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:40:26.760191 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:40:26.760856 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 05:40:26.761382 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 05:40:43.416021 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/927257/extract-nfsrootfs-u0117su4
156 05:40:43.416621 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 05:40:43.416906 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 05:40:43.417516 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um
159 05:40:43.417949 makedir: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin
160 05:40:43.418275 makedir: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/tests
161 05:40:43.418586 makedir: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/results
162 05:40:43.418918 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-add-keys
163 05:40:43.419455 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-add-sources
164 05:40:43.419962 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-background-process-start
165 05:40:43.420492 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-background-process-stop
166 05:40:43.421021 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-common-functions
167 05:40:43.421515 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-echo-ipv4
168 05:40:43.422004 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-install-packages
169 05:40:43.422483 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-installed-packages
170 05:40:43.422955 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-os-build
171 05:40:43.423497 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-probe-channel
172 05:40:43.424124 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-probe-ip
173 05:40:43.424683 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-target-ip
174 05:40:43.425216 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-target-mac
175 05:40:43.425746 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-target-storage
176 05:40:43.426280 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-case
177 05:40:43.426790 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-event
178 05:40:43.427267 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-feedback
179 05:40:43.427741 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-raise
180 05:40:43.428245 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-reference
181 05:40:43.428732 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-runner
182 05:40:43.429234 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-set
183 05:40:43.429723 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-test-shell
184 05:40:43.430209 Updating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-add-keys (debian)
185 05:40:43.430734 Updating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-add-sources (debian)
186 05:40:43.431236 Updating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-install-packages (debian)
187 05:40:43.431724 Updating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-installed-packages (debian)
188 05:40:43.432242 Updating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/bin/lava-os-build (debian)
189 05:40:43.432690 Creating /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/environment
190 05:40:43.433068 LAVA metadata
191 05:40:43.433328 - LAVA_JOB_ID=927257
192 05:40:43.433544 - LAVA_DISPATCHER_IP=192.168.6.2
193 05:40:43.433901 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 05:40:43.434889 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 05:40:43.435217 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 05:40:43.435433 skipped lava-vland-overlay
197 05:40:43.435705 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 05:40:43.436003 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 05:40:43.436251 skipped lava-multinode-overlay
200 05:40:43.436522 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 05:40:43.436833 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 05:40:43.437113 Loading test definitions
203 05:40:43.437406 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 05:40:43.437634 Using /lava-927257 at stage 0
205 05:40:43.438759 uuid=927257_1.6.2.4.1 testdef=None
206 05:40:43.439082 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 05:40:43.439343 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 05:40:43.440955 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 05:40:43.441780 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 05:40:43.443869 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 05:40:43.444749 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 05:40:43.446602 runner path: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/0/tests/0_timesync-off test_uuid 927257_1.6.2.4.1
215 05:40:43.447159 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 05:40:43.447994 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 05:40:43.448232 Using /lava-927257 at stage 0
219 05:40:43.448590 Fetching tests from https://github.com/kernelci/test-definitions.git
220 05:40:43.448880 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/0/tests/1_kselftest-alsa'
221 05:40:46.870512 Running '/usr/bin/git checkout kernelci.org
222 05:40:47.319845 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 05:40:47.321334 uuid=927257_1.6.2.4.5 testdef=None
224 05:40:47.321673 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 05:40:47.322424 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 05:40:47.325266 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 05:40:47.326078 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 05:40:47.329815 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 05:40:47.330662 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 05:40:47.334211 runner path: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/0/tests/1_kselftest-alsa test_uuid 927257_1.6.2.4.5
234 05:40:47.334493 BOARD='meson-sm1-s905d3-libretech-cc'
235 05:40:47.334698 BRANCH='mainline'
236 05:40:47.334896 SKIPFILE='/dev/null'
237 05:40:47.335094 SKIP_INSTALL='True'
238 05:40:47.335288 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 05:40:47.335487 TST_CASENAME=''
240 05:40:47.335682 TST_CMDFILES='alsa'
241 05:40:47.336231 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 05:40:47.337018 Creating lava-test-runner.conf files
244 05:40:47.337222 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/927257/lava-overlay-7rx0s4um/lava-927257/0 for stage 0
245 05:40:47.337574 - 0_timesync-off
246 05:40:47.337819 - 1_kselftest-alsa
247 05:40:47.338146 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 05:40:47.338423 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 05:41:10.840910 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 05:41:10.841354 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 05:41:10.841642 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 05:41:10.841929 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 05:41:10.842196 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 05:41:11.503145 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 05:41:11.503799 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 05:41:11.504236 extracting modules file /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/927257/extract-nfsrootfs-u0117su4
257 05:41:12.971798 extracting modules file /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/modules/modules.tar to /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk
258 05:41:14.464414 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 05:41:14.464863 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 05:41:14.465140 [common] Applying overlay to NFS
261 05:41:14.465365 [common] Applying overlay /var/lib/lava/dispatcher/tmp/927257/compress-overlay-bsdszk77/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/927257/extract-nfsrootfs-u0117su4
262 05:41:17.294379 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 05:41:17.294867 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 05:41:17.295186 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 05:41:17.295427 Converting downloaded kernel to a uImage
266 05:41:17.295736 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/kernel/Image /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/kernel/uImage
267 05:41:17.787353 output: Image Name:
268 05:41:17.787774 output: Created: Sat Nov 2 05:41:17 2024
269 05:41:17.788018 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 05:41:17.788234 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 05:41:17.788436 output: Load Address: 01080000
272 05:41:17.788642 output: Entry Point: 01080000
273 05:41:17.788842 output:
274 05:41:17.789175 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 05:41:17.789443 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 05:41:17.789715 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 05:41:17.789971 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 05:41:17.790233 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 05:41:17.790489 Building ramdisk /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk
280 05:41:19.967651 >> 166823 blocks
281 05:41:27.712819 Adding RAMdisk u-boot header.
282 05:41:27.713262 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk.cpio.gz.uboot
283 05:41:27.956210 output: Image Name:
284 05:41:27.956635 output: Created: Sat Nov 2 05:41:27 2024
285 05:41:27.956849 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 05:41:27.957056 output: Data Size: 23436113 Bytes = 22886.83 KiB = 22.35 MiB
287 05:41:27.957260 output: Load Address: 00000000
288 05:41:27.957460 output: Entry Point: 00000000
289 05:41:27.957660 output:
290 05:41:27.958363 rename /var/lib/lava/dispatcher/tmp/927257/extract-overlay-ramdisk-m4s_set3/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
291 05:41:27.958796 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 05:41:27.959084 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 05:41:27.959358 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 05:41:27.959599 No LXC device requested
295 05:41:27.959852 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 05:41:27.960275 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 05:41:27.960774 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 05:41:27.961185 Checking files for TFTP limit of 4294967296 bytes.
299 05:41:27.963812 end: 1 tftp-deploy (duration 00:01:19) [common]
300 05:41:27.964412 start: 2 uboot-action (timeout 00:05:00) [common]
301 05:41:27.964929 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 05:41:27.965423 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 05:41:27.965922 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 05:41:27.966444 Using kernel file from prepare-kernel: 927257/tftp-deploy-k50dzf2j/kernel/uImage
305 05:41:27.967061 substitutions:
306 05:41:27.967465 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 05:41:27.967870 - {DTB_ADDR}: 0x01070000
308 05:41:27.968301 - {DTB}: 927257/tftp-deploy-k50dzf2j/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 05:41:27.968705 - {INITRD}: 927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
310 05:41:27.969103 - {KERNEL_ADDR}: 0x01080000
311 05:41:27.969496 - {KERNEL}: 927257/tftp-deploy-k50dzf2j/kernel/uImage
312 05:41:27.969886 - {LAVA_MAC}: None
313 05:41:27.970317 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/927257/extract-nfsrootfs-u0117su4
314 05:41:27.970712 - {NFS_SERVER_IP}: 192.168.6.2
315 05:41:27.971100 - {PRESEED_CONFIG}: None
316 05:41:27.971487 - {PRESEED_LOCAL}: None
317 05:41:27.971875 - {RAMDISK_ADDR}: 0x08000000
318 05:41:27.972293 - {RAMDISK}: 927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
319 05:41:27.972685 - {ROOT_PART}: None
320 05:41:27.973072 - {ROOT}: None
321 05:41:27.973455 - {SERVER_IP}: 192.168.6.2
322 05:41:27.973838 - {TEE_ADDR}: 0x83000000
323 05:41:27.974221 - {TEE}: None
324 05:41:27.974606 Parsed boot commands:
325 05:41:27.974982 - setenv autoload no
326 05:41:27.975362 - setenv initrd_high 0xffffffff
327 05:41:27.975744 - setenv fdt_high 0xffffffff
328 05:41:27.976158 - dhcp
329 05:41:27.976546 - setenv serverip 192.168.6.2
330 05:41:27.976936 - tftpboot 0x01080000 927257/tftp-deploy-k50dzf2j/kernel/uImage
331 05:41:27.977323 - tftpboot 0x08000000 927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
332 05:41:27.977711 - tftpboot 0x01070000 927257/tftp-deploy-k50dzf2j/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 05:41:27.978099 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/927257/extract-nfsrootfs-u0117su4,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 05:41:27.978497 - bootm 0x01080000 0x08000000 0x01070000
335 05:41:27.978985 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 05:41:27.980485 start: 2.3 connect-device (timeout 00:05:00) [common]
338 05:41:27.980903 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 05:41:27.995742 Setting prompt string to ['lava-test: # ']
340 05:41:27.997272 end: 2.3 connect-device (duration 00:00:00) [common]
341 05:41:27.997879 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 05:41:27.998431 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 05:41:27.998953 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 05:41:28.000252 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 05:41:28.038454 >> OK - accepted request
346 05:41:28.040654 Returned 0 in 0 seconds
347 05:41:28.141714 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 05:41:28.143282 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 05:41:28.143833 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 05:41:28.144409 Setting prompt string to ['Hit any key to stop autoboot']
352 05:41:28.144858 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 05:41:28.146396 Trying 192.168.56.21...
354 05:41:28.146867 Connected to conserv1.
355 05:41:28.147271 Escape character is '^]'.
356 05:41:28.147686
357 05:41:28.148131 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 05:41:28.148552
359 05:41:35.865947 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 05:41:35.866362 bl2_stage_init 0x01
361 05:41:35.866635 bl2_stage_init 0x81
362 05:41:35.871407 hw id: 0x0000 - pwm id 0x01
363 05:41:35.871726 bl2_stage_init 0xc1
364 05:41:35.872023 bl2_stage_init 0x02
365 05:41:35.872284
366 05:41:35.877104 L0:00000000
367 05:41:35.877419 L1:00000703
368 05:41:35.877671 L2:00008067
369 05:41:35.877915 L3:15000000
370 05:41:35.878155 S1:00000000
371 05:41:35.882862 B2:20282000
372 05:41:35.883174 B1:a0f83180
373 05:41:35.883416
374 05:41:35.883652 TE: 71026
375 05:41:35.883891
376 05:41:35.888421 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 05:41:35.888721
378 05:41:35.893813 Board ID = 1
379 05:41:35.894115 Set cpu clk to 24M
380 05:41:35.894351 Set clk81 to 24M
381 05:41:35.899406 Use GP1_pll as DSU clk.
382 05:41:35.899701 DSU clk: 1200 Mhz
383 05:41:35.899943 CPU clk: 1200 MHz
384 05:41:35.900333 Set clk81 to 166.6M
385 05:41:35.910763 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 05:41:35.911207 board id: 1
387 05:41:35.916711 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 05:41:35.927806 fw parse done
389 05:41:35.933134 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 05:41:35.975467 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 05:41:35.987162 PIEI prepare done
392 05:41:35.987594 fastboot data load
393 05:41:35.988030 fastboot data verify
394 05:41:35.992771 verify result: 266
395 05:41:35.998340 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 05:41:35.998763 LPDDR4 probe
397 05:41:35.999158 ddr clk to 1584MHz
398 05:41:36.006198 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 05:41:36.042709
400 05:41:36.043226 dmc_version 0001
401 05:41:36.050392 Check phy result
402 05:41:36.056170 INFO : End of CA training
403 05:41:36.056650 INFO : End of initialization
404 05:41:36.061830 INFO : Training has run successfully!
405 05:41:36.062282 Check phy result
406 05:41:36.067398 INFO : End of initialization
407 05:41:36.067842 INFO : End of read enable training
408 05:41:36.073042 INFO : End of fine write leveling
409 05:41:36.078595 INFO : End of Write leveling coarse delay
410 05:41:36.079035 INFO : Training has run successfully!
411 05:41:36.079452 Check phy result
412 05:41:36.084200 INFO : End of initialization
413 05:41:36.084647 INFO : End of read dq deskew training
414 05:41:36.089779 INFO : End of MPR read delay center optimization
415 05:41:36.095397 INFO : End of write delay center optimization
416 05:41:36.100994 INFO : End of read delay center optimization
417 05:41:36.101432 INFO : End of max read latency training
418 05:41:36.106574 INFO : Training has run successfully!
419 05:41:36.107005 1D training succeed
420 05:41:36.114839 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 05:41:36.163450 Check phy result
422 05:41:36.164059 INFO : End of initialization
423 05:41:36.184920 INFO : End of 2D read delay Voltage center optimization
424 05:41:36.204623 INFO : End of 2D read delay Voltage center optimization
425 05:41:36.256405 INFO : End of 2D write delay Voltage center optimization
426 05:41:36.305923 INFO : End of 2D write delay Voltage center optimization
427 05:41:36.311460 INFO : Training has run successfully!
428 05:41:36.311896
429 05:41:36.312372 channel==0
430 05:41:36.317080 RxClkDly_Margin_A0==88 ps 9
431 05:41:36.317517 TxDqDly_Margin_A0==98 ps 10
432 05:41:36.320459 RxClkDly_Margin_A1==88 ps 9
433 05:41:36.320933 TxDqDly_Margin_A1==88 ps 9
434 05:41:36.325930 TrainedVREFDQ_A0==74
435 05:41:36.326381 TrainedVREFDQ_A1==74
436 05:41:36.326795 VrefDac_Margin_A0==22
437 05:41:36.331570 DeviceVref_Margin_A0==40
438 05:41:36.332054 VrefDac_Margin_A1==23
439 05:41:36.337213 DeviceVref_Margin_A1==40
440 05:41:36.337584
441 05:41:36.337801
442 05:41:36.338008 channel==1
443 05:41:36.338215 RxClkDly_Margin_A0==78 ps 8
444 05:41:36.340534 TxDqDly_Margin_A0==98 ps 10
445 05:41:36.346203 RxClkDly_Margin_A1==88 ps 9
446 05:41:36.346561 TxDqDly_Margin_A1==88 ps 9
447 05:41:36.346781 TrainedVREFDQ_A0==78
448 05:41:36.351795 TrainedVREFDQ_A1==78
449 05:41:36.352202 VrefDac_Margin_A0==22
450 05:41:36.357428 DeviceVref_Margin_A0==36
451 05:41:36.357779 VrefDac_Margin_A1==22
452 05:41:36.357992 DeviceVref_Margin_A1==36
453 05:41:36.358199
454 05:41:36.362970 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 05:41:36.363308
456 05:41:36.396565 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000017 00000017 00000018 00000014 00000017 00000014 00000015 00000016 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
457 05:41:36.397231 2D training succeed
458 05:41:36.402171 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 05:41:36.407771 auto size-- 65535DDR cs0 size: 2048MB
460 05:41:36.408256 DDR cs1 size: 2048MB
461 05:41:36.413424 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 05:41:36.413863 cs0 DataBus test pass
463 05:41:36.414260 cs1 DataBus test pass
464 05:41:36.419036 cs0 AddrBus test pass
465 05:41:36.419480 cs1 AddrBus test pass
466 05:41:36.419875
467 05:41:36.424583 100bdlr_step_size ps== 478
468 05:41:36.425118 result report
469 05:41:36.425513 boot times 0Enable ddr reg access
470 05:41:36.433307 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 05:41:36.447232 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 05:41:37.103172 bl2z: ptr: 05129330, size: 00001e40
473 05:41:37.109926 0.0;M3 CHK:0;cm4_sp_mode 0
474 05:41:37.110426 MVN_1=0x00000000
475 05:41:37.110844 MVN_2=0x00000000
476 05:41:37.121471 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 05:41:37.121936 OPS=0x04
478 05:41:37.122354 ring efuse init
479 05:41:37.126995 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 05:41:37.127494 [0.017319 Inits done]
481 05:41:37.127912 secure task start!
482 05:41:37.133414 high task start!
483 05:41:37.133892 low task start!
484 05:41:37.134317 run into bl31
485 05:41:37.142904 NOTICE: BL31: v1.3(release):4fc40b1
486 05:41:37.150828 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 05:41:37.151277 NOTICE: BL31: G12A normal boot!
488 05:41:37.166371 NOTICE: BL31: BL33 decompress pass
489 05:41:37.171969 ERROR: Error initializing runtime service opteed_fast
490 05:41:38.415454 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 05:41:38.416089 bl2_stage_init 0x01
492 05:41:38.416532 bl2_stage_init 0x81
493 05:41:38.421053 hw id: 0x0000 - pwm id 0x01
494 05:41:38.421551 bl2_stage_init 0xc1
495 05:41:38.426660 bl2_stage_init 0x02
496 05:41:38.427180
497 05:41:38.427582 L0:00000000
498 05:41:38.428003 L1:00000703
499 05:41:38.428410 L2:00008067
500 05:41:38.428800 L3:15000000
501 05:41:38.432243 S1:00000000
502 05:41:38.432685 B2:20282000
503 05:41:38.433074 B1:a0f83180
504 05:41:38.433459
505 05:41:38.433849 TE: 70100
506 05:41:38.434240
507 05:41:38.437804 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 05:41:38.438257
509 05:41:38.443388 Board ID = 1
510 05:41:38.443838 Set cpu clk to 24M
511 05:41:38.444267 Set clk81 to 24M
512 05:41:38.448991 Use GP1_pll as DSU clk.
513 05:41:38.449428 DSU clk: 1200 Mhz
514 05:41:38.449821 CPU clk: 1200 MHz
515 05:41:38.454593 Set clk81 to 166.6M
516 05:41:38.460374 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 05:41:38.460808 board id: 1
518 05:41:38.467372 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 05:41:38.478089 fw parse done
520 05:41:38.484019 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 05:41:38.527357 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 05:41:38.537741 PIEI prepare done
523 05:41:38.538206 fastboot data load
524 05:41:38.538602 fastboot data verify
525 05:41:38.543226 verify result: 266
526 05:41:38.548832 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 05:41:38.549256 LPDDR4 probe
528 05:41:38.549645 ddr clk to 1584MHz
529 05:41:39.914721 Load ddrfw from SPI, src: 0 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 05:41:39.915362 bl2_stage_init 0x01
531 05:41:39.915794 bl2_stage_init 0x81
532 05:41:39.920753 hw id: 0x0000 - pwm id 0x01
533 05:41:39.921198 bl2_stage_init 0xc1
534 05:41:39.925879 bl2_stage_init 0x02
535 05:41:39.926314
536 05:41:39.926727 L0:00000000
537 05:41:39.927133 L1:00000703
538 05:41:39.927534 L2:00008067
539 05:41:39.927933 L3:15000000
540 05:41:39.932265 S1:00000000
541 05:41:39.932703 B2:20282000
542 05:41:39.933113 B1:a0f83180
543 05:41:39.933510
544 05:41:39.933911 TE: 71012
545 05:41:39.934307
546 05:41:39.937845 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 05:41:39.938283
548 05:41:39.943507 Board ID = 1
549 05:41:39.943957 Set cpu clk to 24M
550 05:41:39.944400 Set clk81 to 24M
551 05:41:39.949036 Use GP1_pll as DSU clk.
552 05:41:39.949469 DSU clk: 1200 Mhz
553 05:41:39.949874 CPU clk: 1200 MHz
554 05:41:39.950276 Set clk81 to 166.6M
555 05:41:39.960232 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 05:41:39.960689 board id: 1
557 05:41:39.965819 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 05:41:39.977641 fw parse done
559 05:41:39.983601 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 05:41:40.025797 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 05:41:40.037932 PIEI prepare done
562 05:41:40.038418 fastboot data load
563 05:41:40.038837 fastboot data verify
564 05:41:40.043389 verify result: 266
565 05:41:40.048999 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 05:41:40.049439 LPDDR4 probe
567 05:41:40.049845 ddr clk to 1584MHz
568 05:41:40.057555 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 05:41:40.094770
570 05:41:40.095234 dmc_version 0001
571 05:41:40.101753 Check phy result
572 05:41:40.107881 INFO : End of CA training
573 05:41:40.108370 INFO : End of initialization
574 05:41:40.113392 INFO : Training has run successfully!
575 05:41:40.113868 Check phy result
576 05:41:40.118932 INFO : End of initialization
577 05:41:40.119377 INFO : End of read enable training
578 05:41:40.124592 INFO : End of fine write leveling
579 05:41:40.130112 INFO : End of Write leveling coarse delay
580 05:41:40.130554 INFO : Training has run successfully!
581 05:41:40.130963 Check phy result
582 05:41:40.135922 INFO : End of initialization
583 05:41:40.136391 INFO : End of read dq deskew training
584 05:41:40.141401 INFO : End of MPR read delay center optimization
585 05:41:40.146932 INFO : End of write delay center optimization
586 05:41:40.152951 INFO : End of read delay center optimization
587 05:41:40.153384 INFO : End of max read latency training
588 05:41:40.158180 INFO : Training has run successfully!
589 05:41:40.158616 1D training succeed
590 05:41:40.167351 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 05:41:40.215670 Check phy result
592 05:41:40.216222 INFO : End of initialization
593 05:41:40.243039 INFO : End of 2D read delay Voltage center optimization
594 05:41:40.266325 INFO : End of 2D read delay Voltage center optimization
595 05:41:40.323681 INFO : End of 2D write delay Voltage center optimization
596 05:41:40.378036 INFO : End of 2D write delay Voltage center optimization
597 05:41:40.383453 INFO : Training has run successfully!
598 05:41:40.383901
599 05:41:40.384360 channel==0
600 05:41:40.389155 RxClkDly_Margin_A0==88 ps 9
601 05:41:40.389605 TxDqDly_Margin_A0==98 ps 10
602 05:41:40.392666 RxClkDly_Margin_A1==88 ps 9
603 05:41:40.393106 TxDqDly_Margin_A1==98 ps 10
604 05:41:40.397980 TrainedVREFDQ_A0==74
605 05:41:40.398425 TrainedVREFDQ_A1==74
606 05:41:40.398839 VrefDac_Margin_A0==24
607 05:41:40.403673 DeviceVref_Margin_A0==40
608 05:41:40.404142 VrefDac_Margin_A1==22
609 05:41:40.409188 DeviceVref_Margin_A1==40
610 05:41:40.409631
611 05:41:40.410042
612 05:41:40.410448 channel==1
613 05:41:40.410848 RxClkDly_Margin_A0==88 ps 9
614 05:41:40.414783 TxDqDly_Margin_A0==88 ps 9
615 05:41:40.415148 RxClkDly_Margin_A1==88 ps 9
616 05:41:40.420334 TxDqDly_Margin_A1==98 ps 10
617 05:41:40.420676 TrainedVREFDQ_A0==75
618 05:41:40.420975 TrainedVREFDQ_A1==78
619 05:41:40.425972 VrefDac_Margin_A0==23
620 05:41:40.426272 DeviceVref_Margin_A0==39
621 05:41:40.431544 VrefDac_Margin_A1==22
622 05:41:40.432034 DeviceVref_Margin_A1==36
623 05:41:40.432451
624 05:41:40.437175 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 05:41:40.437627
626 05:41:40.465201 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000014 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
627 05:41:40.470740 2D training succeed
628 05:41:40.476354 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 05:41:40.476800 auto size-- 65535DDR cs0 size: 2048MB
630 05:41:40.481927 DDR cs1 size: 2048MB
631 05:41:40.482370 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 05:41:40.487582 cs0 DataBus test pass
633 05:41:40.488054 cs1 DataBus test pass
634 05:41:40.488463 cs0 AddrBus test pass
635 05:41:40.493155 cs1 AddrBus test pass
636 05:41:40.493600
637 05:41:40.494009 100bdlr_step_size ps== 471
638 05:41:40.494416 result report
639 05:41:40.498829 boot times 0Enable ddr reg access
640 05:41:40.506282 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 05:41:40.520175 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 05:41:41.179694 bl2z: ptr: 05129330, size: 00001e40
643 05:41:41.187754 0.0;M3 CHK:0;cm4_sp_mode 0
644 05:41:41.188240 MVN_1=0x00000000
645 05:41:41.188652 MVN_2=0x00000000
646 05:41:41.199170 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 05:41:41.199618 OPS=0x04
648 05:41:41.200056 ring efuse init
649 05:41:41.202248 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 05:41:41.208724 [0.017354 Inits done]
651 05:41:41.209168 secure task start!
652 05:41:41.209574 high task start!
653 05:41:41.209975 low task start!
654 05:41:41.212149 run into bl31
655 05:41:41.221539 NOTICE: BL31: v1.3(release):4fc40b1
656 05:41:41.229393 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 05:41:41.229831 NOTICE: BL31: G12A normal boot!
658 05:41:41.244799 NOTICE: BL31: BL33 decompress pass
659 05:41:41.251205 ERROR: Error initializing runtime service opteed_fast
660 05:41:42.614541 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 05:41:42.615163 bl2_stage_init 0x01
662 05:41:42.615601 bl2_stage_init 0x81
663 05:41:42.619938 hw id: 0x0000 - pwm id 0x01
664 05:41:42.620432 bl2_stage_init 0xc1
665 05:41:42.625509 bl2_stage_init 0x02
666 05:41:42.625966
667 05:41:42.626381 L0:00000000
668 05:41:42.626788 L1:00000703
669 05:41:42.627192 L2:00008067
670 05:41:42.627594 L3:15000000
671 05:41:42.631034 S1:00000000
672 05:41:42.631501 B2:20282000
673 05:41:42.631914 B1:a0f83180
674 05:41:42.632360
675 05:41:42.632768 TE: 68758
676 05:41:42.633171
677 05:41:42.637503 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 05:41:42.637957
679 05:41:42.642326 Board ID = 1
680 05:41:42.642776 Set cpu clk to 24M
681 05:41:42.643187 Set clk81 to 24M
682 05:41:42.647790 Use GP1_pll as DSU clk.
683 05:41:42.648262 DSU clk: 1200 Mhz
684 05:41:42.648674 CPU clk: 1200 MHz
685 05:41:42.653554 Set clk81 to 166.6M
686 05:41:42.659034 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 05:41:42.659488 board id: 1
688 05:41:42.665895 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 05:41:42.677586 fw parse done
690 05:41:42.682475 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 05:41:42.726229 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 05:41:42.737422 PIEI prepare done
693 05:41:42.737880 fastboot data load
694 05:41:42.738298 fastboot data verify
695 05:41:42.743079 verify result: 266
696 05:41:42.748599 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 05:41:42.749044 LPDDR4 probe
698 05:41:42.749457 ddr clk to 1584MHz
699 05:41:42.755717 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 05:41:42.793928
701 05:41:42.794426 dmc_version 0001
702 05:41:42.800436 Check phy result
703 05:41:42.807355 INFO : End of CA training
704 05:41:42.807789 INFO : End of initialization
705 05:41:42.812938 INFO : Training has run successfully!
706 05:41:42.813374 Check phy result
707 05:41:42.818458 INFO : End of initialization
708 05:41:42.818893 INFO : End of read enable training
709 05:41:42.821689 INFO : End of fine write leveling
710 05:41:42.827353 INFO : End of Write leveling coarse delay
711 05:41:42.832866 INFO : Training has run successfully!
712 05:41:42.833303 Check phy result
713 05:41:42.833712 INFO : End of initialization
714 05:41:42.838449 INFO : End of read dq deskew training
715 05:41:42.844028 INFO : End of MPR read delay center optimization
716 05:41:42.844462 INFO : End of write delay center optimization
717 05:41:42.849659 INFO : End of read delay center optimization
718 05:41:42.855361 INFO : End of max read latency training
719 05:41:42.855838 INFO : Training has run successfully!
720 05:41:42.860892 1D training succeed
721 05:41:42.866515 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 05:41:42.915238 Check phy result
723 05:41:42.915763 INFO : End of initialization
724 05:41:42.941942 INFO : End of 2D read delay Voltage center optimization
725 05:41:42.966321 INFO : End of 2D read delay Voltage center optimization
726 05:41:43.023662 INFO : End of 2D write delay Voltage center optimization
727 05:41:43.077971 INFO : End of 2D write delay Voltage center optimization
728 05:41:43.083031 INFO : Training has run successfully!
729 05:41:43.083480
730 05:41:43.083893 channel==0
731 05:41:43.088596 RxClkDly_Margin_A0==78 ps 8
732 05:41:43.089052 TxDqDly_Margin_A0==98 ps 10
733 05:41:43.091883 RxClkDly_Margin_A1==88 ps 9
734 05:41:43.092338 TxDqDly_Margin_A1==98 ps 10
735 05:41:43.097456 TrainedVREFDQ_A0==74
736 05:41:43.097916 TrainedVREFDQ_A1==75
737 05:41:43.098332 VrefDac_Margin_A0==24
738 05:41:43.103022 DeviceVref_Margin_A0==40
739 05:41:43.103457 VrefDac_Margin_A1==23
740 05:41:43.108702 DeviceVref_Margin_A1==39
741 05:41:43.109142
742 05:41:43.109550
743 05:41:43.109948 channel==1
744 05:41:43.110344 RxClkDly_Margin_A0==78 ps 8
745 05:41:43.112296 TxDqDly_Margin_A0==98 ps 10
746 05:41:43.117855 RxClkDly_Margin_A1==88 ps 9
747 05:41:43.118293 TxDqDly_Margin_A1==88 ps 9
748 05:41:43.118698 TrainedVREFDQ_A0==78
749 05:41:43.123335 TrainedVREFDQ_A1==78
750 05:41:43.123777 VrefDac_Margin_A0==22
751 05:41:43.128987 DeviceVref_Margin_A0==36
752 05:41:43.129438 VrefDac_Margin_A1==21
753 05:41:43.129847 DeviceVref_Margin_A1==36
754 05:41:43.130244
755 05:41:43.134486 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 05:41:43.134926
757 05:41:43.168201 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000014 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
758 05:41:43.168685 2D training succeed
759 05:41:43.173760 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 05:41:43.179367 auto size-- 65535DDR cs0 size: 2048MB
761 05:41:43.179808 DDR cs1 size: 2048MB
762 05:41:43.184904 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 05:41:43.185337 cs0 DataBus test pass
764 05:41:43.185776 cs1 DataBus test pass
765 05:41:43.190502 cs0 AddrBus test pass
766 05:41:43.190944 cs1 AddrBus test pass
767 05:41:43.191348
768 05:41:43.196197 100bdlr_step_size ps== 471
769 05:41:43.196641 result report
770 05:41:43.197046 boot times 0Enable ddr reg access
771 05:41:43.205063 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 05:41:43.220079 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 05:41:43.878969 bl2z: ptr: 05129330, size: 00001e40
774 05:41:43.885099 0.0;M3 CHK:0;cm4_sp_mode 0
775 05:41:43.885619 MVN_1=0x00000000
776 05:41:43.886027 MVN_2=0x00000000
777 05:41:43.896534 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 05:41:43.897065 OPS=0x04
779 05:41:43.897472 ring efuse init
780 05:41:43.902100 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 05:41:43.902581 [0.017355 Inits done]
782 05:41:43.903011 secure task start!
783 05:41:43.910184 high task start!
784 05:41:43.910651 low task start!
785 05:41:43.911046 run into bl31
786 05:41:43.918807 NOTICE: BL31: v1.3(release):4fc40b1
787 05:41:43.926624 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 05:41:43.927112 NOTICE: BL31: G12A normal boot!
789 05:41:43.942160 NOTICE: BL31: BL33 decompress pass
790 05:41:43.947841 ERROR: Error initializing runtime service opteed_fast
791 05:41:44.743284
792 05:41:44.744122
793 05:41:44.748668 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 05:41:44.749363
795 05:41:44.752159 Model: Libre Computer AML-S905D3-CC Solitude
796 05:41:44.898826 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 05:41:44.914312 DRAM: 2 GiB (effective 3.8 GiB)
798 05:41:45.015710 Core: 406 devices, 33 uclasses, devicetree: separate
799 05:41:45.020492 WDT: Not starting watchdog@f0d0
800 05:41:45.046605 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 05:41:45.058785 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 05:41:45.063474 ** Bad device specification mmc 0 **
803 05:41:45.073812 Card did not respond to voltage select! : -110
804 05:41:45.081482 ** Bad device specification mmc 0 **
805 05:41:45.082113 Couldn't find partition mmc 0
806 05:41:45.089740 Card did not respond to voltage select! : -110
807 05:41:45.095304 ** Bad device specification mmc 0 **
808 05:41:45.095921 Couldn't find partition mmc 0
809 05:41:45.099389 Error: could not access storage.
810 05:41:45.397059 Net: eth0: ethernet@ff3f0000
811 05:41:45.397821 starting USB...
812 05:41:45.642499 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 05:41:45.643271 Starting the controller
814 05:41:45.648884 USB XHCI 1.10
815 05:41:47.203610 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 05:41:47.211192 scanning usb for storage devices... 0 Storage Device(s) found
818 05:41:47.263167 Hit any key to stop autoboot: 1
819 05:41:47.264463 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 05:41:47.265306 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 05:41:47.265947 Setting prompt string to ['=>']
822 05:41:47.266625 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 05:41:47.277738 0
824 05:41:47.278793 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 05:41:47.380272 => setenv autoload no
827 05:41:47.381147 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 05:41:47.386351 setenv autoload no
830 05:41:47.487875 => setenv initrd_high 0xffffffff
831 05:41:47.488754 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
832 05:41:47.492178 setenv initrd_high 0xffffffff
834 05:41:47.593763 => setenv fdt_high 0xffffffff
835 05:41:47.594604 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
836 05:41:47.599449 setenv fdt_high 0xffffffff
838 05:41:47.701062 => dhcp
839 05:41:47.701856 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
840 05:41:47.705419 dhcp
841 05:41:48.260563 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 05:41:48.261370 Speed: 1000, full duplex
843 05:41:48.261931 BOOTP broadcast 1
844 05:41:48.510376 BOOTP broadcast 2
845 05:41:48.535955 DHCP client bound to address 192.168.6.21 (274 ms)
847 05:41:48.637466 => setenv serverip 192.168.6.2
848 05:41:48.638147 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
849 05:41:48.642782 setenv serverip 192.168.6.2
851 05:41:48.744273 => tftpboot 0x01080000 927257/tftp-deploy-k50dzf2j/kernel/uImage
852 05:41:48.744975 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
853 05:41:48.751562 tftpboot 0x01080000 927257/tftp-deploy-k50dzf2j/kernel/uImage
854 05:41:48.752079 Speed: 1000, full duplex
855 05:41:48.752496 Using ethernet@ff3f0000 device
856 05:41:48.757220 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 05:41:48.762724 Filename '927257/tftp-deploy-k50dzf2j/kernel/uImage'.
858 05:41:48.766689 Load address: 0x1080000
859 05:41:51.541319 Loading: *################################################## 43.6 MiB
860 05:41:51.541712 15.7 MiB/s
861 05:41:51.541928 done
862 05:41:51.544794 Bytes transferred = 45713984 (2b98a40 hex)
864 05:41:51.645820 => tftpboot 0x08000000 927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
865 05:41:51.646391 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
866 05:41:51.652871 tftpboot 0x08000000 927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot
867 05:41:51.653151 Speed: 1000, full duplex
868 05:41:51.653359 Using ethernet@ff3f0000 device
869 05:41:51.658382 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 05:41:51.668172 Filename '927257/tftp-deploy-k50dzf2j/ramdisk/ramdisk.cpio.gz.uboot'.
871 05:41:51.668778 Load address: 0x8000000
872 05:41:53.094811 Loading: *################################################# UDP wrong checksum 00000005 00007370
873 05:41:58.039099 UDP wrong checksum 000000ff 00001a8d
874 05:41:58.079256 UDP wrong checksum 000000ff 0000b57f
875 05:41:58.097010 T UDP wrong checksum 00000005 00007370
876 05:42:08.099149 T T UDP wrong checksum 00000005 00007370
877 05:42:28.103273 T T T T UDP wrong checksum 00000005 00007370
878 05:42:48.108189 T T T
879 05:42:48.108878 Retry count exceeded; starting again
881 05:42:48.110448 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
884 05:42:48.112599 end: 2.4 uboot-commands (duration 00:01:20) [common]
886 05:42:48.114206 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
888 05:42:48.115335 end: 2 uboot-action (duration 00:01:20) [common]
890 05:42:48.117065 Cleaning after the job
891 05:42:48.117667 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/ramdisk
892 05:42:48.119127 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/kernel
893 05:42:48.168675 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/dtb
894 05:42:48.169589 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/nfsrootfs
895 05:42:48.350849 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927257/tftp-deploy-k50dzf2j/modules
896 05:42:48.373050 start: 4.1 power-off (timeout 00:00:30) [common]
897 05:42:48.373735 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
898 05:42:48.407185 >> OK - accepted request
899 05:42:48.409348 Returned 0 in 0 seconds
900 05:42:48.510167 end: 4.1 power-off (duration 00:00:00) [common]
902 05:42:48.511176 start: 4.2 read-feedback (timeout 00:10:00) [common]
903 05:42:48.511817 Listened to connection for namespace 'common' for up to 1s
904 05:42:49.512780 Finalising connection for namespace 'common'
905 05:42:49.513271 Disconnecting from shell: Finalise
906 05:42:49.513560 =>
907 05:42:49.614238 end: 4.2 read-feedback (duration 00:00:01) [common]
908 05:42:49.614670 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/927257
909 05:42:52.747704 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/927257
910 05:42:52.748337 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.