Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 05:43:29.310954 lava-dispatcher, installed at version: 2024.01
2 05:43:29.311740 start: 0 validate
3 05:43:29.312242 Start time: 2024-11-02 05:43:29.312210+00:00 (UTC)
4 05:43:29.312792 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 05:43:29.313333 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 05:43:29.355192 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 05:43:29.355740 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 05:43:29.385723 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 05:43:29.386519 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 05:43:29.419015 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 05:43:29.419571 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 05:43:29.453716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 05:43:29.454290 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-299-g11066801dd4b7%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 05:43:29.494902 validate duration: 0.18
16 05:43:29.495932 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 05:43:29.496398 start: 1.1 download-retry (timeout 00:10:00) [common]
18 05:43:29.496796 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 05:43:29.497567 Not decompressing ramdisk as can be used compressed.
20 05:43:29.498166 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 05:43:29.498530 saving as /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/ramdisk/initrd.cpio.gz
22 05:43:29.498900 total size: 5628169 (5 MB)
23 05:43:29.538200 progress 0 % (0 MB)
24 05:43:29.543278 progress 5 % (0 MB)
25 05:43:29.548196 progress 10 % (0 MB)
26 05:43:29.552509 progress 15 % (0 MB)
27 05:43:29.557515 progress 20 % (1 MB)
28 05:43:29.561909 progress 25 % (1 MB)
29 05:43:29.566695 progress 30 % (1 MB)
30 05:43:29.571455 progress 35 % (1 MB)
31 05:43:29.575804 progress 40 % (2 MB)
32 05:43:29.580597 progress 45 % (2 MB)
33 05:43:29.584853 progress 50 % (2 MB)
34 05:43:29.589632 progress 55 % (2 MB)
35 05:43:29.594418 progress 60 % (3 MB)
36 05:43:29.598677 progress 65 % (3 MB)
37 05:43:29.603368 progress 70 % (3 MB)
38 05:43:29.607771 progress 75 % (4 MB)
39 05:43:29.612499 progress 80 % (4 MB)
40 05:43:29.616798 progress 85 % (4 MB)
41 05:43:29.621461 progress 90 % (4 MB)
42 05:43:29.625798 progress 95 % (5 MB)
43 05:43:29.629681 progress 100 % (5 MB)
44 05:43:29.630506 5 MB downloaded in 0.13 s (40.79 MB/s)
45 05:43:29.631194 end: 1.1.1 http-download (duration 00:00:00) [common]
47 05:43:29.632388 end: 1.1 download-retry (duration 00:00:00) [common]
48 05:43:29.632790 start: 1.2 download-retry (timeout 00:10:00) [common]
49 05:43:29.633152 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 05:43:29.633761 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/kernel/Image
51 05:43:29.634090 saving as /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/kernel/Image
52 05:43:29.634372 total size: 45713920 (43 MB)
53 05:43:29.634646 No compression specified
54 05:43:29.675749 progress 0 % (0 MB)
55 05:43:29.708700 progress 5 % (2 MB)
56 05:43:29.742156 progress 10 % (4 MB)
57 05:43:29.775366 progress 15 % (6 MB)
58 05:43:29.808729 progress 20 % (8 MB)
59 05:43:29.841737 progress 25 % (10 MB)
60 05:43:29.874918 progress 30 % (13 MB)
61 05:43:29.907852 progress 35 % (15 MB)
62 05:43:29.938509 progress 40 % (17 MB)
63 05:43:29.965841 progress 45 % (19 MB)
64 05:43:29.993610 progress 50 % (21 MB)
65 05:43:30.021261 progress 55 % (24 MB)
66 05:43:30.049113 progress 60 % (26 MB)
67 05:43:30.076367 progress 65 % (28 MB)
68 05:43:30.103963 progress 70 % (30 MB)
69 05:43:30.131599 progress 75 % (32 MB)
70 05:43:30.159901 progress 80 % (34 MB)
71 05:43:30.187455 progress 85 % (37 MB)
72 05:43:30.215105 progress 90 % (39 MB)
73 05:43:30.243086 progress 95 % (41 MB)
74 05:43:30.270038 progress 100 % (43 MB)
75 05:43:30.270559 43 MB downloaded in 0.64 s (68.53 MB/s)
76 05:43:30.271043 end: 1.2.1 http-download (duration 00:00:01) [common]
78 05:43:30.271875 end: 1.2 download-retry (duration 00:00:01) [common]
79 05:43:30.272197 start: 1.3 download-retry (timeout 00:09:59) [common]
80 05:43:30.272472 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 05:43:30.273073 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 05:43:30.273372 saving as /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 05:43:30.273587 total size: 53209 (0 MB)
84 05:43:30.273799 No compression specified
85 05:43:30.317513 progress 61 % (0 MB)
86 05:43:30.318379 progress 100 % (0 MB)
87 05:43:30.318962 0 MB downloaded in 0.05 s (1.12 MB/s)
88 05:43:30.319482 end: 1.3.1 http-download (duration 00:00:00) [common]
90 05:43:30.320424 end: 1.3 download-retry (duration 00:00:00) [common]
91 05:43:30.320723 start: 1.4 download-retry (timeout 00:09:59) [common]
92 05:43:30.321012 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 05:43:30.321489 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 05:43:30.321759 saving as /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/nfsrootfs/full.rootfs.tar
95 05:43:30.321986 total size: 120894716 (115 MB)
96 05:43:30.322213 Using unxz to decompress xz
97 05:43:30.360416 progress 0 % (0 MB)
98 05:43:31.193595 progress 5 % (5 MB)
99 05:43:32.021732 progress 10 % (11 MB)
100 05:43:32.817131 progress 15 % (17 MB)
101 05:43:33.550853 progress 20 % (23 MB)
102 05:43:34.143693 progress 25 % (28 MB)
103 05:43:34.969605 progress 30 % (34 MB)
104 05:43:35.765299 progress 35 % (40 MB)
105 05:43:36.127643 progress 40 % (46 MB)
106 05:43:36.502401 progress 45 % (51 MB)
107 05:43:37.222385 progress 50 % (57 MB)
108 05:43:38.115564 progress 55 % (63 MB)
109 05:43:38.901936 progress 60 % (69 MB)
110 05:43:39.662934 progress 65 % (74 MB)
111 05:43:40.478857 progress 70 % (80 MB)
112 05:43:41.476607 progress 75 % (86 MB)
113 05:43:42.273628 progress 80 % (92 MB)
114 05:43:43.044111 progress 85 % (98 MB)
115 05:43:43.896064 progress 90 % (103 MB)
116 05:43:44.671699 progress 95 % (109 MB)
117 05:43:45.504291 progress 100 % (115 MB)
118 05:43:45.516787 115 MB downloaded in 15.19 s (7.59 MB/s)
119 05:43:45.517722 end: 1.4.1 http-download (duration 00:00:15) [common]
121 05:43:45.519478 end: 1.4 download-retry (duration 00:00:15) [common]
122 05:43:45.520101 start: 1.5 download-retry (timeout 00:09:44) [common]
123 05:43:45.520674 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 05:43:45.521718 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/modules.tar.xz
125 05:43:45.522246 saving as /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/modules/modules.tar
126 05:43:45.522696 total size: 11611500 (11 MB)
127 05:43:45.523155 Using unxz to decompress xz
128 05:43:45.571412 progress 0 % (0 MB)
129 05:43:45.639374 progress 5 % (0 MB)
130 05:43:45.714640 progress 10 % (1 MB)
131 05:43:45.797041 progress 15 % (1 MB)
132 05:43:45.873313 progress 20 % (2 MB)
133 05:43:45.950744 progress 25 % (2 MB)
134 05:43:46.036617 progress 30 % (3 MB)
135 05:43:46.116871 progress 35 % (3 MB)
136 05:43:46.193986 progress 40 % (4 MB)
137 05:43:46.280937 progress 45 % (5 MB)
138 05:43:46.366905 progress 50 % (5 MB)
139 05:43:46.446178 progress 55 % (6 MB)
140 05:43:46.528896 progress 60 % (6 MB)
141 05:43:46.614729 progress 65 % (7 MB)
142 05:43:46.698114 progress 70 % (7 MB)
143 05:43:46.775511 progress 75 % (8 MB)
144 05:43:46.859699 progress 80 % (8 MB)
145 05:43:46.940385 progress 85 % (9 MB)
146 05:43:47.008328 progress 90 % (9 MB)
147 05:43:47.106963 progress 95 % (10 MB)
148 05:43:47.204024 progress 100 % (11 MB)
149 05:43:47.216043 11 MB downloaded in 1.69 s (6.54 MB/s)
150 05:43:47.216683 end: 1.5.1 http-download (duration 00:00:02) [common]
152 05:43:47.217631 end: 1.5 download-retry (duration 00:00:02) [common]
153 05:43:47.217957 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 05:43:47.218244 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 05:44:03.636846 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/927263/extract-nfsrootfs-3v3u83ve
156 05:44:03.637562 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 05:44:03.637920 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 05:44:03.638766 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz
159 05:44:03.639359 makedir: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin
160 05:44:03.639789 makedir: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/tests
161 05:44:03.640238 makedir: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/results
162 05:44:03.640657 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-add-keys
163 05:44:03.641334 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-add-sources
164 05:44:03.641998 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-background-process-start
165 05:44:03.642619 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-background-process-stop
166 05:44:03.643317 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-common-functions
167 05:44:03.643940 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-echo-ipv4
168 05:44:03.644605 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-install-packages
169 05:44:03.645208 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-installed-packages
170 05:44:03.645870 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-os-build
171 05:44:03.646532 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-probe-channel
172 05:44:03.647132 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-probe-ip
173 05:44:03.647741 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-target-ip
174 05:44:03.648428 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-target-mac
175 05:44:03.649043 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-target-storage
176 05:44:03.649655 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-case
177 05:44:03.650259 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-event
178 05:44:03.650900 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-feedback
179 05:44:03.651540 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-raise
180 05:44:03.652161 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-reference
181 05:44:03.652758 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-runner
182 05:44:03.653355 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-set
183 05:44:03.653936 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-test-shell
184 05:44:03.654533 Updating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-add-keys (debian)
185 05:44:03.655186 Updating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-add-sources (debian)
186 05:44:03.655799 Updating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-install-packages (debian)
187 05:44:03.656504 Updating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-installed-packages (debian)
188 05:44:03.657115 Updating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/bin/lava-os-build (debian)
189 05:44:03.657647 Creating /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/environment
190 05:44:03.658099 LAVA metadata
191 05:44:03.658419 - LAVA_JOB_ID=927263
192 05:44:03.658689 - LAVA_DISPATCHER_IP=192.168.6.2
193 05:44:03.659145 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 05:44:03.660365 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 05:44:03.660754 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 05:44:03.661019 skipped lava-vland-overlay
197 05:44:03.661314 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 05:44:03.661621 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 05:44:03.661896 skipped lava-multinode-overlay
200 05:44:03.662190 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 05:44:03.662495 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 05:44:03.662806 Loading test definitions
203 05:44:03.663144 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 05:44:03.663412 Using /lava-927263 at stage 0
205 05:44:03.664709 uuid=927263_1.6.2.4.1 testdef=None
206 05:44:03.665077 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 05:44:03.665403 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 05:44:03.667346 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 05:44:03.668341 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 05:44:03.670762 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 05:44:03.671773 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 05:44:03.674027 runner path: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/0/tests/0_timesync-off test_uuid 927263_1.6.2.4.1
215 05:44:03.674688 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 05:44:03.675683 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 05:44:03.675953 Using /lava-927263 at stage 0
219 05:44:03.676414 Fetching tests from https://github.com/kernelci/test-definitions.git
220 05:44:03.676776 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/0/tests/1_kselftest-kvm'
221 05:44:07.058731 Running '/usr/bin/git checkout kernelci.org
222 05:44:07.139231 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/0/tests/1_kselftest-kvm/automated/linux/kselftest/kselftest.yaml
223 05:44:07.140711 uuid=927263_1.6.2.4.5 testdef=None
224 05:44:07.141070 end: 1.6.2.4.5 git-repo-action (duration 00:00:03) [common]
226 05:44:07.141851 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 05:44:07.144751 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 05:44:07.145600 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 05:44:07.149387 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 05:44:07.150281 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 05:44:07.153936 runner path: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/0/tests/1_kselftest-kvm test_uuid 927263_1.6.2.4.5
234 05:44:07.154226 BOARD='meson-sm1-s905d3-libretech-cc'
235 05:44:07.154446 BRANCH='mainline'
236 05:44:07.154655 SKIPFILE='/dev/null'
237 05:44:07.154861 SKIP_INSTALL='True'
238 05:44:07.155067 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-299-g11066801dd4b7/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 05:44:07.155275 TST_CASENAME=''
240 05:44:07.155478 TST_CMDFILES='kvm'
241 05:44:07.156065 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 05:44:07.156892 Creating lava-test-runner.conf files
244 05:44:07.157112 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/927263/lava-overlay-0wvrmvyz/lava-927263/0 for stage 0
245 05:44:07.157507 - 0_timesync-off
246 05:44:07.157768 - 1_kselftest-kvm
247 05:44:07.158123 end: 1.6.2.4 test-definition (duration 00:00:03) [common]
248 05:44:07.158424 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 05:44:30.353737 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 05:44:30.354174 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 05:44:30.354444 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 05:44:30.354718 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 05:44:30.354987 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 05:44:30.971958 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 05:44:30.972471 start: 1.6.4 extract-modules (timeout 00:08:59) [common]
256 05:44:30.972743 extracting modules file /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/927263/extract-nfsrootfs-3v3u83ve
257 05:44:32.329367 extracting modules file /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk
258 05:44:33.725943 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 05:44:33.726443 start: 1.6.5 apply-overlay-tftp (timeout 00:08:56) [common]
260 05:44:33.726752 [common] Applying overlay to NFS
261 05:44:33.726984 [common] Applying overlay /var/lib/lava/dispatcher/tmp/927263/compress-overlay-5aga63qk/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/927263/extract-nfsrootfs-3v3u83ve
262 05:44:36.517330 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 05:44:36.517822 start: 1.6.6 prepare-kernel (timeout 00:08:53) [common]
264 05:44:36.518102 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:53) [common]
265 05:44:36.518339 Converting downloaded kernel to a uImage
266 05:44:36.518656 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/kernel/Image /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/kernel/uImage
267 05:44:37.002657 output: Image Name:
268 05:44:37.003086 output: Created: Sat Nov 2 05:44:36 2024
269 05:44:37.003299 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 05:44:37.003510 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 05:44:37.003715 output: Load Address: 01080000
272 05:44:37.003919 output: Entry Point: 01080000
273 05:44:37.004161 output:
274 05:44:37.004502 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 05:44:37.004777 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 05:44:37.005053 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 05:44:37.005315 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 05:44:37.005579 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 05:44:37.005839 Building ramdisk /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk
280 05:44:39.266822 >> 166823 blocks
281 05:44:46.971880 Adding RAMdisk u-boot header.
282 05:44:46.972560 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk.cpio.gz.uboot
283 05:44:47.224592 output: Image Name:
284 05:44:47.225024 output: Created: Sat Nov 2 05:44:46 2024
285 05:44:47.225564 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 05:44:47.226047 output: Data Size: 23435661 Bytes = 22886.39 KiB = 22.35 MiB
287 05:44:47.226516 output: Load Address: 00000000
288 05:44:47.226971 output: Entry Point: 00000000
289 05:44:47.227427 output:
290 05:44:47.228636 rename /var/lib/lava/dispatcher/tmp/927263/extract-overlay-ramdisk-mjuog310/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
291 05:44:47.229437 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 05:44:47.230063 end: 1.6 prepare-tftp-overlay (duration 00:01:00) [common]
293 05:44:47.230663 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 05:44:47.231188 No LXC device requested
295 05:44:47.231761 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 05:44:47.232388 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 05:44:47.232969 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 05:44:47.233441 Checking files for TFTP limit of 4294967296 bytes.
299 05:44:47.236396 end: 1 tftp-deploy (duration 00:01:18) [common]
300 05:44:47.237047 start: 2 uboot-action (timeout 00:05:00) [common]
301 05:44:47.237648 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 05:44:47.238214 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 05:44:47.238788 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 05:44:47.239384 Using kernel file from prepare-kernel: 927263/tftp-deploy-nlw92v3c/kernel/uImage
305 05:44:47.240115 substitutions:
306 05:44:47.240591 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 05:44:47.241054 - {DTB_ADDR}: 0x01070000
308 05:44:47.241504 - {DTB}: 927263/tftp-deploy-nlw92v3c/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 05:44:47.241961 - {INITRD}: 927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
310 05:44:47.242414 - {KERNEL_ADDR}: 0x01080000
311 05:44:47.242860 - {KERNEL}: 927263/tftp-deploy-nlw92v3c/kernel/uImage
312 05:44:47.243308 - {LAVA_MAC}: None
313 05:44:47.243798 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/927263/extract-nfsrootfs-3v3u83ve
314 05:44:47.244290 - {NFS_SERVER_IP}: 192.168.6.2
315 05:44:47.244741 - {PRESEED_CONFIG}: None
316 05:44:47.245183 - {PRESEED_LOCAL}: None
317 05:44:47.245630 - {RAMDISK_ADDR}: 0x08000000
318 05:44:47.246070 - {RAMDISK}: 927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
319 05:44:47.246513 - {ROOT_PART}: None
320 05:44:47.246952 - {ROOT}: None
321 05:44:47.247389 - {SERVER_IP}: 192.168.6.2
322 05:44:47.247825 - {TEE_ADDR}: 0x83000000
323 05:44:47.248297 - {TEE}: None
324 05:44:47.248739 Parsed boot commands:
325 05:44:47.249169 - setenv autoload no
326 05:44:47.249608 - setenv initrd_high 0xffffffff
327 05:44:47.250041 - setenv fdt_high 0xffffffff
328 05:44:47.250475 - dhcp
329 05:44:47.250908 - setenv serverip 192.168.6.2
330 05:44:47.251347 - tftpboot 0x01080000 927263/tftp-deploy-nlw92v3c/kernel/uImage
331 05:44:47.251785 - tftpboot 0x08000000 927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
332 05:44:47.252253 - tftpboot 0x01070000 927263/tftp-deploy-nlw92v3c/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 05:44:47.252700 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/927263/extract-nfsrootfs-3v3u83ve,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 05:44:47.253155 - bootm 0x01080000 0x08000000 0x01070000
335 05:44:47.253712 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 05:44:47.255385 start: 2.3 connect-device (timeout 00:05:00) [common]
338 05:44:47.255859 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 05:44:47.271435 Setting prompt string to ['lava-test: # ']
340 05:44:47.273074 end: 2.3 connect-device (duration 00:00:00) [common]
341 05:44:47.273764 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 05:44:47.274411 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 05:44:47.275008 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 05:44:47.276322 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 05:44:47.329933 >> OK - accepted request
346 05:44:47.332153 Returned 0 in 0 seconds
347 05:44:47.433360 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 05:44:47.435176 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 05:44:47.435810 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 05:44:47.436434 Setting prompt string to ['Hit any key to stop autoboot']
352 05:44:47.436945 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 05:44:47.438646 Trying 192.168.56.21...
354 05:44:47.439181 Connected to conserv1.
355 05:44:47.439652 Escape character is '^]'.
356 05:44:47.440152
357 05:44:47.440633 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 05:44:47.441113
359 05:44:55.055506 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 05:44:55.056215 bl2_stage_init 0x01
361 05:44:55.056711 bl2_stage_init 0x81
362 05:44:55.060987 hw id: 0x0000 - pwm id 0x01
363 05:44:55.061512 bl2_stage_init 0xc1
364 05:44:55.066560 bl2_stage_init 0x02
365 05:44:55.067056
366 05:44:55.067541 L0:00000000
367 05:44:55.068047 L1:00000703
368 05:44:55.068519 L2:00008067
369 05:44:55.068979 L3:15000000
370 05:44:55.072169 S1:00000000
371 05:44:55.072673 B2:20282000
372 05:44:55.073139 B1:a0f83180
373 05:44:55.073581
374 05:44:55.074022 TE: 68970
375 05:44:55.074463
376 05:44:55.077723 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 05:44:55.078198
378 05:44:55.083254 Board ID = 1
379 05:44:55.083724 Set cpu clk to 24M
380 05:44:55.084208 Set clk81 to 24M
381 05:44:55.086792 Use GP1_pll as DSU clk.
382 05:44:55.087250 DSU clk: 1200 Mhz
383 05:44:55.092372 CPU clk: 1200 MHz
384 05:44:55.092846 Set clk81 to 166.6M
385 05:44:55.097813 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 05:44:55.098285 board id: 1
387 05:44:55.107207 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 05:44:55.117888 fw parse done
389 05:44:55.122966 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 05:44:55.166607 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 05:44:55.177462 PIEI prepare done
392 05:44:55.177940 fastboot data load
393 05:44:55.178391 fastboot data verify
394 05:44:55.183036 verify result: 266
395 05:44:55.188697 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 05:44:55.189168 LPDDR4 probe
397 05:44:55.189616 ddr clk to 1584MHz
398 05:44:55.196647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 05:44:55.233912
400 05:44:55.234403 dmc_version 0001
401 05:44:55.240606 Check phy result
402 05:44:55.246482 INFO : End of CA training
403 05:44:55.246954 INFO : End of initialization
404 05:44:55.252087 INFO : Training has run successfully!
405 05:44:55.252558 Check phy result
406 05:44:55.257713 INFO : End of initialization
407 05:44:55.258179 INFO : End of read enable training
408 05:44:55.260996 INFO : End of fine write leveling
409 05:44:55.266524 INFO : End of Write leveling coarse delay
410 05:44:55.272196 INFO : Training has run successfully!
411 05:44:55.272669 Check phy result
412 05:44:55.273121 INFO : End of initialization
413 05:44:55.277718 INFO : End of read dq deskew training
414 05:44:55.283317 INFO : End of MPR read delay center optimization
415 05:44:55.283788 INFO : End of write delay center optimization
416 05:44:55.288948 INFO : End of read delay center optimization
417 05:44:55.294471 INFO : End of max read latency training
418 05:44:55.294978 INFO : Training has run successfully!
419 05:44:55.300108 1D training succeed
420 05:44:55.306092 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 05:44:55.353729 Check phy result
422 05:44:55.354258 INFO : End of initialization
423 05:44:55.376040 INFO : End of 2D read delay Voltage center optimization
424 05:44:55.395261 INFO : End of 2D read delay Voltage center optimization
425 05:44:55.447175 INFO : End of 2D write delay Voltage center optimization
426 05:44:55.496292 INFO : End of 2D write delay Voltage center optimization
427 05:44:55.501884 INFO : Training has run successfully!
428 05:44:55.502363
429 05:44:55.502820 channel==0
430 05:44:55.507498 RxClkDly_Margin_A0==78 ps 8
431 05:44:55.507969 TxDqDly_Margin_A0==98 ps 10
432 05:44:55.510855 RxClkDly_Margin_A1==88 ps 9
433 05:44:55.511320 TxDqDly_Margin_A1==98 ps 10
434 05:44:55.516344 TrainedVREFDQ_A0==74
435 05:44:55.516814 TrainedVREFDQ_A1==74
436 05:44:55.517262 VrefDac_Margin_A0==23
437 05:44:55.521929 DeviceVref_Margin_A0==40
438 05:44:55.522399 VrefDac_Margin_A1==23
439 05:44:55.527760 DeviceVref_Margin_A1==40
440 05:44:55.528256
441 05:44:55.528707
442 05:44:55.529148 channel==1
443 05:44:55.529582 RxClkDly_Margin_A0==78 ps 8
444 05:44:55.531058 TxDqDly_Margin_A0==98 ps 10
445 05:44:55.536812 RxClkDly_Margin_A1==78 ps 8
446 05:44:55.537286 TxDqDly_Margin_A1==88 ps 9
447 05:44:55.537733 TrainedVREFDQ_A0==75
448 05:44:55.542312 TrainedVREFDQ_A1==75
449 05:44:55.542795 VrefDac_Margin_A0==22
450 05:44:55.547784 DeviceVref_Margin_A0==39
451 05:44:55.548295 VrefDac_Margin_A1==22
452 05:44:55.548741 DeviceVref_Margin_A1==38
453 05:44:55.549182
454 05:44:55.553464 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 05:44:55.553948
456 05:44:55.587015 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
457 05:44:55.587682 2D training succeed
458 05:44:55.592745 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 05:44:55.598209 auto size-- 65535DDR cs0 size: 2048MB
460 05:44:55.598702 DDR cs1 size: 2048MB
461 05:44:55.603814 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 05:44:55.604315 cs0 DataBus test pass
463 05:44:55.604762 cs1 DataBus test pass
464 05:44:55.609416 cs0 AddrBus test pass
465 05:44:55.609891 cs1 AddrBus test pass
466 05:44:55.610338
467 05:44:55.615019 100bdlr_step_size ps== 478
468 05:44:55.615506 result report
469 05:44:55.615949 boot times 0Enable ddr reg access
470 05:44:55.624656 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 05:44:55.638485 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 05:44:56.293547 bl2z: ptr: 05129330, size: 00001e40
473 05:44:56.300325 0.0;M3 CHK:0;cm4_sp_mode 0
474 05:44:56.300830 MVN_1=0x00000000
475 05:44:56.301286 MVN_2=0x00000000
476 05:44:56.311802 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 05:44:56.312349 OPS=0x04
478 05:44:56.312807 ring efuse init
479 05:44:56.317509 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 05:44:56.317996 [0.017310 Inits done]
481 05:44:56.318440 secure task start!
482 05:44:56.324649 high task start!
483 05:44:56.325133 low task start!
484 05:44:56.325581 run into bl31
485 05:44:56.333203 NOTICE: BL31: v1.3(release):4fc40b1
486 05:44:56.341083 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 05:44:56.341738 NOTICE: BL31: G12A normal boot!
488 05:44:56.356712 NOTICE: BL31: BL33 decompress pass
489 05:44:56.362340 ERROR: Error initializing runtime service opteed_fast
490 05:44:59.110341 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 05:44:59.110996 bl2_stage_init 0x01
492 05:44:59.111466 bl2_stage_init 0x81
493 05:44:59.115957 hw id: 0x0000 - pwm id 0x01
494 05:44:59.116521 bl2_stage_init 0xc1
495 05:44:59.116970 bl2_stage_init 0x02
496 05:44:59.117417
497 05:44:59.121545 L0:00000000
498 05:44:59.122081 L1:00000703
499 05:44:59.122517 L2:00008067
500 05:44:59.122941 L3:15000000
501 05:44:59.123364 S1:00000000
502 05:44:59.127143 B2:20282000
503 05:44:59.127604 B1:a0f83180
504 05:44:59.128058
505 05:44:59.128490 TE: 74812
506 05:44:59.128913
507 05:44:59.132712 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 05:44:59.133176
509 05:44:59.138303 Board ID = 1
510 05:44:59.138767 Set cpu clk to 24M
511 05:44:59.139202 Set clk81 to 24M
512 05:44:59.143907 Use GP1_pll as DSU clk.
513 05:44:59.144393 DSU clk: 1200 Mhz
514 05:44:59.144822 CPU clk: 1200 MHz
515 05:44:59.145245 Set clk81 to 166.6M
516 05:44:59.155149 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 05:44:59.155613 board id: 1
518 05:44:59.161523 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 05:44:59.172437 fw parse done
520 05:44:59.178391 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 05:44:59.221606 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 05:44:59.232684 PIEI prepare done
523 05:44:59.233142 fastboot data load
524 05:44:59.233574 fastboot data verify
525 05:44:59.238272 verify result: 266
526 05:44:59.243869 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 05:44:59.244378 LPDDR4 probe
528 05:44:59.244811 ddr clk to 1584MHz
529 05:44:59.251831 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 05:44:59.289563
531 05:44:59.290039 dmc_version 0001
532 05:44:59.296605 Check phy result
533 05:44:59.302626 INFO : End of CA training
534 05:44:59.303180 INFO : End of initialization
535 05:44:59.308225 INFO : Training has run successfully!
536 05:44:59.308699 Check phy result
537 05:44:59.313801 INFO : End of initialization
538 05:44:59.314273 INFO : End of read enable training
539 05:44:59.319389 INFO : End of fine write leveling
540 05:44:59.325034 INFO : End of Write leveling coarse delay
541 05:44:59.325534 INFO : Training has run successfully!
542 05:44:59.325986 Check phy result
543 05:44:59.330630 INFO : End of initialization
544 05:44:59.331100 INFO : End of read dq deskew training
545 05:44:59.336227 INFO : End of MPR read delay center optimization
546 05:44:59.341794 INFO : End of write delay center optimization
547 05:44:59.347420 INFO : End of read delay center optimization
548 05:44:59.347889 INFO : End of max read latency training
549 05:44:59.353031 INFO : Training has run successfully!
550 05:44:59.353501 1D training succeed
551 05:44:59.362318 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 05:44:59.410517 Check phy result
553 05:44:59.411116 INFO : End of initialization
554 05:44:59.437841 INFO : End of 2D read delay Voltage center optimization
555 05:44:59.462079 INFO : End of 2D read delay Voltage center optimization
556 05:44:59.518777 INFO : End of 2D write delay Voltage center optimization
557 05:44:59.572757 INFO : End of 2D write delay Voltage center optimization
558 05:44:59.578326 INFO : Training has run successfully!
559 05:44:59.578806
560 05:44:59.579260 channel==0
561 05:44:59.583900 RxClkDly_Margin_A0==88 ps 9
562 05:44:59.584402 TxDqDly_Margin_A0==98 ps 10
563 05:44:59.587311 RxClkDly_Margin_A1==88 ps 9
564 05:44:59.587780 TxDqDly_Margin_A1==98 ps 10
565 05:44:59.592816 TrainedVREFDQ_A0==76
566 05:44:59.593290 TrainedVREFDQ_A1==75
567 05:44:59.593738 VrefDac_Margin_A0==22
568 05:44:59.598417 DeviceVref_Margin_A0==38
569 05:44:59.598889 VrefDac_Margin_A1==23
570 05:44:59.604035 DeviceVref_Margin_A1==39
571 05:44:59.604505
572 05:44:59.604956
573 05:44:59.605398 channel==1
574 05:44:59.605833 RxClkDly_Margin_A0==78 ps 8
575 05:44:59.609617 TxDqDly_Margin_A0==98 ps 10
576 05:44:59.610087 RxClkDly_Margin_A1==78 ps 8
577 05:44:59.615268 TxDqDly_Margin_A1==88 ps 9
578 05:44:59.615742 TrainedVREFDQ_A0==77
579 05:44:59.616225 TrainedVREFDQ_A1==75
580 05:44:59.620808 VrefDac_Margin_A0==22
581 05:44:59.621283 DeviceVref_Margin_A0==37
582 05:44:59.626404 VrefDac_Margin_A1==22
583 05:44:59.626874 DeviceVref_Margin_A1==38
584 05:44:59.627321
585 05:44:59.632040 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 05:44:59.632537
587 05:44:59.660070 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 05:44:59.665624 2D training succeed
589 05:44:59.671308 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 05:44:59.671814 auto size-- 65535DDR cs0 size: 2048MB
591 05:44:59.676788 DDR cs1 size: 2048MB
592 05:44:59.677264 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 05:44:59.682412 cs0 DataBus test pass
594 05:44:59.682909 cs1 DataBus test pass
595 05:44:59.683356 cs0 AddrBus test pass
596 05:44:59.688022 cs1 AddrBus test pass
597 05:44:59.688505
598 05:44:59.688957 100bdlr_step_size ps== 478
599 05:44:59.689406 result report
600 05:44:59.693602 boot times 0Enable ddr reg access
601 05:44:59.701151 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 05:44:59.715002 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 05:45:00.375854 bl2z: ptr: 05129330, size: 00001e40
604 05:45:00.384793 0.0;M3 CHK:0;cm4_sp_mode 0
605 05:45:00.385310 MVN_1=0x00000000
606 05:45:00.385760 MVN_2=0x00000000
607 05:45:00.396295 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 05:45:00.396779 OPS=0x04
609 05:45:00.397228 ring efuse init
610 05:45:00.401894 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 05:45:00.402388 [0.017354 Inits done]
612 05:45:00.402833 secure task start!
613 05:45:00.409588 high task start!
614 05:45:00.410069 low task start!
615 05:45:00.410513 run into bl31
616 05:45:00.418320 NOTICE: BL31: v1.3(release):4fc40b1
617 05:45:00.426038 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 05:45:00.426526 NOTICE: BL31: G12A normal boot!
619 05:45:00.444193 NOTICE: BL31: BL33 decompress pass
620 05:45:01.655042 ERROR: Error initia SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
621 05:45:01.655716 bl2_stage_init 0x01
622 05:45:01.656243 bl2_stage_init 0x81
623 05:45:01.660399 hw id: 0x0000 - pwm id 0x01
624 05:45:01.660896 bl2_stage_init 0xc1
625 05:45:01.665477 bl2_stage_init 0x02
626 05:45:01.665973
627 05:45:01.666436 L0:00000000
628 05:45:01.666904 L1:00000703
629 05:45:01.667358 L2:00008067
630 05:45:01.671052 L3:15000000
631 05:45:01.671539 S1:00000000
632 05:45:01.672012 B2:20282000
633 05:45:01.672463 B1:a0f83180
634 05:45:01.672902
635 05:45:01.673335 TE: 68234
636 05:45:01.673775
637 05:45:01.676609 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
638 05:45:01.682250
639 05:45:01.682733 Board ID = 1
640 05:45:01.683179 Set cpu clk to 24M
641 05:45:01.683620 Set clk81 to 24M
642 05:45:01.687841 Use GP1_pll as DSU clk.
643 05:45:01.688350 DSU clk: 1200 Mhz
644 05:45:01.688797 CPU clk: 1200 MHz
645 05:45:01.693415 Set clk81 to 166.6M
646 05:45:01.699010 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
647 05:45:01.699494 board id: 1
648 05:45:01.706682 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
649 05:45:01.717353 fw parse done
650 05:45:01.723330 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
651 05:45:01.765819 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
652 05:45:01.776779 PIEI prepare done
653 05:45:01.777258 fastboot data load
654 05:45:01.777708 fastboot data verify
655 05:45:01.782374 verify result: 266
656 05:45:01.787966 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
657 05:45:01.788483 LPDDR4 probe
658 05:45:01.788927 ddr clk to 1584MHz
659 05:45:01.795933 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
660 05:45:01.833258
661 05:45:01.833750 dmc_version 0001
662 05:45:01.839847 Check phy result
663 05:45:01.845800 INFO : End of CA training
664 05:45:01.846274 INFO : End of initialization
665 05:45:01.851408 INFO : Training has run successfully!
666 05:45:01.851883 Check phy result
667 05:45:01.857009 INFO : End of initialization
668 05:45:01.857488 INFO : End of read enable training
669 05:45:01.860342 INFO : End of fine write leveling
670 05:45:01.865943 INFO : End of Write leveling coarse delay
671 05:45:01.871587 INFO : Training has run successfully!
672 05:45:01.872083 Check phy result
673 05:45:01.872550 INFO : End of initialization
674 05:45:01.877119 INFO : End of read dq deskew training
675 05:45:01.882694 INFO : End of MPR read delay center optimization
676 05:45:01.883169 INFO : End of write delay center optimization
677 05:45:01.888326 INFO : End of read delay center optimization
678 05:45:01.893910 INFO : End of max read latency training
679 05:45:01.894389 INFO : Training has run successfully!
680 05:45:01.899594 1D training succeed
681 05:45:01.905410 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
682 05:45:01.952948 Check phy result
683 05:45:01.953475 INFO : End of initialization
684 05:45:01.975304 INFO : End of 2D read delay Voltage center optimization
685 05:45:01.994469 INFO : End of 2D read delay Voltage center optimization
686 05:45:02.046318 INFO : End of 2D write delay Voltage center optimization
687 05:45:02.095643 INFO : End of 2D write delay Voltage center optimization
688 05:45:02.101088 INFO : Training has run successfully!
689 05:45:02.101578
690 05:45:02.102038 channel==0
691 05:45:02.106676 RxClkDly_Margin_A0==78 ps 8
692 05:45:02.107151 TxDqDly_Margin_A0==98 ps 10
693 05:45:02.112375 RxClkDly_Margin_A1==88 ps 9
694 05:45:02.112856 TxDqDly_Margin_A1==98 ps 10
695 05:45:02.113310 TrainedVREFDQ_A0==74
696 05:45:02.117889 TrainedVREFDQ_A1==75
697 05:45:02.118371 VrefDac_Margin_A0==23
698 05:45:02.118824 DeviceVref_Margin_A0==40
699 05:45:02.123611 VrefDac_Margin_A1==23
700 05:45:02.124110 DeviceVref_Margin_A1==39
701 05:45:02.124561
702 05:45:02.125007
703 05:45:02.129082 channel==1
704 05:45:02.129555 RxClkDly_Margin_A0==88 ps 9
705 05:45:02.129999 TxDqDly_Margin_A0==98 ps 10
706 05:45:02.134692 RxClkDly_Margin_A1==88 ps 9
707 05:45:02.135197 TxDqDly_Margin_A1==88 ps 9
708 05:45:02.140290 TrainedVREFDQ_A0==78
709 05:45:02.140797 TrainedVREFDQ_A1==75
710 05:45:02.141253 VrefDac_Margin_A0==23
711 05:45:02.145892 DeviceVref_Margin_A0==36
712 05:45:02.146369 VrefDac_Margin_A1==22
713 05:45:02.151631 DeviceVref_Margin_A1==39
714 05:45:02.152131
715 05:45:02.152579 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
716 05:45:02.153023
717 05:45:02.185110 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000017 00000015 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
718 05:45:02.185640 2D training succeed
719 05:45:02.190694 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
720 05:45:02.196288 auto size-- 65535DDR cs0 size: 2048MB
721 05:45:02.196761 DDR cs1 size: 2048MB
722 05:45:02.201887 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
723 05:45:02.202367 cs0 DataBus test pass
724 05:45:02.207626 cs1 DataBus test pass
725 05:45:02.208133 cs0 AddrBus test pass
726 05:45:02.208586 cs1 AddrBus test pass
727 05:45:02.209027
728 05:45:02.213091 100bdlr_step_size ps== 478
729 05:45:02.213575 result report
730 05:45:02.218685 boot times 0Enable ddr reg access
731 05:45:02.223951 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
732 05:45:02.237783 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
733 05:45:02.892884 bl2z: ptr: 05129330, size: 00001e40
734 05:45:02.900089 0.0;M3 CHK:0;cm4_sp_mode 0
735 05:45:02.900601 MVN_1=0x00000000
736 05:45:02.901052 MVN_2=0x00000000
737 05:45:02.911652 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
738 05:45:02.912177 OPS=0x04
739 05:45:02.912646 ring efuse init
740 05:45:02.914586 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
741 05:45:02.920759 [0.017319 Inits done]
742 05:45:02.921273 secure task start!
743 05:45:02.921721 high task start!
744 05:45:02.922162 low task start!
745 05:45:02.924997 run into bl31
746 05:45:02.933694 NOTICE: BL31: v1.3(release):4fc40b1
747 05:45:02.941371 NOTICE: BL31: Built : 15:57:33, May 22 2019
748 05:45:02.941853 NOTICE: BL31: G12A normal boot!
749 05:45:02.956811 NOTICE: BL31: BL33 decompress pass
750 05:45:02.962522 ERROR: Error initializing runtime service opteed_fast
751 05:45:03.757961
752 05:45:03.758611
753 05:45:03.763297 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
754 05:45:03.763791
755 05:45:03.766846 Model: Libre Computer AML-S905D3-CC Solitude
756 05:45:03.913789 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
757 05:45:03.929163 DRAM: 2 GiB (effective 3.8 GiB)
758 05:45:04.030102 Core: 406 devices, 33 uclasses, devicetree: separate
759 05:45:04.036022 WDT: Not starting watchdog@f0d0
760 05:45:04.061079 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
761 05:45:04.073381 Loading Environment from FAT... Card did not respond to voltage select! : -110
762 05:45:04.077879 ** Bad device specification mmc 0 **
763 05:45:04.088390 Card did not respond to voltage select! : -110
764 05:45:04.096028 ** Bad device specification mmc 0 **
765 05:45:04.096507 Couldn't find partition mmc 0
766 05:45:04.104302 Card did not respond to voltage select! : -110
767 05:45:04.109832 ** Bad device specification mmc 0 **
768 05:45:04.110310 Couldn't find partition mmc 0
769 05:45:04.114902 Error: could not access storage.
770 05:45:04.412378 Net: eth0: ethernet@ff3f0000
771 05:45:04.413016 starting USB...
772 05:45:04.657185 Bus usb@ff500000: Register 3000140 NbrPorts 3
773 05:45:04.657862 Starting the controller
774 05:45:04.664053 USB XHCI 1.10
775 05:45:06.220525 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
776 05:45:06.228841 scanning usb for storage devices... 0 Storage Device(s) found
778 05:45:06.280390 Hit any key to stop autoboot: 1
779 05:45:06.281219 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
780 05:45:06.281852 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
781 05:45:06.282375 Setting prompt string to ['=>']
782 05:45:06.282914 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
783 05:45:06.294841 0
784 05:45:06.295753 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
786 05:45:06.397099 => setenv autoload no
787 05:45:06.397802 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
788 05:45:06.403047 setenv autoload no
790 05:45:06.504579 => setenv initrd_high 0xffffffff
791 05:45:06.505240 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
792 05:45:06.509507 setenv initrd_high 0xffffffff
794 05:45:06.610986 => setenv fdt_high 0xffffffff
795 05:45:06.611654 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
796 05:45:06.616039 setenv fdt_high 0xffffffff
798 05:45:06.717546 => dhcp
799 05:45:06.718178 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
800 05:45:06.722268 dhcp
801 05:45:07.227639 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
802 05:45:07.228265 Speed: 1000, full duplex
803 05:45:07.228734 BOOTP broadcast 1
804 05:45:07.476026 BOOTP broadcast 2
805 05:45:07.501396 DHCP client bound to address 192.168.6.21 (273 ms)
807 05:45:07.602992 => setenv serverip 192.168.6.2
808 05:45:07.603733 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 05:45:07.608314 setenv serverip 192.168.6.2
811 05:45:07.709821 => tftpboot 0x01080000 927263/tftp-deploy-nlw92v3c/kernel/uImage
812 05:45:07.710496 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
813 05:45:07.717267 tftpboot 0x01080000 927263/tftp-deploy-nlw92v3c/kernel/uImage
814 05:45:07.717769 Speed: 1000, full duplex
815 05:45:07.718225 Using ethernet@ff3f0000 device
816 05:45:07.722742 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 05:45:07.728238 Filename '927263/tftp-deploy-nlw92v3c/kernel/uImage'.
818 05:45:07.732076 Load address: 0x1080000
819 05:45:10.644229 Loading: *################################################## 43.6 MiB
820 05:45:10.644923 15 MiB/s
821 05:45:10.645384 done
822 05:45:10.648641 Bytes transferred = 45713984 (2b98a40 hex)
824 05:45:10.750463 => tftpboot 0x08000000 927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
825 05:45:10.751309 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
826 05:45:10.761092 tftpboot 0x08000000 927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot
827 05:45:10.761788 Speed: 1000, full duplex
828 05:45:10.762237 Using ethernet@ff3f0000 device
829 05:45:10.763834 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 05:45:10.773454 Filename '927263/tftp-deploy-nlw92v3c/ramdisk/ramdisk.cpio.gz.uboot'.
831 05:45:10.774050 Load address: 0x8000000
832 05:45:12.306515 Loading: *################################################# UDP wrong checksum 00000005 0000a1c2
833 05:45:17.306285 T UDP wrong checksum 00000005 0000a1c2
834 05:45:22.741968 T UDP wrong checksum 000000ff 00004309
835 05:45:22.775382 UDP wrong checksum 000000ff 0000c7fb
836 05:45:27.309113 T UDP wrong checksum 00000005 0000a1c2
837 05:45:35.196648 T UDP wrong checksum 000000ff 0000c1ca
838 05:45:35.236092 UDP wrong checksum 000000ff 00005dbd
839 05:45:47.312467 T T UDP wrong checksum 00000005 0000a1c2
840 05:46:07.316842 T T T T
841 05:46:07.317472 Retry count exceeded; starting again
843 05:46:07.319160 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
846 05:46:07.321358 end: 2.4 uboot-commands (duration 00:01:20) [common]
848 05:46:07.322895 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
850 05:46:07.324018 end: 2 uboot-action (duration 00:01:20) [common]
852 05:46:07.325885 Cleaning after the job
853 05:46:07.326485 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/ramdisk
854 05:46:07.327843 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/kernel
855 05:46:07.360272 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/dtb
856 05:46:07.361551 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/nfsrootfs
857 05:46:07.483775 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/927263/tftp-deploy-nlw92v3c/modules
858 05:46:07.505859 start: 4.1 power-off (timeout 00:00:30) [common]
859 05:46:07.506518 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
860 05:46:07.537699 >> OK - accepted request
861 05:46:07.539698 Returned 0 in 0 seconds
862 05:46:07.640562 end: 4.1 power-off (duration 00:00:00) [common]
864 05:46:07.641702 start: 4.2 read-feedback (timeout 00:10:00) [common]
865 05:46:07.642357 Listened to connection for namespace 'common' for up to 1s
866 05:46:08.643266 Finalising connection for namespace 'common'
867 05:46:08.643690 Disconnecting from shell: Finalise
868 05:46:08.643973 =>
869 05:46:08.744750 end: 4.2 read-feedback (duration 00:00:01) [common]
870 05:46:08.745240 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/927263
871 05:46:11.835184 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/927263
872 05:46:11.835785 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.