Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:24:23.088008 lava-dispatcher, installed at version: 2024.01
2 20:24:23.088803 start: 0 validate
3 20:24:23.089271 Start time: 2024-11-03 20:24:23.089242+00:00 (UTC)
4 20:24:23.089847 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:24:23.090375 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:24:23.130639 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:24:23.131223 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 20:24:23.165495 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:24:23.166130 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:24:23.201276 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:24:23.201787 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:24:23.240031 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:24:23.240603 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 20:24:23.280459 validate duration: 0.19
16 20:24:23.281356 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:24:23.281737 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:24:23.282073 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:24:23.282689 Not decompressing ramdisk as can be used compressed.
20 20:24:23.283155 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:24:23.283461 saving as /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/ramdisk/initrd.cpio.gz
22 20:24:23.283769 total size: 5628182 (5 MB)
23 20:24:23.325585 progress 0 % (0 MB)
24 20:24:23.333582 progress 5 % (0 MB)
25 20:24:23.341765 progress 10 % (0 MB)
26 20:24:23.349173 progress 15 % (0 MB)
27 20:24:23.354824 progress 20 % (1 MB)
28 20:24:23.358647 progress 25 % (1 MB)
29 20:24:23.363053 progress 30 % (1 MB)
30 20:24:23.367212 progress 35 % (1 MB)
31 20:24:23.371020 progress 40 % (2 MB)
32 20:24:23.375188 progress 45 % (2 MB)
33 20:24:23.378978 progress 50 % (2 MB)
34 20:24:23.383199 progress 55 % (2 MB)
35 20:24:23.387509 progress 60 % (3 MB)
36 20:24:23.391251 progress 65 % (3 MB)
37 20:24:23.395400 progress 70 % (3 MB)
38 20:24:23.399182 progress 75 % (4 MB)
39 20:24:23.403299 progress 80 % (4 MB)
40 20:24:23.407013 progress 85 % (4 MB)
41 20:24:23.411183 progress 90 % (4 MB)
42 20:24:23.415441 progress 95 % (5 MB)
43 20:24:23.418758 progress 100 % (5 MB)
44 20:24:23.419409 5 MB downloaded in 0.14 s (39.58 MB/s)
45 20:24:23.419960 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:24:23.420883 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:24:23.421190 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:24:23.421467 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:24:23.421946 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig+debug/gcc-12/kernel/Image
51 20:24:23.422198 saving as /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/kernel/Image
52 20:24:23.422411 total size: 169943552 (162 MB)
53 20:24:23.422625 No compression specified
54 20:24:23.462110 progress 0 % (0 MB)
55 20:24:23.566204 progress 5 % (8 MB)
56 20:24:23.667115 progress 10 % (16 MB)
57 20:24:23.768742 progress 15 % (24 MB)
58 20:24:23.872892 progress 20 % (32 MB)
59 20:24:23.980040 progress 25 % (40 MB)
60 20:24:24.087960 progress 30 % (48 MB)
61 20:24:24.191435 progress 35 % (56 MB)
62 20:24:24.294016 progress 40 % (64 MB)
63 20:24:24.396067 progress 45 % (72 MB)
64 20:24:24.498928 progress 50 % (81 MB)
65 20:24:24.601681 progress 55 % (89 MB)
66 20:24:24.704349 progress 60 % (97 MB)
67 20:24:24.805891 progress 65 % (105 MB)
68 20:24:24.907937 progress 70 % (113 MB)
69 20:24:25.010459 progress 75 % (121 MB)
70 20:24:25.114529 progress 80 % (129 MB)
71 20:24:25.216483 progress 85 % (137 MB)
72 20:24:25.318843 progress 90 % (145 MB)
73 20:24:25.421951 progress 95 % (153 MB)
74 20:24:25.525008 progress 100 % (162 MB)
75 20:24:25.525615 162 MB downloaded in 2.10 s (77.06 MB/s)
76 20:24:25.526090 end: 1.2.1 http-download (duration 00:00:02) [common]
78 20:24:25.526918 end: 1.2 download-retry (duration 00:00:02) [common]
79 20:24:25.527194 start: 1.3 download-retry (timeout 00:09:58) [common]
80 20:24:25.527460 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 20:24:25.527939 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 20:24:25.528249 saving as /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 20:24:25.528461 total size: 53209 (0 MB)
84 20:24:25.528672 No compression specified
85 20:24:25.563234 progress 61 % (0 MB)
86 20:24:25.564124 progress 100 % (0 MB)
87 20:24:25.564686 0 MB downloaded in 0.04 s (1.40 MB/s)
88 20:24:25.565159 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:24:25.565978 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:24:25.566241 start: 1.4 download-retry (timeout 00:09:58) [common]
92 20:24:25.566504 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 20:24:25.566979 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:24:25.567225 saving as /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/nfsrootfs/full.rootfs.tar
95 20:24:25.567433 total size: 107552908 (102 MB)
96 20:24:25.567649 Using unxz to decompress xz
97 20:24:25.600083 progress 0 % (0 MB)
98 20:24:26.250179 progress 5 % (5 MB)
99 20:24:26.972777 progress 10 % (10 MB)
100 20:24:27.701282 progress 15 % (15 MB)
101 20:24:28.493604 progress 20 % (20 MB)
102 20:24:29.062862 progress 25 % (25 MB)
103 20:24:29.686888 progress 30 % (30 MB)
104 20:24:30.430735 progress 35 % (35 MB)
105 20:24:30.781468 progress 40 % (41 MB)
106 20:24:31.214601 progress 45 % (46 MB)
107 20:24:31.906839 progress 50 % (51 MB)
108 20:24:32.591400 progress 55 % (56 MB)
109 20:24:33.345133 progress 60 % (61 MB)
110 20:24:34.105874 progress 65 % (66 MB)
111 20:24:34.886734 progress 70 % (71 MB)
112 20:24:35.650006 progress 75 % (76 MB)
113 20:24:36.327621 progress 80 % (82 MB)
114 20:24:37.034469 progress 85 % (87 MB)
115 20:24:37.778667 progress 90 % (92 MB)
116 20:24:38.502705 progress 95 % (97 MB)
117 20:24:39.249742 progress 100 % (102 MB)
118 20:24:39.262830 102 MB downloaded in 13.70 s (7.49 MB/s)
119 20:24:39.263466 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:24:39.264692 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:24:39.265265 start: 1.5 download-retry (timeout 00:09:44) [common]
123 20:24:39.265828 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 20:24:39.266726 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 20:24:39.267246 saving as /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/modules/modules.tar
126 20:24:39.267692 total size: 27642748 (26 MB)
127 20:24:39.268190 Using unxz to decompress xz
128 20:24:39.315141 progress 0 % (0 MB)
129 20:24:39.511238 progress 5 % (1 MB)
130 20:24:39.711868 progress 10 % (2 MB)
131 20:24:39.944061 progress 15 % (3 MB)
132 20:24:40.185009 progress 20 % (5 MB)
133 20:24:40.386116 progress 25 % (6 MB)
134 20:24:40.590890 progress 30 % (7 MB)
135 20:24:40.793992 progress 35 % (9 MB)
136 20:24:40.989574 progress 40 % (10 MB)
137 20:24:41.182038 progress 45 % (11 MB)
138 20:24:41.393055 progress 50 % (13 MB)
139 20:24:41.591269 progress 55 % (14 MB)
140 20:24:41.809362 progress 60 % (15 MB)
141 20:24:42.014678 progress 65 % (17 MB)
142 20:24:42.214393 progress 70 % (18 MB)
143 20:24:42.421587 progress 75 % (19 MB)
144 20:24:42.622518 progress 80 % (21 MB)
145 20:24:42.832962 progress 85 % (22 MB)
146 20:24:43.038731 progress 90 % (23 MB)
147 20:24:43.235621 progress 95 % (25 MB)
148 20:24:43.434644 progress 100 % (26 MB)
149 20:24:43.447821 26 MB downloaded in 4.18 s (6.31 MB/s)
150 20:24:43.448816 end: 1.5.1 http-download (duration 00:00:04) [common]
152 20:24:43.450631 end: 1.5 download-retry (duration 00:00:04) [common]
153 20:24:43.451222 start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
154 20:24:43.451809 start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
155 20:24:53.349049 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/930626/extract-nfsrootfs-r5ey2re5
156 20:24:53.349629 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:24:53.349928 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 20:24:53.350548 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b
159 20:24:53.351042 makedir: /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin
160 20:24:53.351420 makedir: /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/tests
161 20:24:53.351780 makedir: /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/results
162 20:24:53.352178 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-add-keys
163 20:24:53.352810 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-add-sources
164 20:24:53.353408 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-background-process-start
165 20:24:53.353990 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-background-process-stop
166 20:24:53.354567 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-common-functions
167 20:24:53.355134 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-echo-ipv4
168 20:24:53.355788 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-install-packages
169 20:24:53.361013 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-installed-packages
170 20:24:53.361680 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-os-build
171 20:24:53.362220 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-probe-channel
172 20:24:53.362780 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-probe-ip
173 20:24:53.363318 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-target-ip
174 20:24:53.363865 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-target-mac
175 20:24:53.364477 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-target-storage
176 20:24:53.365141 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-case
177 20:24:53.365768 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-event
178 20:24:53.366378 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-feedback
179 20:24:53.366890 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-raise
180 20:24:53.367476 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-reference
181 20:24:53.368034 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-runner
182 20:24:53.368590 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-set
183 20:24:53.369134 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-test-shell
184 20:24:53.369666 Updating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-install-packages (oe)
185 20:24:53.370225 Updating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/bin/lava-installed-packages (oe)
186 20:24:53.370713 Creating /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/environment
187 20:24:53.371287 LAVA metadata
188 20:24:53.371700 - LAVA_JOB_ID=930626
189 20:24:53.372026 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:24:53.372566 start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
191 20:24:53.373938 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:24:53.374400 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
193 20:24:53.374694 skipped lava-vland-overlay
194 20:24:53.375024 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:24:53.375375 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
196 20:24:53.375670 skipped lava-multinode-overlay
197 20:24:53.376025 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:24:53.376393 start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
199 20:24:53.376751 Loading test definitions
200 20:24:53.377131 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
201 20:24:53.377435 Using /lava-930626 at stage 0
202 20:24:53.379046 uuid=930626_1.6.2.4.1 testdef=None
203 20:24:53.379462 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:24:53.379821 start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
205 20:24:53.382559 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:24:53.383588 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
208 20:24:53.386602 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:24:53.387683 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
211 20:24:53.390560 runner path: /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/0/tests/0_dmesg test_uuid 930626_1.6.2.4.1
212 20:24:53.391346 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:24:53.392398 Creating lava-test-runner.conf files
215 20:24:53.392680 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/930626/lava-overlay-_mry3z_b/lava-930626/0 for stage 0
216 20:24:53.393341 - 0_dmesg
217 20:24:53.393868 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:24:53.394264 start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
219 20:24:53.423820 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:24:53.424407 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
221 20:24:53.424773 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:24:53.425127 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:24:53.425487 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
224 20:24:54.069968 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:24:54.070444 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 20:24:54.070695 extracting modules file /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930626/extract-nfsrootfs-r5ey2re5
227 20:24:55.783765 extracting modules file /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk
228 20:24:57.511285 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:24:57.511762 start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
230 20:24:57.512060 [common] Applying overlay to NFS
231 20:24:57.512278 [common] Applying overlay /var/lib/lava/dispatcher/tmp/930626/compress-overlay-xy87uhm9/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/930626/extract-nfsrootfs-r5ey2re5
232 20:24:57.541314 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:24:57.541684 start: 1.6.6 prepare-kernel (timeout 00:09:26) [common]
234 20:24:57.541979 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:26) [common]
235 20:24:57.542214 Converting downloaded kernel to a uImage
236 20:24:57.542513 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/kernel/Image /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/kernel/uImage
237 20:24:59.191722 output: Image Name:
238 20:24:59.192170 output: Created: Sun Nov 3 20:24:57 2024
239 20:24:59.192382 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:24:59.192585 output: Data Size: 169943552 Bytes = 165960.50 KiB = 162.07 MiB
241 20:24:59.192787 output: Load Address: 01080000
242 20:24:59.192984 output: Entry Point: 01080000
243 20:24:59.193180 output:
244 20:24:59.193512 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 20:24:59.193776 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 20:24:59.194040 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 20:24:59.194289 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:24:59.194541 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 20:24:59.194794 Building ramdisk /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk
250 20:25:04.469825 >> 426759 blocks
251 20:25:22.177847 Adding RAMdisk u-boot header.
252 20:25:22.178282 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk.cpio.gz.uboot
253 20:25:22.729705 output: Image Name:
254 20:25:22.730121 output: Created: Sun Nov 3 20:25:22 2024
255 20:25:22.730369 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:25:22.730590 output: Data Size: 50958828 Bytes = 49764.48 KiB = 48.60 MiB
257 20:25:22.730801 output: Load Address: 00000000
258 20:25:22.731022 output: Entry Point: 00000000
259 20:25:22.731250 output:
260 20:25:22.731936 rename /var/lib/lava/dispatcher/tmp/930626/extract-overlay-ramdisk-iz1wboa7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/ramdisk/ramdisk.cpio.gz.uboot
261 20:25:22.732426 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 20:25:22.732762 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 20:25:22.733081 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:01) [common]
264 20:25:22.733365 No LXC device requested
265 20:25:22.733675 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:25:22.733985 start: 1.8 deploy-device-env (timeout 00:09:01) [common]
267 20:25:22.734288 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:25:22.734535 Checking files for TFTP limit of 4294967296 bytes.
269 20:25:22.736127 end: 1 tftp-deploy (duration 00:00:59) [common]
270 20:25:22.736498 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:25:22.736850 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:25:22.737147 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:25:22.737445 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:25:22.737763 Using kernel file from prepare-kernel: 930626/tftp-deploy-czsspw30/kernel/uImage
275 20:25:22.738133 substitutions:
276 20:25:22.738371 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:25:22.738592 - {DTB_ADDR}: 0x01070000
278 20:25:22.738813 - {DTB}: 930626/tftp-deploy-czsspw30/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 20:25:22.739036 - {INITRD}: 930626/tftp-deploy-czsspw30/ramdisk/ramdisk.cpio.gz.uboot
280 20:25:22.739268 - {KERNEL_ADDR}: 0x01080000
281 20:25:22.739488 - {KERNEL}: 930626/tftp-deploy-czsspw30/kernel/uImage
282 20:25:22.739711 - {LAVA_MAC}: None
283 20:25:22.739958 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/930626/extract-nfsrootfs-r5ey2re5
284 20:25:22.740218 - {NFS_SERVER_IP}: 192.168.6.2
285 20:25:22.740448 - {PRESEED_CONFIG}: None
286 20:25:22.740670 - {PRESEED_LOCAL}: None
287 20:25:22.740901 - {RAMDISK_ADDR}: 0x08000000
288 20:25:22.741123 - {RAMDISK}: 930626/tftp-deploy-czsspw30/ramdisk/ramdisk.cpio.gz.uboot
289 20:25:22.741345 - {ROOT_PART}: None
290 20:25:22.741573 - {ROOT}: None
291 20:25:22.741793 - {SERVER_IP}: 192.168.6.2
292 20:25:22.742010 - {TEE_ADDR}: 0x83000000
293 20:25:22.742235 - {TEE}: None
294 20:25:22.742458 Parsed boot commands:
295 20:25:22.742668 - setenv autoload no
296 20:25:22.742889 - setenv initrd_high 0xffffffff
297 20:25:22.743109 - setenv fdt_high 0xffffffff
298 20:25:22.743325 - dhcp
299 20:25:22.743538 - setenv serverip 192.168.6.2
300 20:25:22.743757 - tftpboot 0x01080000 930626/tftp-deploy-czsspw30/kernel/uImage
301 20:25:22.744007 - tftpboot 0x08000000 930626/tftp-deploy-czsspw30/ramdisk/ramdisk.cpio.gz.uboot
302 20:25:22.744235 - tftpboot 0x01070000 930626/tftp-deploy-czsspw30/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 20:25:22.744447 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/930626/extract-nfsrootfs-r5ey2re5,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:25:22.744672 - bootm 0x01080000 0x08000000 0x01070000
305 20:25:22.744973 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:25:22.745857 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:25:22.746142 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 20:25:22.758299 Setting prompt string to ['lava-test: # ']
310 20:25:22.759258 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:25:22.759657 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:25:22.760049 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:25:22.760401 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:25:22.761067 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 20:25:22.797030 >> OK - accepted request
316 20:25:22.799321 Returned 0 in 0 seconds
317 20:25:22.900310 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:25:22.901985 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:25:22.902545 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:25:22.903067 Setting prompt string to ['Hit any key to stop autoboot']
322 20:25:22.903524 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:25:22.905094 Trying 192.168.56.21...
324 20:25:22.905569 Connected to conserv1.
325 20:25:22.905988 Escape character is '^]'.
326 20:25:22.906395
327 20:25:22.906813 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 20:25:22.907230
329 20:25:30.202511 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 20:25:30.202952 bl2_stage_init 0x01
331 20:25:30.203180 bl2_stage_init 0x81
332 20:25:30.207708 hw id: 0x0000 - pwm id 0x01
333 20:25:30.208046 bl2_stage_init 0xc1
334 20:25:30.212148 bl2_stage_init 0x02
335 20:25:30.212432
336 20:25:30.212663 L0:00000000
337 20:25:30.212875 L1:00000703
338 20:25:30.213095 L2:00008067
339 20:25:30.217593 L3:15000000
340 20:25:30.217883 S1:00000000
341 20:25:30.218110 B2:20282000
342 20:25:30.218320 B1:a0f83180
343 20:25:30.218525
344 20:25:30.218733 TE: 69758
345 20:25:30.223134
346 20:25:30.228848 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 20:25:30.229151
348 20:25:30.229368 Board ID = 1
349 20:25:30.229579 Set cpu clk to 24M
350 20:25:30.229787 Set clk81 to 24M
351 20:25:30.234371 Use GP1_pll as DSU clk.
352 20:25:30.234659 DSU clk: 1200 Mhz
353 20:25:30.234870 CPU clk: 1200 MHz
354 20:25:30.239949 Set clk81 to 166.6M
355 20:25:30.245586 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 20:25:30.245897 board id: 1
357 20:25:30.254078 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:25:30.264954 fw parse done
359 20:25:30.270933 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:25:30.314053 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:25:30.325176 PIEI prepare done
362 20:25:30.325489 fastboot data load
363 20:25:30.325700 fastboot data verify
364 20:25:30.330847 verify result: 266
365 20:25:30.336341 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 20:25:30.336625 LPDDR4 probe
367 20:25:30.336830 ddr clk to 1584MHz
368 20:25:30.344314 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:25:30.382075
370 20:25:30.382444 dmc_version 0001
371 20:25:30.389123 Check phy result
372 20:25:30.395104 INFO : End of CA training
373 20:25:30.395400 INFO : End of initialization
374 20:25:30.400677 INFO : Training has run successfully!
375 20:25:30.400967 Check phy result
376 20:25:30.406298 INFO : End of initialization
377 20:25:30.406588 INFO : End of read enable training
378 20:25:30.411932 INFO : End of fine write leveling
379 20:25:30.417466 INFO : End of Write leveling coarse delay
380 20:25:30.417749 INFO : Training has run successfully!
381 20:25:30.417963 Check phy result
382 20:25:30.423077 INFO : End of initialization
383 20:25:30.423354 INFO : End of read dq deskew training
384 20:25:30.428726 INFO : End of MPR read delay center optimization
385 20:25:30.434306 INFO : End of write delay center optimization
386 20:25:30.439864 INFO : End of read delay center optimization
387 20:25:30.440193 INFO : End of max read latency training
388 20:25:30.445518 INFO : Training has run successfully!
389 20:25:30.445800 1D training succeed
390 20:25:30.454803 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:25:30.503088 Check phy result
392 20:25:30.503523 INFO : End of initialization
393 20:25:30.530416 INFO : End of 2D read delay Voltage center optimization
394 20:25:30.554544 INFO : End of 2D read delay Voltage center optimization
395 20:25:30.611209 INFO : End of 2D write delay Voltage center optimization
396 20:25:30.665585 INFO : End of 2D write delay Voltage center optimization
397 20:25:30.673171 INFO : Training has run successfully!
398 20:25:30.673628
399 20:25:30.673876 channel==0
400 20:25:30.678121 RxClkDly_Margin_A0==78 ps 8
401 20:25:30.690444 TxDqDly_Margin_A0==98 ps 10
402 20:25:30.692772 RxClkDly_Margin_A1==88 ps 9
403 20:25:30.693371 TxDqDly_Margin_A1==88 ps 9
404 20:25:30.693864 TrainedVREFDQ_A0==74
405 20:25:30.694342 TrainedVREFDQ_A1==75
406 20:25:30.694774 VrefDac_Margin_A0==25
407 20:25:30.695183 DeviceVref_Margin_A0==40
408 20:25:30.695465 VrefDac_Margin_A1==23
409 20:25:30.696654 DeviceVref_Margin_A1==39
410 20:25:30.697258
411 20:25:30.697729
412 20:25:30.698181 channel==1
413 20:25:30.698610 RxClkDly_Margin_A0==78 ps 8
414 20:25:30.702102 TxDqDly_Margin_A0==98 ps 10
415 20:25:30.702513 RxClkDly_Margin_A1==78 ps 8
416 20:25:30.707672 TxDqDly_Margin_A1==88 ps 9
417 20:25:30.708086 TrainedVREFDQ_A0==78
418 20:25:30.708316 TrainedVREFDQ_A1==77
419 20:25:30.713092 VrefDac_Margin_A0==22
420 20:25:30.713361 DeviceVref_Margin_A0==36
421 20:25:30.718777 VrefDac_Margin_A1==22
422 20:25:30.719282 DeviceVref_Margin_A1==37
423 20:25:30.719746
424 20:25:30.724284 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:25:30.724794
426 20:25:30.752284 soc_vref_reg_value 0x 00000019 00000018 00000019 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 20:25:30.757929 2D training succeed
428 20:25:30.763499 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:25:30.764023 auto size-- 65535DDR cs0 size: 2048MB
430 20:25:30.769114 DDR cs1 size: 2048MB
431 20:25:30.769630 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:25:30.774728 cs0 DataBus test pass
433 20:25:30.775217 cs1 DataBus test pass
434 20:25:30.775659 cs0 AddrBus test pass
435 20:25:30.780300 cs1 AddrBus test pass
436 20:25:30.780781
437 20:25:30.781223 100bdlr_step_size ps== 471
438 20:25:30.781674 result report
439 20:25:30.785899 boot times 0Enable ddr reg access
440 20:25:30.793493 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:25:30.807332 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 20:25:31.466102 bl2z: ptr: 05129330, size: 00001e40
443 20:25:31.474375 0.0;M3 CHK:0;cm4_sp_mode 0
444 20:25:31.474911 MVN_1=0x00000000
445 20:25:31.475379 MVN_2=0x00000000
446 20:25:31.485924 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 20:25:31.486472 OPS=0x04
448 20:25:31.486940 ring efuse init
449 20:25:31.488944 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 20:25:31.495097 [0.017354 Inits done]
451 20:25:31.495582 secure task start!
452 20:25:31.496084 high task start!
453 20:25:31.496543 low task start!
454 20:25:31.499292 run into bl31
455 20:25:31.507907 NOTICE: BL31: v1.3(release):4fc40b1
456 20:25:31.515734 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 20:25:31.516272 NOTICE: BL31: G12A normal boot!
458 20:25:31.531246 NOTICE: BL31: BL33 decompress pass
459 20:25:31.536980 ERROR: Error initializing runtime service opteed_fast
460 20:25:34.251338 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 20:25:34.251789 bl2_stage_init 0x01
462 20:25:34.252045 bl2_stage_init 0x81
463 20:25:34.256754 hw id: 0x0000 - pwm id 0x01
464 20:25:34.257214 bl2_stage_init 0xc1
465 20:25:34.262348 bl2_stage_init 0x02
466 20:25:34.262786
467 20:25:34.263191 L0:00000000
468 20:25:34.263584 L1:00000703
469 20:25:34.263976 L2:00008067
470 20:25:34.264450 L3:15000000
471 20:25:34.268048 S1:00000000
472 20:25:34.268482 B2:20282000
473 20:25:34.268874 B1:a0f83180
474 20:25:34.269257
475 20:25:34.269643 TE: 70350
476 20:25:34.270028
477 20:25:34.273553 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 20:25:34.273987
479 20:25:34.279250 Board ID = 1
480 20:25:34.279676 Set cpu clk to 24M
481 20:25:34.280097 Set clk81 to 24M
482 20:25:34.284723 Use GP1_pll as DSU clk.
483 20:25:34.285156 DSU clk: 1200 Mhz
484 20:25:34.285546 CPU clk: 1200 MHz
485 20:25:34.290317 Set clk81 to 166.6M
486 20:25:34.296023 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 20:25:34.296459 board id: 1
488 20:25:34.303217 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 20:25:34.314070 fw parse done
490 20:25:34.320023 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 20:25:34.363131 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 20:25:34.374379 PIEI prepare done
493 20:25:34.374807 fastboot data load
494 20:25:34.375200 fastboot data verify
495 20:25:34.379881 verify result: 266
496 20:25:34.385503 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 20:25:34.385934 LPDDR4 probe
498 20:25:34.386326 ddr clk to 1584MHz
499 20:25:34.393469 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 20:25:34.431224
501 20:25:34.431700 dmc_version 0001
502 20:25:34.437389 Check phy result
503 20:25:34.444315 INFO : End of CA training
504 20:25:34.444658 INFO : End of initialization
505 20:25:34.449801 INFO : Training has run successfully!
506 20:25:34.450077 Check phy result
507 20:25:34.455377 INFO : End of initialization
508 20:25:34.455651 INFO : End of read enable training
509 20:25:34.461086 INFO : End of fine write leveling
510 20:25:34.466600 INFO : End of Write leveling coarse delay
511 20:25:34.467074 INFO : Training has run successfully!
512 20:25:34.467491 Check phy result
513 20:25:34.472315 INFO : End of initialization
514 20:25:34.472782 INFO : End of read dq deskew training
515 20:25:34.477822 INFO : End of MPR read delay center optimization
516 20:25:34.483426 INFO : End of write delay center optimization
517 20:25:34.489069 INFO : End of read delay center optimization
518 20:25:34.489541 INFO : End of max read latency training
519 20:25:34.494576 INFO : Training has run successfully!
520 20:25:34.495036 1D training succeed
521 20:25:34.503803 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 20:25:34.552205 Check phy result
523 20:25:34.552694 INFO : End of initialization
524 20:25:34.579563 INFO : End of 2D read delay Voltage center optimization
525 20:25:34.603714 INFO : End of 2D read delay Voltage center optimization
526 20:25:34.660368 INFO : End of 2D write delay Voltage center optimization
527 20:25:34.714467 INFO : End of 2D write delay Voltage center optimization
528 20:25:34.719876 INFO : Training has run successfully!
529 20:25:34.720391
530 20:25:34.720813 channel==0
531 20:25:34.725505 RxClkDly_Margin_A0==88 ps 9
532 20:25:34.725955 TxDqDly_Margin_A0==98 ps 10
533 20:25:34.731105 RxClkDly_Margin_A1==88 ps 9
534 20:25:34.731544 TxDqDly_Margin_A1==98 ps 10
535 20:25:34.731957 TrainedVREFDQ_A0==74
536 20:25:34.736648 TrainedVREFDQ_A1==75
537 20:25:34.737108 VrefDac_Margin_A0==25
538 20:25:34.737521 DeviceVref_Margin_A0==40
539 20:25:34.742415 VrefDac_Margin_A1==23
540 20:25:34.742873 DeviceVref_Margin_A1==39
541 20:25:34.743280
542 20:25:34.743688
543 20:25:34.747832 channel==1
544 20:25:34.748318 RxClkDly_Margin_A0==88 ps 9
545 20:25:34.748741 TxDqDly_Margin_A0==98 ps 10
546 20:25:34.753441 RxClkDly_Margin_A1==78 ps 8
547 20:25:34.753887 TxDqDly_Margin_A1==98 ps 10
548 20:25:34.759100 TrainedVREFDQ_A0==78
549 20:25:34.759548 TrainedVREFDQ_A1==78
550 20:25:34.759963 VrefDac_Margin_A0==23
551 20:25:34.764648 DeviceVref_Margin_A0==36
552 20:25:34.765094 VrefDac_Margin_A1==22
553 20:25:34.770405 DeviceVref_Margin_A1==36
554 20:25:34.770905
555 20:25:34.771327 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 20:25:34.771733
557 20:25:34.803878 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 20:25:34.804453 2D training succeed
559 20:25:34.809482 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 20:25:34.815147 auto size-- 65535DDR cs0 size: 2048MB
561 20:25:34.815588 DDR cs1 size: 2048MB
562 20:25:34.820662 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 20:25:34.821112 cs0 DataBus test pass
564 20:25:34.826388 cs1 DataBus test pass
565 20:25:34.826830 cs0 AddrBus test pass
566 20:25:34.827237 cs1 AddrBus test pass
567 20:25:34.827637
568 20:25:34.831908 100bdlr_step_size ps== 471
569 20:25:34.832404 result report
570 20:25:34.837487 boot times 0Enable ddr reg access
571 20:25:34.842807 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 20:25:34.856075 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 20:25:35.516157 bl2z: ptr: 05129330, size: 00001e40
574 20:25:35.523710 0.0;M3 CHK:0;cm4_sp_mode 0
575 20:25:35.524231 MVN_1=0x00000000
576 20:25:35.524648 MVN_2=0x00000000
577 20:25:35.535208 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 20:25:35.535576 OPS=0x04
579 20:25:35.535817 ring efuse init
580 20:25:35.540846 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 20:25:35.541193 [0.017354 Inits done]
582 20:25:35.541423 secure task start!
583 20:25:35.548302 high task start!
584 20:25:35.548670 low task start!
585 20:25:35.548890 run into bl31
586 20:25:35.557079 NOTICE: BL31: v1.3(release):4fc40b1
587 20:25:35.564723 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 20:25:35.565109 NOTICE: BL31: G12A normal boot!
589 20:25:35.580289 NOTICE: BL31: BL33 decompress pass
590 20:25:35.585990 ERROR: Error initializing runtime service opteed_fast
591 20:25:36.952469 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 20:25:36.952905 bl2_stage_init 0x01
593 20:25:36.953132 bl2_stage_init 0x81
594 20:25:36.958035 hw id: 0x0000 - pwm id 0x01
595 20:25:36.958542 bl2_stage_init 0xc1
596 20:25:36.963360 bl2_stage_init 0x02
597 20:25:36.963822
598 20:25:36.964161 L0:00000000
599 20:25:36.964389 L1:00000703
600 20:25:36.964591 L2:00008067
601 20:25:36.964792 L3:15000000
602 20:25:36.968912 S1:00000000
603 20:25:36.969324 B2:20282000
604 20:25:36.969630 B1:a0f83180
605 20:25:36.969925
606 20:25:36.970219 TE: 71103
607 20:25:36.970518
608 20:25:36.974532 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 20:25:36.980107
610 20:25:36.980431 Board ID = 1
611 20:25:36.980651 Set cpu clk to 24M
612 20:25:36.980859 Set clk81 to 24M
613 20:25:36.983600 Use GP1_pll as DSU clk.
614 20:25:36.983879 DSU clk: 1200 Mhz
615 20:25:36.989084 CPU clk: 1200 MHz
616 20:25:36.989396 Set clk81 to 166.6M
617 20:25:36.994730 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 20:25:36.995005 board id: 1
619 20:25:37.004240 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 20:25:37.015288 fw parse done
621 20:25:37.021832 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 20:25:37.064508 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 20:25:37.075622 PIEI prepare done
624 20:25:37.076284 fastboot data load
625 20:25:37.076734 fastboot data verify
626 20:25:37.081178 verify result: 266
627 20:25:37.086690 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 20:25:37.087206 LPDDR4 probe
629 20:25:37.087651 ddr clk to 1584MHz
630 20:25:37.094732 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 20:25:37.132508
632 20:25:37.133121 dmc_version 0001
633 20:25:37.139444 Check phy result
634 20:25:37.145482 INFO : End of CA training
635 20:25:37.145970 INFO : End of initialization
636 20:25:37.151028 INFO : Training has run successfully!
637 20:25:37.151495 Check phy result
638 20:25:37.156591 INFO : End of initialization
639 20:25:37.157071 INFO : End of read enable training
640 20:25:37.162236 INFO : End of fine write leveling
641 20:25:37.167828 INFO : End of Write leveling coarse delay
642 20:25:37.168319 INFO : Training has run successfully!
643 20:25:37.168728 Check phy result
644 20:25:37.173469 INFO : End of initialization
645 20:25:37.173964 INFO : End of read dq deskew training
646 20:25:37.179114 INFO : End of MPR read delay center optimization
647 20:25:37.184780 INFO : End of write delay center optimization
648 20:25:37.190324 INFO : End of read delay center optimization
649 20:25:37.190908 INFO : End of max read latency training
650 20:25:37.195965 INFO : Training has run successfully!
651 20:25:37.196573 1D training succeed
652 20:25:37.204957 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 20:25:37.253426 Check phy result
654 20:25:37.254022 INFO : End of initialization
655 20:25:37.280803 INFO : End of 2D read delay Voltage center optimization
656 20:25:37.304172 INFO : End of 2D read delay Voltage center optimization
657 20:25:37.361691 INFO : End of 2D write delay Voltage center optimization
658 20:25:37.415600 INFO : End of 2D write delay Voltage center optimization
659 20:25:37.421159 INFO : Training has run successfully!
660 20:25:37.421721
661 20:25:37.422191 channel==0
662 20:25:37.426828 RxClkDly_Margin_A0==78 ps 8
663 20:25:37.427375 TxDqDly_Margin_A0==98 ps 10
664 20:25:37.430098 RxClkDly_Margin_A1==88 ps 9
665 20:25:37.430639 TxDqDly_Margin_A1==98 ps 10
666 20:25:37.435645 TrainedVREFDQ_A0==74
667 20:25:37.436221 TrainedVREFDQ_A1==75
668 20:25:37.441161 VrefDac_Margin_A0==24
669 20:25:37.441696 DeviceVref_Margin_A0==40
670 20:25:37.442153 VrefDac_Margin_A1==23
671 20:25:37.446791 DeviceVref_Margin_A1==39
672 20:25:37.447344
673 20:25:37.447808
674 20:25:37.448305 channel==1
675 20:25:37.448752 RxClkDly_Margin_A0==88 ps 9
676 20:25:37.450595 TxDqDly_Margin_A0==98 ps 10
677 20:25:37.455213 RxClkDly_Margin_A1==78 ps 8
678 20:25:37.455755 TxDqDly_Margin_A1==88 ps 9
679 20:25:37.460773 TrainedVREFDQ_A0==78
680 20:25:37.461337 TrainedVREFDQ_A1==75
681 20:25:37.461800 VrefDac_Margin_A0==23
682 20:25:37.466486 DeviceVref_Margin_A0==36
683 20:25:37.467031 VrefDac_Margin_A1==22
684 20:25:37.467493 DeviceVref_Margin_A1==39
685 20:25:37.467944
686 20:25:37.472057 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 20:25:37.472607
688 20:25:37.505507 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
689 20:25:37.506144 2D training succeed
690 20:25:37.511107 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 20:25:37.516759 auto size-- 65535DDR cs0 size: 2048MB
692 20:25:37.517319 DDR cs1 size: 2048MB
693 20:25:37.522325 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 20:25:37.522882 cs0 DataBus test pass
695 20:25:37.527928 cs1 DataBus test pass
696 20:25:37.528517 cs0 AddrBus test pass
697 20:25:37.528980 cs1 AddrBus test pass
698 20:25:37.529424
699 20:25:37.533549 100bdlr_step_size ps== 485
700 20:25:37.534136 result report
701 20:25:37.534588 boot times 0Enable ddr reg access
702 20:25:37.543952 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 20:25:37.557775 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 20:25:38.217072 bl2z: ptr: 05129330, size: 00001e40
705 20:25:38.225093 0.0;M3 CHK:0;cm4_sp_mode 0
706 20:25:38.225574 MVN_1=0x00000000
707 20:25:38.225814 MVN_2=0x00000000
708 20:25:38.236566 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 20:25:38.236918 OPS=0x04
710 20:25:38.237128 ring efuse init
711 20:25:38.239542 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 20:25:38.246034 [0.017354 Inits done]
713 20:25:38.246506 secure task start!
714 20:25:38.246868 high task start!
715 20:25:38.247185 low task start!
716 20:25:38.250214 run into bl31
717 20:25:38.258859 NOTICE: BL31: v1.3(release):4fc40b1
718 20:25:38.266677 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 20:25:38.267012 NOTICE: BL31: G12A normal boot!
720 20:25:38.282186 NOTICE: BL31: BL33 decompress pass
721 20:25:38.287886 ERROR: Error initializing runtime service opteed_fast
722 20:25:39.084226
723 20:25:39.084843
724 20:25:39.088777 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 20:25:39.089271
726 20:25:39.092198 Model: Libre Computer AML-S905D3-CC Solitude
727 20:25:39.239170 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 20:25:39.254186 DRAM: 2 GiB (effective 3.8 GiB)
729 20:25:39.355482 Core: 406 devices, 33 uclasses, devicetree: separate
730 20:25:39.361320 WDT: Not starting watchdog@f0d0
731 20:25:39.386511 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 20:25:39.398721 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 20:25:39.403720 ** Bad device specification mmc 0 **
734 20:25:39.413803 Card did not respond to voltage select! : -110
735 20:25:39.421402 ** Bad device specification mmc 0 **
736 20:25:39.421879 Couldn't find partition mmc 0
737 20:25:39.429797 Card did not respond to voltage select! : -110
738 20:25:39.435249 ** Bad device specification mmc 0 **
739 20:25:39.435717 Couldn't find partition mmc 0
740 20:25:39.440302 Error: could not access storage.
741 20:25:39.736903 Net: eth0: ethernet@ff3f0000
742 20:25:39.737327 starting USB...
743 20:25:39.982586 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 20:25:39.983224 Starting the controller
745 20:25:39.989520 USB XHCI 1.10
746 20:25:41.543543 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 20:25:41.551930 scanning usb for storage devices... 0 Storage Device(s) found
749 20:25:41.603489 Hit any key to stop autoboot: 1
750 20:25:41.604592 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 20:25:41.605225 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 20:25:41.605723 Setting prompt string to ['=>']
753 20:25:41.606213 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 20:25:41.617988 0
755 20:25:41.618904 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 20:25:41.720153 => setenv autoload no
758 20:25:41.721200 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 20:25:41.726247 setenv autoload no
761 20:25:41.827733 => setenv initrd_high 0xffffffff
762 20:25:41.828701 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 20:25:41.832940 setenv initrd_high 0xffffffff
765 20:25:41.934405 => setenv fdt_high 0xffffffff
766 20:25:41.935299 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 20:25:41.939588 setenv fdt_high 0xffffffff
769 20:25:42.041117 => dhcp
770 20:25:42.042015 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 20:25:42.046046 dhcp
772 20:25:42.901827 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 20:25:42.902257 Speed: 1000, full duplex
774 20:25:42.902515 BOOTP broadcast 1
775 20:25:42.911095 DHCP client bound to address 192.168.6.21 (9 ms)
777 20:25:43.012320 => setenv serverip 192.168.6.2
778 20:25:43.013061 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
779 20:25:43.017517 setenv serverip 192.168.6.2
781 20:25:43.118627 => tftpboot 0x01080000 930626/tftp-deploy-czsspw30/kernel/uImage
782 20:25:43.119314 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
783 20:25:43.125949 tftpboot 0x01080000 930626/tftp-deploy-czsspw30/kernel/uImage
784 20:25:43.126296 Speed: 1000, full duplex
785 20:25:43.126538 Using ethernet@ff3f0000 device
786 20:25:43.131393 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 20:25:43.136825 Filename '930626/tftp-deploy-czsspw30/kernel/uImage'.
788 20:25:43.140829 Load address: 0x1080000
789 20:25:47.334822 Loading: *###################
790 20:25:47.335445 TFTP error: trying to overwrite reserved memory...
792 20:25:47.336860 end: 2.4.3 bootloader-commands (duration 00:00:06) [common]
795 20:25:47.338644 end: 2.4 uboot-commands (duration 00:00:25) [common]
797 20:25:47.340073 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
799 20:25:47.341209 end: 2 uboot-action (duration 00:00:25) [common]
801 20:25:47.342862 Cleaning after the job
802 20:25:47.343419 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/ramdisk
803 20:25:47.371355 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/kernel
804 20:25:47.383626 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/dtb
805 20:25:47.384896 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/nfsrootfs
806 20:25:47.410448 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930626/tftp-deploy-czsspw30/modules
807 20:25:47.423343 start: 4.1 power-off (timeout 00:00:30) [common]
808 20:25:47.424037 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
809 20:25:47.455929 >> OK - accepted request
810 20:25:47.458043 Returned 0 in 0 seconds
811 20:25:47.558801 end: 4.1 power-off (duration 00:00:00) [common]
813 20:25:47.559800 start: 4.2 read-feedback (timeout 00:10:00) [common]
814 20:25:47.560490 Listened to connection for namespace 'common' for up to 1s
815 20:25:48.561466 Finalising connection for namespace 'common'
816 20:25:48.562203 Disconnecting from shell: Finalise
817 20:25:48.562710 =>
818 20:25:48.663677 end: 4.2 read-feedback (duration 00:00:01) [common]
819 20:25:48.664409 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/930626
820 20:25:50.542744 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/930626
821 20:25:50.543356 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.