Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:20:23.327532 lava-dispatcher, installed at version: 2024.01
2 20:20:23.328347 start: 0 validate
3 20:20:23.328829 Start time: 2024-11-03 20:20:23.328797+00:00 (UTC)
4 20:20:23.329390 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:20:23.329926 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:20:23.365727 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:20:23.366250 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:20:23.399035 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:20:23.399670 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 20:20:23.428986 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:20:23.429477 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:20:23.459975 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:20:23.460492 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 20:20:23.497185 validate duration: 0.17
16 20:20:23.498137 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:20:23.498533 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:20:23.498865 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:20:23.499447 Not decompressing ramdisk as can be used compressed.
20 20:20:23.499890 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 20:20:23.500190 saving as /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/ramdisk/initrd.cpio.gz
22 20:20:23.500460 total size: 5628182 (5 MB)
23 20:20:23.534818 progress 0 % (0 MB)
24 20:20:23.539182 progress 5 % (0 MB)
25 20:20:23.543188 progress 10 % (0 MB)
26 20:20:23.546729 progress 15 % (0 MB)
27 20:20:23.550632 progress 20 % (1 MB)
28 20:20:23.554085 progress 25 % (1 MB)
29 20:20:23.558007 progress 30 % (1 MB)
30 20:20:23.561996 progress 35 % (1 MB)
31 20:20:23.565524 progress 40 % (2 MB)
32 20:20:23.569482 progress 45 % (2 MB)
33 20:20:23.572999 progress 50 % (2 MB)
34 20:20:23.576915 progress 55 % (2 MB)
35 20:20:23.580799 progress 60 % (3 MB)
36 20:20:23.584305 progress 65 % (3 MB)
37 20:20:23.588093 progress 70 % (3 MB)
38 20:20:23.591509 progress 75 % (4 MB)
39 20:20:23.595326 progress 80 % (4 MB)
40 20:20:23.598682 progress 85 % (4 MB)
41 20:20:23.602277 progress 90 % (4 MB)
42 20:20:23.605896 progress 95 % (5 MB)
43 20:20:23.609204 progress 100 % (5 MB)
44 20:20:23.609867 5 MB downloaded in 0.11 s (49.07 MB/s)
45 20:20:23.610423 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:20:23.611309 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:20:23.611599 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:20:23.611868 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:20:23.612383 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/kernel/Image
51 20:20:23.612633 saving as /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/kernel/Image
52 20:20:23.612843 total size: 45713920 (43 MB)
53 20:20:23.613053 No compression specified
54 20:20:23.652538 progress 0 % (0 MB)
55 20:20:23.680368 progress 5 % (2 MB)
56 20:20:23.707977 progress 10 % (4 MB)
57 20:20:23.735178 progress 15 % (6 MB)
58 20:20:23.762361 progress 20 % (8 MB)
59 20:20:23.789226 progress 25 % (10 MB)
60 20:20:23.816340 progress 30 % (13 MB)
61 20:20:23.843443 progress 35 % (15 MB)
62 20:20:23.870619 progress 40 % (17 MB)
63 20:20:23.897508 progress 45 % (19 MB)
64 20:20:23.924304 progress 50 % (21 MB)
65 20:20:23.951274 progress 55 % (24 MB)
66 20:20:23.979332 progress 60 % (26 MB)
67 20:20:24.005830 progress 65 % (28 MB)
68 20:20:24.032767 progress 70 % (30 MB)
69 20:20:24.060214 progress 75 % (32 MB)
70 20:20:24.087815 progress 80 % (34 MB)
71 20:20:24.114952 progress 85 % (37 MB)
72 20:20:24.142261 progress 90 % (39 MB)
73 20:20:24.169939 progress 95 % (41 MB)
74 20:20:24.197163 progress 100 % (43 MB)
75 20:20:24.197714 43 MB downloaded in 0.58 s (74.54 MB/s)
76 20:20:24.198193 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:20:24.199018 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:20:24.199295 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:20:24.199561 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:20:24.200047 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 20:20:24.200330 saving as /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/dtb/meson-g12b-a311d-libretech-cc.dtb
83 20:20:24.200540 total size: 54703 (0 MB)
84 20:20:24.200750 No compression specified
85 20:20:24.236674 progress 59 % (0 MB)
86 20:20:24.237547 progress 100 % (0 MB)
87 20:20:24.238136 0 MB downloaded in 0.04 s (1.39 MB/s)
88 20:20:24.238701 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:20:24.239623 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:20:24.239935 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:20:24.240267 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:20:24.240786 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 20:20:24.241056 saving as /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/nfsrootfs/full.rootfs.tar
95 20:20:24.241329 total size: 107552908 (102 MB)
96 20:20:24.241572 Using unxz to decompress xz
97 20:20:24.278062 progress 0 % (0 MB)
98 20:20:24.936345 progress 5 % (5 MB)
99 20:20:25.665392 progress 10 % (10 MB)
100 20:20:26.392872 progress 15 % (15 MB)
101 20:20:27.155273 progress 20 % (20 MB)
102 20:20:27.724696 progress 25 % (25 MB)
103 20:20:28.344751 progress 30 % (30 MB)
104 20:20:29.086428 progress 35 % (35 MB)
105 20:20:29.431642 progress 40 % (41 MB)
106 20:20:29.902966 progress 45 % (46 MB)
107 20:20:30.596855 progress 50 % (51 MB)
108 20:20:31.281150 progress 55 % (56 MB)
109 20:20:32.031776 progress 60 % (61 MB)
110 20:20:32.782232 progress 65 % (66 MB)
111 20:20:33.518401 progress 70 % (71 MB)
112 20:20:34.294363 progress 75 % (76 MB)
113 20:20:34.972840 progress 80 % (82 MB)
114 20:20:35.687745 progress 85 % (87 MB)
115 20:20:36.425711 progress 90 % (92 MB)
116 20:20:37.139020 progress 95 % (97 MB)
117 20:20:37.898150 progress 100 % (102 MB)
118 20:20:37.911340 102 MB downloaded in 13.67 s (7.50 MB/s)
119 20:20:37.911962 end: 1.4.1 http-download (duration 00:00:14) [common]
121 20:20:37.913833 end: 1.4 download-retry (duration 00:00:14) [common]
122 20:20:37.914404 start: 1.5 download-retry (timeout 00:09:46) [common]
123 20:20:37.914968 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 20:20:37.916091 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/modules.tar.xz
125 20:20:37.916623 saving as /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/modules/modules.tar
126 20:20:37.917081 total size: 11615340 (11 MB)
127 20:20:37.917551 Using unxz to decompress xz
128 20:20:37.959422 progress 0 % (0 MB)
129 20:20:38.028891 progress 5 % (0 MB)
130 20:20:38.105968 progress 10 % (1 MB)
131 20:20:38.206874 progress 15 % (1 MB)
132 20:20:38.299564 progress 20 % (2 MB)
133 20:20:38.379976 progress 25 % (2 MB)
134 20:20:38.456046 progress 30 % (3 MB)
135 20:20:38.535520 progress 35 % (3 MB)
136 20:20:38.609509 progress 40 % (4 MB)
137 20:20:38.686216 progress 45 % (5 MB)
138 20:20:38.771439 progress 50 % (5 MB)
139 20:20:38.866229 progress 55 % (6 MB)
140 20:20:38.952811 progress 60 % (6 MB)
141 20:20:39.035923 progress 65 % (7 MB)
142 20:20:39.116460 progress 70 % (7 MB)
143 20:20:39.195333 progress 75 % (8 MB)
144 20:20:39.280808 progress 80 % (8 MB)
145 20:20:39.361981 progress 85 % (9 MB)
146 20:20:39.446033 progress 90 % (10 MB)
147 20:20:39.521500 progress 95 % (10 MB)
148 20:20:39.599268 progress 100 % (11 MB)
149 20:20:39.613007 11 MB downloaded in 1.70 s (6.53 MB/s)
150 20:20:39.613665 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:20:39.614502 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:20:39.614771 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 20:20:39.615040 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 20:20:49.396627 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/930523/extract-nfsrootfs-rjt7aoop
156 20:20:49.397218 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 20:20:49.397514 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 20:20:49.398417 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3
159 20:20:49.398917 makedir: /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin
160 20:20:49.399313 makedir: /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/tests
161 20:20:49.399664 makedir: /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/results
162 20:20:49.400040 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-add-keys
163 20:20:49.400615 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-add-sources
164 20:20:49.401136 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-background-process-start
165 20:20:49.401641 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-background-process-stop
166 20:20:49.402190 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-common-functions
167 20:20:49.402695 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-echo-ipv4
168 20:20:49.403205 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-install-packages
169 20:20:49.403764 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-installed-packages
170 20:20:49.404312 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-os-build
171 20:20:49.404816 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-probe-channel
172 20:20:49.405307 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-probe-ip
173 20:20:49.405795 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-target-ip
174 20:20:49.406306 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-target-mac
175 20:20:49.406857 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-target-storage
176 20:20:49.407369 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-case
177 20:20:49.407868 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-event
178 20:20:49.408500 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-feedback
179 20:20:49.409015 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-raise
180 20:20:49.409507 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-reference
181 20:20:49.409995 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-runner
182 20:20:49.410515 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-set
183 20:20:49.411046 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-test-shell
184 20:20:49.411554 Updating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-install-packages (oe)
185 20:20:49.412151 Updating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/bin/lava-installed-packages (oe)
186 20:20:49.412628 Creating /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/environment
187 20:20:49.413020 LAVA metadata
188 20:20:49.413286 - LAVA_JOB_ID=930523
189 20:20:49.413506 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:20:49.413884 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 20:20:49.414865 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:20:49.415195 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 20:20:49.415412 skipped lava-vland-overlay
194 20:20:49.415661 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:20:49.415925 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 20:20:49.416176 skipped lava-multinode-overlay
197 20:20:49.416428 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:20:49.416686 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 20:20:49.416939 Loading test definitions
200 20:20:49.417221 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 20:20:49.417446 Using /lava-930523 at stage 0
202 20:20:49.418670 uuid=930523_1.6.2.4.1 testdef=None
203 20:20:49.419000 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:20:49.419272 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 20:20:49.421161 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:20:49.421967 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 20:20:49.424321 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:20:49.425175 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 20:20:49.427378 runner path: /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/0/tests/0_dmesg test_uuid 930523_1.6.2.4.1
212 20:20:49.427966 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:20:49.428773 Creating lava-test-runner.conf files
215 20:20:49.428976 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/930523/lava-overlay-xa9wjrc3/lava-930523/0 for stage 0
216 20:20:49.429395 - 0_dmesg
217 20:20:49.429769 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:20:49.430052 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 20:20:49.451779 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:20:49.452247 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 20:20:49.452522 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:20:49.452799 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:20:49.453069 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 20:20:50.079158 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:20:50.079629 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 20:20:50.079880 extracting modules file /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930523/extract-nfsrootfs-rjt7aoop
227 20:20:51.428420 extracting modules file /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk
228 20:20:52.824163 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:20:52.824647 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 20:20:52.824928 [common] Applying overlay to NFS
231 20:20:52.825141 [common] Applying overlay /var/lib/lava/dispatcher/tmp/930523/compress-overlay-mc7fwge5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/930523/extract-nfsrootfs-rjt7aoop
232 20:20:52.854458 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:20:52.854851 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 20:20:52.855148 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 20:20:52.855381 Converting downloaded kernel to a uImage
236 20:20:52.855690 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/kernel/Image /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/kernel/uImage
237 20:20:53.330635 output: Image Name:
238 20:20:53.331058 output: Created: Sun Nov 3 20:20:52 2024
239 20:20:53.331268 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:20:53.331474 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 20:20:53.331674 output: Load Address: 01080000
242 20:20:53.331874 output: Entry Point: 01080000
243 20:20:53.332145 output:
244 20:20:53.332494 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 20:20:53.332761 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 20:20:53.333031 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 20:20:53.333287 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:20:53.333544 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 20:20:53.333803 Building ramdisk /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk
250 20:20:55.448921 >> 166824 blocks
251 20:21:03.122380 Adding RAMdisk u-boot header.
252 20:21:03.122824 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk.cpio.gz.uboot
253 20:21:03.377855 output: Image Name:
254 20:21:03.378278 output: Created: Sun Nov 3 20:21:03 2024
255 20:21:03.378493 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:21:03.378698 output: Data Size: 23431987 Bytes = 22882.80 KiB = 22.35 MiB
257 20:21:03.378898 output: Load Address: 00000000
258 20:21:03.379096 output: Entry Point: 00000000
259 20:21:03.379291 output:
260 20:21:03.379880 rename /var/lib/lava/dispatcher/tmp/930523/extract-overlay-ramdisk-mnp8hua6/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
261 20:21:03.380594 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 20:21:03.381192 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 20:21:03.381771 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 20:21:03.382279 No LXC device requested
265 20:21:03.382830 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:21:03.383404 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 20:21:03.383955 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:21:03.384449 Checking files for TFTP limit of 4294967296 bytes.
269 20:21:03.387344 end: 1 tftp-deploy (duration 00:00:40) [common]
270 20:21:03.387966 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:21:03.388580 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:21:03.389127 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:21:03.389679 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:21:03.390260 Using kernel file from prepare-kernel: 930523/tftp-deploy-4f9m1yzl/kernel/uImage
275 20:21:03.390947 substitutions:
276 20:21:03.391397 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:21:03.391844 - {DTB_ADDR}: 0x01070000
278 20:21:03.392322 - {DTB}: 930523/tftp-deploy-4f9m1yzl/dtb/meson-g12b-a311d-libretech-cc.dtb
279 20:21:03.392766 - {INITRD}: 930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
280 20:21:03.393207 - {KERNEL_ADDR}: 0x01080000
281 20:21:03.393643 - {KERNEL}: 930523/tftp-deploy-4f9m1yzl/kernel/uImage
282 20:21:03.394143 - {LAVA_MAC}: None
283 20:21:03.394651 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/930523/extract-nfsrootfs-rjt7aoop
284 20:21:03.395101 - {NFS_SERVER_IP}: 192.168.6.2
285 20:21:03.395535 - {PRESEED_CONFIG}: None
286 20:21:03.395972 - {PRESEED_LOCAL}: None
287 20:21:03.396485 - {RAMDISK_ADDR}: 0x08000000
288 20:21:03.396918 - {RAMDISK}: 930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
289 20:21:03.397353 - {ROOT_PART}: None
290 20:21:03.397789 - {ROOT}: None
291 20:21:03.398223 - {SERVER_IP}: 192.168.6.2
292 20:21:03.398656 - {TEE_ADDR}: 0x83000000
293 20:21:03.399088 - {TEE}: None
294 20:21:03.399519 Parsed boot commands:
295 20:21:03.399939 - setenv autoload no
296 20:21:03.400408 - setenv initrd_high 0xffffffff
297 20:21:03.400843 - setenv fdt_high 0xffffffff
298 20:21:03.401270 - dhcp
299 20:21:03.401698 - setenv serverip 192.168.6.2
300 20:21:03.402128 - tftpboot 0x01080000 930523/tftp-deploy-4f9m1yzl/kernel/uImage
301 20:21:03.402557 - tftpboot 0x08000000 930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
302 20:21:03.402986 - tftpboot 0x01070000 930523/tftp-deploy-4f9m1yzl/dtb/meson-g12b-a311d-libretech-cc.dtb
303 20:21:03.403413 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/930523/extract-nfsrootfs-rjt7aoop,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:21:03.403856 - bootm 0x01080000 0x08000000 0x01070000
305 20:21:03.404443 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:21:03.406073 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:21:03.406534 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 20:21:03.421757 Setting prompt string to ['lava-test: # ']
310 20:21:03.423381 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:21:03.424075 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:21:03.424701 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:21:03.425298 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:21:03.426492 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 20:21:03.464270 >> OK - accepted request
316 20:21:03.466383 Returned 0 in 0 seconds
317 20:21:03.567575 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:21:03.569389 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:21:03.570005 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:21:03.570568 Setting prompt string to ['Hit any key to stop autoboot']
322 20:21:03.571077 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:21:03.572857 Trying 192.168.56.21...
324 20:21:03.573405 Connected to conserv1.
325 20:21:03.573863 Escape character is '^]'.
326 20:21:03.574317
327 20:21:03.574780 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 20:21:03.575239
329 20:21:14.533702 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 20:21:14.534358 bl2_stage_init 0x01
331 20:21:14.534811 bl2_stage_init 0x81
332 20:21:14.539069 hw id: 0x0000 - pwm id 0x01
333 20:21:14.539567 bl2_stage_init 0xc1
334 20:21:14.540049 bl2_stage_init 0x02
335 20:21:14.540490
336 20:21:14.544762 L0:00000000
337 20:21:14.545250 L1:20000703
338 20:21:14.545685 L2:00008067
339 20:21:14.546121 L3:14000000
340 20:21:14.550373 B2:00402000
341 20:21:14.550876 B1:e0f83180
342 20:21:14.551307
343 20:21:14.551740 TE: 58159
344 20:21:14.552226
345 20:21:14.555927 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 20:21:14.556441
347 20:21:14.556885 Board ID = 1
348 20:21:14.561570 Set A53 clk to 24M
349 20:21:14.562027 Set A73 clk to 24M
350 20:21:14.562459 Set clk81 to 24M
351 20:21:14.567034 A53 clk: 1200 MHz
352 20:21:14.567491 A73 clk: 1200 MHz
353 20:21:14.567919 CLK81: 166.6M
354 20:21:14.568383 smccc: 00012ab5
355 20:21:14.572598 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 20:21:14.578219 board id: 1
357 20:21:14.584114 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:21:14.594814 fw parse done
359 20:21:14.600861 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:21:14.643386 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:21:14.654280 PIEI prepare done
362 20:21:14.654777 fastboot data load
363 20:21:14.655216 fastboot data verify
364 20:21:14.660081 verify result: 266
365 20:21:14.665574 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 20:21:14.666061 LPDDR4 probe
367 20:21:14.666490 ddr clk to 1584MHz
368 20:21:14.673591 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:21:14.710719
370 20:21:14.711208 dmc_version 0001
371 20:21:14.717462 Check phy result
372 20:21:14.723312 INFO : End of CA training
373 20:21:14.723793 INFO : End of initialization
374 20:21:14.728913 INFO : Training has run successfully!
375 20:21:14.729388 Check phy result
376 20:21:14.734612 INFO : End of initialization
377 20:21:14.735077 INFO : End of read enable training
378 20:21:14.737894 INFO : End of fine write leveling
379 20:21:14.743481 INFO : End of Write leveling coarse delay
380 20:21:14.749143 INFO : Training has run successfully!
381 20:21:14.749639 Check phy result
382 20:21:14.750090 INFO : End of initialization
383 20:21:14.754689 INFO : End of read dq deskew training
384 20:21:14.758178 INFO : End of MPR read delay center optimization
385 20:21:14.763655 INFO : End of write delay center optimization
386 20:21:14.769255 INFO : End of read delay center optimization
387 20:21:14.769734 INFO : End of max read latency training
388 20:21:14.774873 INFO : Training has run successfully!
389 20:21:14.775339 1D training succeed
390 20:21:14.782023 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:21:14.830447 Check phy result
392 20:21:14.830909 INFO : End of initialization
393 20:21:14.852244 INFO : End of 2D read delay Voltage center optimization
394 20:21:14.872567 INFO : End of 2D read delay Voltage center optimization
395 20:21:14.924531 INFO : End of 2D write delay Voltage center optimization
396 20:21:14.974044 INFO : End of 2D write delay Voltage center optimization
397 20:21:14.979518 INFO : Training has run successfully!
398 20:21:14.980042
399 20:21:14.980501 channel==0
400 20:21:14.985150 RxClkDly_Margin_A0==88 ps 9
401 20:21:14.985619 TxDqDly_Margin_A0==98 ps 10
402 20:21:14.990725 RxClkDly_Margin_A1==88 ps 9
403 20:21:14.991190 TxDqDly_Margin_A1==88 ps 9
404 20:21:14.991637 TrainedVREFDQ_A0==74
405 20:21:14.996555 TrainedVREFDQ_A1==74
406 20:21:14.997040 VrefDac_Margin_A0==25
407 20:21:14.997485 DeviceVref_Margin_A0==40
408 20:21:15.002017 VrefDac_Margin_A1==25
409 20:21:15.002482 DeviceVref_Margin_A1==40
410 20:21:15.002924
411 20:21:15.003367
412 20:21:15.003809 channel==1
413 20:21:15.007593 RxClkDly_Margin_A0==98 ps 10
414 20:21:15.008089 TxDqDly_Margin_A0==88 ps 9
415 20:21:15.013112 RxClkDly_Margin_A1==98 ps 10
416 20:21:15.013574 TxDqDly_Margin_A1==88 ps 9
417 20:21:15.018746 TrainedVREFDQ_A0==76
418 20:21:15.019215 TrainedVREFDQ_A1==77
419 20:21:15.019660 VrefDac_Margin_A0==22
420 20:21:15.024246 DeviceVref_Margin_A0==38
421 20:21:15.024710 VrefDac_Margin_A1==22
422 20:21:15.030005 DeviceVref_Margin_A1==37
423 20:21:15.030465
424 20:21:15.030910 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:21:15.031347
426 20:21:15.063588 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 20:21:15.064207 2D training succeed
428 20:21:15.069167 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:21:15.074649 auto size-- 65535DDR cs0 size: 2048MB
430 20:21:15.075117 DDR cs1 size: 2048MB
431 20:21:15.080221 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:21:15.080690 cs0 DataBus test pass
433 20:21:15.085918 cs1 DataBus test pass
434 20:21:15.086390 cs0 AddrBus test pass
435 20:21:15.086836 cs1 AddrBus test pass
436 20:21:15.087275
437 20:21:15.091363 100bdlr_step_size ps== 420
438 20:21:15.091845 result report
439 20:21:15.096992 boot times 0Enable ddr reg access
440 20:21:15.102216 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:21:15.115730 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 20:21:15.689397 0.0;M3 CHK:0;cm4_sp_mode 0
443 20:21:15.690015 MVN_1=0x00000000
444 20:21:15.694903 MVN_2=0x00000000
445 20:21:15.700664 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 20:21:15.701156 OPS=0x10
447 20:21:15.701613 ring efuse init
448 20:21:15.702058 chipver efuse init
449 20:21:15.706261 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 20:21:15.711870 [0.018961 Inits done]
451 20:21:15.712400 secure task start!
452 20:21:15.712851 high task start!
453 20:21:15.716439 low task start!
454 20:21:15.716905 run into bl31
455 20:21:15.723102 NOTICE: BL31: v1.3(release):4fc40b1
456 20:21:15.730952 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 20:21:15.731434 NOTICE: BL31: G12A normal boot!
458 20:21:15.756237 NOTICE: BL31: BL33 decompress pass
459 20:21:15.762022 ERROR: Error initializing runtime service opteed_fast
460 20:21:16.994833
461 20:21:16.995482
462 20:21:17.003171 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 20:21:17.003663
464 20:21:17.004172 Model: Libre Computer AML-A311D-CC Alta
465 20:21:17.211592 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 20:21:17.234982 DRAM: 2 GiB (effective 3.8 GiB)
467 20:21:17.378061 Core: 408 devices, 31 uclasses, devicetree: separate
468 20:21:17.383837 WDT: Not starting watchdog@f0d0
469 20:21:17.416149 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 20:21:17.428567 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 20:21:17.433562 ** Bad device specification mmc 0 **
472 20:21:17.443866 Card did not respond to voltage select! : -110
473 20:21:17.451534 ** Bad device specification mmc 0 **
474 20:21:17.452038 Couldn't find partition mmc 0
475 20:21:17.459912 Card did not respond to voltage select! : -110
476 20:21:17.465467 ** Bad device specification mmc 0 **
477 20:21:17.466002 Couldn't find partition mmc 0
478 20:21:17.469559 Error: could not access storage.
479 20:21:18.734234 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 20:21:18.734925 bl2_stage_init 0x81
481 20:21:18.739349 hw id: 0x0000 - pwm id 0x01
482 20:21:18.739918 bl2_stage_init 0xc1
483 20:21:18.740396 bl2_stage_init 0x02
484 20:21:18.740818
485 20:21:18.745018 L0:00000000
486 20:21:18.745582 L1:20000703
487 20:21:18.746019 L2:00008067
488 20:21:18.746458 L3:14000000
489 20:21:18.746922 B2:00402000
490 20:21:18.747859 B1:e0f83180
491 20:21:18.748381
492 20:21:18.748805 TE: 58150
493 20:21:18.749267
494 20:21:18.758995 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 20:21:18.759596
496 20:21:18.760068 Board ID = 1
497 20:21:18.760489 Set A53 clk to 24M
498 20:21:18.760912 Set A73 clk to 24M
499 20:21:18.764527 Set clk81 to 24M
500 20:21:18.765045 A53 clk: 1200 MHz
501 20:21:18.765469 A73 clk: 1200 MHz
502 20:21:18.770121 CLK81: 166.6M
503 20:21:18.770602 smccc: 00012aab
504 20:21:18.775771 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 20:21:18.776384 board id: 1
506 20:21:18.784495 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 20:21:18.795004 fw parse done
508 20:21:18.800961 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 20:21:18.844096 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 20:21:18.854577 PIEI prepare done
511 20:21:18.855235 fastboot data load
512 20:21:18.855664 fastboot data verify
513 20:21:18.860344 verify result: 266
514 20:21:18.865871 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 20:21:18.866458 LPDDR4 probe
516 20:21:18.866896 ddr clk to 1584MHz
517 20:21:18.873945 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 20:21:18.911142
519 20:21:18.911812 dmc_version 0001
520 20:21:18.917771 Check phy result
521 20:21:18.923645 INFO : End of CA training
522 20:21:18.924256 INFO : End of initialization
523 20:21:18.929293 INFO : Training has run successfully!
524 20:21:18.929864 Check phy result
525 20:21:18.934814 INFO : End of initialization
526 20:21:18.935337 INFO : End of read enable training
527 20:21:18.938070 INFO : End of fine write leveling
528 20:21:18.943640 INFO : End of Write leveling coarse delay
529 20:21:18.949401 INFO : Training has run successfully!
530 20:21:18.949866 Check phy result
531 20:21:18.950265 INFO : End of initialization
532 20:21:18.955626 INFO : End of read dq deskew training
533 20:21:18.960431 INFO : End of MPR read delay center optimization
534 20:21:18.960907 INFO : End of write delay center optimization
535 20:21:18.966016 INFO : End of read delay center optimization
536 20:21:18.971576 INFO : End of max read latency training
537 20:21:18.972049 INFO : Training has run successfully!
538 20:21:18.977211 1D training succeed
539 20:21:18.983075 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 20:21:19.030660 Check phy result
541 20:21:19.031173 INFO : End of initialization
542 20:21:19.052324 INFO : End of 2D read delay Voltage center optimization
543 20:21:19.072532 INFO : End of 2D read delay Voltage center optimization
544 20:21:19.123776 INFO : End of 2D write delay Voltage center optimization
545 20:21:19.173782 INFO : End of 2D write delay Voltage center optimization
546 20:21:19.179228 INFO : Training has run successfully!
547 20:21:19.179780
548 20:21:19.180258 channel==0
549 20:21:19.184793 RxClkDly_Margin_A0==78 ps 8
550 20:21:19.185331 TxDqDly_Margin_A0==98 ps 10
551 20:21:19.188196 RxClkDly_Margin_A1==88 ps 9
552 20:21:19.188684 TxDqDly_Margin_A1==88 ps 9
553 20:21:19.193717 TrainedVREFDQ_A0==74
554 20:21:19.194036 TrainedVREFDQ_A1==74
555 20:21:19.194245 VrefDac_Margin_A0==25
556 20:21:19.199386 DeviceVref_Margin_A0==40
557 20:21:19.199920 VrefDac_Margin_A1==23
558 20:21:19.204935 DeviceVref_Margin_A1==40
559 20:21:19.205483
560 20:21:19.205887
561 20:21:19.206286 channel==1
562 20:21:19.206700 RxClkDly_Margin_A0==98 ps 10
563 20:21:19.210582 TxDqDly_Margin_A0==88 ps 9
564 20:21:19.210961 RxClkDly_Margin_A1==88 ps 9
565 20:21:19.216253 TxDqDly_Margin_A1==98 ps 10
566 20:21:19.216693 TrainedVREFDQ_A0==76
567 20:21:19.217157 TrainedVREFDQ_A1==77
568 20:21:19.221711 VrefDac_Margin_A0==22
569 20:21:19.222076 DeviceVref_Margin_A0==38
570 20:21:19.227390 VrefDac_Margin_A1==24
571 20:21:19.227779 DeviceVref_Margin_A1==37
572 20:21:19.228062
573 20:21:19.232847 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 20:21:19.233281
575 20:21:19.260958 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
576 20:21:19.266483 2D training succeed
577 20:21:19.273453 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 20:21:19.273992 auto size-- 65535DDR cs0 size: 2048MB
579 20:21:19.277857 DDR cs1 size: 2048MB
580 20:21:19.278435 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 20:21:19.283566 cs0 DataBus test pass
582 20:21:19.284053 cs1 DataBus test pass
583 20:21:19.284540 cs0 AddrBus test pass
584 20:21:19.288960 cs1 AddrBus test pass
585 20:21:19.289531
586 20:21:19.289915 100bdlr_step_size ps== 420
587 20:21:19.290298 result report
588 20:21:19.294659 boot times 0Enable ddr reg access
589 20:21:19.302180 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 20:21:19.315617 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 20:21:19.887479 0.0;M3 CHK:0;cm4_sp_mode 0
592 20:21:19.888130 MVN_1=0x00000000
593 20:21:19.892914 MVN_2=0x00000000
594 20:21:19.898674 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 20:21:19.899112 OPS=0x10
596 20:21:19.899513 ring efuse init
597 20:21:19.899903 chipver efuse init
598 20:21:19.904275 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 20:21:19.909900 [0.018961 Inits done]
600 20:21:19.910342 secure task start!
601 20:21:19.910736 high task start!
602 20:21:19.914583 low task start!
603 20:21:19.915030 run into bl31
604 20:21:19.921131 NOTICE: BL31: v1.3(release):4fc40b1
605 20:21:19.928939 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 20:21:19.929392 NOTICE: BL31: G12A normal boot!
607 20:21:19.954285 NOTICE: BL31: BL33 decompress pass
608 20:21:19.960060 ERROR: Error initializing runtime service opteed_fast
609 20:21:21.194114
610 20:21:21.194756
611 20:21:21.202359 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 20:21:21.202833
613 20:21:21.203255 Model: Libre Computer AML-A311D-CC Alta
614 20:21:21.410042 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 20:21:21.433262 DRAM: 2 GiB (effective 3.8 GiB)
616 20:21:21.576238 Core: 408 devices, 31 uclasses, devicetree: separate
617 20:21:21.582208 WDT: Not starting watchdog@f0d0
618 20:21:21.614492 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 20:21:21.626828 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 20:21:21.631243 ** Bad device specification mmc 0 **
621 20:21:21.642198 Card did not respond to voltage select! : -110
622 20:21:21.650130 ** Bad device specification mmc 0 **
623 20:21:21.650766 Couldn't find partition mmc 0
624 20:21:21.658231 Card did not respond to voltage select! : -110
625 20:21:21.663687 ** Bad device specification mmc 0 **
626 20:21:21.664350 Couldn't find partition mmc 0
627 20:21:21.668781 Error: could not access storage.
628 20:21:22.012362 Net: eth0: ethernet@ff3f0000
629 20:21:22.012951 starting USB...
630 20:21:22.264119 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 20:21:22.264723 Starting the controller
632 20:21:22.271021 USB XHCI 1.10
633 20:21:23.986022 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 20:21:23.986640 bl2_stage_init 0x01
635 20:21:23.987069 bl2_stage_init 0x81
636 20:21:24.004224 hw id: 0x0000 - pwm id 0x01
637 20:21:24.004719 bl2_stage_init 0xc1
638 20:21:24.005137 bl2_stage_init 0x02
639 20:21:24.005541
640 20:21:24.005948 L0:00000000
641 20:21:24.006350 L1:20000703
642 20:21:24.006750 L2:00008067
643 20:21:24.007146 L3:14000000
644 20:21:24.007545 B2:00402000
645 20:21:24.007935 B1:e0f83180
646 20:21:24.008381
647 20:21:24.008787 TE: 58167
648 20:21:24.009186
649 20:21:24.009944 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 20:21:24.010377
651 20:21:24.010783 Board ID = 1
652 20:21:24.013554 Set A53 clk to 24M
653 20:21:24.014023 Set A73 clk to 24M
654 20:21:24.014427 Set clk81 to 24M
655 20:21:24.022652 A53 clk: 1200 MHz
656 20:21:24.023117 A73 clk: 1200 MHz
657 20:21:24.023526 CLK81: 166.6M
658 20:21:24.023924 smccc: 00012abd
659 20:21:24.024693 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 20:21:24.031578 board id: 1
661 20:21:24.036993 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 20:21:24.046793 fw parse done
663 20:21:24.052730 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 20:21:24.095381 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 20:21:24.106351 PIEI prepare done
666 20:21:24.106812 fastboot data load
667 20:21:24.107224 fastboot data verify
668 20:21:24.112066 verify result: 266
669 20:21:24.117483 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 20:21:24.117928 LPDDR4 probe
671 20:21:24.118329 ddr clk to 1584MHz
672 20:21:24.125434 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 20:21:24.162833
674 20:21:24.163319 dmc_version 0001
675 20:21:24.169567 Check phy result
676 20:21:24.175380 INFO : End of CA training
677 20:21:24.175820 INFO : End of initialization
678 20:21:24.180946 INFO : Training has run successfully!
679 20:21:24.181380 Check phy result
680 20:21:24.186517 INFO : End of initialization
681 20:21:24.186954 INFO : End of read enable training
682 20:21:24.192232 INFO : End of fine write leveling
683 20:21:24.197747 INFO : End of Write leveling coarse delay
684 20:21:24.198193 INFO : Training has run successfully!
685 20:21:24.198603 Check phy result
686 20:21:24.203559 INFO : End of initialization
687 20:21:24.204032 INFO : End of read dq deskew training
688 20:21:24.209059 INFO : End of MPR read delay center optimization
689 20:21:24.214569 INFO : End of write delay center optimization
690 20:21:24.220108 INFO : End of read delay center optimization
691 20:21:24.220550 INFO : End of max read latency training
692 20:21:24.225672 INFO : Training has run successfully!
693 20:21:24.226104 1D training succeed
694 20:21:24.235267 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 20:21:24.282551 Check phy result
696 20:21:24.283030 INFO : End of initialization
697 20:21:24.304336 INFO : End of 2D read delay Voltage center optimization
698 20:21:24.324249 INFO : End of 2D read delay Voltage center optimization
699 20:21:24.376481 INFO : End of 2D write delay Voltage center optimization
700 20:21:24.425491 INFO : End of 2D write delay Voltage center optimization
701 20:21:24.430908 INFO : Training has run successfully!
702 20:21:24.431345
703 20:21:24.431750 channel==0
704 20:21:24.436502 RxClkDly_Margin_A0==88 ps 9
705 20:21:24.436941 TxDqDly_Margin_A0==98 ps 10
706 20:21:24.442046 RxClkDly_Margin_A1==88 ps 9
707 20:21:24.442473 TxDqDly_Margin_A1==98 ps 10
708 20:21:24.442881 TrainedVREFDQ_A0==74
709 20:21:24.447757 TrainedVREFDQ_A1==74
710 20:21:24.448222 VrefDac_Margin_A0==25
711 20:21:24.448626 DeviceVref_Margin_A0==40
712 20:21:24.453429 VrefDac_Margin_A1==25
713 20:21:24.453872 DeviceVref_Margin_A1==40
714 20:21:24.454277
715 20:21:24.454674
716 20:21:24.458894 channel==1
717 20:21:24.459360 RxClkDly_Margin_A0==98 ps 10
718 20:21:24.459769 TxDqDly_Margin_A0==88 ps 9
719 20:21:24.464430 RxClkDly_Margin_A1==88 ps 9
720 20:21:24.464872 TxDqDly_Margin_A1==88 ps 9
721 20:21:24.470128 TrainedVREFDQ_A0==76
722 20:21:24.470567 TrainedVREFDQ_A1==77
723 20:21:24.470977 VrefDac_Margin_A0==22
724 20:21:24.475752 DeviceVref_Margin_A0==38
725 20:21:24.476214 VrefDac_Margin_A1==24
726 20:21:24.481245 DeviceVref_Margin_A1==37
727 20:21:24.481676
728 20:21:24.482081 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 20:21:24.482479
730 20:21:24.514968 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
731 20:21:24.515539 2D training succeed
732 20:21:24.520514 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 20:21:24.526076 auto size-- 65535DDR cs0 size: 2048MB
734 20:21:24.526519 DDR cs1 size: 2048MB
735 20:21:24.531686 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 20:21:24.532156 cs0 DataBus test pass
737 20:21:24.537320 cs1 DataBus test pass
738 20:21:24.537760 cs0 AddrBus test pass
739 20:21:24.538164 cs1 AddrBus test pass
740 20:21:24.538561
741 20:21:24.542884 100bdlr_step_size ps== 420
742 20:21:24.543334 result report
743 20:21:24.548505 boot times 0Enable ddr reg access
744 20:21:24.553758 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 20:21:24.566424 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 20:21:25.139212 0.0;M3 CHK:0;cm4_sp_mode 0
747 20:21:25.139801 MVN_1=0x00000000
748 20:21:25.144701 MVN_2=0x00000000
749 20:21:25.150470 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 20:21:25.150980 OPS=0x10
751 20:21:25.151380 ring efuse init
752 20:21:25.151775 chipver efuse init
753 20:21:25.156082 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 20:21:25.161645 [0.018961 Inits done]
755 20:21:25.162068 secure task start!
756 20:21:25.162466 high task start!
757 20:21:25.165461 low task start!
758 20:21:25.165932 run into bl31
759 20:21:25.172903 NOTICE: BL31: v1.3(release):4fc40b1
760 20:21:25.181056 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 20:21:25.181521 NOTICE: BL31: G12A normal boot!
762 20:21:25.206179 NOTICE: BL31: BL33 decompress pass
763 20:21:25.211641 ERROR: Error initializing runtime service opteed_fast
764 20:21:26.444636
765 20:21:26.445223
766 20:21:26.453103 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 20:21:26.453605
768 20:21:26.454057 Model: Libre Computer AML-A311D-CC Alta
769 20:21:26.661485 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 20:21:26.684851 DRAM: 2 GiB (effective 3.8 GiB)
771 20:21:26.827837 Core: 408 devices, 31 uclasses, devicetree: separate
772 20:21:26.833651 WDT: Not starting watchdog@f0d0
773 20:21:26.865928 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 20:21:26.878447 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 20:21:26.883346 ** Bad device specification mmc 0 **
776 20:21:26.893761 Card did not respond to voltage select! : -110
777 20:21:26.901348 ** Bad device specification mmc 0 **
778 20:21:26.901820 Couldn't find partition mmc 0
779 20:21:26.909716 Card did not respond to voltage select! : -110
780 20:21:26.915283 ** Bad device specification mmc 0 **
781 20:21:26.915741 Couldn't find partition mmc 0
782 20:21:26.920383 Error: could not access storage.
783 20:21:27.262766 Net: eth0: ethernet@ff3f0000
784 20:21:27.263299 starting USB...
785 20:21:27.514640 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 20:21:27.515188 Starting the controller
787 20:21:27.521538 USB XHCI 1.10
788 20:21:29.684010 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 20:21:29.684626 bl2_stage_init 0x01
790 20:21:29.685054 bl2_stage_init 0x81
791 20:21:29.689602 hw id: 0x0000 - pwm id 0x01
792 20:21:29.690047 bl2_stage_init 0xc1
793 20:21:29.690458 bl2_stage_init 0x02
794 20:21:29.690858
795 20:21:29.695158 L0:00000000
796 20:21:29.695594 L1:20000703
797 20:21:29.696025 L2:00008067
798 20:21:29.696432 L3:14000000
799 20:21:29.700744 B2:00402000
800 20:21:29.701172 B1:e0f83180
801 20:21:29.701574
802 20:21:29.701974 TE: 58167
803 20:21:29.702375
804 20:21:29.706444 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 20:21:29.706957
806 20:21:29.707401 Board ID = 1
807 20:21:29.711939 Set A53 clk to 24M
808 20:21:29.712504 Set A73 clk to 24M
809 20:21:29.712941 Set clk81 to 24M
810 20:21:29.717576 A53 clk: 1200 MHz
811 20:21:29.718078 A73 clk: 1200 MHz
812 20:21:29.718497 CLK81: 166.6M
813 20:21:29.718892 smccc: 00012abd
814 20:21:29.723059 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 20:21:29.728869 board id: 1
816 20:21:29.734673 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 20:21:29.745222 fw parse done
818 20:21:29.751245 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 20:21:29.793946 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 20:21:29.804750 PIEI prepare done
821 20:21:29.805249 fastboot data load
822 20:21:29.805674 fastboot data verify
823 20:21:29.810357 verify result: 266
824 20:21:29.815937 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 20:21:29.816431 LPDDR4 probe
826 20:21:29.816842 ddr clk to 1584MHz
827 20:21:29.824051 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 20:21:29.861298
829 20:21:29.861842 dmc_version 0001
830 20:21:29.867948 Check phy result
831 20:21:29.873844 INFO : End of CA training
832 20:21:29.874282 INFO : End of initialization
833 20:21:29.879308 INFO : Training has run successfully!
834 20:21:29.879735 Check phy result
835 20:21:29.884890 INFO : End of initialization
836 20:21:29.885322 INFO : End of read enable training
837 20:21:29.890545 INFO : End of fine write leveling
838 20:21:29.896195 INFO : End of Write leveling coarse delay
839 20:21:29.896623 INFO : Training has run successfully!
840 20:21:29.897033 Check phy result
841 20:21:29.901762 INFO : End of initialization
842 20:21:29.902186 INFO : End of read dq deskew training
843 20:21:29.907273 INFO : End of MPR read delay center optimization
844 20:21:29.912886 INFO : End of write delay center optimization
845 20:21:29.918582 INFO : End of read delay center optimization
846 20:21:29.919015 INFO : End of max read latency training
847 20:21:29.924106 INFO : Training has run successfully!
848 20:21:29.924535 1D training succeed
849 20:21:29.933315 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 20:21:29.981008 Check phy result
851 20:21:29.981484 INFO : End of initialization
852 20:21:30.002689 INFO : End of 2D read delay Voltage center optimization
853 20:21:30.022910 INFO : End of 2D read delay Voltage center optimization
854 20:21:30.074930 INFO : End of 2D write delay Voltage center optimization
855 20:21:30.124426 INFO : End of 2D write delay Voltage center optimization
856 20:21:30.129879 INFO : Training has run successfully!
857 20:21:30.130315
858 20:21:30.130722 channel==0
859 20:21:30.135544 RxClkDly_Margin_A0==88 ps 9
860 20:21:30.135972 TxDqDly_Margin_A0==98 ps 10
861 20:21:30.141162 RxClkDly_Margin_A1==88 ps 9
862 20:21:30.141594 TxDqDly_Margin_A1==98 ps 10
863 20:21:30.142014 TrainedVREFDQ_A0==74
864 20:21:30.146660 TrainedVREFDQ_A1==74
865 20:21:30.147126 VrefDac_Margin_A0==25
866 20:21:30.147534 DeviceVref_Margin_A0==40
867 20:21:30.152291 VrefDac_Margin_A1==25
868 20:21:30.152745 DeviceVref_Margin_A1==40
869 20:21:30.153131
870 20:21:30.153513
871 20:21:30.157912 channel==1
872 20:21:30.158336 RxClkDly_Margin_A0==98 ps 10
873 20:21:30.158722 TxDqDly_Margin_A0==88 ps 9
874 20:21:30.163549 RxClkDly_Margin_A1==88 ps 9
875 20:21:30.163964 TxDqDly_Margin_A1==88 ps 9
876 20:21:30.169128 TrainedVREFDQ_A0==76
877 20:21:30.169548 TrainedVREFDQ_A1==77
878 20:21:30.169936 VrefDac_Margin_A0==22
879 20:21:30.174753 DeviceVref_Margin_A0==38
880 20:21:30.175164 VrefDac_Margin_A1==24
881 20:21:30.180314 DeviceVref_Margin_A1==37
882 20:21:30.180737
883 20:21:30.181124 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 20:21:30.181509
885 20:21:30.213911 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
886 20:21:30.214410 2D training succeed
887 20:21:30.219404 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 20:21:30.225009 auto size-- 65535DDR cs0 size: 2048MB
889 20:21:30.225425 DDR cs1 size: 2048MB
890 20:21:30.230594 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 20:21:30.231009 cs0 DataBus test pass
892 20:21:30.236215 cs1 DataBus test pass
893 20:21:30.236625 cs0 AddrBus test pass
894 20:21:30.237010 cs1 AddrBus test pass
895 20:21:30.237391
896 20:21:30.241809 100bdlr_step_size ps== 420
897 20:21:30.242228 result report
898 20:21:30.247415 boot times 0Enable ddr reg access
899 20:21:30.252676 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 20:21:30.266162 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 20:21:30.839264 0.0;M3 CHK:0;cm4_sp_mode 0
902 20:21:30.839859 MVN_1=0x00000000
903 20:21:30.844890 MVN_2=0x00000000
904 20:21:30.850484 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 20:21:30.850920 OPS=0x10
906 20:21:30.851333 ring efuse init
907 20:21:30.851733 chipver efuse init
908 20:21:30.856119 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 20:21:30.861692 [0.018961 Inits done]
910 20:21:30.862119 secure task start!
911 20:21:30.862518 high task start!
912 20:21:30.866297 low task start!
913 20:21:30.866723 run into bl31
914 20:21:30.872934 NOTICE: BL31: v1.3(release):4fc40b1
915 20:21:30.880742 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 20:21:30.881175 NOTICE: BL31: G12A normal boot!
917 20:21:30.906051 NOTICE: BL31: BL33 decompress pass
918 20:21:30.911842 ERROR: Error initializing runtime service opteed_fast
919 20:21:32.144896
920 20:21:32.146146
921 20:21:32.153270 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 20:21:32.154339
923 20:21:32.155341 Model: Libre Computer AML-A311D-CC Alta
924 20:21:32.361713 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 20:21:32.385064 DRAM: 2 GiB (effective 3.8 GiB)
926 20:21:32.527952 Core: 408 devices, 31 uclasses, devicetree: separate
927 20:21:32.533815 WDT: Not starting watchdog@f0d0
928 20:21:32.566185 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 20:21:32.578480 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 20:21:32.583467 ** Bad device specification mmc 0 **
931 20:21:32.593901 Card did not respond to voltage select! : -110
932 20:21:32.601484 ** Bad device specification mmc 0 **
933 20:21:32.602140 Couldn't find partition mmc 0
934 20:21:32.609809 Card did not respond to voltage select! : -110
935 20:21:32.615372 ** Bad device specification mmc 0 **
936 20:21:32.616078 Couldn't find partition mmc 0
937 20:21:32.620404 Error: could not access storage.
938 20:21:32.962793 Net: eth0: ethernet@ff3f0000
939 20:21:32.963479 starting USB...
940 20:21:33.214659 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 20:21:33.215360 Starting the controller
942 20:21:33.221613 USB XHCI 1.10
943 20:21:34.775647 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 20:21:34.783946 scanning usb for storage devices... 0 Storage Device(s) found
946 20:21:34.836034 Hit any key to stop autoboot: 1
947 20:21:34.837052 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
948 20:21:34.837898 start: 2.4.3 bootloader-commands (timeout 00:04:29) [common]
949 20:21:34.838552 Setting prompt string to ['=>']
950 20:21:34.839207 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:29)
951 20:21:34.851435 0
952 20:21:34.852376 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 20:21:34.852928 Sending with 10 millisecond of delay
955 20:21:35.987532 => setenv autoload no
956 20:21:35.998329 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
957 20:21:36.003214 setenv autoload no
958 20:21:36.003959 Sending with 10 millisecond of delay
960 20:21:37.801178 => setenv initrd_high 0xffffffff
961 20:21:37.812651 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
962 20:21:37.814362 setenv initrd_high 0xffffffff
963 20:21:37.815758 Sending with 10 millisecond of delay
965 20:21:39.436041 => setenv fdt_high 0xffffffff
966 20:21:39.447534 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
967 20:21:39.449315 setenv fdt_high 0xffffffff
968 20:21:39.450697 Sending with 10 millisecond of delay
970 20:21:39.745043 => dhcp
971 20:21:39.756493 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
972 20:21:39.758159 dhcp
973 20:21:39.759101 Speed: 1000, full duplex
974 20:21:39.760146 BOOTP broadcast 1
975 20:21:39.973819 DHCP client bound to address 192.168.6.27 (217 ms)
976 20:21:39.975405 Sending with 10 millisecond of delay
978 20:21:41.656579 => setenv serverip 192.168.6.2
979 20:21:41.667097 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
980 20:21:41.667638 setenv serverip 192.168.6.2
981 20:21:41.668123 Sending with 10 millisecond of delay
983 20:21:45.396522 => tftpboot 0x01080000 930523/tftp-deploy-4f9m1yzl/kernel/uImage
984 20:21:45.407044 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
985 20:21:45.407522 tftpboot 0x01080000 930523/tftp-deploy-4f9m1yzl/kernel/uImage
986 20:21:45.407747 Speed: 1000, full duplex
987 20:21:45.407952 Using ethernet@ff3f0000 device
988 20:21:45.409826 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 20:21:45.415241 Filename '930523/tftp-deploy-4f9m1yzl/kernel/uImage'.
990 20:21:45.419212 Load address: 0x1080000
991 20:21:48.232284 Loading: *################################################## 43.6 MiB
992 20:21:48.232888 15.5 MiB/s
993 20:21:48.233294 done
994 20:21:48.236633 Bytes transferred = 45713984 (2b98a40 hex)
995 20:21:48.237370 Sending with 10 millisecond of delay
997 20:21:52.922325 => tftpboot 0x08000000 930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
998 20:21:52.933080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
999 20:21:52.933903 tftpboot 0x08000000 930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot
1000 20:21:52.934351 Speed: 1000, full duplex
1001 20:21:52.934771 Using ethernet@ff3f0000 device
1002 20:21:52.935876 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1003 20:21:52.947663 Filename '930523/tftp-deploy-4f9m1yzl/ramdisk/ramdisk.cpio.gz.uboot'.
1004 20:21:52.948176 Load address: 0x8000000
1005 20:21:59.511811 Loading: *##########################T ####################### UDP wrong checksum 00000005 0000597d
1006 20:22:04.512642 T UDP wrong checksum 00000005 0000597d
1007 20:22:14.515721 T T UDP wrong checksum 00000005 0000597d
1008 20:22:31.996331 T T T UDP wrong checksum 000000ff 000051ee
1009 20:22:32.078279 UDP wrong checksum 000000ff 0000eae0
1010 20:22:34.518847 T UDP wrong checksum 00000005 0000597d
1011 20:22:34.984126 UDP wrong checksum 000000ff 00005c1e
1012 20:22:35.028575 UDP wrong checksum 000000ff 0000e810
1013 20:22:49.523921 T T
1014 20:22:49.524620 Retry count exceeded; starting again
1016 20:22:49.526174 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1019 20:22:49.528306 end: 2.4 uboot-commands (duration 00:01:46) [common]
1021 20:22:49.529852 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1023 20:22:49.531090 end: 2 uboot-action (duration 00:01:46) [common]
1025 20:22:49.532881 Cleaning after the job
1026 20:22:49.533483 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/ramdisk
1027 20:22:49.534884 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/kernel
1028 20:22:49.576677 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/dtb
1029 20:22:49.577918 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/nfsrootfs
1030 20:22:49.689180 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930523/tftp-deploy-4f9m1yzl/modules
1031 20:22:49.711014 start: 4.1 power-off (timeout 00:00:30) [common]
1032 20:22:49.711709 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1033 20:22:49.745376 >> OK - accepted request
1034 20:22:49.747137 Returned 0 in 0 seconds
1035 20:22:49.847933 end: 4.1 power-off (duration 00:00:00) [common]
1037 20:22:49.848993 start: 4.2 read-feedback (timeout 00:10:00) [common]
1038 20:22:49.849649 Listened to connection for namespace 'common' for up to 1s
1039 20:22:50.850563 Finalising connection for namespace 'common'
1040 20:22:50.851071 Disconnecting from shell: Finalise
1041 20:22:50.851363 =>
1042 20:22:50.952046 end: 4.2 read-feedback (duration 00:00:01) [common]
1043 20:22:50.952513 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/930523
1044 20:22:53.076109 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/930523
1045 20:22:53.076773 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.