Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 20:16:22.754188 lava-dispatcher, installed at version: 2024.01
2 20:16:22.754941 start: 0 validate
3 20:16:22.755378 Start time: 2024-11-03 20:16:22.755347+00:00 (UTC)
4 20:16:22.755923 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 20:16:22.756490 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 20:16:22.799090 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 20:16:22.799635 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 20:16:22.828826 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 20:16:22.829449 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 20:16:22.862332 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 20:16:22.862804 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 20:16:22.896753 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 20:16:22.897236 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 20:16:22.935854 validate duration: 0.18
16 20:16:22.936745 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 20:16:22.937095 start: 1.1 download-retry (timeout 00:10:00) [common]
18 20:16:22.937424 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 20:16:22.938021 Not decompressing ramdisk as can be used compressed.
20 20:16:22.938509 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 20:16:22.938808 saving as /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/ramdisk/initrd.cpio.gz
22 20:16:22.939088 total size: 5628140 (5 MB)
23 20:16:22.977575 progress 0 % (0 MB)
24 20:16:22.985601 progress 5 % (0 MB)
25 20:16:22.993957 progress 10 % (0 MB)
26 20:16:23.001189 progress 15 % (0 MB)
27 20:16:23.006757 progress 20 % (1 MB)
28 20:16:23.010450 progress 25 % (1 MB)
29 20:16:23.014606 progress 30 % (1 MB)
30 20:16:23.018809 progress 35 % (1 MB)
31 20:16:23.022513 progress 40 % (2 MB)
32 20:16:23.026664 progress 45 % (2 MB)
33 20:16:23.030630 progress 50 % (2 MB)
34 20:16:23.034888 progress 55 % (2 MB)
35 20:16:23.038917 progress 60 % (3 MB)
36 20:16:23.042712 progress 65 % (3 MB)
37 20:16:23.046908 progress 70 % (3 MB)
38 20:16:23.050672 progress 75 % (4 MB)
39 20:16:23.054773 progress 80 % (4 MB)
40 20:16:23.058547 progress 85 % (4 MB)
41 20:16:23.062762 progress 90 % (4 MB)
42 20:16:23.066773 progress 95 % (5 MB)
43 20:16:23.070247 progress 100 % (5 MB)
44 20:16:23.070932 5 MB downloaded in 0.13 s (40.72 MB/s)
45 20:16:23.071507 end: 1.1.1 http-download (duration 00:00:00) [common]
47 20:16:23.072468 end: 1.1 download-retry (duration 00:00:00) [common]
48 20:16:23.072936 start: 1.2 download-retry (timeout 00:10:00) [common]
49 20:16:23.073254 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 20:16:23.073754 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/kernel/Image
51 20:16:23.074046 saving as /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/kernel/Image
52 20:16:23.074272 total size: 45713920 (43 MB)
53 20:16:23.074487 No compression specified
54 20:16:23.113765 progress 0 % (0 MB)
55 20:16:23.143804 progress 5 % (2 MB)
56 20:16:23.174025 progress 10 % (4 MB)
57 20:16:23.204065 progress 15 % (6 MB)
58 20:16:23.234251 progress 20 % (8 MB)
59 20:16:23.264279 progress 25 % (10 MB)
60 20:16:23.293796 progress 30 % (13 MB)
61 20:16:23.322986 progress 35 % (15 MB)
62 20:16:23.352274 progress 40 % (17 MB)
63 20:16:23.381175 progress 45 % (19 MB)
64 20:16:23.410442 progress 50 % (21 MB)
65 20:16:23.439594 progress 55 % (24 MB)
66 20:16:23.469775 progress 60 % (26 MB)
67 20:16:23.498928 progress 65 % (28 MB)
68 20:16:23.528705 progress 70 % (30 MB)
69 20:16:23.559207 progress 75 % (32 MB)
70 20:16:23.589374 progress 80 % (34 MB)
71 20:16:23.618699 progress 85 % (37 MB)
72 20:16:23.648824 progress 90 % (39 MB)
73 20:16:23.678695 progress 95 % (41 MB)
74 20:16:23.707915 progress 100 % (43 MB)
75 20:16:23.708443 43 MB downloaded in 0.63 s (68.75 MB/s)
76 20:16:23.708916 end: 1.2.1 http-download (duration 00:00:01) [common]
78 20:16:23.709742 end: 1.2 download-retry (duration 00:00:01) [common]
79 20:16:23.710018 start: 1.3 download-retry (timeout 00:09:59) [common]
80 20:16:23.710307 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 20:16:23.710890 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 20:16:23.711186 saving as /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 20:16:23.711401 total size: 53209 (0 MB)
84 20:16:23.711612 No compression specified
85 20:16:23.749349 progress 61 % (0 MB)
86 20:16:23.750176 progress 100 % (0 MB)
87 20:16:23.750700 0 MB downloaded in 0.04 s (1.29 MB/s)
88 20:16:23.751179 end: 1.3.1 http-download (duration 00:00:00) [common]
90 20:16:23.752022 end: 1.3 download-retry (duration 00:00:00) [common]
91 20:16:23.752314 start: 1.4 download-retry (timeout 00:09:59) [common]
92 20:16:23.752584 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 20:16:23.753050 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 20:16:23.753315 saving as /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/nfsrootfs/full.rootfs.tar
95 20:16:23.753522 total size: 474398908 (452 MB)
96 20:16:23.753733 Using unxz to decompress xz
97 20:16:23.793216 progress 0 % (0 MB)
98 20:16:24.935219 progress 5 % (22 MB)
99 20:16:26.435005 progress 10 % (45 MB)
100 20:16:26.899510 progress 15 % (67 MB)
101 20:16:27.723908 progress 20 % (90 MB)
102 20:16:28.286319 progress 25 % (113 MB)
103 20:16:28.673508 progress 30 % (135 MB)
104 20:16:29.339815 progress 35 % (158 MB)
105 20:16:30.343635 progress 40 % (181 MB)
106 20:16:31.095353 progress 45 % (203 MB)
107 20:16:31.674343 progress 50 % (226 MB)
108 20:16:32.331217 progress 55 % (248 MB)
109 20:16:33.529006 progress 60 % (271 MB)
110 20:16:34.941842 progress 65 % (294 MB)
111 20:16:36.535638 progress 70 % (316 MB)
112 20:16:39.760657 progress 75 % (339 MB)
113 20:16:42.247478 progress 80 % (361 MB)
114 20:16:45.171750 progress 85 % (384 MB)
115 20:16:48.360373 progress 90 % (407 MB)
116 20:16:51.610019 progress 95 % (429 MB)
117 20:16:54.789372 progress 100 % (452 MB)
118 20:16:54.802892 452 MB downloaded in 31.05 s (14.57 MB/s)
119 20:16:54.803469 end: 1.4.1 http-download (duration 00:00:31) [common]
121 20:16:54.804680 end: 1.4 download-retry (duration 00:00:31) [common]
122 20:16:54.805254 start: 1.5 download-retry (timeout 00:09:28) [common]
123 20:16:54.805813 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 20:16:54.806655 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/modules.tar.xz
125 20:16:54.807148 saving as /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/modules/modules.tar
126 20:16:54.807590 total size: 11615340 (11 MB)
127 20:16:54.808086 Using unxz to decompress xz
128 20:16:54.851906 progress 0 % (0 MB)
129 20:16:54.924956 progress 5 % (0 MB)
130 20:16:55.009250 progress 10 % (1 MB)
131 20:16:55.115372 progress 15 % (1 MB)
132 20:16:55.216158 progress 20 % (2 MB)
133 20:16:55.303430 progress 25 % (2 MB)
134 20:16:55.387025 progress 30 % (3 MB)
135 20:16:55.472959 progress 35 % (3 MB)
136 20:16:55.552203 progress 40 % (4 MB)
137 20:16:55.634186 progress 45 % (5 MB)
138 20:16:55.726285 progress 50 % (5 MB)
139 20:16:55.815160 progress 55 % (6 MB)
140 20:16:55.908114 progress 60 % (6 MB)
141 20:16:55.998581 progress 65 % (7 MB)
142 20:16:56.088275 progress 70 % (7 MB)
143 20:16:56.174896 progress 75 % (8 MB)
144 20:16:56.266502 progress 80 % (8 MB)
145 20:16:56.355252 progress 85 % (9 MB)
146 20:16:56.447343 progress 90 % (10 MB)
147 20:16:56.530103 progress 95 % (10 MB)
148 20:16:56.616302 progress 100 % (11 MB)
149 20:16:56.630368 11 MB downloaded in 1.82 s (6.08 MB/s)
150 20:16:56.631031 end: 1.5.1 http-download (duration 00:00:02) [common]
152 20:16:56.631897 end: 1.5 download-retry (duration 00:00:02) [common]
153 20:16:56.632203 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 20:16:56.632470 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 20:17:12.749229 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/930439/extract-nfsrootfs-o67pfhe7
156 20:17:12.749839 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 20:17:12.750130 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 20:17:12.750740 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p
159 20:17:12.751168 makedir: /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin
160 20:17:12.751494 makedir: /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/tests
161 20:17:12.751812 makedir: /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/results
162 20:17:12.752168 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-add-keys
163 20:17:12.752714 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-add-sources
164 20:17:12.753221 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-background-process-start
165 20:17:12.753712 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-background-process-stop
166 20:17:12.754231 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-common-functions
167 20:17:12.754719 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-echo-ipv4
168 20:17:12.755190 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-install-packages
169 20:17:12.755668 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-installed-packages
170 20:17:12.756187 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-os-build
171 20:17:12.756693 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-probe-channel
172 20:17:12.757174 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-probe-ip
173 20:17:12.757727 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-target-ip
174 20:17:12.758201 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-target-mac
175 20:17:12.758670 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-target-storage
176 20:17:12.759144 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-case
177 20:17:12.759614 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-event
178 20:17:12.760120 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-feedback
179 20:17:12.760621 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-raise
180 20:17:12.761095 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-reference
181 20:17:12.761561 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-runner
182 20:17:12.762040 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-set
183 20:17:12.762508 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-test-shell
184 20:17:12.762985 Updating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-install-packages (oe)
185 20:17:12.763510 Updating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/bin/lava-installed-packages (oe)
186 20:17:12.763950 Creating /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/environment
187 20:17:12.764352 LAVA metadata
188 20:17:12.764612 - LAVA_JOB_ID=930439
189 20:17:12.764825 - LAVA_DISPATCHER_IP=192.168.6.2
190 20:17:12.765187 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 20:17:12.766133 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 20:17:12.766441 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 20:17:12.766645 skipped lava-vland-overlay
194 20:17:12.766885 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 20:17:12.767158 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 20:17:12.767372 skipped lava-multinode-overlay
197 20:17:12.767613 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 20:17:12.767858 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 20:17:12.768139 Loading test definitions
200 20:17:12.768418 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 20:17:12.768639 Using /lava-930439 at stage 0
202 20:17:12.769786 uuid=930439_1.6.2.4.1 testdef=None
203 20:17:12.770089 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 20:17:12.770349 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 20:17:12.772116 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 20:17:12.772908 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 20:17:12.775090 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 20:17:12.775914 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 20:17:12.778018 runner path: /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 930439_1.6.2.4.1
212 20:17:12.778585 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 20:17:12.779344 Creating lava-test-runner.conf files
215 20:17:12.779545 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/930439/lava-overlay-e08s12_p/lava-930439/0 for stage 0
216 20:17:12.779873 - 0_v4l2-decoder-conformance-h264
217 20:17:12.780251 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 20:17:12.780524 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 20:17:12.801880 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 20:17:12.802278 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 20:17:12.802532 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 20:17:12.802797 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 20:17:12.803057 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 20:17:13.481676 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 20:17:13.482147 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 20:17:13.482394 extracting modules file /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930439/extract-nfsrootfs-o67pfhe7
227 20:17:14.828133 extracting modules file /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk
228 20:17:16.208104 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 20:17:16.208586 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 20:17:16.208872 [common] Applying overlay to NFS
231 20:17:16.209089 [common] Applying overlay /var/lib/lava/dispatcher/tmp/930439/compress-overlay-ht0azf3i/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/930439/extract-nfsrootfs-o67pfhe7
232 20:17:16.238261 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 20:17:16.238686 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 20:17:16.238957 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 20:17:16.239187 Converting downloaded kernel to a uImage
236 20:17:16.239506 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/kernel/Image /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/kernel/uImage
237 20:17:16.750317 output: Image Name:
238 20:17:16.750741 output: Created: Sun Nov 3 20:17:16 2024
239 20:17:16.750954 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 20:17:16.751160 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 20:17:16.751362 output: Load Address: 01080000
242 20:17:16.751563 output: Entry Point: 01080000
243 20:17:16.751763 output:
244 20:17:16.752129 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 20:17:16.752406 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 20:17:16.752676 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 20:17:16.752928 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 20:17:16.753185 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 20:17:16.753438 Building ramdisk /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk
250 20:17:19.049581 >> 166824 blocks
251 20:17:26.732137 Adding RAMdisk u-boot header.
252 20:17:26.732857 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk.cpio.gz.uboot
253 20:17:26.976619 output: Image Name:
254 20:17:26.977305 output: Created: Sun Nov 3 20:17:26 2024
255 20:17:26.977789 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 20:17:26.978259 output: Data Size: 23431747 Bytes = 22882.57 KiB = 22.35 MiB
257 20:17:26.978906 output: Load Address: 00000000
258 20:17:26.979373 output: Entry Point: 00000000
259 20:17:26.979826 output:
260 20:17:26.980950 rename /var/lib/lava/dispatcher/tmp/930439/extract-overlay-ramdisk-0dx01jix/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
261 20:17:26.982717 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 20:17:26.983372 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 20:17:26.983977 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 20:17:26.984540 No LXC device requested
265 20:17:26.985267 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 20:17:26.985867 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 20:17:26.986436 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 20:17:26.986902 Checking files for TFTP limit of 4294967296 bytes.
269 20:17:26.990876 end: 1 tftp-deploy (duration 00:01:04) [common]
270 20:17:26.991665 start: 2 uboot-action (timeout 00:05:00) [common]
271 20:17:26.992309 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 20:17:26.992878 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 20:17:26.993453 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 20:17:26.994048 Using kernel file from prepare-kernel: 930439/tftp-deploy-drpp8e2d/kernel/uImage
275 20:17:26.995674 substitutions:
276 20:17:26.996187 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 20:17:26.996647 - {DTB_ADDR}: 0x01070000
278 20:17:26.997101 - {DTB}: 930439/tftp-deploy-drpp8e2d/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 20:17:26.997552 - {INITRD}: 930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
280 20:17:26.998145 - {KERNEL_ADDR}: 0x01080000
281 20:17:26.998607 - {KERNEL}: 930439/tftp-deploy-drpp8e2d/kernel/uImage
282 20:17:26.999053 - {LAVA_MAC}: None
283 20:17:26.999549 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/930439/extract-nfsrootfs-o67pfhe7
284 20:17:27.000051 - {NFS_SERVER_IP}: 192.168.6.2
285 20:17:27.000508 - {PRESEED_CONFIG}: None
286 20:17:27.000954 - {PRESEED_LOCAL}: None
287 20:17:27.002378 - {RAMDISK_ADDR}: 0x08000000
288 20:17:27.002840 - {RAMDISK}: 930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
289 20:17:27.003285 - {ROOT_PART}: None
290 20:17:27.003727 - {ROOT}: None
291 20:17:27.004205 - {SERVER_IP}: 192.168.6.2
292 20:17:27.004652 - {TEE_ADDR}: 0x83000000
293 20:17:27.005256 - {TEE}: None
294 20:17:27.005707 Parsed boot commands:
295 20:17:27.006137 - setenv autoload no
296 20:17:27.006575 - setenv initrd_high 0xffffffff
297 20:17:27.007012 - setenv fdt_high 0xffffffff
298 20:17:27.007448 - dhcp
299 20:17:27.007884 - setenv serverip 192.168.6.2
300 20:17:27.008380 - tftpboot 0x01080000 930439/tftp-deploy-drpp8e2d/kernel/uImage
301 20:17:27.008829 - tftpboot 0x08000000 930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
302 20:17:27.009267 - tftpboot 0x01070000 930439/tftp-deploy-drpp8e2d/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 20:17:27.009704 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/930439/extract-nfsrootfs-o67pfhe7,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 20:17:27.010152 - bootm 0x01080000 0x08000000 0x01070000
305 20:17:27.010716 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 20:17:27.013365 start: 2.3 connect-device (timeout 00:05:00) [common]
308 20:17:27.013869 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 20:17:27.030064 Setting prompt string to ['lava-test: # ']
310 20:17:27.032610 end: 2.3 connect-device (duration 00:00:00) [common]
311 20:17:27.033386 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 20:17:27.034059 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 20:17:27.034856 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 20:17:27.036150 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 20:17:27.075729 >> OK - accepted request
316 20:17:27.078551 Returned 0 in 0 seconds
317 20:17:27.179801 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 20:17:27.181705 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 20:17:27.182491 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 20:17:27.183114 Setting prompt string to ['Hit any key to stop autoboot']
322 20:17:27.183647 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 20:17:27.186326 Trying 192.168.56.21...
324 20:17:27.186894 Connected to conserv1.
325 20:17:27.187367 Escape character is '^]'.
326 20:17:27.187837
327 20:17:27.188365 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 20:17:27.188993
329 20:17:35.351426 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 20:17:35.352152 bl2_stage_init 0x01
331 20:17:35.352644 bl2_stage_init 0x81
332 20:17:35.357117 hw id: 0x0000 - pwm id 0x01
333 20:17:35.357654 bl2_stage_init 0xc1
334 20:17:35.362688 bl2_stage_init 0x02
335 20:17:35.363193
336 20:17:35.363661 L0:00000000
337 20:17:35.364155 L1:00000703
338 20:17:35.364624 L2:00008067
339 20:17:35.365075 L3:15000000
340 20:17:35.368243 S1:00000000
341 20:17:35.368767 B2:20282000
342 20:17:35.369234 B1:a0f83180
343 20:17:35.369680
344 20:17:35.370124 TE: 73347
345 20:17:35.370565
346 20:17:35.373760 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 20:17:35.374259
348 20:17:35.379407 Board ID = 1
349 20:17:35.379895 Set cpu clk to 24M
350 20:17:35.380384 Set clk81 to 24M
351 20:17:35.385083 Use GP1_pll as DSU clk.
352 20:17:35.385575 DSU clk: 1200 Mhz
353 20:17:35.386023 CPU clk: 1200 MHz
354 20:17:35.390585 Set clk81 to 166.6M
355 20:17:35.396178 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 20:17:35.396669 board id: 1
357 20:17:35.403463 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 20:17:35.414038 fw parse done
359 20:17:35.420107 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 20:17:35.462590 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 20:17:35.473562 PIEI prepare done
362 20:17:35.474065 fastboot data load
363 20:17:35.474521 fastboot data verify
364 20:17:35.479136 verify result: 266
365 20:17:35.484754 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 20:17:35.485246 LPDDR4 probe
367 20:17:35.485695 ddr clk to 1584MHz
368 20:17:35.492759 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 20:17:35.530002
370 20:17:35.530636 dmc_version 0001
371 20:17:35.536661 Check phy result
372 20:17:35.542586 INFO : End of CA training
373 20:17:35.543079 INFO : End of initialization
374 20:17:35.548164 INFO : Training has run successfully!
375 20:17:35.548645 Check phy result
376 20:17:35.553799 INFO : End of initialization
377 20:17:35.554282 INFO : End of read enable training
378 20:17:35.557041 INFO : End of fine write leveling
379 20:17:35.562581 INFO : End of Write leveling coarse delay
380 20:17:35.568194 INFO : Training has run successfully!
381 20:17:35.568682 Check phy result
382 20:17:35.569127 INFO : End of initialization
383 20:17:35.573764 INFO : End of read dq deskew training
384 20:17:35.577249 INFO : End of MPR read delay center optimization
385 20:17:35.582795 INFO : End of write delay center optimization
386 20:17:35.588430 INFO : End of read delay center optimization
387 20:17:35.588913 INFO : End of max read latency training
388 20:17:35.594049 INFO : Training has run successfully!
389 20:17:35.594525 1D training succeed
390 20:17:35.602134 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 20:17:35.649946 Check phy result
392 20:17:35.650629 INFO : End of initialization
393 20:17:35.672178 INFO : End of 2D read delay Voltage center optimization
394 20:17:35.691236 INFO : End of 2D read delay Voltage center optimization
395 20:17:35.743234 INFO : End of 2D write delay Voltage center optimization
396 20:17:35.792328 INFO : End of 2D write delay Voltage center optimization
397 20:17:35.797841 INFO : Training has run successfully!
398 20:17:35.798354
399 20:17:35.798826 channel==0
400 20:17:35.803481 RxClkDly_Margin_A0==88 ps 9
401 20:17:35.804066 TxDqDly_Margin_A0==98 ps 10
402 20:17:35.809102 RxClkDly_Margin_A1==88 ps 9
403 20:17:35.809662 TxDqDly_Margin_A1==98 ps 10
404 20:17:35.810125 TrainedVREFDQ_A0==75
405 20:17:35.814669 TrainedVREFDQ_A1==74
406 20:17:35.815165 VrefDac_Margin_A0==24
407 20:17:35.815621 DeviceVref_Margin_A0==39
408 20:17:35.820308 VrefDac_Margin_A1==23
409 20:17:35.820800 DeviceVref_Margin_A1==40
410 20:17:35.821252
411 20:17:35.821702
412 20:17:35.824864 channel==1
413 20:17:35.828220 RxClkDly_Margin_A0==88 ps 9
414 20:17:35.828703 TxDqDly_Margin_A0==98 ps 10
415 20:17:35.829154 RxClkDly_Margin_A1==88 ps 9
416 20:17:35.833756 TxDqDly_Margin_A1==98 ps 10
417 20:17:35.834251 TrainedVREFDQ_A0==78
418 20:17:35.839276 TrainedVREFDQ_A1==77
419 20:17:35.839767 VrefDac_Margin_A0==22
420 20:17:35.840263 DeviceVref_Margin_A0==36
421 20:17:35.844898 VrefDac_Margin_A1==22
422 20:17:35.845385 DeviceVref_Margin_A1==37
423 20:17:35.845835
424 20:17:35.850532 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 20:17:35.851015
426 20:17:35.882038 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000018 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 20:17:35.882649 2D training succeed
428 20:17:35.887488 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 20:17:35.893092 auto size-- 65535DDR cs0 size: 2048MB
430 20:17:35.893582 DDR cs1 size: 2048MB
431 20:17:35.898728 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 20:17:35.899217 cs0 DataBus test pass
433 20:17:35.904239 cs1 DataBus test pass
434 20:17:35.904720 cs0 AddrBus test pass
435 20:17:35.905235 cs1 AddrBus test pass
436 20:17:35.905728
437 20:17:35.909880 100bdlr_step_size ps== 478
438 20:17:35.910383 result report
439 20:17:35.915487 boot times 0Enable ddr reg access
440 20:17:35.920941 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 20:17:35.934612 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 20:17:36.590623 bl2z: ptr: 05129330, size: 00001e40
443 20:17:36.597951 0.0;M3 CHK:0;cm4_sp_mode 0
444 20:17:36.598456 MVN_1=0x00000000
445 20:17:36.598912 MVN_2=0x00000000
446 20:17:36.609484 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 20:17:36.610029 OPS=0x04
448 20:17:36.610492 ring efuse init
449 20:17:36.615082 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 20:17:36.615570 [0.017320 Inits done]
451 20:17:36.616066 secure task start!
452 20:17:36.622706 high task start!
453 20:17:36.623182 low task start!
454 20:17:36.623635 run into bl31
455 20:17:36.631359 NOTICE: BL31: v1.3(release):4fc40b1
456 20:17:36.639176 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 20:17:36.639709 NOTICE: BL31: G12A normal boot!
458 20:17:36.654712 NOTICE: BL31: BL33 decompress pass
459 20:17:36.660430 ERROR: Error initializing runtime service opteed_fast
460 20:17:39.401521 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 20:17:39.401977 bl2_stage_init 0x01
462 20:17:39.402191 bl2_stage_init 0x81
463 20:17:39.407003 hw id: 0x0000 - pwm id 0x01
464 20:17:39.407365 bl2_stage_init 0xc1
465 20:17:39.412613 bl2_stage_init 0x02
466 20:17:39.412919
467 20:17:39.413127 L0:00000000
468 20:17:39.413329 L1:00000703
469 20:17:39.413529 L2:00008067
470 20:17:39.413727 L3:15000000
471 20:17:39.418156 S1:00000000
472 20:17:39.418433 B2:20282000
473 20:17:39.418632 B1:a0f83180
474 20:17:39.418826
475 20:17:39.419023 TE: 72388
476 20:17:39.419218
477 20:17:39.423812 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 20:17:39.424166
479 20:17:39.429484 Board ID = 1
480 20:17:39.429834 Set cpu clk to 24M
481 20:17:39.430042 Set clk81 to 24M
482 20:17:39.435051 Use GP1_pll as DSU clk.
483 20:17:39.435379 DSU clk: 1200 Mhz
484 20:17:39.435586 CPU clk: 1200 MHz
485 20:17:39.440658 Set clk81 to 166.6M
486 20:17:39.446220 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 20:17:39.446491 board id: 1
488 20:17:39.453392 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 20:17:39.464341 fw parse done
490 20:17:39.470032 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 20:17:39.512630 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 20:17:39.523629 PIEI prepare done
493 20:17:39.524236 fastboot data load
494 20:17:39.524857 fastboot data verify
495 20:17:39.529264 verify result: 266
496 20:17:39.535448 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 20:17:39.536049 LPDDR4 probe
498 20:17:39.536460 ddr clk to 1584MHz
499 20:17:39.542836 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 20:17:39.580519
501 20:17:39.581285 dmc_version 0001
502 20:17:39.586917 Check phy result
503 20:17:39.592654 INFO : End of CA training
504 20:17:39.593019 INFO : End of initialization
505 20:17:39.598370 INFO : Training has run successfully!
506 20:17:39.598925 Check phy result
507 20:17:39.603966 INFO : End of initialization
508 20:17:39.604514 INFO : End of read enable training
509 20:17:39.609521 INFO : End of fine write leveling
510 20:17:39.615541 INFO : End of Write leveling coarse delay
511 20:17:39.615902 INFO : Training has run successfully!
512 20:17:39.616427 Check phy result
513 20:17:39.620736 INFO : End of initialization
514 20:17:39.621292 INFO : End of read dq deskew training
515 20:17:39.626295 INFO : End of MPR read delay center optimization
516 20:17:39.631913 INFO : End of write delay center optimization
517 20:17:39.637438 INFO : End of read delay center optimization
518 20:17:39.637913 INFO : End of max read latency training
519 20:17:39.643122 INFO : Training has run successfully!
520 20:17:39.643668 1D training succeed
521 20:17:39.652342 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 20:17:39.699892 Check phy result
523 20:17:39.700426 INFO : End of initialization
524 20:17:39.722161 INFO : End of 2D read delay Voltage center optimization
525 20:17:39.741484 INFO : End of 2D read delay Voltage center optimization
526 20:17:39.794430 INFO : End of 2D write delay Voltage center optimization
527 20:17:39.842491 INFO : End of 2D write delay Voltage center optimization
528 20:17:39.848085 INFO : Training has run successfully!
529 20:17:39.848646
530 20:17:39.849130 channel==0
531 20:17:39.853647 RxClkDly_Margin_A0==78 ps 8
532 20:17:39.854189 TxDqDly_Margin_A0==88 ps 9
533 20:17:39.859185 RxClkDly_Margin_A1==88 ps 9
534 20:17:39.859721 TxDqDly_Margin_A1==98 ps 10
535 20:17:39.860228 TrainedVREFDQ_A0==74
536 20:17:39.864738 TrainedVREFDQ_A1==75
537 20:17:39.865267 VrefDac_Margin_A0==25
538 20:17:39.865728 DeviceVref_Margin_A0==40
539 20:17:39.870425 VrefDac_Margin_A1==23
540 20:17:39.870954 DeviceVref_Margin_A1==39
541 20:17:39.871406
542 20:17:39.871844
543 20:17:39.872345 channel==1
544 20:17:39.876037 RxClkDly_Margin_A0==88 ps 9
545 20:17:39.876341 TxDqDly_Margin_A0==98 ps 10
546 20:17:39.881611 RxClkDly_Margin_A1==78 ps 8
547 20:17:39.881936 TxDqDly_Margin_A1==98 ps 10
548 20:17:39.887133 TrainedVREFDQ_A0==78
549 20:17:39.887454 TrainedVREFDQ_A1==77
550 20:17:39.887666 VrefDac_Margin_A0==22
551 20:17:39.892791 DeviceVref_Margin_A0==36
552 20:17:39.893106 VrefDac_Margin_A1==22
553 20:17:39.898427 DeviceVref_Margin_A1==37
554 20:17:39.898803
555 20:17:39.899047 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 20:17:39.899254
557 20:17:39.931895 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
558 20:17:39.932302 2D training succeed
559 20:17:39.937511 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 20:17:39.943115 auto size-- 65535DDR cs0 size: 2048MB
561 20:17:39.943463 DDR cs1 size: 2048MB
562 20:17:39.948730 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 20:17:39.949050 cs0 DataBus test pass
564 20:17:39.954401 cs1 DataBus test pass
565 20:17:39.954721 cs0 AddrBus test pass
566 20:17:39.954928 cs1 AddrBus test pass
567 20:17:39.955133
568 20:17:39.960030 100bdlr_step_size ps== 478
569 20:17:39.960402 result report
570 20:17:39.965669 boot times 0Enable ddr reg access
571 20:17:39.970776 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 20:17:39.984753 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 20:17:40.639747 bl2z: ptr: 05129330, size: 00001e40
574 20:17:40.645478 0.0;M3 CHK:0;cm4_sp_mode 0
575 20:17:40.646091 MVN_1=0x00000000
576 20:17:40.646550 MVN_2=0x00000000
577 20:17:40.656996 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 20:17:40.657519 OPS=0x04
579 20:17:40.657939 ring efuse init
580 20:17:40.662519 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 20:17:40.663048 [0.017310 Inits done]
582 20:17:40.663474 secure task start!
583 20:17:40.669737 high task start!
584 20:17:40.670187 low task start!
585 20:17:40.670598 run into bl31
586 20:17:40.678351 NOTICE: BL31: v1.3(release):4fc40b1
587 20:17:40.687036 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 20:17:40.687495 NOTICE: BL31: G12A normal boot!
589 20:17:40.701756 NOTICE: BL31: BL33 decompress pass
590 20:17:40.707420 ERROR: Error initializing runtime service opteed_fast
591 20:17:42.098267 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 20:17:42.098874 bl2_stage_init 0x01
593 20:17:42.099300 bl2_stage_init 0x81
594 20:17:42.103915 hw id: 0x0000 - pwm id 0x01
595 20:17:42.104412 bl2_stage_init 0xc1
596 20:17:42.109425 bl2_stage_init 0x02
597 20:17:42.109868
598 20:17:42.110302 L0:00000000
599 20:17:42.110712 L1:00000703
600 20:17:42.111114 L2:00008067
601 20:17:42.111514 L3:15000000
602 20:17:42.115099 S1:00000000
603 20:17:42.115546 B2:20282000
604 20:17:42.115952 B1:a0f83180
605 20:17:42.116390
606 20:17:42.116793 TE: 70192
607 20:17:42.117190
608 20:17:42.120726 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 20:17:42.121169
610 20:17:42.126283 Board ID = 1
611 20:17:42.126720 Set cpu clk to 24M
612 20:17:42.127122 Set clk81 to 24M
613 20:17:42.131781 Use GP1_pll as DSU clk.
614 20:17:42.132263 DSU clk: 1200 Mhz
615 20:17:42.132669 CPU clk: 1200 MHz
616 20:17:42.137463 Set clk81 to 166.6M
617 20:17:42.142997 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 20:17:42.143452 board id: 1
619 20:17:42.150197 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 20:17:42.160940 fw parse done
621 20:17:42.166838 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 20:17:42.209456 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 20:17:42.220547 PIEI prepare done
624 20:17:42.220998 fastboot data load
625 20:17:42.221410 fastboot data verify
626 20:17:42.226111 verify result: 266
627 20:17:42.231635 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 20:17:42.232117 LPDDR4 probe
629 20:17:42.232531 ddr clk to 1584MHz
630 20:17:42.239589 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 20:17:42.276957
632 20:17:42.277440 dmc_version 0001
633 20:17:42.283518 Check phy result
634 20:17:42.289384 INFO : End of CA training
635 20:17:42.289835 INFO : End of initialization
636 20:17:42.295020 INFO : Training has run successfully!
637 20:17:42.295462 Check phy result
638 20:17:42.300653 INFO : End of initialization
639 20:17:42.301086 INFO : End of read enable training
640 20:17:42.306280 INFO : End of fine write leveling
641 20:17:42.311840 INFO : End of Write leveling coarse delay
642 20:17:42.312315 INFO : Training has run successfully!
643 20:17:42.312723 Check phy result
644 20:17:42.317383 INFO : End of initialization
645 20:17:42.317822 INFO : End of read dq deskew training
646 20:17:42.323037 INFO : End of MPR read delay center optimization
647 20:17:42.328651 INFO : End of write delay center optimization
648 20:17:42.334296 INFO : End of read delay center optimization
649 20:17:42.334742 INFO : End of max read latency training
650 20:17:42.339862 INFO : Training has run successfully!
651 20:17:42.340361 1D training succeed
652 20:17:42.349107 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 20:17:42.396825 Check phy result
654 20:17:42.397520 INFO : End of initialization
655 20:17:42.419147 INFO : End of 2D read delay Voltage center optimization
656 20:17:42.438356 INFO : End of 2D read delay Voltage center optimization
657 20:17:42.490315 INFO : End of 2D write delay Voltage center optimization
658 20:17:42.539448 INFO : End of 2D write delay Voltage center optimization
659 20:17:42.545022 INFO : Training has run successfully!
660 20:17:42.545613
661 20:17:42.546123 channel==0
662 20:17:42.550707 RxClkDly_Margin_A0==78 ps 8
663 20:17:42.551619 TxDqDly_Margin_A0==98 ps 10
664 20:17:42.553989 RxClkDly_Margin_A1==88 ps 9
665 20:17:42.554611 TxDqDly_Margin_A1==88 ps 9
666 20:17:42.559610 TrainedVREFDQ_A0==75
667 20:17:42.560265 TrainedVREFDQ_A1==74
668 20:17:42.560761 VrefDac_Margin_A0==24
669 20:17:42.565151 DeviceVref_Margin_A0==39
670 20:17:42.565745 VrefDac_Margin_A1==23
671 20:17:42.570647 DeviceVref_Margin_A1==40
672 20:17:42.571210
673 20:17:42.571724
674 20:17:42.572273 channel==1
675 20:17:42.572771 RxClkDly_Margin_A0==88 ps 9
676 20:17:42.574082 TxDqDly_Margin_A0==98 ps 10
677 20:17:42.579706 RxClkDly_Margin_A1==78 ps 8
678 20:17:42.580349 TxDqDly_Margin_A1==88 ps 9
679 20:17:42.580835 TrainedVREFDQ_A0==77
680 20:17:42.585302 TrainedVREFDQ_A1==75
681 20:17:42.585912 VrefDac_Margin_A0==22
682 20:17:42.590809 DeviceVref_Margin_A0==37
683 20:17:42.591367 VrefDac_Margin_A1==22
684 20:17:42.591824 DeviceVref_Margin_A1==38
685 20:17:42.592316
686 20:17:42.596451 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 20:17:42.596984
688 20:17:42.629966 soc_vref_reg_value 0x 0000001a 00000019 00000019 00000017 00000018 00000016 00000018 00000016 00000017 00000018 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 20:17:42.630611 2D training succeed
690 20:17:42.635538 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 20:17:42.641276 auto size-- 65535DDR cs0 size: 2048MB
692 20:17:42.641858 DDR cs1 size: 2048MB
693 20:17:42.646927 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 20:17:42.647495 cs0 DataBus test pass
695 20:17:42.647962 cs1 DataBus test pass
696 20:17:42.652486 cs0 AddrBus test pass
697 20:17:42.653010 cs1 AddrBus test pass
698 20:17:42.653468
699 20:17:42.658034 100bdlr_step_size ps== 478
700 20:17:42.658595 result report
701 20:17:42.659063 boot times 0Enable ddr reg access
702 20:17:42.667690 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 20:17:42.681526 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 20:17:43.336732 bl2z: ptr: 05129330, size: 00001e40
705 20:17:43.344103 0.0;M3 CHK:0;cm4_sp_mode 0
706 20:17:43.344684 MVN_1=0x00000000
707 20:17:43.345155 MVN_2=0x00000000
708 20:17:43.355549 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 20:17:43.356139 OPS=0x04
710 20:17:43.356637 ring efuse init
711 20:17:43.361172 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 20:17:43.361729 [0.017318 Inits done]
713 20:17:43.362199 secure task start!
714 20:17:43.368546 high task start!
715 20:17:43.369074 low task start!
716 20:17:43.369531 run into bl31
717 20:17:43.377174 NOTICE: BL31: v1.3(release):4fc40b1
718 20:17:43.384930 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 20:17:43.385462 NOTICE: BL31: G12A normal boot!
720 20:17:43.400420 NOTICE: BL31: BL33 decompress pass
721 20:17:43.406133 ERROR: Error initializing runtime service opteed_fast
722 20:17:44.201642
723 20:17:44.202306
724 20:17:44.206961 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 20:17:44.207504
726 20:17:44.210456 Model: Libre Computer AML-S905D3-CC Solitude
727 20:17:44.357537 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 20:17:44.372874 DRAM: 2 GiB (effective 3.8 GiB)
729 20:17:44.473869 Core: 406 devices, 33 uclasses, devicetree: separate
730 20:17:44.479808 WDT: Not starting watchdog@f0d0
731 20:17:44.504830 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 20:17:44.517011 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 20:17:44.522091 ** Bad device specification mmc 0 **
734 20:17:44.532092 Card did not respond to voltage select! : -110
735 20:17:44.539669 ** Bad device specification mmc 0 **
736 20:17:44.540235 Couldn't find partition mmc 0
737 20:17:44.548083 Card did not respond to voltage select! : -110
738 20:17:44.553662 ** Bad device specification mmc 0 **
739 20:17:44.554176 Couldn't find partition mmc 0
740 20:17:44.558653 Error: could not access storage.
741 20:17:44.856134 Net: eth0: ethernet@ff3f0000
742 20:17:44.856765 starting USB...
743 20:17:45.100723 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 20:17:45.101318 Starting the controller
745 20:17:45.107724 USB XHCI 1.10
746 20:17:46.664135 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 20:17:46.672497 scanning usb for storage devices... 0 Storage Device(s) found
749 20:17:46.724279 Hit any key to stop autoboot: 1
750 20:17:46.725355 end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
751 20:17:46.726067 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 20:17:46.726615 Setting prompt string to ['=>']
753 20:17:46.727157 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 20:17:46.738419 0
755 20:17:46.739456 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 20:17:46.841005 => setenv autoload no
758 20:17:46.842120 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 20:17:46.847823 setenv autoload no
761 20:17:46.949491 => setenv initrd_high 0xffffffff
762 20:17:46.950461 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 20:17:46.954691 setenv initrd_high 0xffffffff
765 20:17:47.056286 => setenv fdt_high 0xffffffff
766 20:17:47.057241 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 20:17:47.061544 setenv fdt_high 0xffffffff
769 20:17:47.163196 => dhcp
770 20:17:47.164169 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 20:17:47.168237 dhcp
772 20:17:47.874102 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 20:17:47.874801 Speed: 1000, full duplex
774 20:17:47.875294 BOOTP broadcast 1
775 20:17:48.122701 BOOTP broadcast 2
776 20:17:48.135016 DHCP client bound to address 192.168.6.21 (260 ms)
778 20:17:48.236814 => setenv serverip 192.168.6.2
779 20:17:48.237893 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 20:17:48.242575 setenv serverip 192.168.6.2
782 20:17:48.344237 => tftpboot 0x01080000 930439/tftp-deploy-drpp8e2d/kernel/uImage
783 20:17:48.345274 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 20:17:48.352051 tftpboot 0x01080000 930439/tftp-deploy-drpp8e2d/kernel/uImage
785 20:17:48.352591 Speed: 1000, full duplex
786 20:17:48.353046 Using ethernet@ff3f0000 device
787 20:17:48.357586 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 20:17:48.363072 Filename '930439/tftp-deploy-drpp8e2d/kernel/uImage'.
789 20:17:48.367029 Load address: 0x1080000
790 20:17:51.380473 Loading: *################################################## 43.6 MiB
791 20:17:51.381148 14.5 MiB/s
792 20:17:51.381632 done
793 20:17:51.385147 Bytes transferred = 45713984 (2b98a40 hex)
795 20:17:51.486798 => tftpboot 0x08000000 930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
796 20:17:51.487598 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 20:17:51.494452 tftpboot 0x08000000 930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot
798 20:17:51.494968 Speed: 1000, full duplex
799 20:17:51.495409 Using ethernet@ff3f0000 device
800 20:17:51.500124 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 20:17:51.509824 Filename '930439/tftp-deploy-drpp8e2d/ramdisk/ramdisk.cpio.gz.uboot'.
802 20:17:51.510336 Load address: 0x8000000
803 20:17:51.933980 Loading: *############## UDP wrong checksum 000000ff 0000b3c4
804 20:17:51.987450 ## UDP wrong checksum 000000ff 00003db7
805 20:17:53.006945 ################################# UDP wrong checksum 00000005 000034ff
806 20:17:58.007478 T UDP wrong checksum 00000005 000034ff
807 20:18:08.009557 T T UDP wrong checksum 00000005 000034ff
808 20:18:15.160943 T UDP wrong checksum 000000ff 000049bc
809 20:18:15.211232 UDP wrong checksum 000000ff 0000d5ae
810 20:18:20.524941 T UDP wrong checksum 000000ff 0000591e
811 20:18:20.549377 UDP wrong checksum 000000ff 0000e210
812 20:18:28.013354 T T UDP wrong checksum 00000005 000034ff
813 20:18:48.018324 T T T
814 20:18:48.018988 Retry count exceeded; starting again
816 20:18:48.020599 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
819 20:18:48.022655 end: 2.4 uboot-commands (duration 00:01:21) [common]
821 20:18:48.024243 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
823 20:18:48.025412 end: 2 uboot-action (duration 00:01:21) [common]
825 20:18:48.027054 Cleaning after the job
826 20:18:48.027645 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/ramdisk
827 20:18:48.028885 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/kernel
828 20:18:48.078439 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/dtb
829 20:18:48.079180 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/nfsrootfs
830 20:18:48.149503 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930439/tftp-deploy-drpp8e2d/modules
831 20:18:48.158004 start: 4.1 power-off (timeout 00:00:30) [common]
832 20:18:48.158782 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
833 20:18:48.192827 >> OK - accepted request
834 20:18:48.194816 Returned 0 in 0 seconds
835 20:18:48.295785 end: 4.1 power-off (duration 00:00:00) [common]
837 20:18:48.297100 start: 4.2 read-feedback (timeout 00:10:00) [common]
838 20:18:48.297995 Listened to connection for namespace 'common' for up to 1s
839 20:18:49.298937 Finalising connection for namespace 'common'
840 20:18:49.299596 Disconnecting from shell: Finalise
841 20:18:49.300031 =>
842 20:18:49.400772 end: 4.2 read-feedback (duration 00:00:01) [common]
843 20:18:49.401217 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/930439
844 20:18:52.008367 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/930439
845 20:18:52.008995 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.