Boot log: meson-sm1-s905d3-libretech-cc

    1 20:32:23.409004  lava-dispatcher, installed at version: 2024.01
    2 20:32:23.409768  start: 0 validate
    3 20:32:23.410248  Start time: 2024-11-03 20:32:23.410218+00:00 (UTC)
    4 20:32:23.410796  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 20:32:23.411337  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 20:32:23.448453  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 20:32:23.449012  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 20:32:23.477952  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 20:32:23.478573  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 20:32:23.508157  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 20:32:23.508619  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 20:32:23.542953  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 20:32:23.543425  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-366-g886b7e80ab198%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 20:32:23.586109  validate duration: 0.18
   16 20:32:23.587015  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 20:32:23.587390  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 20:32:23.587725  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 20:32:23.588477  Not decompressing ramdisk as can be used compressed.
   20 20:32:23.589001  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
   21 20:32:23.589310  saving as /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/ramdisk/initrd.cpio.gz
   22 20:32:23.589597  total size: 5628140 (5 MB)
   23 20:32:23.629131  progress   0 % (0 MB)
   24 20:32:23.635077  progress   5 % (0 MB)
   25 20:32:23.643501  progress  10 % (0 MB)
   26 20:32:23.647562  progress  15 % (0 MB)
   27 20:32:23.651704  progress  20 % (1 MB)
   28 20:32:23.655484  progress  25 % (1 MB)
   29 20:32:23.659799  progress  30 % (1 MB)
   30 20:32:23.664419  progress  35 % (1 MB)
   31 20:32:23.668328  progress  40 % (2 MB)
   32 20:32:23.672549  progress  45 % (2 MB)
   33 20:32:23.676348  progress  50 % (2 MB)
   34 20:32:23.680995  progress  55 % (2 MB)
   35 20:32:23.685258  progress  60 % (3 MB)
   36 20:32:23.689082  progress  65 % (3 MB)
   37 20:32:23.693283  progress  70 % (3 MB)
   38 20:32:23.697204  progress  75 % (4 MB)
   39 20:32:23.701687  progress  80 % (4 MB)
   40 20:32:23.705655  progress  85 % (4 MB)
   41 20:32:23.710172  progress  90 % (4 MB)
   42 20:32:23.715594  progress  95 % (5 MB)
   43 20:32:23.719085  progress 100 % (5 MB)
   44 20:32:23.719796  5 MB downloaded in 0.13 s (41.23 MB/s)
   45 20:32:23.720402  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 20:32:23.721296  end: 1.1 download-retry (duration 00:00:00) [common]
   48 20:32:23.721588  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 20:32:23.721862  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 20:32:23.722355  downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/kernel/Image
   51 20:32:23.722612  saving as /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/kernel/Image
   52 20:32:23.722822  total size: 45713920 (43 MB)
   53 20:32:23.723035  No compression specified
   54 20:32:23.767515  progress   0 % (0 MB)
   55 20:32:23.795657  progress   5 % (2 MB)
   56 20:32:23.824559  progress  10 % (4 MB)
   57 20:32:23.852348  progress  15 % (6 MB)
   58 20:32:23.880250  progress  20 % (8 MB)
   59 20:32:23.910085  progress  25 % (10 MB)
   60 20:32:23.938113  progress  30 % (13 MB)
   61 20:32:23.966075  progress  35 % (15 MB)
   62 20:32:23.994120  progress  40 % (17 MB)
   63 20:32:24.022191  progress  45 % (19 MB)
   64 20:32:24.050497  progress  50 % (21 MB)
   65 20:32:24.079025  progress  55 % (24 MB)
   66 20:32:24.107161  progress  60 % (26 MB)
   67 20:32:24.135684  progress  65 % (28 MB)
   68 20:32:24.163898  progress  70 % (30 MB)
   69 20:32:24.192607  progress  75 % (32 MB)
   70 20:32:24.220935  progress  80 % (34 MB)
   71 20:32:24.248681  progress  85 % (37 MB)
   72 20:32:24.276996  progress  90 % (39 MB)
   73 20:32:24.305424  progress  95 % (41 MB)
   74 20:32:24.333019  progress 100 % (43 MB)
   75 20:32:24.333550  43 MB downloaded in 0.61 s (71.39 MB/s)
   76 20:32:24.334025  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 20:32:24.334846  end: 1.2 download-retry (duration 00:00:01) [common]
   79 20:32:24.335120  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 20:32:24.335386  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 20:32:24.335865  downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 20:32:24.336168  saving as /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 20:32:24.336379  total size: 53209 (0 MB)
   84 20:32:24.336589  No compression specified
   85 20:32:24.378362  progress  61 % (0 MB)
   86 20:32:24.379393  progress 100 % (0 MB)
   87 20:32:24.380050  0 MB downloaded in 0.04 s (1.16 MB/s)
   88 20:32:24.380545  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 20:32:24.381363  end: 1.3 download-retry (duration 00:00:00) [common]
   91 20:32:24.381630  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 20:32:24.382080  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 20:32:24.382558  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
   94 20:32:24.382804  saving as /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/nfsrootfs/full.rootfs.tar
   95 20:32:24.383010  total size: 474398908 (452 MB)
   96 20:32:24.383220  Using unxz to decompress xz
   97 20:32:24.421537  progress   0 % (0 MB)
   98 20:32:25.602724  progress   5 % (22 MB)
   99 20:32:27.063828  progress  10 % (45 MB)
  100 20:32:27.567083  progress  15 % (67 MB)
  101 20:32:28.411166  progress  20 % (90 MB)
  102 20:32:29.009585  progress  25 % (113 MB)
  103 20:32:29.425537  progress  30 % (135 MB)
  104 20:32:30.044135  progress  35 % (158 MB)
  105 20:32:31.052750  progress  40 % (181 MB)
  106 20:32:31.804965  progress  45 % (203 MB)
  107 20:32:32.376705  progress  50 % (226 MB)
  108 20:32:33.059757  progress  55 % (248 MB)
  109 20:32:34.247680  progress  60 % (271 MB)
  110 20:32:35.650898  progress  65 % (294 MB)
  111 20:32:37.230493  progress  70 % (316 MB)
  112 20:32:40.353236  progress  75 % (339 MB)
  113 20:32:42.799711  progress  80 % (361 MB)
  114 20:32:45.695802  progress  85 % (384 MB)
  115 20:32:48.887145  progress  90 % (407 MB)
  116 20:32:52.082575  progress  95 % (429 MB)
  117 20:32:55.278139  progress 100 % (452 MB)
  118 20:32:55.292636  452 MB downloaded in 30.91 s (14.64 MB/s)
  119 20:32:55.293493  end: 1.4.1 http-download (duration 00:00:31) [common]
  121 20:32:55.295228  end: 1.4 download-retry (duration 00:00:31) [common]
  122 20:32:55.295780  start: 1.5 download-retry (timeout 00:09:28) [common]
  123 20:32:55.296367  start: 1.5.1 http-download (timeout 00:09:28) [common]
  124 20:32:55.297243  downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-366-g886b7e80ab198/arm64/defconfig/gcc-12/modules.tar.xz
  125 20:32:55.297759  saving as /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/modules/modules.tar
  126 20:32:55.298183  total size: 11615340 (11 MB)
  127 20:32:55.298619  Using unxz to decompress xz
  128 20:32:55.351120  progress   0 % (0 MB)
  129 20:32:55.447121  progress   5 % (0 MB)
  130 20:32:55.542478  progress  10 % (1 MB)
  131 20:32:55.648813  progress  15 % (1 MB)
  132 20:32:55.742922  progress  20 % (2 MB)
  133 20:32:55.823109  progress  25 % (2 MB)
  134 20:32:55.899036  progress  30 % (3 MB)
  135 20:32:55.978110  progress  35 % (3 MB)
  136 20:32:56.050976  progress  40 % (4 MB)
  137 20:32:56.127645  progress  45 % (5 MB)
  138 20:32:56.212373  progress  50 % (5 MB)
  139 20:32:56.291167  progress  55 % (6 MB)
  140 20:32:56.378267  progress  60 % (6 MB)
  141 20:32:56.461748  progress  65 % (7 MB)
  142 20:32:56.543342  progress  70 % (7 MB)
  143 20:32:56.622500  progress  75 % (8 MB)
  144 20:32:56.707353  progress  80 % (8 MB)
  145 20:32:56.788254  progress  85 % (9 MB)
  146 20:32:56.872316  progress  90 % (10 MB)
  147 20:32:56.946392  progress  95 % (10 MB)
  148 20:32:57.023611  progress 100 % (11 MB)
  149 20:32:57.036774  11 MB downloaded in 1.74 s (6.37 MB/s)
  150 20:32:57.037495  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 20:32:57.039139  end: 1.5 download-retry (duration 00:00:02) [common]
  153 20:32:57.039679  start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
  154 20:32:57.040257  start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
  155 20:33:12.734785  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/930486/extract-nfsrootfs-gmj3ze6d
  156 20:33:12.735396  end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
  157 20:33:12.735718  start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
  158 20:33:12.736795  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl
  159 20:33:12.737724  makedir: /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin
  160 20:33:12.738404  makedir: /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/tests
  161 20:33:12.739062  makedir: /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/results
  162 20:33:12.739708  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-add-keys
  163 20:33:12.740507  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-add-sources
  164 20:33:12.741023  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-background-process-start
  165 20:33:12.741549  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-background-process-stop
  166 20:33:12.742077  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-common-functions
  167 20:33:12.742579  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-echo-ipv4
  168 20:33:12.743091  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-install-packages
  169 20:33:12.743689  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-installed-packages
  170 20:33:12.744255  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-os-build
  171 20:33:12.744765  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-probe-channel
  172 20:33:12.745257  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-probe-ip
  173 20:33:12.745745  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-target-ip
  174 20:33:12.746231  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-target-mac
  175 20:33:12.746778  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-target-storage
  176 20:33:12.747319  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-case
  177 20:33:12.747869  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-event
  178 20:33:12.748407  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-feedback
  179 20:33:12.748908  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-raise
  180 20:33:12.749395  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-reference
  181 20:33:12.749882  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-runner
  182 20:33:12.750376  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-set
  183 20:33:12.750866  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-test-shell
  184 20:33:12.751381  Updating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-install-packages (oe)
  185 20:33:12.751955  Updating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/bin/lava-installed-packages (oe)
  186 20:33:12.752462  Creating /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/environment
  187 20:33:12.752857  LAVA metadata
  188 20:33:12.753130  - LAVA_JOB_ID=930486
  189 20:33:12.753347  - LAVA_DISPATCHER_IP=192.168.6.2
  190 20:33:12.753714  start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
  191 20:33:12.754672  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 20:33:12.755008  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
  193 20:33:12.755218  skipped lava-vland-overlay
  194 20:33:12.755460  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 20:33:12.755715  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
  196 20:33:12.755937  skipped lava-multinode-overlay
  197 20:33:12.756210  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 20:33:12.756465  start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
  199 20:33:12.756717  Loading test definitions
  200 20:33:12.756995  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
  201 20:33:12.757218  Using /lava-930486 at stage 0
  202 20:33:12.758365  uuid=930486_1.6.2.4.1 testdef=None
  203 20:33:12.758688  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 20:33:12.758954  start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
  205 20:33:12.760727  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 20:33:12.761540  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
  208 20:33:12.763756  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 20:33:12.764655  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
  211 20:33:12.766750  runner path: /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 930486_1.6.2.4.1
  212 20:33:12.767381  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 20:33:12.768206  Creating lava-test-runner.conf files
  215 20:33:12.768411  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/930486/lava-overlay-nd4a9pwl/lava-930486/0 for stage 0
  216 20:33:12.768750  - 0_v4l2-decoder-conformance-h265
  217 20:33:12.769113  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 20:33:12.769402  start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
  219 20:33:12.790993  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 20:33:12.791419  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
  221 20:33:12.791690  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 20:33:12.791965  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 20:33:12.792277  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
  224 20:33:13.430739  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 20:33:13.431207  start: 1.6.4 extract-modules (timeout 00:09:10) [common]
  226 20:33:13.431481  extracting modules file /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930486/extract-nfsrootfs-gmj3ze6d
  227 20:33:14.781066  extracting modules file /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/modules/modules.tar to /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk
  228 20:33:16.169851  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 20:33:16.170314  start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
  230 20:33:16.170612  [common] Applying overlay to NFS
  231 20:33:16.170841  [common] Applying overlay /var/lib/lava/dispatcher/tmp/930486/compress-overlay-vj_s_e8q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/930486/extract-nfsrootfs-gmj3ze6d
  232 20:33:16.200066  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 20:33:16.200486  start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
  234 20:33:16.200777  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
  235 20:33:16.201018  Converting downloaded kernel to a uImage
  236 20:33:16.201347  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/kernel/Image /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/kernel/uImage
  237 20:33:16.700899  output: Image Name:   
  238 20:33:16.701323  output: Created:      Sun Nov  3 20:33:16 2024
  239 20:33:16.701550  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 20:33:16.701766  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 20:33:16.701975  output: Load Address: 01080000
  242 20:33:16.702180  output: Entry Point:  01080000
  243 20:33:16.702382  output: 
  244 20:33:16.702721  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
  245 20:33:16.703002  end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
  246 20:33:16.703285  start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
  247 20:33:16.703553  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 20:33:16.703823  start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
  249 20:33:16.704126  Building ramdisk /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk
  250 20:33:18.867077  >> 166824 blocks

  251 20:33:27.187409  Adding RAMdisk u-boot header.
  252 20:33:27.187859  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk.cpio.gz.uboot
  253 20:33:27.425792  output: Image Name:   
  254 20:33:27.426213  output: Created:      Sun Nov  3 20:33:27 2024
  255 20:33:27.426640  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 20:33:27.427057  output: Data Size:    23432165 Bytes = 22882.97 KiB = 22.35 MiB
  257 20:33:27.427460  output: Load Address: 00000000
  258 20:33:27.427862  output: Entry Point:  00000000
  259 20:33:27.428336  output: 
  260 20:33:27.429398  rename /var/lib/lava/dispatcher/tmp/930486/extract-overlay-ramdisk-86bnyov1/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  261 20:33:27.430137  end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
  262 20:33:27.430701  end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
  263 20:33:27.431244  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
  264 20:33:27.431708  No LXC device requested
  265 20:33:27.432269  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 20:33:27.432803  start: 1.8 deploy-device-env (timeout 00:08:56) [common]
  267 20:33:27.433307  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 20:33:27.433730  Checking files for TFTP limit of 4294967296 bytes.
  269 20:33:27.436466  end: 1 tftp-deploy (duration 00:01:04) [common]
  270 20:33:27.437053  start: 2 uboot-action (timeout 00:05:00) [common]
  271 20:33:27.437590  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 20:33:27.438096  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 20:33:27.438608  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 20:33:27.439139  Using kernel file from prepare-kernel: 930486/tftp-deploy-u6hf8l6c/kernel/uImage
  275 20:33:27.439772  substitutions:
  276 20:33:27.440217  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 20:33:27.440632  - {DTB_ADDR}: 0x01070000
  278 20:33:27.441035  - {DTB}: 930486/tftp-deploy-u6hf8l6c/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 20:33:27.441436  - {INITRD}: 930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  280 20:33:27.441835  - {KERNEL_ADDR}: 0x01080000
  281 20:33:27.442229  - {KERNEL}: 930486/tftp-deploy-u6hf8l6c/kernel/uImage
  282 20:33:27.442627  - {LAVA_MAC}: None
  283 20:33:27.443066  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/930486/extract-nfsrootfs-gmj3ze6d
  284 20:33:27.443471  - {NFS_SERVER_IP}: 192.168.6.2
  285 20:33:27.443868  - {PRESEED_CONFIG}: None
  286 20:33:27.444316  - {PRESEED_LOCAL}: None
  287 20:33:27.444715  - {RAMDISK_ADDR}: 0x08000000
  288 20:33:27.445104  - {RAMDISK}: 930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  289 20:33:27.445497  - {ROOT_PART}: None
  290 20:33:27.445888  - {ROOT}: None
  291 20:33:27.446276  - {SERVER_IP}: 192.168.6.2
  292 20:33:27.446668  - {TEE_ADDR}: 0x83000000
  293 20:33:27.447056  - {TEE}: None
  294 20:33:27.447445  Parsed boot commands:
  295 20:33:27.447825  - setenv autoload no
  296 20:33:27.448249  - setenv initrd_high 0xffffffff
  297 20:33:27.448642  - setenv fdt_high 0xffffffff
  298 20:33:27.449032  - dhcp
  299 20:33:27.449420  - setenv serverip 192.168.6.2
  300 20:33:27.449807  - tftpboot 0x01080000 930486/tftp-deploy-u6hf8l6c/kernel/uImage
  301 20:33:27.450197  - tftpboot 0x08000000 930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  302 20:33:27.450583  - tftpboot 0x01070000 930486/tftp-deploy-u6hf8l6c/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 20:33:27.450970  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/930486/extract-nfsrootfs-gmj3ze6d,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 20:33:27.451371  - bootm 0x01080000 0x08000000 0x01070000
  305 20:33:27.451875  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 20:33:27.453409  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 20:33:27.453833  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 20:33:27.468340  Setting prompt string to ['lava-test: # ']
  310 20:33:27.469834  end: 2.3 connect-device (duration 00:00:00) [common]
  311 20:33:27.470441  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 20:33:27.471001  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 20:33:27.471545  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 20:33:27.472692  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 20:33:27.513257  >> OK - accepted request

  316 20:33:27.515363  Returned 0 in 0 seconds
  317 20:33:27.616568  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 20:33:27.618215  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 20:33:27.618813  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 20:33:27.619354  Setting prompt string to ['Hit any key to stop autoboot']
  322 20:33:27.619828  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 20:33:27.621486  Trying 192.168.56.21...
  324 20:33:27.621976  Connected to conserv1.
  325 20:33:27.622410  Escape character is '^]'.
  326 20:33:27.622847  
  327 20:33:27.623280  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 20:33:27.623724  
  329 20:33:34.804355  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 20:33:34.805006  bl2_stage_init 0x01
  331 20:33:34.805456  bl2_stage_init 0x81
  332 20:33:34.809964  hw id: 0x0000 - pwm id 0x01
  333 20:33:34.810413  bl2_stage_init 0xc1
  334 20:33:34.815482  bl2_stage_init 0x02
  335 20:33:34.815927  
  336 20:33:34.816411  L0:00000000
  337 20:33:34.816824  L1:00000703
  338 20:33:34.817224  L2:00008067
  339 20:33:34.817622  L3:15000000
  340 20:33:34.821327  S1:00000000
  341 20:33:34.821759  B2:20282000
  342 20:33:34.822162  B1:a0f83180
  343 20:33:34.822563  
  344 20:33:34.822962  TE: 69368
  345 20:33:34.823361  
  346 20:33:34.826908  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 20:33:34.827347  
  348 20:33:34.832502  Board ID = 1
  349 20:33:34.832941  Set cpu clk to 24M
  350 20:33:34.833350  Set clk81 to 24M
  351 20:33:34.838089  Use GP1_pll as DSU clk.
  352 20:33:34.838522  DSU clk: 1200 Mhz
  353 20:33:34.838927  CPU clk: 1200 MHz
  354 20:33:34.843670  Set clk81 to 166.6M
  355 20:33:34.849344  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 20:33:34.849796  board id: 1
  357 20:33:34.856338  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 20:33:34.867001  fw parse done
  359 20:33:34.872965  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 20:33:34.915507  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 20:33:34.926665  PIEI prepare done
  362 20:33:34.927187  fastboot data load
  363 20:33:34.927607  fastboot data verify
  364 20:33:34.932118  verify result: 266
  365 20:33:34.937769  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 20:33:34.938216  LPDDR4 probe
  367 20:33:34.938620  ddr clk to 1584MHz
  368 20:33:34.945796  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 20:33:34.982923  
  370 20:33:34.983385  dmc_version 0001
  371 20:33:34.989569  Check phy result
  372 20:33:34.995474  INFO : End of CA training
  373 20:33:34.995944  INFO : End of initialization
  374 20:33:35.001146  INFO : Training has run successfully!
  375 20:33:35.001581  Check phy result
  376 20:33:35.006709  INFO : End of initialization
  377 20:33:35.007133  INFO : End of read enable training
  378 20:33:35.010012  INFO : End of fine write leveling
  379 20:33:35.015536  INFO : End of Write leveling coarse delay
  380 20:33:35.021215  INFO : Training has run successfully!
  381 20:33:35.021652  Check phy result
  382 20:33:35.022056  INFO : End of initialization
  383 20:33:35.026761  INFO : End of read dq deskew training
  384 20:33:35.032360  INFO : End of MPR read delay center optimization
  385 20:33:35.032815  INFO : End of write delay center optimization
  386 20:33:35.038090  INFO : End of read delay center optimization
  387 20:33:35.043601  INFO : End of max read latency training
  388 20:33:35.044082  INFO : Training has run successfully!
  389 20:33:35.049186  1D training succeed
  390 20:33:35.055128  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 20:33:35.102839  Check phy result
  392 20:33:35.103323  INFO : End of initialization
  393 20:33:35.125126  INFO : End of 2D read delay Voltage center optimization
  394 20:33:35.144263  INFO : End of 2D read delay Voltage center optimization
  395 20:33:35.195240  INFO : End of 2D write delay Voltage center optimization
  396 20:33:35.245557  INFO : End of 2D write delay Voltage center optimization
  397 20:33:35.250993  INFO : Training has run successfully!
  398 20:33:35.251454  
  399 20:33:35.251901  channel==0
  400 20:33:35.256517  RxClkDly_Margin_A0==88 ps 9
  401 20:33:35.256954  TxDqDly_Margin_A0==98 ps 10
  402 20:33:35.259903  RxClkDly_Margin_A1==88 ps 9
  403 20:33:35.260363  TxDqDly_Margin_A1==98 ps 10
  404 20:33:35.265482  TrainedVREFDQ_A0==74
  405 20:33:35.265902  TrainedVREFDQ_A1==75
  406 20:33:35.266304  VrefDac_Margin_A0==24
  407 20:33:35.271083  DeviceVref_Margin_A0==40
  408 20:33:35.271530  VrefDac_Margin_A1==22
  409 20:33:35.276594  DeviceVref_Margin_A1==39
  410 20:33:35.277039  
  411 20:33:35.277442  
  412 20:33:35.277844  channel==1
  413 20:33:35.278239  RxClkDly_Margin_A0==88 ps 9
  414 20:33:35.282270  TxDqDly_Margin_A0==98 ps 10
  415 20:33:35.282757  RxClkDly_Margin_A1==88 ps 9
  416 20:33:35.287850  TxDqDly_Margin_A1==88 ps 9
  417 20:33:35.288341  TrainedVREFDQ_A0==75
  418 20:33:35.288754  TrainedVREFDQ_A1==75
  419 20:33:35.293712  VrefDac_Margin_A0==22
  420 20:33:35.294217  DeviceVref_Margin_A0==39
  421 20:33:35.310552  VrefDac_Margin_A1==22
  422 20:33:35.311119  DeviceVref_Margin_A1==39
  423 20:33:35.311529  
  424 20:33:35.312246   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 20:33:35.312672  
  426 20:33:35.335909  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  427 20:33:35.336522  2D training succeed
  428 20:33:35.341219  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 20:33:35.346806  auto size-- 65535DDR cs0 size: 2048MB
  430 20:33:35.347248  DDR cs1 size: 2048MB
  431 20:33:35.352408  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 20:33:35.352922  cs0 DataBus test pass
  433 20:33:35.353347  cs1 DataBus test pass
  434 20:33:35.358135  cs0 AddrBus test pass
  435 20:33:35.358709  cs1 AddrBus test pass
  436 20:33:35.359129  
  437 20:33:35.363848  100bdlr_step_size ps== 478
  438 20:33:35.364386  result report
  439 20:33:35.364794  boot times 0Enable ddr reg access
  440 20:33:35.373249  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 20:33:35.387563  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 20:33:36.043059  bl2z: ptr: 05129330, size: 00001e40
  443 20:33:36.050131  0.0;M3 CHK:0;cm4_sp_mode 0
  444 20:33:36.050602  MVN_1=0x00000000
  445 20:33:36.051008  MVN_2=0x00000000
  446 20:33:36.061530  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 20:33:36.061970  OPS=0x04
  448 20:33:36.062378  ring efuse init
  449 20:33:36.067163  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 20:33:36.067614  [0.017319 Inits done]
  451 20:33:36.068050  secure task start!
  452 20:33:36.074688  high task start!
  453 20:33:36.075114  low task start!
  454 20:33:36.075515  run into bl31
  455 20:33:36.083320  NOTICE:  BL31: v1.3(release):4fc40b1
  456 20:33:36.091049  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 20:33:36.091490  NOTICE:  BL31: G12A normal boot!
  458 20:33:36.106618  NOTICE:  BL31: BL33 decompress pass
  459 20:33:36.112313  ERROR:   Error initializing runtime service opteed_fast
  460 20:33:38.854832  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 20:33:38.855463  bl2_stage_init 0x01
  462 20:33:38.855890  bl2_stage_init 0x81
  463 20:33:38.860518  hw id: 0x0000 - pwm id 0x01
  464 20:33:38.861049  bl2_stage_init 0xc1
  465 20:33:38.866003  bl2_stage_init 0x02
  466 20:33:38.866497  
  467 20:33:38.866895  L0:00000000
  468 20:33:38.867282  L1:00000703
  469 20:33:38.867672  L2:00008067
  470 20:33:38.868099  L3:15000000
  471 20:33:38.871666  S1:00000000
  472 20:33:38.872119  B2:20282000
  473 20:33:38.872511  B1:a0f83180
  474 20:33:38.872893  
  475 20:33:38.873278  TE: 71182
  476 20:33:38.873660  
  477 20:33:38.877171  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 20:33:38.877591  
  479 20:33:38.882780  Board ID = 1
  480 20:33:38.883195  Set cpu clk to 24M
  481 20:33:38.883578  Set clk81 to 24M
  482 20:33:38.888338  Use GP1_pll as DSU clk.
  483 20:33:38.888761  DSU clk: 1200 Mhz
  484 20:33:38.889149  CPU clk: 1200 MHz
  485 20:33:38.893936  Set clk81 to 166.6M
  486 20:33:38.899636  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 20:33:38.900104  board id: 1
  488 20:33:38.906766  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 20:33:38.917545  fw parse done
  490 20:33:38.923384  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 20:33:38.966030  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 20:33:38.976966  PIEI prepare done
  493 20:33:38.977385  fastboot data load
  494 20:33:38.977777  fastboot data verify
  495 20:33:38.982585  verify result: 266
  496 20:33:38.988206  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 20:33:38.988627  LPDDR4 probe
  498 20:33:38.989017  ddr clk to 1584MHz
  499 20:33:38.996268  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 20:33:39.032643  
  501 20:33:39.033143  dmc_version 0001
  502 20:33:39.040224  Check phy result
  503 20:33:39.046089  INFO : End of CA training
  504 20:33:39.046526  INFO : End of initialization
  505 20:33:39.051610  INFO : Training has run successfully!
  506 20:33:39.052056  Check phy result
  507 20:33:39.057356  INFO : End of initialization
  508 20:33:39.057796  INFO : End of read enable training
  509 20:33:39.062855  INFO : End of fine write leveling
  510 20:33:39.068375  INFO : End of Write leveling coarse delay
  511 20:33:39.068795  INFO : Training has run successfully!
  512 20:33:39.069190  Check phy result
  513 20:33:39.074049  INFO : End of initialization
  514 20:33:39.074463  INFO : End of read dq deskew training
  515 20:33:39.079619  INFO : End of MPR read delay center optimization
  516 20:33:39.085261  INFO : End of write delay center optimization
  517 20:33:39.090788  INFO : End of read delay center optimization
  518 20:33:39.091200  INFO : End of max read latency training
  519 20:33:39.096367  INFO : Training has run successfully!
  520 20:33:39.096780  1D training succeed
  521 20:33:39.105594  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 20:33:39.153217  Check phy result
  523 20:33:39.153722  INFO : End of initialization
  524 20:33:39.175663  INFO : End of 2D read delay Voltage center optimization
  525 20:33:39.194672  INFO : End of 2D read delay Voltage center optimization
  526 20:33:39.246778  INFO : End of 2D write delay Voltage center optimization
  527 20:33:39.295921  INFO : End of 2D write delay Voltage center optimization
  528 20:33:39.301516  INFO : Training has run successfully!
  529 20:33:39.302071  
  530 20:33:39.302473  channel==0
  531 20:33:39.306929  RxClkDly_Margin_A0==69 ps 7
  532 20:33:39.307351  TxDqDly_Margin_A0==98 ps 10
  533 20:33:39.312531  RxClkDly_Margin_A1==78 ps 8
  534 20:33:39.312945  TxDqDly_Margin_A1==98 ps 10
  535 20:33:39.313339  TrainedVREFDQ_A0==74
  536 20:33:39.318136  TrainedVREFDQ_A1==74
  537 20:33:39.318552  VrefDac_Margin_A0==22
  538 20:33:39.318945  DeviceVref_Margin_A0==40
  539 20:33:39.323804  VrefDac_Margin_A1==23
  540 20:33:39.324283  DeviceVref_Margin_A1==40
  541 20:33:39.324679  
  542 20:33:39.325069  
  543 20:33:39.329315  channel==1
  544 20:33:39.329729  RxClkDly_Margin_A0==78 ps 8
  545 20:33:39.330119  TxDqDly_Margin_A0==98 ps 10
  546 20:33:39.334949  RxClkDly_Margin_A1==78 ps 8
  547 20:33:39.335410  TxDqDly_Margin_A1==88 ps 9
  548 20:33:39.340571  TrainedVREFDQ_A0==78
  549 20:33:39.341016  TrainedVREFDQ_A1==75
  550 20:33:39.341410  VrefDac_Margin_A0==22
  551 20:33:39.346102  DeviceVref_Margin_A0==36
  552 20:33:39.346520  VrefDac_Margin_A1==22
  553 20:33:39.351810  DeviceVref_Margin_A1==39
  554 20:33:39.352279  
  555 20:33:39.352677   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 20:33:39.353067  
  557 20:33:39.385324  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 20:33:39.385825  2D training succeed
  559 20:33:39.390963  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 20:33:39.396498  auto size-- 65535DDR cs0 size: 2048MB
  561 20:33:39.396934  DDR cs1 size: 2048MB
  562 20:33:39.402135  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 20:33:39.402572  cs0 DataBus test pass
  564 20:33:39.407792  cs1 DataBus test pass
  565 20:33:39.408243  cs0 AddrBus test pass
  566 20:33:39.408635  cs1 AddrBus test pass
  567 20:33:39.409022  
  568 20:33:39.413324  100bdlr_step_size ps== 478
  569 20:33:39.413743  result report
  570 20:33:39.418947  boot times 0Enable ddr reg access
  571 20:33:39.424222  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 20:33:39.437988  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 20:33:40.093189  bl2z: ptr: 05129330, size: 00001e40
  574 20:33:40.099394  0.0;M3 CHK:0;cm4_sp_mode 0
  575 20:33:40.099859  MVN_1=0x00000000
  576 20:33:40.100328  MVN_2=0x00000000
  577 20:33:40.110884  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 20:33:40.111327  OPS=0x04
  579 20:33:40.111738  ring efuse init
  580 20:33:40.116433  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 20:33:40.116882  [0.017319 Inits done]
  582 20:33:40.117292  secure task start!
  583 20:33:40.124231  high task start!
  584 20:33:40.124662  low task start!
  585 20:33:40.125067  run into bl31
  586 20:33:40.132885  NOTICE:  BL31: v1.3(release):4fc40b1
  587 20:33:40.140616  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 20:33:40.141054  NOTICE:  BL31: G12A normal boot!
  589 20:33:40.156158  NOTICE:  BL31: BL33 decompress pass
  590 20:33:40.161828  ERROR:   Error initializing runtime service opteed_fast
  591 20:33:41.554432  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 20:33:41.555033  bl2_stage_init 0x01
  593 20:33:41.555457  bl2_stage_init 0x81
  594 20:33:41.560043  hw id: 0x0000 - pwm id 0x01
  595 20:33:41.560494  bl2_stage_init 0xc1
  596 20:33:41.560911  bl2_stage_init 0x02
  597 20:33:41.561315  
  598 20:33:41.565590  L0:00000000
  599 20:33:41.566028  L1:00000703
  600 20:33:41.566436  L2:00008067
  601 20:33:41.566838  L3:15000000
  602 20:33:41.567235  S1:00000000
  603 20:33:41.568226  B2:20282000
  604 20:33:41.568664  B1:a0f83180
  605 20:33:41.569071  
  606 20:33:41.573717  TE: 68741
  607 20:33:41.574147  
  608 20:33:41.579316  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 20:33:41.579749  
  610 20:33:41.580193  Board ID = 1
  611 20:33:41.580599  Set cpu clk to 24M
  612 20:33:41.584866  Set clk81 to 24M
  613 20:33:41.585297  Use GP1_pll as DSU clk.
  614 20:33:41.585703  DSU clk: 1200 Mhz
  615 20:33:41.588509  CPU clk: 1200 MHz
  616 20:33:41.588936  Set clk81 to 166.6M
  617 20:33:41.593983  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 20:33:41.599682  board id: 1
  619 20:33:41.605605  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 20:33:41.616421  fw parse done
  621 20:33:41.622471  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 20:33:41.665513  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 20:33:41.676635  PIEI prepare done
  624 20:33:41.677078  fastboot data load
  625 20:33:41.677489  fastboot data verify
  626 20:33:41.682131  verify result: 266
  627 20:33:41.687825  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 20:33:41.688349  LPDDR4 probe
  629 20:33:41.688764  ddr clk to 1584MHz
  630 20:33:41.695705  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 20:33:41.733466  
  632 20:33:41.733898  dmc_version 0001
  633 20:33:41.740534  Check phy result
  634 20:33:41.746536  INFO : End of CA training
  635 20:33:41.746983  INFO : End of initialization
  636 20:33:41.752195  INFO : Training has run successfully!
  637 20:33:41.752629  Check phy result
  638 20:33:41.757761  INFO : End of initialization
  639 20:33:41.758242  INFO : End of read enable training
  640 20:33:41.763336  INFO : End of fine write leveling
  641 20:33:41.768963  INFO : End of Write leveling coarse delay
  642 20:33:41.769403  INFO : Training has run successfully!
  643 20:33:41.769816  Check phy result
  644 20:33:41.774496  INFO : End of initialization
  645 20:33:41.774934  INFO : End of read dq deskew training
  646 20:33:41.780245  INFO : End of MPR read delay center optimization
  647 20:33:41.785661  INFO : End of write delay center optimization
  648 20:33:41.791340  INFO : End of read delay center optimization
  649 20:33:41.791771  INFO : End of max read latency training
  650 20:33:41.796932  INFO : Training has run successfully!
  651 20:33:41.797370  1D training succeed
  652 20:33:41.805690  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 20:33:41.854446  Check phy result
  654 20:33:41.854883  INFO : End of initialization
  655 20:33:41.881810  INFO : End of 2D read delay Voltage center optimization
  656 20:33:41.905903  INFO : End of 2D read delay Voltage center optimization
  657 20:33:41.962698  INFO : End of 2D write delay Voltage center optimization
  658 20:33:42.016538  INFO : End of 2D write delay Voltage center optimization
  659 20:33:42.022143  INFO : Training has run successfully!
  660 20:33:42.022575  
  661 20:33:42.022989  channel==0
  662 20:33:42.027757  RxClkDly_Margin_A0==78 ps 8
  663 20:33:42.028242  TxDqDly_Margin_A0==98 ps 10
  664 20:33:42.031083  RxClkDly_Margin_A1==78 ps 8
  665 20:33:42.031512  TxDqDly_Margin_A1==98 ps 10
  666 20:33:42.036752  TrainedVREFDQ_A0==74
  667 20:33:42.037187  TrainedVREFDQ_A1==75
  668 20:33:42.037595  VrefDac_Margin_A0==23
  669 20:33:42.042283  DeviceVref_Margin_A0==40
  670 20:33:42.042710  VrefDac_Margin_A1==23
  671 20:33:42.047884  DeviceVref_Margin_A1==39
  672 20:33:42.048339  
  673 20:33:42.048750  
  674 20:33:42.049150  channel==1
  675 20:33:42.049555  RxClkDly_Margin_A0==88 ps 9
  676 20:33:42.053517  TxDqDly_Margin_A0==98 ps 10
  677 20:33:42.053952  RxClkDly_Margin_A1==78 ps 8
  678 20:33:42.059140  TxDqDly_Margin_A1==88 ps 9
  679 20:33:42.059569  TrainedVREFDQ_A0==78
  680 20:33:42.059975  TrainedVREFDQ_A1==75
  681 20:33:42.064704  VrefDac_Margin_A0==22
  682 20:33:42.065131  DeviceVref_Margin_A0==36
  683 20:33:42.070196  VrefDac_Margin_A1==22
  684 20:33:42.070619  DeviceVref_Margin_A1==38
  685 20:33:42.071019  
  686 20:33:42.075822   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 20:33:42.076281  
  688 20:33:42.103803  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000019 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 20:33:42.109394  2D training succeed
  690 20:33:42.115010  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 20:33:42.115437  auto size-- 65535DDR cs0 size: 2048MB
  692 20:33:42.120685  DDR cs1 size: 2048MB
  693 20:33:42.121109  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 20:33:42.126322  cs0 DataBus test pass
  695 20:33:42.126830  cs1 DataBus test pass
  696 20:33:42.127239  cs0 AddrBus test pass
  697 20:33:42.131771  cs1 AddrBus test pass
  698 20:33:42.132241  
  699 20:33:42.132652  100bdlr_step_size ps== 471
  700 20:33:42.133064  result report
  701 20:33:42.137358  boot times 0Enable ddr reg access
  702 20:33:42.144955  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 20:33:42.158800  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 20:33:42.817220  bl2z: ptr: 05129330, size: 00001e40
  705 20:33:42.825432  0.0;M3 CHK:0;cm4_sp_mode 0
  706 20:33:42.825906  MVN_1=0x00000000
  707 20:33:42.826318  MVN_2=0x00000000
  708 20:33:42.836948  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 20:33:42.837404  OPS=0x04
  710 20:33:42.837811  ring efuse init
  711 20:33:42.842571  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 20:33:42.843021  [0.017354 Inits done]
  713 20:33:42.843428  secure task start!
  714 20:33:42.850362  high task start!
  715 20:33:42.850827  low task start!
  716 20:33:42.851234  run into bl31
  717 20:33:42.859095  NOTICE:  BL31: v1.3(release):4fc40b1
  718 20:33:42.866836  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 20:33:42.867304  NOTICE:  BL31: G12A normal boot!
  720 20:33:42.882292  NOTICE:  BL31: BL33 decompress pass
  721 20:33:42.887726  ERROR:   Error initializing runtime service opteed_fast
  722 20:33:43.682366  
  723 20:33:43.682965  
  724 20:33:43.687727  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 20:33:43.688225  
  726 20:33:43.691211  Model: Libre Computer AML-S905D3-CC Solitude
  727 20:33:43.838205  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 20:33:43.853204  DRAM:  2 GiB (effective 3.8 GiB)
  729 20:33:43.954545  Core:  406 devices, 33 uclasses, devicetree: separate
  730 20:33:43.959264  WDT:   Not starting watchdog@f0d0
  731 20:33:43.985428  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 20:33:43.997602  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 20:33:44.002690  ** Bad device specification mmc 0 **
  734 20:33:44.012631  Card did not respond to voltage select! : -110
  735 20:33:44.020357  ** Bad device specification mmc 0 **
  736 20:33:44.020873  Couldn't find partition mmc 0
  737 20:33:44.028586  Card did not respond to voltage select! : -110
  738 20:33:44.034175  ** Bad device specification mmc 0 **
  739 20:33:44.034659  Couldn't find partition mmc 0
  740 20:33:44.039222  Error: could not access storage.
  741 20:33:44.335900  Net:   eth0: ethernet@ff3f0000
  742 20:33:44.336561  starting USB...
  743 20:33:44.581432  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 20:33:44.582069  Starting the controller
  745 20:33:44.588347  USB XHCI 1.10
  746 20:33:46.141954  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 20:33:46.150134         scanning usb for storage devices... 0 Storage Device(s) found
  749 20:33:46.201617  Hit any key to stop autoboot:  1 
  750 20:33:46.202487  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 20:33:46.203079  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 20:33:46.203559  Setting prompt string to ['=>']
  753 20:33:46.204095  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 20:33:46.216216   0 
  755 20:33:46.217181  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 20:33:46.318428  => setenv autoload no
  758 20:33:46.319231  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 20:33:46.324103  setenv autoload no
  761 20:33:46.425625  => setenv initrd_high 0xffffffff
  762 20:33:46.426402  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 20:33:46.430701  setenv initrd_high 0xffffffff
  765 20:33:46.532194  => setenv fdt_high 0xffffffff
  766 20:33:46.532988  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 20:33:46.537282  setenv fdt_high 0xffffffff
  769 20:33:46.638772  => dhcp
  770 20:33:46.639543  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  771 20:33:46.643002  dhcp
  772 20:33:47.549762  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 20:33:47.550413  Speed: 1000, full duplex
  774 20:33:47.550803  BOOTP broadcast 1
  775 20:33:47.798623  BOOTP broadcast 2
  776 20:33:47.815045  DHCP client bound to address 192.168.6.21 (265 ms)
  778 20:33:47.916518  => setenv serverip 192.168.6.2
  779 20:33:47.917146  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  780 20:33:47.921868  setenv serverip 192.168.6.2
  782 20:33:48.023255  => tftpboot 0x01080000 930486/tftp-deploy-u6hf8l6c/kernel/uImage
  783 20:33:48.023873  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  784 20:33:48.030591  tftpboot 0x01080000 930486/tftp-deploy-u6hf8l6c/kernel/uImage
  785 20:33:48.031070  Speed: 1000, full duplex
  786 20:33:48.031478  Using ethernet@ff3f0000 device
  787 20:33:48.036180  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  788 20:33:48.041699  Filename '930486/tftp-deploy-u6hf8l6c/kernel/uImage'.
  789 20:33:48.045616  Load address: 0x1080000
  790 20:33:50.933205  Loading: *##################################################  43.6 MiB
  791 20:33:50.933855  	 15.1 MiB/s
  792 20:33:50.934299  done
  793 20:33:50.936517  Bytes transferred = 45713984 (2b98a40 hex)
  795 20:33:51.038146  => tftpboot 0x08000000 930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  796 20:33:51.038920  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  797 20:33:51.045675  tftpboot 0x08000000 930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot
  798 20:33:51.046203  Speed: 1000, full duplex
  799 20:33:51.046639  Using ethernet@ff3f0000 device
  800 20:33:51.051033  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  801 20:33:51.061024  Filename '930486/tftp-deploy-u6hf8l6c/ramdisk/ramdisk.cpio.gz.uboot'.
  802 20:33:51.061583  Load address: 0x8000000
  803 20:33:52.558304  Loading: *################################################# UDP wrong checksum 00000005 00004005
  804 20:33:57.558115  T  UDP wrong checksum 00000005 00004005
  805 20:34:07.561163  T T  UDP wrong checksum 00000005 00004005
  806 20:34:15.236447  T  UDP wrong checksum 000000ff 00008f9c
  807 20:34:15.246378   UDP wrong checksum 000000ff 0000238f
  808 20:34:16.197733   UDP wrong checksum 000000ff 0000034f
  809 20:34:16.216104   UDP wrong checksum 000000ff 00009841
  810 20:34:16.525928   UDP wrong checksum 000000ff 0000ed95
  811 20:34:16.560884   UDP wrong checksum 000000ff 00008688
  812 20:34:24.040679  T T  UDP wrong checksum 000000ff 000031d4
  813 20:34:24.074874   UDP wrong checksum 000000ff 0000c8c6
  814 20:34:27.565603  T  UDP wrong checksum 00000005 00004005
  815 20:34:47.570233  T T T 
  816 20:34:47.570908  Retry count exceeded; starting again
  818 20:34:47.572510  end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
  821 20:34:47.574583  end: 2.4 uboot-commands (duration 00:01:20) [common]
  823 20:34:47.576168  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  825 20:34:47.577335  end: 2 uboot-action (duration 00:01:20) [common]
  827 20:34:47.579014  Cleaning after the job
  828 20:34:47.579601  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/ramdisk
  829 20:34:47.581294  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/kernel
  830 20:34:47.611903  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/dtb
  831 20:34:47.613315  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/nfsrootfs
  832 20:34:47.675534  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/930486/tftp-deploy-u6hf8l6c/modules
  833 20:34:47.682328  start: 4.1 power-off (timeout 00:00:30) [common]
  834 20:34:47.682931  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  835 20:34:47.716495  >> OK - accepted request

  836 20:34:47.718200  Returned 0 in 0 seconds
  837 20:34:47.818906  end: 4.1 power-off (duration 00:00:00) [common]
  839 20:34:47.819827  start: 4.2 read-feedback (timeout 00:10:00) [common]
  840 20:34:47.820514  Listened to connection for namespace 'common' for up to 1s
  841 20:34:48.821412  Finalising connection for namespace 'common'
  842 20:34:48.821866  Disconnecting from shell: Finalise
  843 20:34:48.822152  => 
  844 20:34:48.922861  end: 4.2 read-feedback (duration 00:00:01) [common]
  845 20:34:48.923544  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/930486
  846 20:34:51.380476  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/930486
  847 20:34:51.381088  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.