Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:58:29.152202 lava-dispatcher, installed at version: 2024.01
2 22:58:29.153254 start: 0 validate
3 22:58:29.154035 Start time: 2024-11-03 22:58:29.153986+00:00 (UTC)
4 22:58:29.154765 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:58:29.155558 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:58:29.203117 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:58:29.203655 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 22:58:29.229829 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:58:29.230622 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 22:58:29.258791 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:58:29.259289 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:58:29.291305 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:58:29.291829 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 22:58:29.334362 validate duration: 0.18
16 22:58:29.335244 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:58:29.335582 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:58:29.335909 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:58:29.336539 Not decompressing ramdisk as can be used compressed.
20 22:58:29.337000 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 22:58:29.337289 saving as /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/ramdisk/initrd.cpio.gz
22 22:58:29.337571 total size: 5628182 (5 MB)
23 22:58:29.369079 progress 0 % (0 MB)
24 22:58:29.373341 progress 5 % (0 MB)
25 22:58:29.377750 progress 10 % (0 MB)
26 22:58:29.381473 progress 15 % (0 MB)
27 22:58:29.385547 progress 20 % (1 MB)
28 22:58:29.389260 progress 25 % (1 MB)
29 22:58:29.393373 progress 30 % (1 MB)
30 22:58:29.397490 progress 35 % (1 MB)
31 22:58:29.401123 progress 40 % (2 MB)
32 22:58:29.405182 progress 45 % (2 MB)
33 22:58:29.409772 progress 50 % (2 MB)
34 22:58:29.414775 progress 55 % (2 MB)
35 22:58:29.419827 progress 60 % (3 MB)
36 22:58:29.424463 progress 65 % (3 MB)
37 22:58:29.429518 progress 70 % (3 MB)
38 22:58:29.434013 progress 75 % (4 MB)
39 22:58:29.439001 progress 80 % (4 MB)
40 22:58:29.443459 progress 85 % (4 MB)
41 22:58:29.448501 progress 90 % (4 MB)
42 22:58:29.453400 progress 95 % (5 MB)
43 22:58:29.457616 progress 100 % (5 MB)
44 22:58:29.458497 5 MB downloaded in 0.12 s (44.39 MB/s)
45 22:58:29.459310 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:58:29.460645 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:58:29.461118 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:58:29.461563 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:58:29.462260 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/kernel/Image
51 22:58:29.462612 saving as /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/kernel/Image
52 22:58:29.462913 total size: 37878272 (36 MB)
53 22:58:29.463275 No compression specified
54 22:58:29.504677 progress 0 % (0 MB)
55 22:58:29.528085 progress 5 % (1 MB)
56 22:58:29.552360 progress 10 % (3 MB)
57 22:58:29.576373 progress 15 % (5 MB)
58 22:58:29.605346 progress 20 % (7 MB)
59 22:58:29.630617 progress 25 % (9 MB)
60 22:58:29.654870 progress 30 % (10 MB)
61 22:58:29.677799 progress 35 % (12 MB)
62 22:58:29.700572 progress 40 % (14 MB)
63 22:58:29.724203 progress 45 % (16 MB)
64 22:58:29.748987 progress 50 % (18 MB)
65 22:58:29.771704 progress 55 % (19 MB)
66 22:58:29.795189 progress 60 % (21 MB)
67 22:58:29.818529 progress 65 % (23 MB)
68 22:58:29.841484 progress 70 % (25 MB)
69 22:58:29.863750 progress 75 % (27 MB)
70 22:58:29.886836 progress 80 % (28 MB)
71 22:58:29.909904 progress 85 % (30 MB)
72 22:58:29.932936 progress 90 % (32 MB)
73 22:58:29.955671 progress 95 % (34 MB)
74 22:58:29.977639 progress 100 % (36 MB)
75 22:58:29.978432 36 MB downloaded in 0.52 s (70.07 MB/s)
76 22:58:29.978929 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:58:29.979756 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:58:29.980179 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:58:29.980494 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:58:29.980952 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 22:58:29.981200 saving as /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/dtb/meson-g12b-a311d-libretech-cc.dtb
83 22:58:29.981409 total size: 54703 (0 MB)
84 22:58:29.981619 No compression specified
85 22:58:30.019123 progress 59 % (0 MB)
86 22:58:30.020027 progress 100 % (0 MB)
87 22:58:30.020607 0 MB downloaded in 0.04 s (1.33 MB/s)
88 22:58:30.021076 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:58:30.021893 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:58:30.022157 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:58:30.022422 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:58:30.022868 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 22:58:30.023113 saving as /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/nfsrootfs/full.rootfs.tar
95 22:58:30.023318 total size: 107552908 (102 MB)
96 22:58:30.023525 Using unxz to decompress xz
97 22:58:30.063607 progress 0 % (0 MB)
98 22:58:30.807961 progress 5 % (5 MB)
99 22:58:31.553087 progress 10 % (10 MB)
100 22:58:32.274520 progress 15 % (15 MB)
101 22:58:33.032400 progress 20 % (20 MB)
102 22:58:33.603443 progress 25 % (25 MB)
103 22:58:34.223788 progress 30 % (30 MB)
104 22:58:34.967400 progress 35 % (35 MB)
105 22:58:35.315920 progress 40 % (41 MB)
106 22:58:35.739631 progress 45 % (46 MB)
107 22:58:36.464215 progress 50 % (51 MB)
108 22:58:37.182915 progress 55 % (56 MB)
109 22:58:37.933190 progress 60 % (61 MB)
110 22:58:38.685933 progress 65 % (66 MB)
111 22:58:39.420444 progress 70 % (71 MB)
112 22:58:40.199472 progress 75 % (76 MB)
113 22:58:40.944496 progress 80 % (82 MB)
114 22:58:41.723225 progress 85 % (87 MB)
115 22:58:42.452509 progress 90 % (92 MB)
116 22:58:43.155259 progress 95 % (97 MB)
117 22:58:43.887672 progress 100 % (102 MB)
118 22:58:43.899356 102 MB downloaded in 13.88 s (7.39 MB/s)
119 22:58:43.900276 end: 1.4.1 http-download (duration 00:00:14) [common]
121 22:58:43.901941 end: 1.4 download-retry (duration 00:00:14) [common]
122 22:58:43.902475 start: 1.5 download-retry (timeout 00:09:45) [common]
123 22:58:43.903006 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 22:58:43.903957 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/modules.tar.xz
125 22:58:43.904464 saving as /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/modules/modules.tar
126 22:58:43.904885 total size: 11773700 (11 MB)
127 22:58:43.905308 Using unxz to decompress xz
128 22:58:43.951749 progress 0 % (0 MB)
129 22:58:44.018297 progress 5 % (0 MB)
130 22:58:44.092964 progress 10 % (1 MB)
131 22:58:44.188153 progress 15 % (1 MB)
132 22:58:44.283813 progress 20 % (2 MB)
133 22:58:44.363071 progress 25 % (2 MB)
134 22:58:44.438933 progress 30 % (3 MB)
135 22:58:44.520112 progress 35 % (3 MB)
136 22:58:44.598876 progress 40 % (4 MB)
137 22:58:44.674326 progress 45 % (5 MB)
138 22:58:44.758909 progress 50 % (5 MB)
139 22:58:44.842413 progress 55 % (6 MB)
140 22:58:44.927955 progress 60 % (6 MB)
141 22:58:45.009788 progress 65 % (7 MB)
142 22:58:45.097855 progress 70 % (7 MB)
143 22:58:45.202905 progress 75 % (8 MB)
144 22:58:45.299936 progress 80 % (9 MB)
145 22:58:45.383207 progress 85 % (9 MB)
146 22:58:45.468471 progress 90 % (10 MB)
147 22:58:45.547468 progress 95 % (10 MB)
148 22:58:45.625329 progress 100 % (11 MB)
149 22:58:45.636563 11 MB downloaded in 1.73 s (6.48 MB/s)
150 22:58:45.637275 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:58:45.638918 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:58:45.639454 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 22:58:45.640038 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 22:58:55.481284 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/931094/extract-nfsrootfs-h1ixcxfs
156 22:58:55.481903 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 22:58:55.482228 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 22:58:55.482887 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5
159 22:58:55.483379 makedir: /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin
160 22:58:55.483768 makedir: /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/tests
161 22:58:55.484172 makedir: /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/results
162 22:58:55.484564 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-add-keys
163 22:58:55.485160 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-add-sources
164 22:58:55.485730 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-background-process-start
165 22:58:55.486284 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-background-process-stop
166 22:58:55.486855 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-common-functions
167 22:58:55.487382 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-echo-ipv4
168 22:58:55.487891 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-install-packages
169 22:58:55.488455 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-installed-packages
170 22:58:55.488974 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-os-build
171 22:58:55.489480 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-probe-channel
172 22:58:55.490022 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-probe-ip
173 22:58:55.490527 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-target-ip
174 22:58:55.491059 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-target-mac
175 22:58:55.491632 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-target-storage
176 22:58:55.492533 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-case
177 22:58:55.494065 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-event
178 22:58:55.494724 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-feedback
179 22:58:55.495432 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-raise
180 22:58:55.496160 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-reference
181 22:58:55.497023 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-runner
182 22:58:55.497759 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-set
183 22:58:55.498382 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-test-shell
184 22:58:55.499162 Updating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-install-packages (oe)
185 22:58:55.499855 Updating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/bin/lava-installed-packages (oe)
186 22:58:55.504270 Creating /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/environment
187 22:58:55.504858 LAVA metadata
188 22:58:55.505149 - LAVA_JOB_ID=931094
189 22:58:55.505375 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:58:55.505767 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 22:58:55.506787 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:58:55.507115 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 22:58:55.507339 skipped lava-vland-overlay
194 22:58:55.507599 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:58:55.507868 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 22:58:55.508141 skipped lava-multinode-overlay
197 22:58:55.508404 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:58:55.508672 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 22:58:55.508939 Loading test definitions
200 22:58:55.509234 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 22:58:55.509472 Using /lava-931094 at stage 0
202 22:58:55.510751 uuid=931094_1.6.2.4.1 testdef=None
203 22:58:55.511061 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:58:55.511325 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 22:58:55.513239 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:58:55.514046 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 22:58:55.516317 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:58:55.517191 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 22:58:55.519498 runner path: /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/0/tests/0_dmesg test_uuid 931094_1.6.2.4.1
212 22:58:55.520163 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:58:55.520943 Creating lava-test-runner.conf files
215 22:58:55.521151 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/931094/lava-overlay-qelwndz5/lava-931094/0 for stage 0
216 22:58:55.521494 - 0_dmesg
217 22:58:55.521836 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:58:55.522115 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 22:58:55.543932 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:58:55.544359 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 22:58:55.544622 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:58:55.544891 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:58:55.545158 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 22:58:56.166153 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:58:56.166603 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 22:58:56.166849 extracting modules file /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931094/extract-nfsrootfs-h1ixcxfs
227 22:58:57.542748 extracting modules file /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk
228 22:58:58.945816 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:58:58.946299 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 22:58:58.946583 [common] Applying overlay to NFS
231 22:58:58.946798 [common] Applying overlay /var/lib/lava/dispatcher/tmp/931094/compress-overlay-6x7gw6a1/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/931094/extract-nfsrootfs-h1ixcxfs
232 22:58:58.976307 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:58:58.976710 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 22:58:58.976984 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 22:58:58.977214 Converting downloaded kernel to a uImage
236 22:58:58.977526 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/kernel/Image /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/kernel/uImage
237 22:58:59.399401 output: Image Name:
238 22:58:59.399807 output: Created: Sun Nov 3 22:58:58 2024
239 22:58:59.400080 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:58:59.400295 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
241 22:58:59.400499 output: Load Address: 01080000
242 22:58:59.400700 output: Entry Point: 01080000
243 22:58:59.400897 output:
244 22:58:59.401228 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:58:59.401493 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:58:59.401760 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 22:58:59.402014 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:58:59.402272 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 22:58:59.402530 Building ramdisk /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk
250 22:59:01.721926 >> 173435 blocks
251 22:59:09.496553 Adding RAMdisk u-boot header.
252 22:59:09.496959 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk.cpio.gz.uboot
253 22:59:09.799837 output: Image Name:
254 22:59:09.800266 output: Created: Sun Nov 3 22:59:09 2024
255 22:59:09.800518 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:59:09.800746 output: Data Size: 24146393 Bytes = 23580.46 KiB = 23.03 MiB
257 22:59:09.800963 output: Load Address: 00000000
258 22:59:09.801174 output: Entry Point: 00000000
259 22:59:09.801394 output:
260 22:59:09.802045 rename /var/lib/lava/dispatcher/tmp/931094/extract-overlay-ramdisk-s4dz41ls/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
261 22:59:09.802496 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 22:59:09.802821 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 22:59:09.803120 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 22:59:09.803401 No LXC device requested
265 22:59:09.803688 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:59:09.804011 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 22:59:09.804335 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:59:09.804575 Checking files for TFTP limit of 4294967296 bytes.
269 22:59:09.806283 end: 1 tftp-deploy (duration 00:00:40) [common]
270 22:59:09.806611 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:59:09.806910 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:59:09.807190 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:59:09.807494 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:59:09.807801 Using kernel file from prepare-kernel: 931094/tftp-deploy-1t7vp1ez/kernel/uImage
275 22:59:09.808182 substitutions:
276 22:59:09.808430 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:59:09.808652 - {DTB_ADDR}: 0x01070000
278 22:59:09.808872 - {DTB}: 931094/tftp-deploy-1t7vp1ez/dtb/meson-g12b-a311d-libretech-cc.dtb
279 22:59:09.809082 - {INITRD}: 931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
280 22:59:09.809308 - {KERNEL_ADDR}: 0x01080000
281 22:59:09.809516 - {KERNEL}: 931094/tftp-deploy-1t7vp1ez/kernel/uImage
282 22:59:09.809730 - {LAVA_MAC}: None
283 22:59:09.809963 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/931094/extract-nfsrootfs-h1ixcxfs
284 22:59:09.810194 - {NFS_SERVER_IP}: 192.168.6.2
285 22:59:09.810403 - {PRESEED_CONFIG}: None
286 22:59:09.810720 - {PRESEED_LOCAL}: None
287 22:59:09.810944 - {RAMDISK_ADDR}: 0x08000000
288 22:59:09.811166 - {RAMDISK}: 931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
289 22:59:09.811377 - {ROOT_PART}: None
290 22:59:09.811593 - {ROOT}: None
291 22:59:09.811798 - {SERVER_IP}: 192.168.6.2
292 22:59:09.812045 - {TEE_ADDR}: 0x83000000
293 22:59:09.812258 - {TEE}: None
294 22:59:09.812479 Parsed boot commands:
295 22:59:09.812681 - setenv autoload no
296 22:59:09.812909 - setenv initrd_high 0xffffffff
297 22:59:09.813138 - setenv fdt_high 0xffffffff
298 22:59:09.813342 - dhcp
299 22:59:09.813544 - setenv serverip 192.168.6.2
300 22:59:09.813756 - tftpboot 0x01080000 931094/tftp-deploy-1t7vp1ez/kernel/uImage
301 22:59:09.813966 - tftpboot 0x08000000 931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
302 22:59:09.814181 - tftpboot 0x01070000 931094/tftp-deploy-1t7vp1ez/dtb/meson-g12b-a311d-libretech-cc.dtb
303 22:59:09.814406 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/931094/extract-nfsrootfs-h1ixcxfs,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:59:09.814617 - bootm 0x01080000 0x08000000 0x01070000
305 22:59:09.814908 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:59:09.815756 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:59:09.816042 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 22:59:09.828471 Setting prompt string to ['lava-test: # ']
310 22:59:09.829731 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:59:09.830294 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:59:09.830788 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:59:09.831267 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:59:09.832248 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 22:59:09.868667 >> OK - accepted request
316 22:59:09.870908 Returned 0 in 0 seconds
317 22:59:09.972099 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:59:09.974064 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:59:09.974736 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:59:09.975312 Setting prompt string to ['Hit any key to stop autoboot']
322 22:59:09.975830 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:59:09.977579 Trying 192.168.56.21...
324 22:59:09.978137 Connected to conserv1.
325 22:59:09.978607 Escape character is '^]'.
326 22:59:09.979062
327 22:59:09.979527 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:59:09.980044
329 22:59:21.044149 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 22:59:21.044558 bl2_stage_init 0x01
331 22:59:21.044780 bl2_stage_init 0x81
332 22:59:21.049663 hw id: 0x0000 - pwm id 0x01
333 22:59:21.049967 bl2_stage_init 0xc1
334 22:59:21.050178 bl2_stage_init 0x02
335 22:59:21.050379
336 22:59:21.055334 L0:00000000
337 22:59:21.055632 L1:20000703
338 22:59:21.055869 L2:00008067
339 22:59:21.056116 L3:14000000
340 22:59:21.058313 B2:00402000
341 22:59:21.058572 B1:e0f83180
342 22:59:21.058779
343 22:59:21.058982 TE: 58124
344 22:59:21.059183
345 22:59:21.069552 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 22:59:21.069878
347 22:59:21.070089 Board ID = 1
348 22:59:21.070289 Set A53 clk to 24M
349 22:59:21.070489 Set A73 clk to 24M
350 22:59:21.075118 Set clk81 to 24M
351 22:59:21.075378 A53 clk: 1200 MHz
352 22:59:21.075583 A73 clk: 1200 MHz
353 22:59:21.080632 CLK81: 166.6M
354 22:59:21.080895 smccc: 00012a92
355 22:59:21.086324 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 22:59:21.086592 board id: 1
357 22:59:21.094747 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:59:21.105402 fw parse done
359 22:59:21.111368 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:59:21.153994 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:59:21.164909 PIEI prepare done
362 22:59:21.165450 fastboot data load
363 22:59:21.165857 fastboot data verify
364 22:59:21.170480 verify result: 266
365 22:59:21.176097 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 22:59:21.176609 LPDDR4 probe
367 22:59:21.177012 ddr clk to 1584MHz
368 22:59:21.184136 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:59:21.221357
370 22:59:21.221940 dmc_version 0001
371 22:59:21.228124 Check phy result
372 22:59:21.233920 INFO : End of CA training
373 22:59:21.234418 INFO : End of initialization
374 22:59:21.239472 INFO : Training has run successfully!
375 22:59:21.239973 Check phy result
376 22:59:21.245077 INFO : End of initialization
377 22:59:21.245581 INFO : End of read enable training
378 22:59:21.250699 INFO : End of fine write leveling
379 22:59:21.256326 INFO : End of Write leveling coarse delay
380 22:59:21.256839 INFO : Training has run successfully!
381 22:59:21.257241 Check phy result
382 22:59:21.261916 INFO : End of initialization
383 22:59:21.262416 INFO : End of read dq deskew training
384 22:59:21.267453 INFO : End of MPR read delay center optimization
385 22:59:21.273095 INFO : End of write delay center optimization
386 22:59:21.278690 INFO : End of read delay center optimization
387 22:59:21.279203 INFO : End of max read latency training
388 22:59:21.284292 INFO : Training has run successfully!
389 22:59:21.284793 1D training succeed
390 22:59:21.293473 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:59:21.341119 Check phy result
392 22:59:21.341695 INFO : End of initialization
393 22:59:21.363643 INFO : End of 2D read delay Voltage center optimization
394 22:59:21.383914 INFO : End of 2D read delay Voltage center optimization
395 22:59:21.436027 INFO : End of 2D write delay Voltage center optimization
396 22:59:21.485352 INFO : End of 2D write delay Voltage center optimization
397 22:59:21.490848 INFO : Training has run successfully!
398 22:59:21.491338
399 22:59:21.491755 channel==0
400 22:59:21.496500 RxClkDly_Margin_A0==88 ps 9
401 22:59:21.497020 TxDqDly_Margin_A0==98 ps 10
402 22:59:21.502065 RxClkDly_Margin_A1==88 ps 9
403 22:59:21.502549 TxDqDly_Margin_A1==98 ps 10
404 22:59:21.502962 TrainedVREFDQ_A0==74
405 22:59:21.507611 TrainedVREFDQ_A1==75
406 22:59:21.508148 VrefDac_Margin_A0==24
407 22:59:21.508563 DeviceVref_Margin_A0==40
408 22:59:21.513253 VrefDac_Margin_A1==25
409 22:59:21.513732 DeviceVref_Margin_A1==39
410 22:59:21.514141
411 22:59:21.514545
412 22:59:21.518987 channel==1
413 22:59:21.519468 RxClkDly_Margin_A0==98 ps 10
414 22:59:21.519876 TxDqDly_Margin_A0==98 ps 10
415 22:59:21.524442 RxClkDly_Margin_A1==98 ps 10
416 22:59:21.524929 TxDqDly_Margin_A1==88 ps 9
417 22:59:21.530039 TrainedVREFDQ_A0==77
418 22:59:21.530535 TrainedVREFDQ_A1==77
419 22:59:21.530945 VrefDac_Margin_A0==22
420 22:59:21.535615 DeviceVref_Margin_A0==37
421 22:59:21.536123 VrefDac_Margin_A1==24
422 22:59:21.541237 DeviceVref_Margin_A1==37
423 22:59:21.541716
424 22:59:21.542137 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:59:21.546806
426 22:59:21.574931 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 22:59:21.575786 2D training succeed
428 22:59:21.580629 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:59:21.586106 auto size-- 65535DDR cs0 size: 2048MB
430 22:59:21.586800 DDR cs1 size: 2048MB
431 22:59:21.591751 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:59:21.592493 cs0 DataBus test pass
433 22:59:21.597288 cs1 DataBus test pass
434 22:59:21.597898 cs0 AddrBus test pass
435 22:59:21.598413 cs1 AddrBus test pass
436 22:59:21.598917
437 22:59:21.602871 100bdlr_step_size ps== 420
438 22:59:21.603500 result report
439 22:59:21.608451 boot times 0Enable ddr reg access
440 22:59:21.613899 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:59:21.627557 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 22:59:22.201154 0.0;M3 CHK:0;cm4_sp_mode 0
443 22:59:22.201932 MVN_1=0x00000000
444 22:59:22.206588 MVN_2=0x00000000
445 22:59:22.212354 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 22:59:22.212970 OPS=0x10
447 22:59:22.213495 ring efuse init
448 22:59:22.214028 chipver efuse init
449 22:59:22.220496 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 22:59:22.221002 [0.018961 Inits done]
451 22:59:22.221405 secure task start!
452 22:59:22.228380 high task start!
453 22:59:22.228894 low task start!
454 22:59:22.229296 run into bl31
455 22:59:22.234720 NOTICE: BL31: v1.3(release):4fc40b1
456 22:59:22.242533 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 22:59:22.243068 NOTICE: BL31: G12A normal boot!
458 22:59:22.267834 NOTICE: BL31: BL33 decompress pass
459 22:59:22.272588 ERROR: Error initializing runtime service opteed_fast
460 22:59:23.506314
461 22:59:23.506936
462 22:59:23.515024 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 22:59:23.515668
464 22:59:23.516288 Model: Libre Computer AML-A311D-CC Alta
465 22:59:23.723420 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 22:59:23.746754 DRAM: 2 GiB (effective 3.8 GiB)
467 22:59:23.889739 Core: 408 devices, 31 uclasses, devicetree: separate
468 22:59:23.895562 WDT: Not starting watchdog@f0d0
469 22:59:23.927827 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 22:59:23.940340 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 22:59:23.945375 ** Bad device specification mmc 0 **
472 22:59:23.955608 Card did not respond to voltage select! : -110
473 22:59:23.963396 ** Bad device specification mmc 0 **
474 22:59:23.964053 Couldn't find partition mmc 0
475 22:59:23.971587 Card did not respond to voltage select! : -110
476 22:59:23.977140 ** Bad device specification mmc 0 **
477 22:59:23.977751 Couldn't find partition mmc 0
478 22:59:23.982174 Error: could not access storage.
479 22:59:25.244715 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
480 22:59:25.245362 bl2_stage_init 0x81
481 22:59:25.250247 hw id: 0x0000 - pwm id 0x01
482 22:59:25.250758 bl2_stage_init 0xc1
483 22:59:25.251205 bl2_stage_init 0x02
484 22:59:25.251655
485 22:59:25.255899 L0:00000000
486 22:59:25.256591 L1:20000703
487 22:59:25.257165 L2:00008067
488 22:59:25.257736 L3:14000000
489 22:59:25.258280 B2:00402000
490 22:59:25.261553 B1:e0f83180
491 22:59:25.262185
492 22:59:25.262764 TE: 58150
493 22:59:25.263345
494 22:59:25.267094 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
495 22:59:25.267718
496 22:59:25.268293 Board ID = 1
497 22:59:25.272689 Set A53 clk to 24M
498 22:59:25.273293 Set A73 clk to 24M
499 22:59:25.273855 Set clk81 to 24M
500 22:59:25.278321 A53 clk: 1200 MHz
501 22:59:25.278927 A73 clk: 1200 MHz
502 22:59:25.279482 CLK81: 166.6M
503 22:59:25.280075 smccc: 00012aab
504 22:59:25.283875 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
505 22:59:25.289529 board id: 1
506 22:59:25.295284 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
507 22:59:25.305877 fw parse done
508 22:59:25.311784 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
509 22:59:25.354473 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
510 22:59:25.365380 PIEI prepare done
511 22:59:25.365881 fastboot data load
512 22:59:25.366326 fastboot data verify
513 22:59:25.371037 verify result: 266
514 22:59:25.376615 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
515 22:59:25.377116 LPDDR4 probe
516 22:59:25.377558 ddr clk to 1584MHz
517 22:59:25.384604 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
518 22:59:25.421858
519 22:59:25.422396 dmc_version 0001
520 22:59:25.428551 Check phy result
521 22:59:25.434560 INFO : End of CA training
522 22:59:25.435091 INFO : End of initialization
523 22:59:25.440095 INFO : Training has run successfully!
524 22:59:25.440579 Check phy result
525 22:59:25.445621 INFO : End of initialization
526 22:59:25.446098 INFO : End of read enable training
527 22:59:25.451224 INFO : End of fine write leveling
528 22:59:25.456817 INFO : End of Write leveling coarse delay
529 22:59:25.457289 INFO : Training has run successfully!
530 22:59:25.457718 Check phy result
531 22:59:25.462500 INFO : End of initialization
532 22:59:25.462972 INFO : End of read dq deskew training
533 22:59:25.468028 INFO : End of MPR read delay center optimization
534 22:59:25.473667 INFO : End of write delay center optimization
535 22:59:25.479237 INFO : End of read delay center optimization
536 22:59:25.479729 INFO : End of max read latency training
537 22:59:25.484811 INFO : Training has run successfully!
538 22:59:25.485281 1D training succeed
539 22:59:25.494090 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 22:59:25.541608 Check phy result
541 22:59:25.542107 INFO : End of initialization
542 22:59:25.563315 INFO : End of 2D read delay Voltage center optimization
543 22:59:25.582495 INFO : End of 2D read delay Voltage center optimization
544 22:59:25.635270 INFO : End of 2D write delay Voltage center optimization
545 22:59:25.684579 INFO : End of 2D write delay Voltage center optimization
546 22:59:25.689993 INFO : Training has run successfully!
547 22:59:25.690431
548 22:59:25.690834 channel==0
549 22:59:25.695673 RxClkDly_Margin_A0==88 ps 9
550 22:59:25.696155 TxDqDly_Margin_A0==98 ps 10
551 22:59:25.701276 RxClkDly_Margin_A1==88 ps 9
552 22:59:25.701718 TxDqDly_Margin_A1==98 ps 10
553 22:59:25.702119 TrainedVREFDQ_A0==74
554 22:59:25.706880 TrainedVREFDQ_A1==75
555 22:59:25.707310 VrefDac_Margin_A0==25
556 22:59:25.707705 DeviceVref_Margin_A0==40
557 22:59:25.712508 VrefDac_Margin_A1==25
558 22:59:25.712938 DeviceVref_Margin_A1==39
559 22:59:25.713327
560 22:59:25.713717
561 22:59:25.718062 channel==1
562 22:59:25.718494 RxClkDly_Margin_A0==98 ps 10
563 22:59:25.718884 TxDqDly_Margin_A0==88 ps 9
564 22:59:25.723632 RxClkDly_Margin_A1==98 ps 10
565 22:59:25.724078 TxDqDly_Margin_A1==88 ps 9
566 22:59:25.729236 TrainedVREFDQ_A0==75
567 22:59:25.729655 TrainedVREFDQ_A1==77
568 22:59:25.730048 VrefDac_Margin_A0==22
569 22:59:25.734784 DeviceVref_Margin_A0==38
570 22:59:25.735203 VrefDac_Margin_A1==24
571 22:59:25.740458 DeviceVref_Margin_A1==37
572 22:59:25.740873
573 22:59:25.741269 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
574 22:59:25.741660
575 22:59:25.773995 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
576 22:59:25.774539 2D training succeed
577 22:59:25.779694 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
578 22:59:25.785246 auto size-- 65535DDR cs0 size: 2048MB
579 22:59:25.785696 DDR cs1 size: 2048MB
580 22:59:25.790792 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
581 22:59:25.791227 cs0 DataBus test pass
582 22:59:25.796474 cs1 DataBus test pass
583 22:59:25.796909 cs0 AddrBus test pass
584 22:59:25.797301 cs1 AddrBus test pass
585 22:59:25.797688
586 22:59:25.801987 100bdlr_step_size ps== 420
587 22:59:25.802431 result report
588 22:59:25.807607 boot times 0Enable ddr reg access
589 22:59:25.813000 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
590 22:59:25.826397 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
591 22:59:26.398847 0.0;M3 CHK:0;cm4_sp_mode 0
592 22:59:26.399446 MVN_1=0x00000000
593 22:59:26.404221 MVN_2=0x00000000
594 22:59:26.409850 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
595 22:59:26.410356 OPS=0x10
596 22:59:26.410817 ring efuse init
597 22:59:26.411274 chipver efuse init
598 22:59:26.418023 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
599 22:59:26.418484 [0.018960 Inits done]
600 22:59:26.425153 secure task start!
601 22:59:26.425655 high task start!
602 22:59:26.426102 low task start!
603 22:59:26.426495 run into bl31
604 22:59:26.432317 NOTICE: BL31: v1.3(release):4fc40b1
605 22:59:26.440071 NOTICE: BL31: Built : 15:58:17, May 22 2019
606 22:59:26.440507 NOTICE: BL31: G12A normal boot!
607 22:59:26.465411 NOTICE: BL31: BL33 decompress pass
608 22:59:26.471151 ERROR: Error initializing runtime service opteed_fast
609 22:59:27.704152
610 22:59:27.704765
611 22:59:27.712669 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
612 22:59:27.713149
613 22:59:27.713566 Model: Libre Computer AML-A311D-CC Alta
614 22:59:27.920856 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
615 22:59:27.944316 DRAM: 2 GiB (effective 3.8 GiB)
616 22:59:28.087345 Core: 408 devices, 31 uclasses, devicetree: separate
617 22:59:28.093110 WDT: Not starting watchdog@f0d0
618 22:59:28.125379 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
619 22:59:28.137930 Loading Environment from FAT... Card did not respond to voltage select! : -110
620 22:59:28.142783 ** Bad device specification mmc 0 **
621 22:59:28.153085 Card did not respond to voltage select! : -110
622 22:59:28.160769 ** Bad device specification mmc 0 **
623 22:59:28.161240 Couldn't find partition mmc 0
624 22:59:28.168953 Card did not respond to voltage select! : -110
625 22:59:28.174568 ** Bad device specification mmc 0 **
626 22:59:28.175032 Couldn't find partition mmc 0
627 22:59:28.179705 Error: could not access storage.
628 22:59:28.523267 Net: eth0: ethernet@ff3f0000
629 22:59:28.523893 starting USB...
630 22:59:28.775104 Bus usb@ff500000: Register 3000140 NbrPorts 3
631 22:59:28.775666 Starting the controller
632 22:59:28.782049 USB XHCI 1.10
633 22:59:30.493869 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
634 22:59:30.494513 bl2_stage_init 0x01
635 22:59:30.494948 bl2_stage_init 0x81
636 22:59:30.499371 hw id: 0x0000 - pwm id 0x01
637 22:59:30.499940 bl2_stage_init 0xc1
638 22:59:30.500459 bl2_stage_init 0x02
639 22:59:30.500927
640 22:59:30.504713 L0:00000000
641 22:59:30.505487 L1:20000703
642 22:59:30.505977 L2:00008067
643 22:59:30.506418 L3:14000000
644 22:59:30.510490 B2:00402000
645 22:59:30.511130 B1:e0f83180
646 22:59:30.511601
647 22:59:30.512115 TE: 58167
648 22:59:30.512608
649 22:59:30.516575 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 22:59:30.517182
651 22:59:30.517648 Board ID = 1
652 22:59:30.521598 Set A53 clk to 24M
653 22:59:30.522206 Set A73 clk to 24M
654 22:59:30.522680 Set clk81 to 24M
655 22:59:30.527366 A53 clk: 1200 MHz
656 22:59:30.527936 A73 clk: 1200 MHz
657 22:59:30.528392 CLK81: 166.6M
658 22:59:30.528801 smccc: 00012abd
659 22:59:30.532770 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 22:59:30.538520 board id: 1
661 22:59:30.544563 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 22:59:30.554744 fw parse done
663 22:59:30.560883 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 22:59:30.603447 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 22:59:30.614411 PIEI prepare done
666 22:59:30.615008 fastboot data load
667 22:59:30.615440 fastboot data verify
668 22:59:30.620142 verify result: 266
669 22:59:30.625572 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 22:59:30.626126 LPDDR4 probe
671 22:59:30.626540 ddr clk to 1584MHz
672 22:59:30.633588 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 22:59:30.670940
674 22:59:30.671572 dmc_version 0001
675 22:59:30.677616 Check phy result
676 22:59:30.683316 INFO : End of CA training
677 22:59:30.683864 INFO : End of initialization
678 22:59:30.688855 INFO : Training has run successfully!
679 22:59:30.689376 Check phy result
680 22:59:30.694460 INFO : End of initialization
681 22:59:30.694995 INFO : End of read enable training
682 22:59:30.700328 INFO : End of fine write leveling
683 22:59:30.705687 INFO : End of Write leveling coarse delay
684 22:59:30.706214 INFO : Training has run successfully!
685 22:59:30.706654 Check phy result
686 22:59:30.711326 INFO : End of initialization
687 22:59:30.711884 INFO : End of read dq deskew training
688 22:59:30.716896 INFO : End of MPR read delay center optimization
689 22:59:30.722551 INFO : End of write delay center optimization
690 22:59:30.728237 INFO : End of read delay center optimization
691 22:59:30.728786 INFO : End of max read latency training
692 22:59:30.733737 INFO : Training has run successfully!
693 22:59:30.734315 1D training succeed
694 22:59:30.742943 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 22:59:30.799036 Check phy result
696 22:59:30.799680 INFO : End of initialization
697 22:59:30.813173 INFO : End of 2D read delay Voltage center optimization
698 22:59:30.833553 INFO : End of 2D read delay Voltage center optimization
699 22:59:30.885580 INFO : End of 2D write delay Voltage center optimization
700 22:59:30.934829 INFO : End of 2D write delay Voltage center optimization
701 22:59:30.940345 INFO : Training has run successfully!
702 22:59:30.940885
703 22:59:30.941324 channel==0
704 22:59:30.945896 RxClkDly_Margin_A0==88 ps 9
705 22:59:30.946406 TxDqDly_Margin_A0==98 ps 10
706 22:59:30.949317 RxClkDly_Margin_A1==88 ps 9
707 22:59:30.950273 TxDqDly_Margin_A1==98 ps 10
708 22:59:30.954907 TrainedVREFDQ_A0==74
709 22:59:30.955362 TrainedVREFDQ_A1==74
710 22:59:30.955776 VrefDac_Margin_A0==24
711 22:59:30.960472 DeviceVref_Margin_A0==40
712 22:59:30.960910 VrefDac_Margin_A1==25
713 22:59:30.966905 DeviceVref_Margin_A1==40
714 22:59:30.967343
715 22:59:30.967747
716 22:59:30.968183 channel==1
717 22:59:30.968581 RxClkDly_Margin_A0==88 ps 9
718 22:59:30.969537 TxDqDly_Margin_A0==98 ps 10
719 22:59:30.975135 RxClkDly_Margin_A1==88 ps 9
720 22:59:30.975580 TxDqDly_Margin_A1==88 ps 9
721 22:59:30.976015 TrainedVREFDQ_A0==77
722 22:59:30.980682 TrainedVREFDQ_A1==77
723 22:59:30.981122 VrefDac_Margin_A0==22
724 22:59:30.986263 DeviceVref_Margin_A0==37
725 22:59:30.986721 VrefDac_Margin_A1==24
726 22:59:30.987125 DeviceVref_Margin_A1==37
727 22:59:30.987516
728 22:59:30.991810 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 22:59:30.992295
730 22:59:31.025478 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000017 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
731 22:59:31.026016 2D training succeed
732 22:59:31.030991 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 22:59:31.036618 auto size-- 65535DDR cs0 size: 2048MB
734 22:59:31.037067 DDR cs1 size: 2048MB
735 22:59:31.042210 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 22:59:31.042659 cs0 DataBus test pass
737 22:59:31.043064 cs1 DataBus test pass
738 22:59:31.047763 cs0 AddrBus test pass
739 22:59:31.048231 cs1 AddrBus test pass
740 22:59:31.048637
741 22:59:31.053389 100bdlr_step_size ps== 420
742 22:59:31.053846 result report
743 22:59:31.054250 boot times 0Enable ddr reg access
744 22:59:31.063145 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 22:59:31.076656 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 22:59:31.650385 0.0;M3 CHK:0;cm4_sp_mode 0
747 22:59:31.650912 MVN_1=0x00000000
748 22:59:31.655796 MVN_2=0x00000000
749 22:59:31.661521 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 22:59:31.661910 OPS=0x10
751 22:59:31.662176 ring efuse init
752 22:59:31.662462 chipver efuse init
753 22:59:31.670012 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 22:59:31.670428 [0.018961 Inits done]
755 22:59:31.670670 secure task start!
756 22:59:31.677367 high task start!
757 22:59:31.677774 low task start!
758 22:59:31.678057 run into bl31
759 22:59:31.683924 NOTICE: BL31: v1.3(release):4fc40b1
760 22:59:31.691862 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 22:59:31.692477 NOTICE: BL31: G12A normal boot!
762 22:59:31.717098 NOTICE: BL31: BL33 decompress pass
763 22:59:31.722729 ERROR: Error initializing runtime service opteed_fast
764 22:59:32.955864
765 22:59:32.956505
766 22:59:32.963104 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 22:59:32.963671
768 22:59:32.964149 Model: Libre Computer AML-A311D-CC Alta
769 22:59:33.172468 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 22:59:33.194871 DRAM: 2 GiB (effective 3.8 GiB)
771 22:59:33.339110 Core: 408 devices, 31 uclasses, devicetree: separate
772 22:59:33.343706 WDT: Not starting watchdog@f0d0
773 22:59:33.376949 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 22:59:33.389514 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 22:59:33.394457 ** Bad device specification mmc 0 **
776 22:59:33.405084 Card did not respond to voltage select! : -110
777 22:59:33.411542 ** Bad device specification mmc 0 **
778 22:59:33.412340 Couldn't find partition mmc 0
779 22:59:33.420859 Card did not respond to voltage select! : -110
780 22:59:33.426278 ** Bad device specification mmc 0 **
781 22:59:33.426764 Couldn't find partition mmc 0
782 22:59:33.430374 Error: could not access storage.
783 22:59:33.773996 Net: eth0: ethernet@ff3f0000
784 22:59:33.774601 starting USB...
785 22:59:34.028936 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 22:59:34.029473 Starting the controller
787 22:59:34.033830 USB XHCI 1.10
788 22:59:36.194289 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
789 22:59:36.195029 bl2_stage_init 0x81
790 22:59:36.199895 hw id: 0x0000 - pwm id 0x01
791 22:59:36.200379 bl2_stage_init 0xc1
792 22:59:36.200790 bl2_stage_init 0x02
793 22:59:36.201279
794 22:59:36.205440 L0:00000000
795 22:59:36.205891 L1:20000703
796 22:59:36.206296 L2:00008067
797 22:59:36.206768 L3:14000000
798 22:59:36.207224 B2:00402000
799 22:59:36.208269 B1:e0f83180
800 22:59:36.208762
801 22:59:36.209171 TE: 58150
802 22:59:36.209639
803 22:59:36.219444 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
804 22:59:36.219964
805 22:59:36.220512 Board ID = 1
806 22:59:36.220918 Set A53 clk to 24M
807 22:59:36.221310 Set A73 clk to 24M
808 22:59:36.224997 Set clk81 to 24M
809 22:59:36.225449 A53 clk: 1200 MHz
810 22:59:36.225931 A73 clk: 1200 MHz
811 22:59:36.230608 CLK81: 166.6M
812 22:59:36.231056 smccc: 00012aac
813 22:59:36.236288 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
814 22:59:36.236860 board id: 1
815 22:59:36.243852 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
816 22:59:36.255419 fw parse done
817 22:59:36.260524 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
818 22:59:36.303149 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
819 22:59:36.314929 PIEI prepare done
820 22:59:36.315523 fastboot data load
821 22:59:36.315965 fastboot data verify
822 22:59:36.320673 verify result: 266
823 22:59:36.326147 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
824 22:59:36.326654 LPDDR4 probe
825 22:59:36.327091 ddr clk to 1584MHz
826 22:59:36.333750 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
827 22:59:36.371454
828 22:59:36.372048 dmc_version 0001
829 22:59:36.378119 Check phy result
830 22:59:36.383974 INFO : End of CA training
831 22:59:36.384471 INFO : End of initialization
832 22:59:36.389570 INFO : Training has run successfully!
833 22:59:36.390026 Check phy result
834 22:59:36.395200 INFO : End of initialization
835 22:59:36.395658 INFO : End of read enable training
836 22:59:36.400933 INFO : End of fine write leveling
837 22:59:36.406369 INFO : End of Write leveling coarse delay
838 22:59:36.406848 INFO : Training has run successfully!
839 22:59:36.407292 Check phy result
840 22:59:36.412069 INFO : End of initialization
841 22:59:36.412685 INFO : End of read dq deskew training
842 22:59:36.417670 INFO : End of MPR read delay center optimization
843 22:59:36.423275 INFO : End of write delay center optimization
844 22:59:36.429117 INFO : End of read delay center optimization
845 22:59:36.430121 INFO : End of max read latency training
846 22:59:36.434388 INFO : Training has run successfully!
847 22:59:36.434876 1D training succeed
848 22:59:36.443543 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 22:59:36.490415 Check phy result
850 22:59:36.490942 INFO : End of initialization
851 22:59:36.513011 INFO : End of 2D read delay Voltage center optimization
852 22:59:36.533306 INFO : End of 2D read delay Voltage center optimization
853 22:59:36.586173 INFO : End of 2D write delay Voltage center optimization
854 22:59:36.638322 INFO : End of 2D write delay Voltage center optimization
855 22:59:36.641078 INFO : Training has run successfully!
856 22:59:36.641469
857 22:59:36.641735 channel==0
858 22:59:36.646726 RxClkDly_Margin_A0==88 ps 9
859 22:59:36.647158 TxDqDly_Margin_A0==98 ps 10
860 22:59:36.652436 RxClkDly_Margin_A1==88 ps 9
861 22:59:36.652882 TxDqDly_Margin_A1==98 ps 10
862 22:59:36.653134 TrainedVREFDQ_A0==74
863 22:59:36.657777 TrainedVREFDQ_A1==74
864 22:59:36.658154 VrefDac_Margin_A0==24
865 22:59:36.658384 DeviceVref_Margin_A0==40
866 22:59:36.663427 VrefDac_Margin_A1==24
867 22:59:36.663858 DeviceVref_Margin_A1==40
868 22:59:36.664156
869 22:59:36.664397
870 22:59:36.669955 channel==1
871 22:59:36.670472 RxClkDly_Margin_A0==98 ps 10
872 22:59:36.670751 TxDqDly_Margin_A0==88 ps 9
873 22:59:36.674606 RxClkDly_Margin_A1==98 ps 10
874 22:59:36.674975 TxDqDly_Margin_A1==88 ps 9
875 22:59:36.680153 TrainedVREFDQ_A0==76
876 22:59:36.680477 TrainedVREFDQ_A1==77
877 22:59:36.680681 VrefDac_Margin_A0==22
878 22:59:36.685817 DeviceVref_Margin_A0==38
879 22:59:36.686209 VrefDac_Margin_A1==24
880 22:59:36.691382 DeviceVref_Margin_A1==37
881 22:59:36.691767
882 22:59:36.691973 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
883 22:59:36.692208
884 22:59:36.725018 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000018 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
885 22:59:36.725481 2D training succeed
886 22:59:36.730632 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
887 22:59:36.736493 auto size-- 65535DDR cs0 size: 2048MB
888 22:59:36.736890 DDR cs1 size: 2048MB
889 22:59:36.741976 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
890 22:59:36.742634 cs0 DataBus test pass
891 22:59:36.747633 cs1 DataBus test pass
892 22:59:36.748308 cs0 AddrBus test pass
893 22:59:36.748796 cs1 AddrBus test pass
894 22:59:36.749292
895 22:59:36.754232 100bdlr_step_size ps== 420
896 22:59:36.754912 result report
897 22:59:36.758777 boot times 0Enable ddr reg access
898 22:59:36.766052 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
899 22:59:36.777663 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
900 22:59:37.351142 0.0;M3 CHK:0;cm4_sp_mode 0
901 22:59:37.351850 MVN_1=0x00000000
902 22:59:37.356580 MVN_2=0x00000000
903 22:59:37.362298 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
904 22:59:37.362827 OPS=0x10
905 22:59:37.363277 ring efuse init
906 22:59:37.363720 chipver efuse init
907 22:59:37.370609 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
908 22:59:37.371160 [0.018961 Inits done]
909 22:59:37.371602 secure task start!
910 22:59:37.378099 high task start!
911 22:59:37.378604 low task start!
912 22:59:37.379043 run into bl31
913 22:59:37.384823 NOTICE: BL31: v1.3(release):4fc40b1
914 22:59:37.392576 NOTICE: BL31: Built : 15:58:17, May 22 2019
915 22:59:37.393125 NOTICE: BL31: G12A normal boot!
916 22:59:37.418001 NOTICE: BL31: BL33 decompress pass
917 22:59:37.423579 ERROR: Error initializing runtime service opteed_fast
918 22:59:38.656233
919 22:59:38.656645
920 22:59:38.663768 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
921 22:59:38.664100
922 22:59:38.664316 Model: Libre Computer AML-A311D-CC Alta
923 22:59:38.873191 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
924 22:59:38.895606 DRAM: 2 GiB (effective 3.8 GiB)
925 22:59:39.039553 Core: 408 devices, 31 uclasses, devicetree: separate
926 22:59:39.045356 WDT: Not starting watchdog@f0d0
927 22:59:39.077674 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
928 22:59:39.090161 Loading Environment from FAT... Card did not respond to voltage select! : -110
929 22:59:39.095068 ** Bad device specification mmc 0 **
930 22:59:39.105391 Card did not respond to voltage select! : -110
931 22:59:39.113054 ** Bad device specification mmc 0 **
932 22:59:39.113374 Couldn't find partition mmc 0
933 22:59:39.121366 Card did not respond to voltage select! : -110
934 22:59:39.126950 ** Bad device specification mmc 0 **
935 22:59:39.127250 Couldn't find partition mmc 0
936 22:59:39.132066 Error: could not access storage.
937 22:59:39.475497 Net: eth0: ethernet@ff3f0000
938 22:59:39.475871 starting USB...
939 22:59:39.727349 Bus usb@ff500000: Register 3000140 NbrPorts 3
940 22:59:39.727768 Starting the controller
941 22:59:39.734313 USB XHCI 1.10
942 22:59:41.288342 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
943 22:59:41.295778 scanning usb for storage devices... 0 Storage Device(s) found
945 22:59:41.346856 Hit any key to stop autoboot: 1
946 22:59:41.347776 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
947 22:59:41.348160 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
948 22:59:41.348419 Setting prompt string to ['=>']
949 22:59:41.348675 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
950 22:59:41.354084 0
951 22:59:41.354719 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
952 22:59:41.355011 Sending with 10 millisecond of delay
954 22:59:42.493813 => setenv autoload no
955 22:59:42.504726 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
956 22:59:42.510361 setenv autoload no
957 22:59:42.511161 Sending with 10 millisecond of delay
959 22:59:44.309424 => setenv initrd_high 0xffffffff
960 22:59:44.320314 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
961 22:59:44.321332 setenv initrd_high 0xffffffff
962 22:59:44.322264 Sending with 10 millisecond of delay
964 22:59:45.939568 => setenv fdt_high 0xffffffff
965 22:59:45.950455 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
966 22:59:45.951321 setenv fdt_high 0xffffffff
967 22:59:45.952094 Sending with 10 millisecond of delay
969 22:59:46.244079 => dhcp
970 22:59:46.254870 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
971 22:59:46.255732 dhcp
972 22:59:46.256258 Speed: 1000, full duplex
973 22:59:46.256714 BOOTP broadcast 1
974 22:59:46.264104 DHCP client bound to address 192.168.6.27 (8 ms)
975 22:59:46.264870 Sending with 10 millisecond of delay
977 22:59:47.942089 => setenv serverip 192.168.6.2
978 22:59:47.952944 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
979 22:59:47.954352 setenv serverip 192.168.6.2
980 22:59:47.955457 Sending with 10 millisecond of delay
982 22:59:51.683797 => tftpboot 0x01080000 931094/tftp-deploy-1t7vp1ez/kernel/uImage
983 22:59:51.695315 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
984 22:59:51.696963 tftpboot 0x01080000 931094/tftp-deploy-1t7vp1ez/kernel/uImage
985 22:59:51.697941 Speed: 1000, full duplex
986 22:59:51.698800 Using ethernet@ff3f0000 device
987 22:59:51.699829 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
988 22:59:51.703516 Filename '931094/tftp-deploy-1t7vp1ez/kernel/uImage'.
989 22:59:51.706558 Load address: 0x1080000
990 22:59:52.716085 Loading: *#################### UDP wrong checksum 000000ff 00006e93
991 22:59:52.755845 UDP wrong checksum 000000ff 00000a86
992 22:59:54.202725 ############################## 36.1 MiB
993 22:59:54.203333 14.5 MiB/s
994 22:59:54.203779 done
995 22:59:54.207190 Bytes transferred = 37878336 (241fa40 hex)
996 22:59:54.208055 Sending with 10 millisecond of delay
998 22:59:58.894255 => tftpboot 0x08000000 931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
999 22:59:58.905011 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 22:59:58.905824 tftpboot 0x08000000 931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot
1001 22:59:58.906264 Speed: 1000, full duplex
1002 22:59:58.906676 Using ethernet@ff3f0000 device
1003 22:59:58.907642 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 22:59:58.919309 Filename '931094/tftp-deploy-1t7vp1ez/ramdisk/ramdisk.cpio.gz.uboot'.
1005 22:59:58.919753 Load address: 0x8000000
1006 23:00:01.773224 Loading: *############################# UDP wrong checksum 000000ff 00009661
1007 23:00:01.782716 UDP wrong checksum 000000ff 00002d54
1008 23:00:05.698432 T #################### UDP wrong checksum 00000005 000057c5
1009 23:00:07.859858 UDP wrong checksum 000000ff 0000a319
1010 23:00:07.881645 UDP wrong checksum 000000ff 0000380c
1011 23:00:09.771299 UDP wrong checksum 000000ff 00002365
1012 23:00:09.792073 UDP wrong checksum 000000ff 0000b757
1013 23:00:10.699378 T UDP wrong checksum 00000005 000057c5
1014 23:00:20.702537 T T UDP wrong checksum 00000005 000057c5
1015 23:00:40.705425 T T T UDP wrong checksum 00000005 000057c5
1016 23:00:55.710773 T T T
1017 23:00:55.711580 Retry count exceeded; starting again
1019 23:00:55.713338 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1022 23:00:55.715602 end: 2.4 uboot-commands (duration 00:01:46) [common]
1024 23:00:55.717342 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1026 23:00:55.718606 end: 2 uboot-action (duration 00:01:46) [common]
1028 23:00:55.720570 Cleaning after the job
1029 23:00:55.721267 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/ramdisk
1030 23:00:55.722680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/kernel
1031 23:00:55.766715 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/dtb
1032 23:00:55.767614 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/nfsrootfs
1033 23:00:55.939050 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931094/tftp-deploy-1t7vp1ez/modules
1034 23:00:55.962455 start: 4.1 power-off (timeout 00:00:30) [common]
1035 23:00:55.963214 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1036 23:00:55.997408 >> OK - accepted request
1037 23:00:55.999656 Returned 0 in 0 seconds
1038 23:00:56.100598 end: 4.1 power-off (duration 00:00:00) [common]
1040 23:00:56.101760 start: 4.2 read-feedback (timeout 00:10:00) [common]
1041 23:00:56.102509 Listened to connection for namespace 'common' for up to 1s
1042 23:00:57.103452 Finalising connection for namespace 'common'
1043 23:00:57.104078 Disconnecting from shell: Finalise
1044 23:00:57.104416 =>
1045 23:00:57.205179 end: 4.2 read-feedback (duration 00:00:01) [common]
1046 23:00:57.205662 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/931094
1047 23:00:59.027943 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/931094
1048 23:00:59.028974 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.