Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 22:56:08.942724 lava-dispatcher, installed at version: 2024.01
2 22:56:08.943603 start: 0 validate
3 22:56:08.944133 Start time: 2024-11-03 22:56:08.944102+00:00 (UTC)
4 22:56:08.944680 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 22:56:08.945199 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 22:56:08.984919 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 22:56:08.985475 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 22:56:09.016423 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 22:56:09.017019 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 22:56:09.047125 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 22:56:09.047592 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 22:56:09.079617 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 22:56:09.080101 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 22:56:09.117989 validate duration: 0.17
16 22:56:09.118859 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 22:56:09.119213 start: 1.1 download-retry (timeout 00:10:00) [common]
18 22:56:09.119530 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 22:56:09.120155 Not decompressing ramdisk as can be used compressed.
20 22:56:09.120646 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 22:56:09.120937 saving as /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/ramdisk/initrd.cpio.gz
22 22:56:09.121218 total size: 5628182 (5 MB)
23 22:56:09.158399 progress 0 % (0 MB)
24 22:56:09.166225 progress 5 % (0 MB)
25 22:56:09.174787 progress 10 % (0 MB)
26 22:56:09.182151 progress 15 % (0 MB)
27 22:56:09.187506 progress 20 % (1 MB)
28 22:56:09.191535 progress 25 % (1 MB)
29 22:56:09.196104 progress 30 % (1 MB)
30 22:56:09.200580 progress 35 % (1 MB)
31 22:56:09.204222 progress 40 % (2 MB)
32 22:56:09.208246 progress 45 % (2 MB)
33 22:56:09.211917 progress 50 % (2 MB)
34 22:56:09.216016 progress 55 % (2 MB)
35 22:56:09.220034 progress 60 % (3 MB)
36 22:56:09.223642 progress 65 % (3 MB)
37 22:56:09.227922 progress 70 % (3 MB)
38 22:56:09.231568 progress 75 % (4 MB)
39 22:56:09.235549 progress 80 % (4 MB)
40 22:56:09.239154 progress 85 % (4 MB)
41 22:56:09.243283 progress 90 % (4 MB)
42 22:56:09.247149 progress 95 % (5 MB)
43 22:56:09.250469 progress 100 % (5 MB)
44 22:56:09.251115 5 MB downloaded in 0.13 s (41.33 MB/s)
45 22:56:09.251669 end: 1.1.1 http-download (duration 00:00:00) [common]
47 22:56:09.252623 end: 1.1 download-retry (duration 00:00:00) [common]
48 22:56:09.252920 start: 1.2 download-retry (timeout 00:10:00) [common]
49 22:56:09.253195 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 22:56:09.253660 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/kernel/Image
51 22:56:09.253904 saving as /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/kernel/Image
52 22:56:09.254117 total size: 37878272 (36 MB)
53 22:56:09.254330 No compression specified
54 22:56:09.290566 progress 0 % (0 MB)
55 22:56:09.315792 progress 5 % (1 MB)
56 22:56:09.342076 progress 10 % (3 MB)
57 22:56:09.365428 progress 15 % (5 MB)
58 22:56:09.388649 progress 20 % (7 MB)
59 22:56:09.411213 progress 25 % (9 MB)
60 22:56:09.434532 progress 30 % (10 MB)
61 22:56:09.457669 progress 35 % (12 MB)
62 22:56:09.480632 progress 40 % (14 MB)
63 22:56:09.503576 progress 45 % (16 MB)
64 22:56:09.526528 progress 50 % (18 MB)
65 22:56:09.550518 progress 55 % (19 MB)
66 22:56:09.573584 progress 60 % (21 MB)
67 22:56:09.596753 progress 65 % (23 MB)
68 22:56:09.619895 progress 70 % (25 MB)
69 22:56:09.643003 progress 75 % (27 MB)
70 22:56:09.666206 progress 80 % (28 MB)
71 22:56:09.689234 progress 85 % (30 MB)
72 22:56:09.712541 progress 90 % (32 MB)
73 22:56:09.736164 progress 95 % (34 MB)
74 22:56:09.758396 progress 100 % (36 MB)
75 22:56:09.759141 36 MB downloaded in 0.51 s (71.53 MB/s)
76 22:56:09.759658 end: 1.2.1 http-download (duration 00:00:01) [common]
78 22:56:09.760554 end: 1.2 download-retry (duration 00:00:01) [common]
79 22:56:09.760864 start: 1.3 download-retry (timeout 00:09:59) [common]
80 22:56:09.761160 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 22:56:09.761667 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 22:56:09.761960 saving as /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 22:56:09.762182 total size: 53209 (0 MB)
84 22:56:09.762404 No compression specified
85 22:56:09.802069 progress 61 % (0 MB)
86 22:56:09.803040 progress 100 % (0 MB)
87 22:56:09.803662 0 MB downloaded in 0.04 s (1.22 MB/s)
88 22:56:09.804214 end: 1.3.1 http-download (duration 00:00:00) [common]
90 22:56:09.805244 end: 1.3 download-retry (duration 00:00:00) [common]
91 22:56:09.805584 start: 1.4 download-retry (timeout 00:09:59) [common]
92 22:56:09.805920 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 22:56:09.806502 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 22:56:09.806824 saving as /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/nfsrootfs/full.rootfs.tar
95 22:56:09.807088 total size: 107552908 (102 MB)
96 22:56:09.807311 Using unxz to decompress xz
97 22:56:09.844114 progress 0 % (0 MB)
98 22:56:10.489228 progress 5 % (5 MB)
99 22:56:11.207428 progress 10 % (10 MB)
100 22:56:11.924734 progress 15 % (15 MB)
101 22:56:12.677460 progress 20 % (20 MB)
102 22:56:13.248366 progress 25 % (25 MB)
103 22:56:13.867562 progress 30 % (30 MB)
104 22:56:14.601863 progress 35 % (35 MB)
105 22:56:14.960578 progress 40 % (41 MB)
106 22:56:15.389307 progress 45 % (46 MB)
107 22:56:16.080647 progress 50 % (51 MB)
108 22:56:16.758128 progress 55 % (56 MB)
109 22:56:17.509843 progress 60 % (61 MB)
110 22:56:18.266324 progress 65 % (66 MB)
111 22:56:19.000678 progress 70 % (71 MB)
112 22:56:19.759471 progress 75 % (76 MB)
113 22:56:20.429174 progress 80 % (82 MB)
114 22:56:21.132660 progress 85 % (87 MB)
115 22:56:21.854017 progress 90 % (92 MB)
116 22:56:22.556545 progress 95 % (97 MB)
117 22:56:23.284448 progress 100 % (102 MB)
118 22:56:23.296156 102 MB downloaded in 13.49 s (7.60 MB/s)
119 22:56:23.297086 end: 1.4.1 http-download (duration 00:00:13) [common]
121 22:56:23.298889 end: 1.4 download-retry (duration 00:00:13) [common]
122 22:56:23.299474 start: 1.5 download-retry (timeout 00:09:46) [common]
123 22:56:23.300085 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 22:56:23.300981 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/modules.tar.xz
125 22:56:23.301490 saving as /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/modules/modules.tar
126 22:56:23.301942 total size: 11773700 (11 MB)
127 22:56:23.302408 Using unxz to decompress xz
128 22:56:23.347213 progress 0 % (0 MB)
129 22:56:23.414490 progress 5 % (0 MB)
130 22:56:23.489845 progress 10 % (1 MB)
131 22:56:23.585177 progress 15 % (1 MB)
132 22:56:23.680971 progress 20 % (2 MB)
133 22:56:23.762608 progress 25 % (2 MB)
134 22:56:23.841520 progress 30 % (3 MB)
135 22:56:23.925110 progress 35 % (3 MB)
136 22:56:24.006231 progress 40 % (4 MB)
137 22:56:24.081986 progress 45 % (5 MB)
138 22:56:24.167198 progress 50 % (5 MB)
139 22:56:24.249250 progress 55 % (6 MB)
140 22:56:24.335892 progress 60 % (6 MB)
141 22:56:24.421521 progress 65 % (7 MB)
142 22:56:24.503692 progress 70 % (7 MB)
143 22:56:24.587132 progress 75 % (8 MB)
144 22:56:24.670803 progress 80 % (9 MB)
145 22:56:24.751201 progress 85 % (9 MB)
146 22:56:24.835503 progress 90 % (10 MB)
147 22:56:24.914837 progress 95 % (10 MB)
148 22:56:24.992424 progress 100 % (11 MB)
149 22:56:25.003618 11 MB downloaded in 1.70 s (6.60 MB/s)
150 22:56:25.004526 end: 1.5.1 http-download (duration 00:00:02) [common]
152 22:56:25.006124 end: 1.5 download-retry (duration 00:00:02) [common]
153 22:56:25.006657 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 22:56:25.007181 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 22:56:34.655314 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/931131/extract-nfsrootfs-62y6rxg9
156 22:56:34.655905 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 22:56:34.656264 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 22:56:34.656880 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309
159 22:56:34.657309 makedir: /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin
160 22:56:34.657637 makedir: /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/tests
161 22:56:34.657953 makedir: /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/results
162 22:56:34.658289 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-add-keys
163 22:56:34.658824 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-add-sources
164 22:56:34.659332 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-background-process-start
165 22:56:34.659832 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-background-process-stop
166 22:56:34.660424 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-common-functions
167 22:56:34.660936 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-echo-ipv4
168 22:56:34.661445 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-install-packages
169 22:56:34.661999 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-installed-packages
170 22:56:34.662499 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-os-build
171 22:56:34.662979 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-probe-channel
172 22:56:34.663458 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-probe-ip
173 22:56:34.663971 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-target-ip
174 22:56:34.664519 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-target-mac
175 22:56:34.665006 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-target-storage
176 22:56:34.665513 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-case
177 22:56:34.666043 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-event
178 22:56:34.666527 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-feedback
179 22:56:34.667070 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-raise
180 22:56:34.667569 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-reference
181 22:56:34.668086 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-runner
182 22:56:34.668611 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-set
183 22:56:34.669126 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-test-shell
184 22:56:34.669641 Updating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-install-packages (oe)
185 22:56:34.670222 Updating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/bin/lava-installed-packages (oe)
186 22:56:34.670683 Creating /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/environment
187 22:56:34.671067 LAVA metadata
188 22:56:34.671336 - LAVA_JOB_ID=931131
189 22:56:34.671551 - LAVA_DISPATCHER_IP=192.168.6.2
190 22:56:34.671913 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 22:56:34.672909 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 22:56:34.673230 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 22:56:34.673439 skipped lava-vland-overlay
194 22:56:34.673691 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 22:56:34.673952 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 22:56:34.674173 skipped lava-multinode-overlay
197 22:56:34.674417 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 22:56:34.674671 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 22:56:34.674927 Loading test definitions
200 22:56:34.675207 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 22:56:34.675431 Using /lava-931131 at stage 0
202 22:56:34.676643 uuid=931131_1.6.2.4.1 testdef=None
203 22:56:34.676953 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 22:56:34.677214 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 22:56:34.678991 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 22:56:34.679781 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 22:56:34.682079 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 22:56:34.682904 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 22:56:34.685138 runner path: /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/0/tests/0_dmesg test_uuid 931131_1.6.2.4.1
212 22:56:34.685704 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 22:56:34.686468 Creating lava-test-runner.conf files
215 22:56:34.686670 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/931131/lava-overlay-w1gth309/lava-931131/0 for stage 0
216 22:56:34.687012 - 0_dmesg
217 22:56:34.687373 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 22:56:34.687654 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 22:56:34.709219 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 22:56:34.709599 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 22:56:34.709863 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 22:56:34.710131 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 22:56:34.710403 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 22:56:35.325353 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 22:56:35.325785 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 22:56:35.326030 extracting modules file /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931131/extract-nfsrootfs-62y6rxg9
227 22:56:36.677739 extracting modules file /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk
228 22:56:38.069502 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 22:56:38.069978 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 22:56:38.070259 [common] Applying overlay to NFS
231 22:56:38.070473 [common] Applying overlay /var/lib/lava/dispatcher/tmp/931131/compress-overlay-zlj34f2l/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/931131/extract-nfsrootfs-62y6rxg9
232 22:56:38.099599 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 22:56:38.100024 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 22:56:38.100300 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 22:56:38.100530 Converting downloaded kernel to a uImage
236 22:56:38.100836 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/kernel/Image /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/kernel/uImage
237 22:56:38.530278 output: Image Name:
238 22:56:38.530675 output: Created: Sun Nov 3 22:56:38 2024
239 22:56:38.530887 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 22:56:38.531092 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
241 22:56:38.531296 output: Load Address: 01080000
242 22:56:38.531496 output: Entry Point: 01080000
243 22:56:38.531695 output:
244 22:56:38.532057 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 22:56:38.532337 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 22:56:38.532608 start: 1.6.7 configure-preseed-file (timeout 00:09:31) [common]
247 22:56:38.532862 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 22:56:38.533119 start: 1.6.8 compress-ramdisk (timeout 00:09:31) [common]
249 22:56:38.533372 Building ramdisk /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk
250 22:56:40.905872 >> 173435 blocks
251 22:56:49.038608 Adding RAMdisk u-boot header.
252 22:56:49.039314 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk.cpio.gz.uboot
253 22:56:49.289137 output: Image Name:
254 22:56:49.289534 output: Created: Sun Nov 3 22:56:49 2024
255 22:56:49.289749 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 22:56:49.289955 output: Data Size: 24146767 Bytes = 23580.83 KiB = 23.03 MiB
257 22:56:49.290160 output: Load Address: 00000000
258 22:56:49.290358 output: Entry Point: 00000000
259 22:56:49.290556 output:
260 22:56:49.291440 rename /var/lib/lava/dispatcher/tmp/931131/extract-overlay-ramdisk-5pctwt6j/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
261 22:56:49.292318 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 22:56:49.292929 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 22:56:49.293516 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 22:56:49.294016 No LXC device requested
265 22:56:49.294572 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 22:56:49.295133 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 22:56:49.295705 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 22:56:49.296199 Checking files for TFTP limit of 4294967296 bytes.
269 22:56:49.299145 end: 1 tftp-deploy (duration 00:00:40) [common]
270 22:56:49.299794 start: 2 uboot-action (timeout 00:05:00) [common]
271 22:56:49.300446 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 22:56:49.301002 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 22:56:49.301561 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 22:56:49.302143 Using kernel file from prepare-kernel: 931131/tftp-deploy-1l_rg_d5/kernel/uImage
275 22:56:49.302840 substitutions:
276 22:56:49.303293 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 22:56:49.303767 - {DTB_ADDR}: 0x01070000
278 22:56:49.304309 - {DTB}: 931131/tftp-deploy-1l_rg_d5/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 22:56:49.304773 - {INITRD}: 931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
280 22:56:49.305218 - {KERNEL_ADDR}: 0x01080000
281 22:56:49.305655 - {KERNEL}: 931131/tftp-deploy-1l_rg_d5/kernel/uImage
282 22:56:49.306090 - {LAVA_MAC}: None
283 22:56:49.306577 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/931131/extract-nfsrootfs-62y6rxg9
284 22:56:49.307026 - {NFS_SERVER_IP}: 192.168.6.2
285 22:56:49.307459 - {PRESEED_CONFIG}: None
286 22:56:49.307892 - {PRESEED_LOCAL}: None
287 22:56:49.308374 - {RAMDISK_ADDR}: 0x08000000
288 22:56:49.308823 - {RAMDISK}: 931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
289 22:56:49.309256 - {ROOT_PART}: None
290 22:56:49.309691 - {ROOT}: None
291 22:56:49.310126 - {SERVER_IP}: 192.168.6.2
292 22:56:49.310560 - {TEE_ADDR}: 0x83000000
293 22:56:49.310989 - {TEE}: None
294 22:56:49.311444 Parsed boot commands:
295 22:56:49.311910 - setenv autoload no
296 22:56:49.312397 - setenv initrd_high 0xffffffff
297 22:56:49.312835 - setenv fdt_high 0xffffffff
298 22:56:49.313269 - dhcp
299 22:56:49.313703 - setenv serverip 192.168.6.2
300 22:56:49.314134 - tftpboot 0x01080000 931131/tftp-deploy-1l_rg_d5/kernel/uImage
301 22:56:49.314567 - tftpboot 0x08000000 931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
302 22:56:49.315009 - tftpboot 0x01070000 931131/tftp-deploy-1l_rg_d5/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 22:56:49.315441 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/931131/extract-nfsrootfs-62y6rxg9,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 22:56:49.315887 - bootm 0x01080000 0x08000000 0x01070000
305 22:56:49.316508 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 22:56:49.318177 start: 2.3 connect-device (timeout 00:05:00) [common]
308 22:56:49.318648 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 22:56:49.334503 Setting prompt string to ['lava-test: # ']
310 22:56:49.336259 end: 2.3 connect-device (duration 00:00:00) [common]
311 22:56:49.336971 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 22:56:49.337695 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 22:56:49.338477 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 22:56:49.339764 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 22:56:49.377143 >> OK - accepted request
316 22:56:49.379405 Returned 0 in 0 seconds
317 22:56:49.480299 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 22:56:49.481339 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 22:56:49.481692 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 22:56:49.482010 Setting prompt string to ['Hit any key to stop autoboot']
322 22:56:49.482288 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 22:56:49.483252 Trying 192.168.56.21...
324 22:56:49.483548 Connected to conserv1.
325 22:56:49.483776 Escape character is '^]'.
326 22:56:49.484063
327 22:56:49.484312 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 22:56:49.484572
329 22:56:57.181077 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 22:56:57.181773 bl2_stage_init 0x01
331 22:56:57.182235 bl2_stage_init 0x81
332 22:56:57.186536 hw id: 0x0000 - pwm id 0x01
333 22:56:57.187120 bl2_stage_init 0xc1
334 22:56:57.191418 bl2_stage_init 0x02
335 22:56:57.191961
336 22:56:57.192490 L0:00000000
337 22:56:57.192952 L1:00000703
338 22:56:57.193405 L2:00008067
339 22:56:57.196915 L3:15000000
340 22:56:57.197479 S1:00000000
341 22:56:57.197970 B2:20282000
342 22:56:57.198457 B1:a0f83180
343 22:56:57.198908
344 22:56:57.199365 TE: 71786
345 22:56:57.199810
346 22:56:57.208061 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 22:56:57.208656
348 22:56:57.209109 Board ID = 1
349 22:56:57.209544 Set cpu clk to 24M
350 22:56:57.210016 Set clk81 to 24M
351 22:56:57.211626 Use GP1_pll as DSU clk.
352 22:56:57.212158 DSU clk: 1200 Mhz
353 22:56:57.217143 CPU clk: 1200 MHz
354 22:56:57.217692 Set clk81 to 166.6M
355 22:56:57.222811 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 22:56:57.223327 board id: 1
357 22:56:57.231901 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 22:56:57.243558 fw parse done
359 22:56:57.249668 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 22:56:57.292372 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 22:56:57.303198 PIEI prepare done
362 22:56:57.303758 fastboot data load
363 22:56:57.304250 fastboot data verify
364 22:56:57.308755 verify result: 266
365 22:56:57.314347 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 22:56:57.314870 LPDDR4 probe
367 22:56:57.315311 ddr clk to 1584MHz
368 22:56:57.322402 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 22:56:57.359691
370 22:56:57.360295 dmc_version 0001
371 22:56:57.366304 Check phy result
372 22:56:57.372230 INFO : End of CA training
373 22:56:57.372731 INFO : End of initialization
374 22:56:57.377753 INFO : Training has run successfully!
375 22:56:57.378246 Check phy result
376 22:56:57.383390 INFO : End of initialization
377 22:56:57.383884 INFO : End of read enable training
378 22:56:57.388960 INFO : End of fine write leveling
379 22:56:57.394556 INFO : End of Write leveling coarse delay
380 22:56:57.395055 INFO : Training has run successfully!
381 22:56:57.395493 Check phy result
382 22:56:57.400232 INFO : End of initialization
383 22:56:57.400733 INFO : End of read dq deskew training
384 22:56:57.405749 INFO : End of MPR read delay center optimization
385 22:56:57.411356 INFO : End of write delay center optimization
386 22:56:57.416963 INFO : End of read delay center optimization
387 22:56:57.417513 INFO : End of max read latency training
388 22:56:57.422598 INFO : Training has run successfully!
389 22:56:57.423128 1D training succeed
390 22:56:57.431778 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 22:56:57.479455 Check phy result
392 22:56:57.480119 INFO : End of initialization
393 22:56:57.501805 INFO : End of 2D read delay Voltage center optimization
394 22:56:57.520867 INFO : End of 2D read delay Voltage center optimization
395 22:56:57.572341 INFO : End of 2D write delay Voltage center optimization
396 22:56:57.622066 INFO : End of 2D write delay Voltage center optimization
397 22:56:57.627562 INFO : Training has run successfully!
398 22:56:57.628136
399 22:56:57.628608 channel==0
400 22:56:57.633163 RxClkDly_Margin_A0==78 ps 8
401 22:56:57.633671 TxDqDly_Margin_A0==98 ps 10
402 22:56:57.636491 RxClkDly_Margin_A1==88 ps 9
403 22:56:57.637008 TxDqDly_Margin_A1==98 ps 10
404 22:56:57.642005 TrainedVREFDQ_A0==74
405 22:56:57.642526 TrainedVREFDQ_A1==74
406 22:56:57.642969 VrefDac_Margin_A0==24
407 22:56:57.647665 DeviceVref_Margin_A0==40
408 22:56:57.648225 VrefDac_Margin_A1==23
409 22:56:57.653350 DeviceVref_Margin_A1==40
410 22:56:57.653870
411 22:56:57.654312
412 22:56:57.654750 channel==1
413 22:56:57.655183 RxClkDly_Margin_A0==78 ps 8
414 22:56:57.656838 TxDqDly_Margin_A0==88 ps 9
415 22:56:57.662326 RxClkDly_Margin_A1==78 ps 8
416 22:56:57.662913 TxDqDly_Margin_A1==88 ps 9
417 22:56:57.663441 TrainedVREFDQ_A0==75
418 22:56:57.667872 TrainedVREFDQ_A1==77
419 22:56:57.668500 VrefDac_Margin_A0==22
420 22:56:57.673441 DeviceVref_Margin_A0==39
421 22:56:57.673957 VrefDac_Margin_A1==22
422 22:56:57.674403 DeviceVref_Margin_A1==37
423 22:56:57.674840
424 22:56:57.678999 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 22:56:57.679526
426 22:56:57.712682 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 22:56:57.713399 2D training succeed
428 22:56:57.718175 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 22:56:57.723730 auto size-- 65535DDR cs0 size: 2048MB
430 22:56:57.724294 DDR cs1 size: 2048MB
431 22:56:57.729307 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 22:56:57.729819 cs0 DataBus test pass
433 22:56:57.730267 cs1 DataBus test pass
434 22:56:57.734922 cs0 AddrBus test pass
435 22:56:57.735427 cs1 AddrBus test pass
436 22:56:57.735869
437 22:56:57.740530 100bdlr_step_size ps== 478
438 22:56:57.741044 result report
439 22:56:57.741488 boot times 0Enable ddr reg access
440 22:56:57.750006 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 22:56:57.763960 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 22:56:58.416988 bl2z: ptr: 05129330, size: 00001e40
443 22:56:58.425204 0.0;M3 CHK:0;cm4_sp_mode 0
444 22:56:58.425744 MVN_1=0x00000000
445 22:56:58.426191 MVN_2=0x00000000
446 22:56:58.436624 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 22:56:58.437212 OPS=0x04
448 22:56:58.437661 ring efuse init
449 22:56:58.442272 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 22:56:58.442806 [0.017319 Inits done]
451 22:56:58.443246 secure task start!
452 22:56:58.450099 high task start!
453 22:56:58.450656 low task start!
454 22:56:58.451101 run into bl31
455 22:56:58.458717 NOTICE: BL31: v1.3(release):4fc40b1
456 22:56:58.466451 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 22:56:58.467005 NOTICE: BL31: G12A normal boot!
458 22:56:58.481948 NOTICE: BL31: BL33 decompress pass
459 22:56:58.487612 ERROR: Error initializing runtime service opteed_fast
460 22:57:01.226831 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 22:57:01.227323 bl2_stage_init 0x01
462 22:57:01.227592 bl2_stage_init 0x81
463 22:57:01.232377 hw id: 0x0000 - pwm id 0x01
464 22:57:01.232798 bl2_stage_init 0xc1
465 22:57:01.237961 bl2_stage_init 0x02
466 22:57:01.238353
467 22:57:01.238570 L0:00000000
468 22:57:01.239433 L1:00000703
469 22:57:01.239704 L2:00008067
470 22:57:01.239923 L3:15000000
471 22:57:01.243706 S1:00000000
472 22:57:01.244070 B2:20282000
473 22:57:01.244308 B1:a0f83180
474 22:57:01.244516
475 22:57:01.244720 TE: 69092
476 22:57:01.244921
477 22:57:01.249349 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 22:57:01.249722
479 22:57:01.254722 Board ID = 1
480 22:57:01.255082 Set cpu clk to 24M
481 22:57:01.255299 Set clk81 to 24M
482 22:57:01.260290 Use GP1_pll as DSU clk.
483 22:57:01.260668 DSU clk: 1200 Mhz
484 22:57:01.260890 CPU clk: 1200 MHz
485 22:57:01.265908 Set clk81 to 166.6M
486 22:57:01.271662 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 22:57:01.272133 board id: 1
488 22:57:01.278769 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 22:57:01.289649 fw parse done
490 22:57:01.295845 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 22:57:01.338696 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 22:57:01.349937 PIEI prepare done
493 22:57:01.350338 fastboot data load
494 22:57:01.350553 fastboot data verify
495 22:57:01.355472 verify result: 266
496 22:57:01.361068 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 22:57:01.361451 LPDDR4 probe
498 22:57:01.361994 ddr clk to 1584MHz
499 22:57:01.369135 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 22:57:01.406933
501 22:57:01.407375 dmc_version 0001
502 22:57:01.414029 Check phy result
503 22:57:01.419868 INFO : End of CA training
504 22:57:01.420347 INFO : End of initialization
505 22:57:01.425573 INFO : Training has run successfully!
506 22:57:01.426015 Check phy result
507 22:57:01.431143 INFO : End of initialization
508 22:57:01.432650 INFO : End of read enable training
509 22:57:01.436832 INFO : End of fine write leveling
510 22:57:01.442378 INFO : End of Write leveling coarse delay
511 22:57:01.443038 INFO : Training has run successfully!
512 22:57:01.443606 Check phy result
513 22:57:01.447883 INFO : End of initialization
514 22:57:01.448333 INFO : End of read dq deskew training
515 22:57:01.453717 INFO : End of MPR read delay center optimization
516 22:57:01.459034 INFO : End of write delay center optimization
517 22:57:01.465015 INFO : End of read delay center optimization
518 22:57:01.465431 INFO : End of max read latency training
519 22:57:01.470232 INFO : Training has run successfully!
520 22:57:01.470564 1D training succeed
521 22:57:01.479409 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 22:57:01.527951 Check phy result
523 22:57:01.528680 INFO : End of initialization
524 22:57:01.554066 INFO : End of 2D read delay Voltage center optimization
525 22:57:01.579375 INFO : End of 2D read delay Voltage center optimization
526 22:57:01.635787 INFO : End of 2D write delay Voltage center optimization
527 22:57:01.690073 INFO : End of 2D write delay Voltage center optimization
528 22:57:01.695686 INFO : Training has run successfully!
529 22:57:01.696394
530 22:57:01.696881 channel==0
531 22:57:01.701190 RxClkDly_Margin_A0==69 ps 7
532 22:57:01.701825 TxDqDly_Margin_A0==98 ps 10
533 22:57:01.704565 RxClkDly_Margin_A1==88 ps 9
534 22:57:01.705168 TxDqDly_Margin_A1==88 ps 9
535 22:57:01.710180 TrainedVREFDQ_A0==74
536 22:57:01.710857 TrainedVREFDQ_A1==75
537 22:57:01.711363 VrefDac_Margin_A0==25
538 22:57:01.715829 DeviceVref_Margin_A0==40
539 22:57:01.716510 VrefDac_Margin_A1==23
540 22:57:01.721314 DeviceVref_Margin_A1==39
541 22:57:01.721973
542 22:57:01.722458
543 22:57:01.722959 channel==1
544 22:57:01.723442 RxClkDly_Margin_A0==88 ps 9
545 22:57:01.726988 TxDqDly_Margin_A0==98 ps 10
546 22:57:01.727667 RxClkDly_Margin_A1==78 ps 8
547 22:57:01.732621 TxDqDly_Margin_A1==88 ps 9
548 22:57:01.733068 TrainedVREFDQ_A0==78
549 22:57:01.733365 TrainedVREFDQ_A1==78
550 22:57:01.738127 VrefDac_Margin_A0==22
551 22:57:01.738579 DeviceVref_Margin_A0==36
552 22:57:01.743699 VrefDac_Margin_A1==22
553 22:57:01.744665 DeviceVref_Margin_A1==36
554 22:57:01.745223
555 22:57:01.749170 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 22:57:01.749597
557 22:57:01.777260 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 22:57:01.782876 2D training succeed
559 22:57:01.788762 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 22:57:01.789417 auto size-- 65535DDR cs0 size: 2048MB
561 22:57:01.794162 DDR cs1 size: 2048MB
562 22:57:01.794765 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 22:57:01.799667 cs0 DataBus test pass
564 22:57:01.800129 cs1 DataBus test pass
565 22:57:01.800530 cs0 AddrBus test pass
566 22:57:01.805148 cs1 AddrBus test pass
567 22:57:01.805587
568 22:57:01.805912 100bdlr_step_size ps== 471
569 22:57:01.806227 result report
570 22:57:01.810707 boot times 0Enable ddr reg access
571 22:57:01.818249 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 22:57:01.831221 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 22:57:02.491464 bl2z: ptr: 05129330, size: 00001e40
574 22:57:02.500693 0.0;M3 CHK:0;cm4_sp_mode 0
575 22:57:02.501300 MVN_1=0x00000000
576 22:57:02.501774 MVN_2=0x00000000
577 22:57:02.512091 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 22:57:02.512688 OPS=0x04
579 22:57:02.513161 ring efuse init
580 22:57:02.517866 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 22:57:02.518421 [0.017355 Inits done]
582 22:57:02.518886 secure task start!
583 22:57:02.525769 high task start!
584 22:57:02.526315 low task start!
585 22:57:02.526770 run into bl31
586 22:57:02.534428 NOTICE: BL31: v1.3(release):4fc40b1
587 22:57:02.542201 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 22:57:02.542755 NOTICE: BL31: G12A normal boot!
589 22:57:02.557865 NOTICE: BL31: BL33 decompress pass
590 22:57:02.563563 ERROR: Error initializing runtime service opteed_fast
591 22:57:03.930900 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 22:57:03.931544 bl2_stage_init 0x01
593 22:57:03.932066 bl2_stage_init 0x81
594 22:57:03.936437 hw id: 0x0000 - pwm id 0x01
595 22:57:03.936978 bl2_stage_init 0xc1
596 22:57:03.940679 bl2_stage_init 0x02
597 22:57:03.941214
598 22:57:03.941678 L0:00000000
599 22:57:03.942126 L1:00000703
600 22:57:03.942570 L2:00008067
601 22:57:03.946252 L3:15000000
602 22:57:03.946784 S1:00000000
603 22:57:03.947242 B2:20282000
604 22:57:03.947686 B1:a0f83180
605 22:57:03.948171
606 22:57:03.948620 TE: 72781
607 22:57:03.951903
608 22:57:03.957373 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 22:57:03.957907
610 22:57:03.958364 Board ID = 1
611 22:57:03.958809 Set cpu clk to 24M
612 22:57:03.963132 Set clk81 to 24M
613 22:57:03.963663 Use GP1_pll as DSU clk.
614 22:57:03.964155 DSU clk: 1200 Mhz
615 22:57:03.964607 CPU clk: 1200 MHz
616 22:57:03.968648 Set clk81 to 166.6M
617 22:57:03.974280 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 22:57:03.974854 board id: 1
619 22:57:03.982909 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 22:57:03.993682 fw parse done
621 22:57:03.999633 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 22:57:04.042761 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 22:57:04.053876 PIEI prepare done
624 22:57:04.054426 fastboot data load
625 22:57:04.054888 fastboot data verify
626 22:57:04.059488 verify result: 266
627 22:57:04.065128 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 22:57:04.065674 LPDDR4 probe
629 22:57:04.066135 ddr clk to 1584MHz
630 22:57:04.073067 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 22:57:04.110840
632 22:57:04.111428 dmc_version 0001
633 22:57:04.117888 Check phy result
634 22:57:04.123906 INFO : End of CA training
635 22:57:04.124491 INFO : End of initialization
636 22:57:04.129435 INFO : Training has run successfully!
637 22:57:04.129973 Check phy result
638 22:57:04.135165 INFO : End of initialization
639 22:57:04.135700 INFO : End of read enable training
640 22:57:04.138328 INFO : End of fine write leveling
641 22:57:04.143921 INFO : End of Write leveling coarse delay
642 22:57:04.149511 INFO : Training has run successfully!
643 22:57:04.150043 Check phy result
644 22:57:04.150504 INFO : End of initialization
645 22:57:04.155171 INFO : End of read dq deskew training
646 22:57:04.158495 INFO : End of MPR read delay center optimization
647 22:57:04.164189 INFO : End of write delay center optimization
648 22:57:04.169700 INFO : End of read delay center optimization
649 22:57:04.170227 INFO : End of max read latency training
650 22:57:04.175290 INFO : Training has run successfully!
651 22:57:04.175820 1D training succeed
652 22:57:04.183488 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 22:57:04.231715 Check phy result
654 22:57:04.232335 INFO : End of initialization
655 22:57:04.259094 INFO : End of 2D read delay Voltage center optimization
656 22:57:04.283272 INFO : End of 2D read delay Voltage center optimization
657 22:57:04.340107 INFO : End of 2D write delay Voltage center optimization
658 22:57:04.393993 INFO : End of 2D write delay Voltage center optimization
659 22:57:04.399522 INFO : Training has run successfully!
660 22:57:04.400097
661 22:57:04.400566 channel==0
662 22:57:04.405232 RxClkDly_Margin_A0==78 ps 8
663 22:57:04.405759 TxDqDly_Margin_A0==88 ps 9
664 22:57:04.408585 RxClkDly_Margin_A1==88 ps 9
665 22:57:04.409122 TxDqDly_Margin_A1==88 ps 9
666 22:57:04.414224 TrainedVREFDQ_A0==74
667 22:57:04.414766 TrainedVREFDQ_A1==74
668 22:57:04.415226 VrefDac_Margin_A0==24
669 22:57:04.419706 DeviceVref_Margin_A0==40
670 22:57:04.420287 VrefDac_Margin_A1==23
671 22:57:04.425418 DeviceVref_Margin_A1==40
672 22:57:04.425955
673 22:57:04.426414
674 22:57:04.426862 channel==1
675 22:57:04.427300 RxClkDly_Margin_A0==78 ps 8
676 22:57:04.428812 TxDqDly_Margin_A0==98 ps 10
677 22:57:04.434450 RxClkDly_Margin_A1==78 ps 8
678 22:57:04.434988 TxDqDly_Margin_A1==88 ps 9
679 22:57:04.435444 TrainedVREFDQ_A0==75
680 22:57:04.439854 TrainedVREFDQ_A1==75
681 22:57:04.440495 VrefDac_Margin_A0==22
682 22:57:04.445483 DeviceVref_Margin_A0==39
683 22:57:04.445997 VrefDac_Margin_A1==22
684 22:57:04.446456 DeviceVref_Margin_A1==39
685 22:57:04.446908
686 22:57:04.454425 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 22:57:04.454956
688 22:57:04.482451 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
689 22:57:04.483022 2D training succeed
690 22:57:04.488088 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 22:57:04.493633 auto size-- 65535DDR cs0 size: 2048MB
692 22:57:04.494131 DDR cs1 size: 2048MB
693 22:57:04.499229 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 22:57:04.499728 cs0 DataBus test pass
695 22:57:04.504872 cs1 DataBus test pass
696 22:57:04.505369 cs0 AddrBus test pass
697 22:57:04.505809 cs1 AddrBus test pass
698 22:57:04.506242
699 22:57:04.510408 100bdlr_step_size ps== 478
700 22:57:04.510905 result report
701 22:57:04.516098 boot times 0Enable ddr reg access
702 22:57:04.522177 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 22:57:04.536021 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 22:57:05.194965 bl2z: ptr: 05129330, size: 00001e40
705 22:57:05.203113 0.0;M3 CHK:0;cm4_sp_mode 0
706 22:57:05.203658 MVN_1=0x00000000
707 22:57:05.204135 MVN_2=0x00000000
708 22:57:05.214571 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 22:57:05.215074 OPS=0x04
710 22:57:05.215519 ring efuse init
711 22:57:05.217504 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 22:57:05.223835 [0.017354 Inits done]
713 22:57:05.224360 secure task start!
714 22:57:05.224802 high task start!
715 22:57:05.225230 low task start!
716 22:57:05.228178 run into bl31
717 22:57:05.236758 NOTICE: BL31: v1.3(release):4fc40b1
718 22:57:05.244569 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 22:57:05.245064 NOTICE: BL31: G12A normal boot!
720 22:57:05.260126 NOTICE: BL31: BL33 decompress pass
721 22:57:05.265801 ERROR: Error initializing runtime service opteed_fast
722 22:57:06.061246
723 22:57:06.061858
724 22:57:06.066645 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 22:57:06.067137
726 22:57:06.070114 Model: Libre Computer AML-S905D3-CC Solitude
727 22:57:06.217110 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 22:57:06.232509 DRAM: 2 GiB (effective 3.8 GiB)
729 22:57:06.333531 Core: 406 devices, 33 uclasses, devicetree: separate
730 22:57:06.339396 WDT: Not starting watchdog@f0d0
731 22:57:06.364427 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 22:57:06.376692 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 22:57:06.381649 ** Bad device specification mmc 0 **
734 22:57:06.391853 Card did not respond to voltage select! : -110
735 22:57:06.399412 ** Bad device specification mmc 0 **
736 22:57:06.399898 Couldn't find partition mmc 0
737 22:57:06.407737 Card did not respond to voltage select! : -110
738 22:57:06.413276 ** Bad device specification mmc 0 **
739 22:57:06.413751 Couldn't find partition mmc 0
740 22:57:06.418344 Error: could not access storage.
741 22:57:06.714695 Net: eth0: ethernet@ff3f0000
742 22:57:06.715286 starting USB...
743 22:57:06.959461 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 22:57:06.959865 Starting the controller
745 22:57:06.966478 USB XHCI 1.10
746 22:57:08.522438 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 22:57:08.530681 scanning usb for storage devices... 0 Storage Device(s) found
749 22:57:08.581857 Hit any key to stop autoboot: 1
750 22:57:08.582502 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 22:57:08.582853 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 22:57:08.583120 Setting prompt string to ['=>']
753 22:57:08.583384 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 22:57:08.596682 0
755 22:57:08.597371 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 22:57:08.698217 => setenv autoload no
758 22:57:08.698801 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 22:57:08.703079 setenv autoload no
761 22:57:08.804171 => setenv initrd_high 0xffffffff
762 22:57:08.804882 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 22:57:08.808968 setenv initrd_high 0xffffffff
765 22:57:08.910091 => setenv fdt_high 0xffffffff
766 22:57:08.910789 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 22:57:08.914898 setenv fdt_high 0xffffffff
769 22:57:09.016018 => dhcp
770 22:57:09.016678 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 22:57:09.020501 dhcp
772 22:57:09.726272 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 22:57:09.726674 Speed: 1000, full duplex
774 22:57:09.726903 BOOTP broadcast 1
775 22:57:09.744153 DHCP client bound to address 192.168.6.21 (18 ms)
777 22:57:09.845414 => setenv serverip 192.168.6.2
778 22:57:09.846039 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 22:57:09.850695 setenv serverip 192.168.6.2
781 22:57:09.951693 => tftpboot 0x01080000 931131/tftp-deploy-1l_rg_d5/kernel/uImage
782 22:57:09.952139 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 22:57:09.958869 tftpboot 0x01080000 931131/tftp-deploy-1l_rg_d5/kernel/uImage
784 22:57:09.959146 Speed: 1000, full duplex
785 22:57:09.959370 Using ethernet@ff3f0000 device
786 22:57:09.964391 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 22:57:09.969844 Filename '931131/tftp-deploy-1l_rg_d5/kernel/uImage'.
788 22:57:09.973646 Load address: 0x1080000
789 22:57:12.239449 Loading: *################################################## 36.1 MiB
790 22:57:12.240153 15.9 MiB/s
791 22:57:12.240643 done
792 22:57:12.243866 Bytes transferred = 37878336 (241fa40 hex)
794 22:57:12.345560 => tftpboot 0x08000000 931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
795 22:57:12.346362 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
796 22:57:12.353217 tftpboot 0x08000000 931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot
797 22:57:12.353769 Speed: 1000, full duplex
798 22:57:12.354230 Using ethernet@ff3f0000 device
799 22:57:12.358714 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 22:57:12.368545 Filename '931131/tftp-deploy-1l_rg_d5/ramdisk/ramdisk.cpio.gz.uboot'.
801 22:57:12.368971 Load address: 0x8000000
802 22:57:13.946808 Loading: *################################################# UDP wrong checksum 00000005 00008a34
803 22:57:18.948115 T UDP wrong checksum 00000005 00008a34
804 22:57:28.950126 T T UDP wrong checksum 00000005 00008a34
805 22:57:48.952500 T T T UDP wrong checksum 00000005 00008a34
806 22:58:03.105573 T T T UDP wrong checksum 000000ff 0000a1c2
807 22:58:03.146259 UDP wrong checksum 000000ff 000034b5
808 22:58:08.958865 T
809 22:58:08.959551 Retry count exceeded; starting again
811 22:58:08.961123 end: 2.4.3 bootloader-commands (duration 00:01:00) [common]
814 22:58:08.963127 end: 2.4 uboot-commands (duration 00:01:20) [common]
816 22:58:08.964720 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
818 22:58:08.965876 end: 2 uboot-action (duration 00:01:20) [common]
820 22:58:08.967612 Cleaning after the job
821 22:58:08.968257 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/ramdisk
822 22:58:08.969693 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/kernel
823 22:58:09.010445 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/dtb
824 22:58:09.011312 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/nfsrootfs
825 22:58:09.170984 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931131/tftp-deploy-1l_rg_d5/modules
826 22:58:09.193436 start: 4.1 power-off (timeout 00:00:30) [common]
827 22:58:09.194114 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
828 22:58:09.229095 >> OK - accepted request
829 22:58:09.231640 Returned 0 in 0 seconds
830 22:58:09.332503 end: 4.1 power-off (duration 00:00:00) [common]
832 22:58:09.334080 start: 4.2 read-feedback (timeout 00:10:00) [common]
833 22:58:09.335174 Listened to connection for namespace 'common' for up to 1s
834 22:58:10.335948 Finalising connection for namespace 'common'
835 22:58:10.336465 Disconnecting from shell: Finalise
836 22:58:10.336729 =>
837 22:58:10.437351 end: 4.2 read-feedback (duration 00:00:01) [common]
838 22:58:10.437713 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/931131
839 22:58:12.197834 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/931131
840 22:58:12.198462 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.