Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:04:13.063616 lava-dispatcher, installed at version: 2024.01
2 23:04:13.064442 start: 0 validate
3 23:04:13.064926 Start time: 2024-11-03 23:04:13.064896+00:00 (UTC)
4 23:04:13.065495 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:04:13.066034 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:04:13.100819 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:04:13.101375 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 23:04:13.128865 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:04:13.129796 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:04:13.162380 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:04:13.162863 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:04:13.191053 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:04:13.191516 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 23:04:13.225753 validate duration: 0.16
16 23:04:13.226567 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:04:13.226907 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:04:13.227212 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:04:13.227813 Not decompressing ramdisk as can be used compressed.
20 23:04:13.228336 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 23:04:13.228621 saving as /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/ramdisk/initrd.cpio.gz
22 23:04:13.228944 total size: 5628169 (5 MB)
23 23:04:13.267386 progress 0 % (0 MB)
24 23:04:13.271546 progress 5 % (0 MB)
25 23:04:13.275769 progress 10 % (0 MB)
26 23:04:13.279489 progress 15 % (0 MB)
27 23:04:13.283594 progress 20 % (1 MB)
28 23:04:13.287355 progress 25 % (1 MB)
29 23:04:13.291489 progress 30 % (1 MB)
30 23:04:13.295609 progress 35 % (1 MB)
31 23:04:13.299346 progress 40 % (2 MB)
32 23:04:13.303487 progress 45 % (2 MB)
33 23:04:13.307212 progress 50 % (2 MB)
34 23:04:13.311326 progress 55 % (2 MB)
35 23:04:13.315494 progress 60 % (3 MB)
36 23:04:13.319201 progress 65 % (3 MB)
37 23:04:13.323375 progress 70 % (3 MB)
38 23:04:13.327075 progress 75 % (4 MB)
39 23:04:13.331225 progress 80 % (4 MB)
40 23:04:13.334906 progress 85 % (4 MB)
41 23:04:13.339020 progress 90 % (4 MB)
42 23:04:13.343018 progress 95 % (5 MB)
43 23:04:13.346388 progress 100 % (5 MB)
44 23:04:13.347045 5 MB downloaded in 0.12 s (45.45 MB/s)
45 23:04:13.347593 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:04:13.348555 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:04:13.348882 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:04:13.349173 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:04:13.349667 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/kernel/Image
51 23:04:13.349927 saving as /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/kernel/Image
52 23:04:13.350145 total size: 37878272 (36 MB)
53 23:04:13.350362 No compression specified
54 23:04:13.389124 progress 0 % (0 MB)
55 23:04:13.412699 progress 5 % (1 MB)
56 23:04:13.435885 progress 10 % (3 MB)
57 23:04:13.458871 progress 15 % (5 MB)
58 23:04:13.482073 progress 20 % (7 MB)
59 23:04:13.506492 progress 25 % (9 MB)
60 23:04:13.533615 progress 30 % (10 MB)
61 23:04:13.556803 progress 35 % (12 MB)
62 23:04:13.580229 progress 40 % (14 MB)
63 23:04:13.603700 progress 45 % (16 MB)
64 23:04:13.626740 progress 50 % (18 MB)
65 23:04:13.650492 progress 55 % (19 MB)
66 23:04:13.673761 progress 60 % (21 MB)
67 23:04:13.697138 progress 65 % (23 MB)
68 23:04:13.720306 progress 70 % (25 MB)
69 23:04:13.743006 progress 75 % (27 MB)
70 23:04:13.766458 progress 80 % (28 MB)
71 23:04:13.789719 progress 85 % (30 MB)
72 23:04:13.813167 progress 90 % (32 MB)
73 23:04:13.836322 progress 95 % (34 MB)
74 23:04:13.858548 progress 100 % (36 MB)
75 23:04:13.859292 36 MB downloaded in 0.51 s (70.95 MB/s)
76 23:04:13.859778 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:04:13.860661 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:04:13.860967 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:04:13.861264 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:04:13.861852 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:04:13.862157 saving as /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:04:13.862378 total size: 53209 (0 MB)
84 23:04:13.862597 No compression specified
85 23:04:13.900887 progress 61 % (0 MB)
86 23:04:13.901799 progress 100 % (0 MB)
87 23:04:13.902413 0 MB downloaded in 0.04 s (1.27 MB/s)
88 23:04:13.902930 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:04:13.903754 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:04:13.904049 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:04:13.904326 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:04:13.904910 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 23:04:13.905191 saving as /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/nfsrootfs/full.rootfs.tar
95 23:04:13.905410 total size: 120894716 (115 MB)
96 23:04:13.905631 Using unxz to decompress xz
97 23:04:13.945522 progress 0 % (0 MB)
98 23:04:14.735304 progress 5 % (5 MB)
99 23:04:15.573481 progress 10 % (11 MB)
100 23:04:16.366594 progress 15 % (17 MB)
101 23:04:17.099444 progress 20 % (23 MB)
102 23:04:17.693639 progress 25 % (28 MB)
103 23:04:18.514334 progress 30 % (34 MB)
104 23:04:19.329151 progress 35 % (40 MB)
105 23:04:19.682175 progress 40 % (46 MB)
106 23:04:20.057543 progress 45 % (51 MB)
107 23:04:20.784960 progress 50 % (57 MB)
108 23:04:21.672513 progress 55 % (63 MB)
109 23:04:22.451771 progress 60 % (69 MB)
110 23:04:23.207157 progress 65 % (74 MB)
111 23:04:23.981213 progress 70 % (80 MB)
112 23:04:24.805267 progress 75 % (86 MB)
113 23:04:25.594226 progress 80 % (92 MB)
114 23:04:26.349648 progress 85 % (98 MB)
115 23:04:27.199177 progress 90 % (103 MB)
116 23:04:27.980357 progress 95 % (109 MB)
117 23:04:28.815826 progress 100 % (115 MB)
118 23:04:28.829401 115 MB downloaded in 14.92 s (7.73 MB/s)
119 23:04:28.830002 end: 1.4.1 http-download (duration 00:00:15) [common]
121 23:04:28.830837 end: 1.4 download-retry (duration 00:00:15) [common]
122 23:04:28.831107 start: 1.5 download-retry (timeout 00:09:44) [common]
123 23:04:28.831369 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 23:04:28.831840 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/modules.tar.xz
125 23:04:28.832397 saving as /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/modules/modules.tar
126 23:04:28.832845 total size: 11773700 (11 MB)
127 23:04:28.833263 Using unxz to decompress xz
128 23:04:28.872344 progress 0 % (0 MB)
129 23:04:28.939232 progress 5 % (0 MB)
130 23:04:29.014283 progress 10 % (1 MB)
131 23:04:29.110336 progress 15 % (1 MB)
132 23:04:29.206649 progress 20 % (2 MB)
133 23:04:29.286237 progress 25 % (2 MB)
134 23:04:29.362873 progress 30 % (3 MB)
135 23:04:29.443401 progress 35 % (3 MB)
136 23:04:29.522897 progress 40 % (4 MB)
137 23:04:29.598570 progress 45 % (5 MB)
138 23:04:29.684123 progress 50 % (5 MB)
139 23:04:29.766560 progress 55 % (6 MB)
140 23:04:29.851904 progress 60 % (6 MB)
141 23:04:29.936356 progress 65 % (7 MB)
142 23:04:30.016776 progress 70 % (7 MB)
143 23:04:30.100588 progress 75 % (8 MB)
144 23:04:30.184835 progress 80 % (9 MB)
145 23:04:30.265995 progress 85 % (9 MB)
146 23:04:30.350797 progress 90 % (10 MB)
147 23:04:30.430351 progress 95 % (10 MB)
148 23:04:30.508748 progress 100 % (11 MB)
149 23:04:30.520056 11 MB downloaded in 1.69 s (6.66 MB/s)
150 23:04:30.520983 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:04:30.522642 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:04:30.523166 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 23:04:30.523685 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 23:04:46.956173 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/931087/extract-nfsrootfs-4bzbisle
156 23:04:46.956743 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:04:46.957080 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 23:04:46.957702 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf
159 23:04:46.958136 makedir: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin
160 23:04:46.958493 makedir: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/tests
161 23:04:46.958821 makedir: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/results
162 23:04:46.959161 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-add-keys
163 23:04:46.959700 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-add-sources
164 23:04:46.960258 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-background-process-start
165 23:04:46.960774 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-background-process-stop
166 23:04:46.961307 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-common-functions
167 23:04:46.961831 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-echo-ipv4
168 23:04:46.962352 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-install-packages
169 23:04:46.962835 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-installed-packages
170 23:04:46.963310 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-os-build
171 23:04:46.963786 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-probe-channel
172 23:04:46.964329 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-probe-ip
173 23:04:46.964814 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-target-ip
174 23:04:46.965295 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-target-mac
175 23:04:46.965837 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-target-storage
176 23:04:46.966355 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-case
177 23:04:46.966843 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-event
178 23:04:46.967318 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-feedback
179 23:04:46.967793 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-raise
180 23:04:46.968298 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-reference
181 23:04:46.968778 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-runner
182 23:04:46.969279 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-set
183 23:04:46.969777 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-test-shell
184 23:04:46.970295 Updating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-add-keys (debian)
185 23:04:46.970832 Updating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-add-sources (debian)
186 23:04:46.971418 Updating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-install-packages (debian)
187 23:04:46.971930 Updating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-installed-packages (debian)
188 23:04:46.972457 Updating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/bin/lava-os-build (debian)
189 23:04:46.972891 Creating /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/environment
190 23:04:46.973256 LAVA metadata
191 23:04:46.973516 - LAVA_JOB_ID=931087
192 23:04:46.973731 - LAVA_DISPATCHER_IP=192.168.6.2
193 23:04:46.974089 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 23:04:46.975031 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 23:04:46.975343 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 23:04:46.975553 skipped lava-vland-overlay
197 23:04:46.975793 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 23:04:46.976072 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 23:04:46.976293 skipped lava-multinode-overlay
200 23:04:46.976536 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 23:04:46.976786 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 23:04:46.977036 Loading test definitions
203 23:04:46.977314 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 23:04:46.977535 Using /lava-931087 at stage 0
205 23:04:46.978595 uuid=931087_1.6.2.4.1 testdef=None
206 23:04:46.978899 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 23:04:46.979164 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 23:04:46.980794 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 23:04:46.981593 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 23:04:46.983510 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 23:04:46.984362 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 23:04:46.986191 runner path: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/0/tests/0_timesync-off test_uuid 931087_1.6.2.4.1
215 23:04:46.986728 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 23:04:46.987545 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 23:04:46.987770 Using /lava-931087 at stage 0
219 23:04:46.988154 Fetching tests from https://github.com/kernelci/test-definitions.git
220 23:04:46.988450 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/0/tests/1_kselftest-dt'
221 23:04:51.249262 Running '/usr/bin/git checkout kernelci.org
222 23:04:51.467785 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 23:04:51.469304 uuid=931087_1.6.2.4.5 testdef=None
224 23:04:51.469659 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 23:04:51.470433 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 23:04:51.473359 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 23:04:51.474204 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 23:04:51.477965 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 23:04:51.478837 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 23:04:51.482464 runner path: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/0/tests/1_kselftest-dt test_uuid 931087_1.6.2.4.5
234 23:04:51.482753 BOARD='meson-sm1-s905d3-libretech-cc'
235 23:04:51.482973 BRANCH='mainline'
236 23:04:51.483179 SKIPFILE='/dev/null'
237 23:04:51.483383 SKIP_INSTALL='True'
238 23:04:51.483583 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/clang-15/kselftest.tar.xz'
239 23:04:51.483789 TST_CASENAME=''
240 23:04:51.484007 TST_CMDFILES='dt'
241 23:04:51.484574 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 23:04:51.485381 Creating lava-test-runner.conf files
244 23:04:51.485597 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/931087/lava-overlay-p_81lcbf/lava-931087/0 for stage 0
245 23:04:51.485958 - 0_timesync-off
246 23:04:51.486206 - 1_kselftest-dt
247 23:04:51.486548 end: 1.6.2.4 test-definition (duration 00:00:05) [common]
248 23:04:51.486839 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 23:05:14.689071 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 23:05:14.689510 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 23:05:14.689798 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 23:05:14.690098 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 23:05:14.690383 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 23:05:15.344115 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 23:05:15.344586 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 23:05:15.344836 extracting modules file /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931087/extract-nfsrootfs-4bzbisle
257 23:05:16.716949 extracting modules file /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk
258 23:05:18.117238 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 23:05:18.117712 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 23:05:18.117988 [common] Applying overlay to NFS
261 23:05:18.118203 [common] Applying overlay /var/lib/lava/dispatcher/tmp/931087/compress-overlay-ghhillp5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/931087/extract-nfsrootfs-4bzbisle
262 23:05:20.834336 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 23:05:20.834817 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 23:05:20.835099 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 23:05:20.835334 Converting downloaded kernel to a uImage
266 23:05:20.835644 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/kernel/Image /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/kernel/uImage
267 23:05:21.213752 output: Image Name:
268 23:05:21.214178 output: Created: Sun Nov 3 23:05:20 2024
269 23:05:21.214403 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 23:05:21.214617 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 23:05:21.214823 output: Load Address: 01080000
272 23:05:21.215026 output: Entry Point: 01080000
273 23:05:21.215226 output:
274 23:05:21.215564 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 23:05:21.215840 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 23:05:21.216160 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 23:05:21.216428 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 23:05:21.216692 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 23:05:21.216967 Building ramdisk /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk
280 23:05:23.478857 >> 173435 blocks
281 23:05:31.161595 Adding RAMdisk u-boot header.
282 23:05:31.162252 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk.cpio.gz.uboot
283 23:05:31.413809 output: Image Name:
284 23:05:31.414219 output: Created: Sun Nov 3 23:05:31 2024
285 23:05:31.414427 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 23:05:31.414632 output: Data Size: 24145213 Bytes = 23579.31 KiB = 23.03 MiB
287 23:05:31.414832 output: Load Address: 00000000
288 23:05:31.415029 output: Entry Point: 00000000
289 23:05:31.415228 output:
290 23:05:31.415831 rename /var/lib/lava/dispatcher/tmp/931087/extract-overlay-ramdisk-9lrkj_8n/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
291 23:05:31.416480 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 23:05:31.417074 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 23:05:31.417649 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 23:05:31.418115 No LXC device requested
295 23:05:31.418653 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 23:05:31.419206 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 23:05:31.419740 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 23:05:31.420333 Checking files for TFTP limit of 4294967296 bytes.
299 23:05:31.423235 end: 1 tftp-deploy (duration 00:01:18) [common]
300 23:05:31.423849 start: 2 uboot-action (timeout 00:05:00) [common]
301 23:05:31.424471 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 23:05:31.425019 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 23:05:31.425567 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 23:05:31.426143 Using kernel file from prepare-kernel: 931087/tftp-deploy-fa8lwrp4/kernel/uImage
305 23:05:31.426834 substitutions:
306 23:05:31.427279 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 23:05:31.427723 - {DTB_ADDR}: 0x01070000
308 23:05:31.428196 - {DTB}: 931087/tftp-deploy-fa8lwrp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 23:05:31.428641 - {INITRD}: 931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
310 23:05:31.429078 - {KERNEL_ADDR}: 0x01080000
311 23:05:31.429513 - {KERNEL}: 931087/tftp-deploy-fa8lwrp4/kernel/uImage
312 23:05:31.429944 - {LAVA_MAC}: None
313 23:05:31.430416 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/931087/extract-nfsrootfs-4bzbisle
314 23:05:31.430854 - {NFS_SERVER_IP}: 192.168.6.2
315 23:05:31.431282 - {PRESEED_CONFIG}: None
316 23:05:31.431708 - {PRESEED_LOCAL}: None
317 23:05:31.432166 - {RAMDISK_ADDR}: 0x08000000
318 23:05:31.432593 - {RAMDISK}: 931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
319 23:05:31.433020 - {ROOT_PART}: None
320 23:05:31.433445 - {ROOT}: None
321 23:05:31.433868 - {SERVER_IP}: 192.168.6.2
322 23:05:31.434288 - {TEE_ADDR}: 0x83000000
323 23:05:31.434709 - {TEE}: None
324 23:05:31.435129 Parsed boot commands:
325 23:05:31.435539 - setenv autoload no
326 23:05:31.435961 - setenv initrd_high 0xffffffff
327 23:05:31.436405 - setenv fdt_high 0xffffffff
328 23:05:31.436825 - dhcp
329 23:05:31.437247 - setenv serverip 192.168.6.2
330 23:05:31.437672 - tftpboot 0x01080000 931087/tftp-deploy-fa8lwrp4/kernel/uImage
331 23:05:31.438100 - tftpboot 0x08000000 931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
332 23:05:31.438527 - tftpboot 0x01070000 931087/tftp-deploy-fa8lwrp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 23:05:31.438951 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/931087/extract-nfsrootfs-4bzbisle,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 23:05:31.439387 - bootm 0x01080000 0x08000000 0x01070000
335 23:05:31.439921 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 23:05:31.441613 start: 2.3 connect-device (timeout 00:05:00) [common]
338 23:05:31.442066 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 23:05:31.456383 Setting prompt string to ['lava-test: # ']
340 23:05:31.458594 end: 2.3 connect-device (duration 00:00:00) [common]
341 23:05:31.459362 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 23:05:31.460275 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 23:05:31.460882 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 23:05:31.462136 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 23:05:31.502364 >> OK - accepted request
346 23:05:31.504507 Returned 0 in 0 seconds
347 23:05:31.605669 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 23:05:31.607453 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 23:05:31.608107 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 23:05:31.608707 Setting prompt string to ['Hit any key to stop autoboot']
352 23:05:31.609199 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 23:05:31.611189 Trying 192.168.56.21...
354 23:05:31.611727 Connected to conserv1.
355 23:05:31.612211 Escape character is '^]'.
356 23:05:31.612689
357 23:05:31.613144 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 23:05:31.613596
359 23:05:39.051970 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 23:05:39.052704 bl2_stage_init 0x01
361 23:05:39.053185 bl2_stage_init 0x81
362 23:05:39.057478 hw id: 0x0000 - pwm id 0x01
363 23:05:39.058030 bl2_stage_init 0xc1
364 23:05:39.063034 bl2_stage_init 0x02
365 23:05:39.063543
366 23:05:39.064079 L0:00000000
367 23:05:39.064549 L1:00000703
368 23:05:39.065000 L2:00008067
369 23:05:39.065453 L3:15000000
370 23:05:39.066201 S1:00000000
371 23:05:39.069500 B2:20282000
372 23:05:39.069972 B1:a0f83180
373 23:05:39.070417
374 23:05:39.070857 TE: 69581
375 23:05:39.071299
376 23:05:39.075034 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 23:05:39.075512
378 23:05:39.080808 Board ID = 1
379 23:05:39.081290 Set cpu clk to 24M
380 23:05:39.081736 Set clk81 to 24M
381 23:05:39.082177 Use GP1_pll as DSU clk.
382 23:05:39.084179 DSU clk: 1200 Mhz
383 23:05:39.084646 CPU clk: 1200 MHz
384 23:05:39.089713 Set clk81 to 166.6M
385 23:05:39.095259 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 23:05:39.095730 board id: 1
387 23:05:39.103907 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 23:05:39.114726 fw parse done
389 23:05:39.120887 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 23:05:39.163859 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 23:05:39.174846 PIEI prepare done
392 23:05:39.175380 fastboot data load
393 23:05:39.175836 fastboot data verify
394 23:05:39.180425 verify result: 266
395 23:05:39.186016 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 23:05:39.186491 LPDDR4 probe
397 23:05:39.186936 ddr clk to 1584MHz
398 23:05:39.194003 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 23:05:39.231768
400 23:05:39.232299 dmc_version 0001
401 23:05:39.238780 Check phy result
402 23:05:39.244759 INFO : End of CA training
403 23:05:39.245228 INFO : End of initialization
404 23:05:39.250372 INFO : Training has run successfully!
405 23:05:39.250843 Check phy result
406 23:05:39.255935 INFO : End of initialization
407 23:05:39.256432 INFO : End of read enable training
408 23:05:39.261672 INFO : End of fine write leveling
409 23:05:39.267172 INFO : End of Write leveling coarse delay
410 23:05:39.267635 INFO : Training has run successfully!
411 23:05:39.268123 Check phy result
412 23:05:39.272732 INFO : End of initialization
413 23:05:39.273245 INFO : End of read dq deskew training
414 23:05:39.278338 INFO : End of MPR read delay center optimization
415 23:05:39.283961 INFO : End of write delay center optimization
416 23:05:39.289661 INFO : End of read delay center optimization
417 23:05:39.290128 INFO : End of max read latency training
418 23:05:39.295222 INFO : Training has run successfully!
419 23:05:39.295694 1D training succeed
420 23:05:39.304368 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 23:05:39.352677 Check phy result
422 23:05:39.353156 INFO : End of initialization
423 23:05:39.380045 INFO : End of 2D read delay Voltage center optimization
424 23:05:39.404350 INFO : End of 2D read delay Voltage center optimization
425 23:05:39.460946 INFO : End of 2D write delay Voltage center optimization
426 23:05:39.514968 INFO : End of 2D write delay Voltage center optimization
427 23:05:39.520477 INFO : Training has run successfully!
428 23:05:39.520973
429 23:05:39.521767 channel==0
430 23:05:39.526051 RxClkDly_Margin_A0==88 ps 9
431 23:05:39.526537 TxDqDly_Margin_A0==98 ps 10
432 23:05:39.531725 RxClkDly_Margin_A1==88 ps 9
433 23:05:39.532253 TxDqDly_Margin_A1==98 ps 10
434 23:05:39.532703 TrainedVREFDQ_A0==75
435 23:05:39.537263 TrainedVREFDQ_A1==75
436 23:05:39.537737 VrefDac_Margin_A0==23
437 23:05:39.538178 DeviceVref_Margin_A0==39
438 23:05:39.542823 VrefDac_Margin_A1==23
439 23:05:39.543284 DeviceVref_Margin_A1==39
440 23:05:39.543723
441 23:05:39.544200
442 23:05:39.548414 channel==1
443 23:05:39.548875 RxClkDly_Margin_A0==78 ps 8
444 23:05:39.549315 TxDqDly_Margin_A0==98 ps 10
445 23:05:39.554004 RxClkDly_Margin_A1==78 ps 8
446 23:05:39.554470 TxDqDly_Margin_A1==88 ps 9
447 23:05:39.559718 TrainedVREFDQ_A0==78
448 23:05:39.560220 TrainedVREFDQ_A1==75
449 23:05:39.560666 VrefDac_Margin_A0==22
450 23:05:39.565227 DeviceVref_Margin_A0==36
451 23:05:39.565689 VrefDac_Margin_A1==22
452 23:05:39.570821 DeviceVref_Margin_A1==39
453 23:05:39.571284
454 23:05:39.571729 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 23:05:39.572204
456 23:05:39.604501 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000018 00000018 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
457 23:05:39.605100 2D training succeed
458 23:05:39.610051 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 23:05:39.615725 auto size-- 65535DDR cs0 size: 2048MB
460 23:05:39.616223 DDR cs1 size: 2048MB
461 23:05:39.621222 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 23:05:39.621690 cs0 DataBus test pass
463 23:05:39.626820 cs1 DataBus test pass
464 23:05:39.627279 cs0 AddrBus test pass
465 23:05:39.627721 cs1 AddrBus test pass
466 23:05:39.628194
467 23:05:39.632423 100bdlr_step_size ps== 471
468 23:05:39.632905 result report
469 23:05:39.638095 boot times 0Enable ddr reg access
470 23:05:39.643281 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 23:05:39.657173 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 23:05:40.316720 bl2z: ptr: 05129330, size: 00001e40
473 23:05:40.324453 0.0;M3 CHK:0;cm4_sp_mode 0
474 23:05:40.324945 MVN_1=0x00000000
475 23:05:40.325389 MVN_2=0x00000000
476 23:05:40.335964 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 23:05:40.336509 OPS=0x04
478 23:05:40.336965 ring efuse init
479 23:05:40.341623 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 23:05:40.342112 [0.017354 Inits done]
481 23:05:40.342558 secure task start!
482 23:05:40.349696 high task start!
483 23:05:40.350174 low task start!
484 23:05:40.350617 run into bl31
485 23:05:40.358319 NOTICE: BL31: v1.3(release):4fc40b1
486 23:05:40.366131 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 23:05:40.366607 NOTICE: BL31: G12A normal boot!
488 23:05:40.381753 NOTICE: BL31: BL33 decompress pass
489 23:05:40.387334 ERROR: Error initializing runtime service opteed_fast
490 23:05:43.100957 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 23:05:43.101606 bl2_stage_init 0x01
492 23:05:43.102069 bl2_stage_init 0x81
493 23:05:43.106501 hw id: 0x0000 - pwm id 0x01
494 23:05:43.107047 bl2_stage_init 0xc1
495 23:05:43.112258 bl2_stage_init 0x02
496 23:05:43.112789
497 23:05:43.113195 L0:00000000
498 23:05:43.113593 L1:00000703
499 23:05:43.113983 L2:00008067
500 23:05:43.114369 L3:15000000
501 23:05:43.117678 S1:00000000
502 23:05:43.118109 B2:20282000
503 23:05:43.118495 B1:a0f83180
504 23:05:43.118878
505 23:05:43.119262 TE: 68344
506 23:05:43.119648
507 23:05:43.123277 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 23:05:43.123712
509 23:05:43.128874 Board ID = 1
510 23:05:43.129308 Set cpu clk to 24M
511 23:05:43.129697 Set clk81 to 24M
512 23:05:43.134460 Use GP1_pll as DSU clk.
513 23:05:43.134885 DSU clk: 1200 Mhz
514 23:05:43.135273 CPU clk: 1200 MHz
515 23:05:43.140171 Set clk81 to 166.6M
516 23:05:43.145680 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 23:05:43.146108 board id: 1
518 23:05:43.152881 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 23:05:43.163759 fw parse done
520 23:05:43.169740 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 23:05:43.212871 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 23:05:43.223962 PIEI prepare done
523 23:05:43.224469 fastboot data load
524 23:05:43.224862 fastboot data verify
525 23:05:43.229738 verify result: 266
526 23:05:43.235281 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 23:05:43.235768 LPDDR4 probe
528 23:05:43.236194 ddr clk to 1584MHz
529 23:05:43.243269 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 23:05:43.281000
531 23:05:43.281624 dmc_version 0001
532 23:05:43.288036 Check phy result
533 23:05:43.294002 INFO : End of CA training
534 23:05:43.294441 INFO : End of initialization
535 23:05:43.299575 INFO : Training has run successfully!
536 23:05:43.300060 Check phy result
537 23:05:43.305236 INFO : End of initialization
538 23:05:43.305657 INFO : End of read enable training
539 23:05:43.310765 INFO : End of fine write leveling
540 23:05:43.316357 INFO : End of Write leveling coarse delay
541 23:05:43.316803 INFO : Training has run successfully!
542 23:05:43.317215 Check phy result
543 23:05:43.321993 INFO : End of initialization
544 23:05:43.322449 INFO : End of read dq deskew training
545 23:05:43.327562 INFO : End of MPR read delay center optimization
546 23:05:43.333252 INFO : End of write delay center optimization
547 23:05:43.338759 INFO : End of read delay center optimization
548 23:05:43.339221 INFO : End of max read latency training
549 23:05:43.344366 INFO : Training has run successfully!
550 23:05:43.344817 1D training succeed
551 23:05:43.353566 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 23:05:43.401986 Check phy result
553 23:05:43.402439 INFO : End of initialization
554 23:05:43.429394 INFO : End of 2D read delay Voltage center optimization
555 23:05:43.453414 INFO : End of 2D read delay Voltage center optimization
556 23:05:43.510109 INFO : End of 2D write delay Voltage center optimization
557 23:05:43.564098 INFO : End of 2D write delay Voltage center optimization
558 23:05:43.569668 INFO : Training has run successfully!
559 23:05:43.570114
560 23:05:43.570529 channel==0
561 23:05:43.575268 RxClkDly_Margin_A0==78 ps 8
562 23:05:43.575709 TxDqDly_Margin_A0==98 ps 10
563 23:05:43.580849 RxClkDly_Margin_A1==88 ps 9
564 23:05:43.581289 TxDqDly_Margin_A1==98 ps 10
565 23:05:43.581702 TrainedVREFDQ_A0==74
566 23:05:43.586471 TrainedVREFDQ_A1==75
567 23:05:43.586918 VrefDac_Margin_A0==24
568 23:05:43.587325 DeviceVref_Margin_A0==40
569 23:05:43.592070 VrefDac_Margin_A1==23
570 23:05:43.592516 DeviceVref_Margin_A1==39
571 23:05:43.592925
572 23:05:43.593329
573 23:05:43.597654 channel==1
574 23:05:43.598092 RxClkDly_Margin_A0==78 ps 8
575 23:05:43.598498 TxDqDly_Margin_A0==98 ps 10
576 23:05:43.603255 RxClkDly_Margin_A1==88 ps 9
577 23:05:43.603688 TxDqDly_Margin_A1==88 ps 9
578 23:05:43.608916 TrainedVREFDQ_A0==78
579 23:05:43.609383 TrainedVREFDQ_A1==75
580 23:05:43.609809 VrefDac_Margin_A0==22
581 23:05:43.614498 DeviceVref_Margin_A0==36
582 23:05:43.614972 VrefDac_Margin_A1==22
583 23:05:43.620071 DeviceVref_Margin_A1==39
584 23:05:43.620515
585 23:05:43.620927 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 23:05:43.621334
587 23:05:43.653643 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
588 23:05:43.654121 2D training succeed
589 23:05:43.659265 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 23:05:43.664846 auto size-- 65535DDR cs0 size: 2048MB
591 23:05:43.665296 DDR cs1 size: 2048MB
592 23:05:43.670462 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 23:05:43.670906 cs0 DataBus test pass
594 23:05:43.676076 cs1 DataBus test pass
595 23:05:43.676525 cs0 AddrBus test pass
596 23:05:43.676933 cs1 AddrBus test pass
597 23:05:43.677335
598 23:05:43.681655 100bdlr_step_size ps== 471
599 23:05:43.682107 result report
600 23:05:43.687275 boot times 0Enable ddr reg access
601 23:05:43.692507 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 23:05:43.706395 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 23:05:44.366868 bl2z: ptr: 05129330, size: 00001e40
604 23:05:44.375414 0.0;M3 CHK:0;cm4_sp_mode 0
605 23:05:44.375929 MVN_1=0x00000000
606 23:05:44.376444 MVN_2=0x00000000
607 23:05:44.386856 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 23:05:44.387313 OPS=0x04
609 23:05:44.387728 ring efuse init
610 23:05:44.392416 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 23:05:44.392869 [0.017354 Inits done]
612 23:05:44.393278 secure task start!
613 23:05:44.400076 high task start!
614 23:05:44.400527 low task start!
615 23:05:44.400936 run into bl31
616 23:05:44.408744 NOTICE: BL31: v1.3(release):4fc40b1
617 23:05:44.416580 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 23:05:44.417027 NOTICE: BL31: G12A normal boot!
619 23:05:44.432068 NOTICE: BL31: BL33 decompress pass
620 23:05:44.437834 ERROR: Error initializing runtime service opteed_fast
621 23:05:45.799887 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 23:05:45.800545 bl2_stage_init 0x01
623 23:05:45.801009 bl2_stage_init 0x81
624 23:05:45.805204 hw id: 0x0000 - pwm id 0x01
625 23:05:45.805655 bl2_stage_init 0xc1
626 23:05:45.810758 bl2_stage_init 0x02
627 23:05:45.811199
628 23:05:45.811613 L0:00000000
629 23:05:45.812043 L1:00000703
630 23:05:45.812452 L2:00008067
631 23:05:45.812851 L3:15000000
632 23:05:45.816782 S1:00000000
633 23:05:45.817221 B2:20282000
634 23:05:45.817625 B1:a0f83180
635 23:05:45.818020
636 23:05:45.818415 TE: 68116
637 23:05:45.818810
638 23:05:45.822405 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 23:05:45.822846
640 23:05:45.828006 Board ID = 1
641 23:05:45.828466 Set cpu clk to 24M
642 23:05:45.828872 Set clk81 to 24M
643 23:05:45.831439 Use GP1_pll as DSU clk.
644 23:05:45.831871 DSU clk: 1200 Mhz
645 23:05:45.837004 CPU clk: 1200 MHz
646 23:05:45.837445 Set clk81 to 166.6M
647 23:05:45.842652 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 23:05:45.843089 board id: 1
649 23:05:45.851582 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 23:05:45.862447 fw parse done
651 23:05:45.868444 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 23:05:45.911646 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 23:05:45.922669 PIEI prepare done
654 23:05:45.923125 fastboot data load
655 23:05:45.923544 fastboot data verify
656 23:05:45.928198 verify result: 266
657 23:05:45.933794 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 23:05:45.934234 LPDDR4 probe
659 23:05:45.934639 ddr clk to 1584MHz
660 23:05:45.941804 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 23:05:45.979559
662 23:05:45.980115 dmc_version 0001
663 23:05:45.986600 Check phy result
664 23:05:45.992638 INFO : End of CA training
665 23:05:45.993072 INFO : End of initialization
666 23:05:45.998159 INFO : Training has run successfully!
667 23:05:45.998599 Check phy result
668 23:05:46.003756 INFO : End of initialization
669 23:05:46.004222 INFO : End of read enable training
670 23:05:46.009355 INFO : End of fine write leveling
671 23:05:46.014976 INFO : End of Write leveling coarse delay
672 23:05:46.015410 INFO : Training has run successfully!
673 23:05:46.015818 Check phy result
674 23:05:46.020619 INFO : End of initialization
675 23:05:46.021052 INFO : End of read dq deskew training
676 23:05:46.026159 INFO : End of MPR read delay center optimization
677 23:05:46.031817 INFO : End of write delay center optimization
678 23:05:46.037430 INFO : End of read delay center optimization
679 23:05:46.037868 INFO : End of max read latency training
680 23:05:46.043006 INFO : Training has run successfully!
681 23:05:46.043447 1D training succeed
682 23:05:46.052227 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 23:05:46.100504 Check phy result
684 23:05:46.100959 INFO : End of initialization
685 23:05:46.127883 INFO : End of 2D read delay Voltage center optimization
686 23:05:46.152062 INFO : End of 2D read delay Voltage center optimization
687 23:05:46.208832 INFO : End of 2D write delay Voltage center optimization
688 23:05:46.262867 INFO : End of 2D write delay Voltage center optimization
689 23:05:46.268350 INFO : Training has run successfully!
690 23:05:46.268786
691 23:05:46.269192 channel==0
692 23:05:46.273930 RxClkDly_Margin_A0==78 ps 8
693 23:05:46.274360 TxDqDly_Margin_A0==98 ps 10
694 23:05:46.279584 RxClkDly_Margin_A1==88 ps 9
695 23:05:46.280060 TxDqDly_Margin_A1==98 ps 10
696 23:05:46.280476 TrainedVREFDQ_A0==74
697 23:05:46.285138 TrainedVREFDQ_A1==74
698 23:05:46.285576 VrefDac_Margin_A0==23
699 23:05:46.285979 DeviceVref_Margin_A0==40
700 23:05:46.290750 VrefDac_Margin_A1==23
701 23:05:46.291180 DeviceVref_Margin_A1==40
702 23:05:46.291585
703 23:05:46.292016
704 23:05:46.296257 channel==1
705 23:05:46.296688 RxClkDly_Margin_A0==78 ps 8
706 23:05:46.297091 TxDqDly_Margin_A0==88 ps 9
707 23:05:46.301914 RxClkDly_Margin_A1==78 ps 8
708 23:05:46.302342 TxDqDly_Margin_A1==88 ps 9
709 23:05:46.307484 TrainedVREFDQ_A0==75
710 23:05:46.307957 TrainedVREFDQ_A1==75
711 23:05:46.308402 VrefDac_Margin_A0==22
712 23:05:46.313135 DeviceVref_Margin_A0==38
713 23:05:46.313566 VrefDac_Margin_A1==22
714 23:05:46.318828 DeviceVref_Margin_A1==38
715 23:05:46.319254
716 23:05:46.319655 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 23:05:46.320080
718 23:05:46.352340 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
719 23:05:46.352816 2D training succeed
720 23:05:46.357869 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 23:05:46.363410 auto size-- 65535DDR cs0 size: 2048MB
722 23:05:46.363846 DDR cs1 size: 2048MB
723 23:05:46.368985 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 23:05:46.369431 cs0 DataBus test pass
725 23:05:46.374684 cs1 DataBus test pass
726 23:05:46.375121 cs0 AddrBus test pass
727 23:05:46.375522 cs1 AddrBus test pass
728 23:05:46.375913
729 23:05:46.380213 100bdlr_step_size ps== 471
730 23:05:46.380666 result report
731 23:05:46.385791 boot times 0Enable ddr reg access
732 23:05:46.390948 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 23:05:46.404817 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 23:05:47.064153 bl2z: ptr: 05129330, size: 00001e40
735 23:05:47.073572 0.0;M3 CHK:0;cm4_sp_mode 0
736 23:05:47.074049 MVN_1=0x00000000
737 23:05:47.074460 MVN_2=0x00000000
738 23:05:47.085030 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 23:05:47.085476 OPS=0x04
740 23:05:47.085885 ring efuse init
741 23:05:47.090716 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 23:05:47.091154 [0.017354 Inits done]
743 23:05:47.091557 secure task start!
744 23:05:47.097969 high task start!
745 23:05:47.098413 low task start!
746 23:05:47.098815 run into bl31
747 23:05:47.106693 NOTICE: BL31: v1.3(release):4fc40b1
748 23:05:47.114406 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 23:05:47.114847 NOTICE: BL31: G12A normal boot!
750 23:05:47.129970 NOTICE: BL31: BL33 decompress pass
751 23:05:47.135763 ERROR: Error initializing runtime service opteed_fast
752 23:05:47.931112
753 23:05:47.931763
754 23:05:47.936515 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 23:05:47.937039
756 23:05:47.940042 Model: Libre Computer AML-S905D3-CC Solitude
757 23:05:48.087233 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 23:05:48.102424 DRAM: 2 GiB (effective 3.8 GiB)
759 23:05:48.203432 Core: 406 devices, 33 uclasses, devicetree: separate
760 23:05:48.209193 WDT: Not starting watchdog@f0d0
761 23:05:48.234418 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 23:05:48.246613 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 23:05:48.251619 ** Bad device specification mmc 0 **
764 23:05:48.262359 Card did not respond to voltage select! : -110
765 23:05:48.269251 ** Bad device specification mmc 0 **
766 23:05:48.269731 Couldn't find partition mmc 0
767 23:05:48.277540 Card did not respond to voltage select! : -110
768 23:05:48.283038 ** Bad device specification mmc 0 **
769 23:05:48.283496 Couldn't find partition mmc 0
770 23:05:48.288098 Error: could not access storage.
771 23:05:48.584573 Net: eth0: ethernet@ff3f0000
772 23:05:48.585221 starting USB...
773 23:05:48.829120 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 23:05:48.829523 Starting the controller
775 23:05:48.836144 USB XHCI 1.10
776 23:05:50.390383 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 23:05:50.398700 scanning usb for storage devices... 0 Storage Device(s) found
779 23:05:50.449751 Hit any key to stop autoboot: 1
780 23:05:50.450705 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 23:05:50.451093 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 23:05:50.451383 Setting prompt string to ['=>']
783 23:05:50.451648 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 23:05:50.464874 0
785 23:05:50.465909 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 23:05:50.567246 => setenv autoload no
788 23:05:50.568179 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 23:05:50.573635 setenv autoload no
791 23:05:50.675196 => setenv initrd_high 0xffffffff
792 23:05:50.675851 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 23:05:50.680184 setenv initrd_high 0xffffffff
795 23:05:50.781664 => setenv fdt_high 0xffffffff
796 23:05:50.782305 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 23:05:50.786593 setenv fdt_high 0xffffffff
799 23:05:50.888145 => dhcp
800 23:05:50.888851 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 23:05:50.892873 dhcp
802 23:05:51.398367 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 23:05:51.398973 Speed: 1000, full duplex
804 23:05:51.399420 BOOTP broadcast 1
805 23:05:51.647064 BOOTP broadcast 2
806 23:05:51.662105 DHCP client bound to address 192.168.6.21 (262 ms)
808 23:05:51.763575 => setenv serverip 192.168.6.2
809 23:05:51.764233 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
810 23:05:51.768758 setenv serverip 192.168.6.2
812 23:05:51.870275 => tftpboot 0x01080000 931087/tftp-deploy-fa8lwrp4/kernel/uImage
813 23:05:51.871014 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
814 23:05:51.877687 tftpboot 0x01080000 931087/tftp-deploy-fa8lwrp4/kernel/uImage
815 23:05:51.878195 Speed: 1000, full duplex
816 23:05:51.878639 Using ethernet@ff3f0000 device
817 23:05:51.883206 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
818 23:05:51.888795 Filename '931087/tftp-deploy-fa8lwrp4/kernel/uImage'.
819 23:05:51.892653 Load address: 0x1080000
820 23:05:54.186727 Loading: *################################################## 36.1 MiB
821 23:05:54.187384 15.7 MiB/s
822 23:05:54.187828 done
823 23:05:54.190595 Bytes transferred = 37878336 (241fa40 hex)
825 23:05:54.292104 => tftpboot 0x08000000 931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
826 23:05:54.292790 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
827 23:05:54.299607 tftpboot 0x08000000 931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot
828 23:05:54.300209 Speed: 1000, full duplex
829 23:05:54.300662 Using ethernet@ff3f0000 device
830 23:05:54.305011 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
831 23:05:54.314871 Filename '931087/tftp-deploy-fa8lwrp4/ramdisk/ramdisk.cpio.gz.uboot'.
832 23:05:54.315449 Load address: 0x8000000
833 23:05:55.857356 Loading: *################################################# UDP wrong checksum 00000005 000027b8
834 23:06:00.858190 T UDP wrong checksum 00000005 000027b8
835 23:06:10.860211 T T UDP wrong checksum 00000005 000027b8
836 23:06:11.031399 UDP wrong checksum 000000ff 0000923a
837 23:06:11.069922 UDP wrong checksum 000000ff 00001c2d
838 23:06:29.251882 T T T UDP wrong checksum 000000ff 00003b48
839 23:06:29.310271 UDP wrong checksum 000000ff 0000cb3a
840 23:06:30.864200 T UDP wrong checksum 00000005 000027b8
841 23:06:50.868967 T T T
842 23:06:50.869652 Retry count exceeded; starting again
844 23:06:50.871265 end: 2.4.3 bootloader-commands (duration 00:01:00) [common]
847 23:06:50.873457 end: 2.4 uboot-commands (duration 00:01:19) [common]
849 23:06:50.875024 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
851 23:06:50.876381 end: 2 uboot-action (duration 00:01:19) [common]
853 23:06:50.878129 Cleaning after the job
854 23:06:50.878770 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/ramdisk
855 23:06:50.880271 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/kernel
856 23:06:50.922732 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/dtb
857 23:06:50.924092 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/nfsrootfs
858 23:06:51.082797 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931087/tftp-deploy-fa8lwrp4/modules
859 23:06:51.102585 start: 4.1 power-off (timeout 00:00:30) [common]
860 23:06:51.103226 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
861 23:06:51.134026 >> OK - accepted request
862 23:06:51.136183 Returned 0 in 0 seconds
863 23:06:51.236909 end: 4.1 power-off (duration 00:00:00) [common]
865 23:06:51.237841 start: 4.2 read-feedback (timeout 00:10:00) [common]
866 23:06:51.238497 Listened to connection for namespace 'common' for up to 1s
867 23:06:52.239388 Finalising connection for namespace 'common'
868 23:06:52.239797 Disconnecting from shell: Finalise
869 23:06:52.240120 =>
870 23:06:52.340826 end: 4.2 read-feedback (duration 00:00:01) [common]
871 23:06:52.341469 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/931087
872 23:06:55.267382 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/931087
873 23:06:55.268040 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.