Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:43:47.084639 lava-dispatcher, installed at version: 2024.01
2 23:43:47.085489 start: 0 validate
3 23:43:47.086005 Start time: 2024-11-03 23:43:47.085974+00:00 (UTC)
4 23:43:47.086565 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:43:47.087106 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:43:47.130800 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:43:47.131371 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:43:47.165667 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:43:47.166343 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 23:43:47.197027 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:43:47.197541 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:43:47.224743 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:43:47.225250 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:43:47.258970 validate duration: 0.17
16 23:43:47.259844 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:43:47.260211 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:43:47.260546 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:43:47.261152 Not decompressing ramdisk as can be used compressed.
20 23:43:47.261607 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 23:43:47.261897 saving as /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/ramdisk/initrd.cpio.gz
22 23:43:47.262170 total size: 5628182 (5 MB)
23 23:43:47.299441 progress 0 % (0 MB)
24 23:43:47.303711 progress 5 % (0 MB)
25 23:43:47.308059 progress 10 % (0 MB)
26 23:43:47.311678 progress 15 % (0 MB)
27 23:43:47.315785 progress 20 % (1 MB)
28 23:43:47.319521 progress 25 % (1 MB)
29 23:43:47.323690 progress 30 % (1 MB)
30 23:43:47.327862 progress 35 % (1 MB)
31 23:43:47.331659 progress 40 % (2 MB)
32 23:43:47.335819 progress 45 % (2 MB)
33 23:43:47.339612 progress 50 % (2 MB)
34 23:43:47.343814 progress 55 % (2 MB)
35 23:43:47.347965 progress 60 % (3 MB)
36 23:43:47.351743 progress 65 % (3 MB)
37 23:43:47.356032 progress 70 % (3 MB)
38 23:43:47.359779 progress 75 % (4 MB)
39 23:43:47.363867 progress 80 % (4 MB)
40 23:43:47.367626 progress 85 % (4 MB)
41 23:43:47.371758 progress 90 % (4 MB)
42 23:43:47.375733 progress 95 % (5 MB)
43 23:43:47.379058 progress 100 % (5 MB)
44 23:43:47.379703 5 MB downloaded in 0.12 s (45.68 MB/s)
45 23:43:47.380286 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:43:47.381182 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:43:47.381474 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:43:47.381743 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:43:47.382209 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/kernel/Image
51 23:43:47.382456 saving as /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/kernel/Image
52 23:43:47.382666 total size: 45713920 (43 MB)
53 23:43:47.382876 No compression specified
54 23:43:47.415938 progress 0 % (0 MB)
55 23:43:47.449738 progress 5 % (2 MB)
56 23:43:47.483698 progress 10 % (4 MB)
57 23:43:47.517661 progress 15 % (6 MB)
58 23:43:47.551935 progress 20 % (8 MB)
59 23:43:47.588353 progress 25 % (10 MB)
60 23:43:47.626857 progress 30 % (13 MB)
61 23:43:47.661032 progress 35 % (15 MB)
62 23:43:47.695200 progress 40 % (17 MB)
63 23:43:47.729334 progress 45 % (19 MB)
64 23:43:47.763561 progress 50 % (21 MB)
65 23:43:47.798005 progress 55 % (24 MB)
66 23:43:47.832430 progress 60 % (26 MB)
67 23:43:47.866085 progress 65 % (28 MB)
68 23:43:47.899734 progress 70 % (30 MB)
69 23:43:47.933566 progress 75 % (32 MB)
70 23:43:47.967762 progress 80 % (34 MB)
71 23:43:48.001409 progress 85 % (37 MB)
72 23:43:48.035356 progress 90 % (39 MB)
73 23:43:48.070707 progress 95 % (41 MB)
74 23:43:48.110421 progress 100 % (43 MB)
75 23:43:48.111099 43 MB downloaded in 0.73 s (59.85 MB/s)
76 23:43:48.111679 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:43:48.112725 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:43:48.113064 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:43:48.113395 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:43:48.113960 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 23:43:48.114300 saving as /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/dtb/meson-g12b-a311d-libretech-cc.dtb
83 23:43:48.114555 total size: 54703 (0 MB)
84 23:43:48.114812 No compression specified
85 23:43:48.152792 progress 59 % (0 MB)
86 23:43:48.153932 progress 100 % (0 MB)
87 23:43:48.154707 0 MB downloaded in 0.04 s (1.30 MB/s)
88 23:43:48.155396 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:43:48.156596 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:43:48.156936 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:43:48.157319 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:43:48.157964 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 23:43:48.158279 saving as /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/nfsrootfs/full.rootfs.tar
95 23:43:48.158529 total size: 107552908 (102 MB)
96 23:43:48.158792 Using unxz to decompress xz
97 23:43:48.194605 progress 0 % (0 MB)
98 23:43:48.852337 progress 5 % (5 MB)
99 23:43:49.580397 progress 10 % (10 MB)
100 23:43:50.299331 progress 15 % (15 MB)
101 23:43:51.052310 progress 20 % (20 MB)
102 23:43:51.621314 progress 25 % (25 MB)
103 23:43:52.241835 progress 30 % (30 MB)
104 23:43:52.981836 progress 35 % (35 MB)
105 23:43:53.327376 progress 40 % (41 MB)
106 23:43:53.878549 progress 45 % (46 MB)
107 23:43:54.626635 progress 50 % (51 MB)
108 23:43:55.318786 progress 55 % (56 MB)
109 23:43:56.085745 progress 60 % (61 MB)
110 23:43:56.854142 progress 65 % (66 MB)
111 23:43:57.624565 progress 70 % (71 MB)
112 23:43:58.403061 progress 75 % (76 MB)
113 23:43:59.107850 progress 80 % (82 MB)
114 23:43:59.822721 progress 85 % (87 MB)
115 23:44:00.549912 progress 90 % (92 MB)
116 23:44:01.258621 progress 95 % (97 MB)
117 23:44:01.999346 progress 100 % (102 MB)
118 23:44:02.011751 102 MB downloaded in 13.85 s (7.40 MB/s)
119 23:44:02.012720 end: 1.4.1 http-download (duration 00:00:14) [common]
121 23:44:02.014496 end: 1.4 download-retry (duration 00:00:14) [common]
122 23:44:02.015058 start: 1.5 download-retry (timeout 00:09:45) [common]
123 23:44:02.015621 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 23:44:02.016650 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/modules.tar.xz
125 23:44:02.017173 saving as /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/modules/modules.tar
126 23:44:02.017623 total size: 11612440 (11 MB)
127 23:44:02.018083 Using unxz to decompress xz
128 23:44:02.063227 progress 0 % (0 MB)
129 23:44:02.129107 progress 5 % (0 MB)
130 23:44:02.206332 progress 10 % (1 MB)
131 23:44:02.310013 progress 15 % (1 MB)
132 23:44:02.402741 progress 20 % (2 MB)
133 23:44:02.482079 progress 25 % (2 MB)
134 23:44:02.559043 progress 30 % (3 MB)
135 23:44:02.640094 progress 35 % (3 MB)
136 23:44:02.714753 progress 40 % (4 MB)
137 23:44:02.791845 progress 45 % (5 MB)
138 23:44:02.876216 progress 50 % (5 MB)
139 23:44:02.953430 progress 55 % (6 MB)
140 23:44:03.048590 progress 60 % (6 MB)
141 23:44:03.131705 progress 65 % (7 MB)
142 23:44:03.212650 progress 70 % (7 MB)
143 23:44:03.291495 progress 75 % (8 MB)
144 23:44:03.375156 progress 80 % (8 MB)
145 23:44:03.455010 progress 85 % (9 MB)
146 23:44:03.533266 progress 90 % (9 MB)
147 23:44:03.611091 progress 95 % (10 MB)
148 23:44:03.687882 progress 100 % (11 MB)
149 23:44:03.699734 11 MB downloaded in 1.68 s (6.58 MB/s)
150 23:44:03.700581 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:44:03.702365 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:44:03.702939 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 23:44:03.703503 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 23:44:13.412211 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/931361/extract-nfsrootfs-1vmt0omj
156 23:44:13.412794 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 23:44:13.413084 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 23:44:13.413711 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh
159 23:44:13.414180 makedir: /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin
160 23:44:13.414549 makedir: /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/tests
161 23:44:13.414876 makedir: /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/results
162 23:44:13.415234 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-add-keys
163 23:44:13.415804 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-add-sources
164 23:44:13.416385 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-background-process-start
165 23:44:13.416936 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-background-process-stop
166 23:44:13.417529 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-common-functions
167 23:44:13.418100 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-echo-ipv4
168 23:44:13.418623 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-install-packages
169 23:44:13.419116 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-installed-packages
170 23:44:13.419594 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-os-build
171 23:44:13.420095 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-probe-channel
172 23:44:13.420588 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-probe-ip
173 23:44:13.421094 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-target-ip
174 23:44:13.421577 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-target-mac
175 23:44:13.422082 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-target-storage
176 23:44:13.422593 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-case
177 23:44:13.423077 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-event
178 23:44:13.423559 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-feedback
179 23:44:13.424066 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-raise
180 23:44:13.424580 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-reference
181 23:44:13.425075 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-runner
182 23:44:13.425568 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-set
183 23:44:13.426083 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-test-shell
184 23:44:13.426617 Updating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-install-packages (oe)
185 23:44:13.427248 Updating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/bin/lava-installed-packages (oe)
186 23:44:13.427719 Creating /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/environment
187 23:44:13.428126 LAVA metadata
188 23:44:13.428407 - LAVA_JOB_ID=931361
189 23:44:13.428629 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:44:13.429016 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 23:44:13.430011 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:44:13.430340 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 23:44:13.430553 skipped lava-vland-overlay
194 23:44:13.430798 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:44:13.431055 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 23:44:13.431278 skipped lava-multinode-overlay
197 23:44:13.431523 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:44:13.431777 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 23:44:13.432057 Loading test definitions
200 23:44:13.432364 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 23:44:13.432598 Using /lava-931361 at stage 0
202 23:44:13.433944 uuid=931361_1.6.2.4.1 testdef=None
203 23:44:13.434333 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:44:13.434619 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 23:44:13.436750 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:44:13.437627 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 23:44:13.440351 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:44:13.441252 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 23:44:13.443546 runner path: /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/0/tests/0_dmesg test_uuid 931361_1.6.2.4.1
212 23:44:13.444216 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:44:13.445014 Creating lava-test-runner.conf files
215 23:44:13.445220 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/931361/lava-overlay-z7ewqyhh/lava-931361/0 for stage 0
216 23:44:13.445596 - 0_dmesg
217 23:44:13.445983 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:44:13.446277 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 23:44:13.468104 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:44:13.468510 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 23:44:13.468776 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:44:13.469045 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:44:13.469313 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 23:44:14.095875 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:44:14.096348 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 23:44:14.096598 extracting modules file /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931361/extract-nfsrootfs-1vmt0omj
227 23:44:15.476274 extracting modules file /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk
228 23:44:17.066596 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:44:17.067095 start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
230 23:44:17.067415 [common] Applying overlay to NFS
231 23:44:17.067681 [common] Applying overlay /var/lib/lava/dispatcher/tmp/931361/compress-overlay-xaqnvkdf/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/931361/extract-nfsrootfs-1vmt0omj
232 23:44:17.117314 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:44:17.117895 start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
234 23:44:17.118279 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
235 23:44:17.118575 Converting downloaded kernel to a uImage
236 23:44:17.118938 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/kernel/Image /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/kernel/uImage
237 23:44:17.581571 output: Image Name:
238 23:44:17.582005 output: Created: Sun Nov 3 23:44:17 2024
239 23:44:17.582218 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:44:17.582424 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:44:17.582626 output: Load Address: 01080000
242 23:44:17.582829 output: Entry Point: 01080000
243 23:44:17.583029 output:
244 23:44:17.583374 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:44:17.583643 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:44:17.583915 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 23:44:17.584216 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:44:17.584478 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 23:44:17.584736 Building ramdisk /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk
250 23:44:19.874071 >> 166824 blocks
251 23:44:27.607916 Adding RAMdisk u-boot header.
252 23:44:27.608650 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk.cpio.gz.uboot
253 23:44:27.861172 output: Image Name:
254 23:44:27.861576 output: Created: Sun Nov 3 23:44:27 2024
255 23:44:27.862009 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:44:27.862431 output: Data Size: 23435051 Bytes = 22885.79 KiB = 22.35 MiB
257 23:44:27.862844 output: Load Address: 00000000
258 23:44:27.863247 output: Entry Point: 00000000
259 23:44:27.863646 output:
260 23:44:27.864796 rename /var/lib/lava/dispatcher/tmp/931361/extract-overlay-ramdisk-f68kfp0u/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
261 23:44:27.865536 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:44:27.866100 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 23:44:27.866691 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 23:44:27.867162 No LXC device requested
265 23:44:27.867675 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:44:27.868235 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 23:44:27.868750 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:44:27.869173 Checking files for TFTP limit of 4294967296 bytes.
269 23:44:27.871844 end: 1 tftp-deploy (duration 00:00:41) [common]
270 23:44:27.872464 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:44:27.873004 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:44:27.873508 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:44:27.874019 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:44:27.874554 Using kernel file from prepare-kernel: 931361/tftp-deploy-lwq4vcd6/kernel/uImage
275 23:44:27.875198 substitutions:
276 23:44:27.875641 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:44:27.876119 - {DTB_ADDR}: 0x01070000
278 23:44:27.876539 - {DTB}: 931361/tftp-deploy-lwq4vcd6/dtb/meson-g12b-a311d-libretech-cc.dtb
279 23:44:27.876977 - {INITRD}: 931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
280 23:44:27.877385 - {KERNEL_ADDR}: 0x01080000
281 23:44:27.877796 - {KERNEL}: 931361/tftp-deploy-lwq4vcd6/kernel/uImage
282 23:44:27.878198 - {LAVA_MAC}: None
283 23:44:27.878639 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/931361/extract-nfsrootfs-1vmt0omj
284 23:44:27.879048 - {NFS_SERVER_IP}: 192.168.6.2
285 23:44:27.879445 - {PRESEED_CONFIG}: None
286 23:44:27.879845 - {PRESEED_LOCAL}: None
287 23:44:27.880278 - {RAMDISK_ADDR}: 0x08000000
288 23:44:27.880676 - {RAMDISK}: 931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
289 23:44:27.881073 - {ROOT_PART}: None
290 23:44:27.881493 - {ROOT}: None
291 23:44:27.881899 - {SERVER_IP}: 192.168.6.2
292 23:44:27.882326 - {TEE_ADDR}: 0x83000000
293 23:44:27.882735 - {TEE}: None
294 23:44:27.883147 Parsed boot commands:
295 23:44:27.883542 - setenv autoload no
296 23:44:27.883938 - setenv initrd_high 0xffffffff
297 23:44:27.884363 - setenv fdt_high 0xffffffff
298 23:44:27.884756 - dhcp
299 23:44:27.885143 - setenv serverip 192.168.6.2
300 23:44:27.885532 - tftpboot 0x01080000 931361/tftp-deploy-lwq4vcd6/kernel/uImage
301 23:44:27.885925 - tftpboot 0x08000000 931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
302 23:44:27.886318 - tftpboot 0x01070000 931361/tftp-deploy-lwq4vcd6/dtb/meson-g12b-a311d-libretech-cc.dtb
303 23:44:27.886717 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/931361/extract-nfsrootfs-1vmt0omj,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:44:27.887148 - bootm 0x01080000 0x08000000 0x01070000
305 23:44:27.887677 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:44:27.889253 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:44:27.889686 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 23:44:27.905231 Setting prompt string to ['lava-test: # ']
310 23:44:27.906704 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:44:27.907319 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:44:27.907887 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:44:27.908488 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:44:27.909635 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 23:44:27.944160 >> OK - accepted request
316 23:44:27.946705 Returned 0 in 0 seconds
317 23:44:28.047817 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:44:28.049466 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:44:28.050060 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:44:28.050595 Setting prompt string to ['Hit any key to stop autoboot']
322 23:44:28.051079 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:44:28.052669 Trying 192.168.56.21...
324 23:44:28.053166 Connected to conserv1.
325 23:44:28.053591 Escape character is '^]'.
326 23:44:28.054012
327 23:44:28.054439 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:44:28.054875
329 23:44:39.450266 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 23:44:39.450877 bl2_stage_init 0x01
331 23:44:39.451307 bl2_stage_init 0x81
332 23:44:39.455830 hw id: 0x0000 - pwm id 0x01
333 23:44:39.456361 bl2_stage_init 0xc1
334 23:44:39.456760 bl2_stage_init 0x02
335 23:44:39.457147
336 23:44:39.461282 L0:00000000
337 23:44:39.461757 L1:20000703
338 23:44:39.462151 L2:00008067
339 23:44:39.462547 L3:14000000
340 23:44:39.464165 B2:00402000
341 23:44:39.464594 B1:e0f83180
342 23:44:39.464983
343 23:44:39.465373 TE: 58124
344 23:44:39.465761
345 23:44:39.475278 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 23:44:39.475712
347 23:44:39.476138 Board ID = 1
348 23:44:39.476528 Set A53 clk to 24M
349 23:44:39.476911 Set A73 clk to 24M
350 23:44:39.480863 Set clk81 to 24M
351 23:44:39.481286 A53 clk: 1200 MHz
352 23:44:39.481678 A73 clk: 1200 MHz
353 23:44:39.484344 CLK81: 166.6M
354 23:44:39.484803 smccc: 00012a92
355 23:44:39.490216 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 23:44:39.495558 board id: 1
357 23:44:39.500804 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:44:39.511265 fw parse done
359 23:44:39.516362 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:44:39.559129 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:44:39.570887 PIEI prepare done
362 23:44:39.571366 fastboot data load
363 23:44:39.571769 fastboot data verify
364 23:44:39.576585 verify result: 266
365 23:44:39.582094 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 23:44:39.582579 LPDDR4 probe
367 23:44:39.582981 ddr clk to 1584MHz
368 23:44:39.589821 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:44:39.627277
370 23:44:39.627814 dmc_version 0001
371 23:44:39.633964 Check phy result
372 23:44:39.639824 INFO : End of CA training
373 23:44:39.640272 INFO : End of initialization
374 23:44:39.645412 INFO : Training has run successfully!
375 23:44:39.645831 Check phy result
376 23:44:39.650980 INFO : End of initialization
377 23:44:39.651394 INFO : End of read enable training
378 23:44:39.656623 INFO : End of fine write leveling
379 23:44:39.662219 INFO : End of Write leveling coarse delay
380 23:44:39.662639 INFO : Training has run successfully!
381 23:44:39.663031 Check phy result
382 23:44:39.667824 INFO : End of initialization
383 23:44:39.668271 INFO : End of read dq deskew training
384 23:44:39.673397 INFO : End of MPR read delay center optimization
385 23:44:39.679002 INFO : End of write delay center optimization
386 23:44:39.684678 INFO : End of read delay center optimization
387 23:44:39.685115 INFO : End of max read latency training
388 23:44:39.690197 INFO : Training has run successfully!
389 23:44:39.690613 1D training succeed
390 23:44:39.699414 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:44:39.747022 Check phy result
392 23:44:39.747481 INFO : End of initialization
393 23:44:39.768732 INFO : End of 2D read delay Voltage center optimization
394 23:44:39.788924 INFO : End of 2D read delay Voltage center optimization
395 23:44:39.841001 INFO : End of 2D write delay Voltage center optimization
396 23:44:39.890309 INFO : End of 2D write delay Voltage center optimization
397 23:44:39.895918 INFO : Training has run successfully!
398 23:44:39.896388
399 23:44:39.896789 channel==0
400 23:44:39.901510 RxClkDly_Margin_A0==88 ps 9
401 23:44:39.901949 TxDqDly_Margin_A0==98 ps 10
402 23:44:39.904871 RxClkDly_Margin_A1==88 ps 9
403 23:44:39.905287 TxDqDly_Margin_A1==98 ps 10
404 23:44:39.910422 TrainedVREFDQ_A0==74
405 23:44:39.910840 TrainedVREFDQ_A1==74
406 23:44:39.911235 VrefDac_Margin_A0==25
407 23:44:39.916026 DeviceVref_Margin_A0==40
408 23:44:39.916446 VrefDac_Margin_A1==25
409 23:44:39.921609 DeviceVref_Margin_A1==40
410 23:44:39.922025
411 23:44:39.922420
412 23:44:39.922810 channel==1
413 23:44:39.923195 RxClkDly_Margin_A0==98 ps 10
414 23:44:39.927198 TxDqDly_Margin_A0==98 ps 10
415 23:44:39.927620 RxClkDly_Margin_A1==98 ps 10
416 23:44:39.932866 TxDqDly_Margin_A1==98 ps 10
417 23:44:39.933308 TrainedVREFDQ_A0==76
418 23:44:39.933724 TrainedVREFDQ_A1==78
419 23:44:39.938431 VrefDac_Margin_A0==22
420 23:44:39.938909 DeviceVref_Margin_A0==38
421 23:44:39.944075 VrefDac_Margin_A1==22
422 23:44:39.944541 DeviceVref_Margin_A1==36
423 23:44:39.944939
424 23:44:39.949613 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:44:39.950041
426 23:44:39.977625 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
427 23:44:39.983246 2D training succeed
428 23:44:39.988877 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:44:39.989301 auto size-- 65535DDR cs0 size: 2048MB
430 23:44:39.994442 DDR cs1 size: 2048MB
431 23:44:39.994864 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:44:40.000057 cs0 DataBus test pass
433 23:44:40.000484 cs1 DataBus test pass
434 23:44:40.000883 cs0 AddrBus test pass
435 23:44:40.005627 cs1 AddrBus test pass
436 23:44:40.006043
437 23:44:40.006440 100bdlr_step_size ps== 420
438 23:44:40.006841 result report
439 23:44:40.011224 boot times 0Enable ddr reg access
440 23:44:40.018999 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:44:40.032543 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 23:44:40.606291 0.0;M3 CHK:0;cm4_sp_mode 0
443 23:44:40.606879 MVN_1=0x00000000
444 23:44:40.611735 MVN_2=0x00000000
445 23:44:40.617499 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 23:44:40.617929 OPS=0x10
447 23:44:40.618332 ring efuse init
448 23:44:40.618724 chipver efuse init
449 23:44:40.623097 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 23:44:40.628690 [0.018961 Inits done]
451 23:44:40.629113 secure task start!
452 23:44:40.629508 high task start!
453 23:44:40.633261 low task start!
454 23:44:40.633677 run into bl31
455 23:44:40.639913 NOTICE: BL31: v1.3(release):4fc40b1
456 23:44:40.647757 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 23:44:40.648222 NOTICE: BL31: G12A normal boot!
458 23:44:40.673078 NOTICE: BL31: BL33 decompress pass
459 23:44:40.678787 ERROR: Error initializing runtime service opteed_fast
460 23:44:41.911742
461 23:44:41.912386
462 23:44:41.919221 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 23:44:41.919721
464 23:44:41.920177 Model: Libre Computer AML-A311D-CC Alta
465 23:44:42.128652 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 23:44:42.151899 DRAM: 2 GiB (effective 3.8 GiB)
467 23:44:42.294740 Core: 408 devices, 31 uclasses, devicetree: separate
468 23:44:42.300617 WDT: Not starting watchdog@f0d0
469 23:44:42.332888 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 23:44:42.345368 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 23:44:42.350324 ** Bad device specification mmc 0 **
472 23:44:42.360661 Card did not respond to voltage select! : -110
473 23:44:42.368613 ** Bad device specification mmc 0 **
474 23:44:42.369035 Couldn't find partition mmc 0
475 23:44:42.376680 Card did not respond to voltage select! : -110
476 23:44:42.382190 ** Bad device specification mmc 0 **
477 23:44:42.382609 Couldn't find partition mmc 0
478 23:44:42.387249 Error: could not access storage.
479 23:44:43.650291 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 23:44:43.650993 bl2_stage_init 0x01
481 23:44:43.651467 bl2_stage_init 0x81
482 23:44:43.655766 hw id: 0x0000 - pwm id 0x01
483 23:44:43.656288 bl2_stage_init 0xc1
484 23:44:43.656734 bl2_stage_init 0x02
485 23:44:43.657272
486 23:44:43.661407 L0:00000000
487 23:44:43.661915 L1:20000703
488 23:44:43.662370 L2:00008067
489 23:44:43.662926 L3:14000000
490 23:44:43.664322 B2:00402000
491 23:44:43.664787 B1:e0f83180
492 23:44:43.665202
493 23:44:43.665615 TE: 58159
494 23:44:43.666030
495 23:44:43.675475 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 23:44:43.675960
497 23:44:43.676395 Board ID = 1
498 23:44:43.676790 Set A53 clk to 24M
499 23:44:43.677178 Set A73 clk to 24M
500 23:44:43.681048 Set clk81 to 24M
501 23:44:43.681478 A53 clk: 1200 MHz
502 23:44:43.681877 A73 clk: 1200 MHz
503 23:44:43.686733 CLK81: 166.6M
504 23:44:43.687166 smccc: 00012ab5
505 23:44:43.692339 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 23:44:43.692770 board id: 1
507 23:44:43.700934 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 23:44:43.711569 fw parse done
509 23:44:43.717530 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 23:44:43.760158 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 23:44:43.771001 PIEI prepare done
512 23:44:43.771430 fastboot data load
513 23:44:43.771831 fastboot data verify
514 23:44:43.776727 verify result: 266
515 23:44:43.782496 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 23:44:43.782935 LPDDR4 probe
517 23:44:43.783334 ddr clk to 1584MHz
518 23:44:43.790322 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 23:44:43.827554
520 23:44:43.828073 dmc_version 0001
521 23:44:43.834272 Check phy result
522 23:44:43.840136 INFO : End of CA training
523 23:44:43.840565 INFO : End of initialization
524 23:44:43.845719 INFO : Training has run successfully!
525 23:44:43.846293 Check phy result
526 23:44:43.851313 INFO : End of initialization
527 23:44:43.851862 INFO : End of read enable training
528 23:44:43.856944 INFO : End of fine write leveling
529 23:44:43.862479 INFO : End of Write leveling coarse delay
530 23:44:43.862991 INFO : Training has run successfully!
531 23:44:43.863423 Check phy result
532 23:44:43.868069 INFO : End of initialization
533 23:44:43.868557 INFO : End of read dq deskew training
534 23:44:43.873679 INFO : End of MPR read delay center optimization
535 23:44:43.879286 INFO : End of write delay center optimization
536 23:44:43.884918 INFO : End of read delay center optimization
537 23:44:43.885391 INFO : End of max read latency training
538 23:44:43.890501 INFO : Training has run successfully!
539 23:44:43.890933 1D training succeed
540 23:44:43.899629 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 23:44:43.947349 Check phy result
542 23:44:43.947831 INFO : End of initialization
543 23:44:43.969774 INFO : End of 2D read delay Voltage center optimization
544 23:44:43.989848 INFO : End of 2D read delay Voltage center optimization
545 23:44:44.041829 INFO : End of 2D write delay Voltage center optimization
546 23:44:44.091048 INFO : End of 2D write delay Voltage center optimization
547 23:44:44.096554 INFO : Training has run successfully!
548 23:44:44.097035
549 23:44:44.097438 channel==0
550 23:44:44.102130 RxClkDly_Margin_A0==88 ps 9
551 23:44:44.102574 TxDqDly_Margin_A0==98 ps 10
552 23:44:44.105518 RxClkDly_Margin_A1==88 ps 9
553 23:44:44.105954 TxDqDly_Margin_A1==88 ps 9
554 23:44:44.111073 TrainedVREFDQ_A0==74
555 23:44:44.111567 TrainedVREFDQ_A1==74
556 23:44:44.112028 VrefDac_Margin_A0==24
557 23:44:44.116672 DeviceVref_Margin_A0==40
558 23:44:44.117145 VrefDac_Margin_A1==25
559 23:44:44.122243 DeviceVref_Margin_A1==40
560 23:44:44.122688
561 23:44:44.123086
562 23:44:44.123479 channel==1
563 23:44:44.123866 RxClkDly_Margin_A0==98 ps 10
564 23:44:44.127876 TxDqDly_Margin_A0==98 ps 10
565 23:44:44.128399 RxClkDly_Margin_A1==98 ps 10
566 23:44:44.133456 TxDqDly_Margin_A1==88 ps 9
567 23:44:44.133956 TrainedVREFDQ_A0==77
568 23:44:44.134383 TrainedVREFDQ_A1==77
569 23:44:44.139002 VrefDac_Margin_A0==22
570 23:44:44.139486 DeviceVref_Margin_A0==37
571 23:44:44.144669 VrefDac_Margin_A1==22
572 23:44:44.145117 DeviceVref_Margin_A1==37
573 23:44:44.145511
574 23:44:44.150274 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 23:44:44.150696
576 23:44:44.178224 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 23:44:44.183863 2D training succeed
578 23:44:44.189471 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 23:44:44.189911 auto size-- 65535DDR cs0 size: 2048MB
580 23:44:44.195027 DDR cs1 size: 2048MB
581 23:44:44.195461 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 23:44:44.200647 cs0 DataBus test pass
583 23:44:44.201144 cs1 DataBus test pass
584 23:44:44.201575 cs0 AddrBus test pass
585 23:44:44.206238 cs1 AddrBus test pass
586 23:44:44.206689
587 23:44:44.207085 100bdlr_step_size ps== 420
588 23:44:44.207492 result report
589 23:44:44.211829 boot times 0Enable ddr reg access
590 23:44:44.219607 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 23:44:44.232949 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 23:44:44.805139 0.0;M3 CHK:0;cm4_sp_mode 0
593 23:44:44.805781 MVN_1=0x00000000
594 23:44:44.810680 MVN_2=0x00000000
595 23:44:44.816274 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 23:44:44.816702 OPS=0x10
597 23:44:44.817105 ring efuse init
598 23:44:44.817497 chipver efuse init
599 23:44:44.824578 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 23:44:44.825015 [0.018961 Inits done]
601 23:44:44.825409 secure task start!
602 23:44:44.832150 high task start!
603 23:44:44.832567 low task start!
604 23:44:44.832958 run into bl31
605 23:44:44.838640 NOTICE: BL31: v1.3(release):4fc40b1
606 23:44:44.846621 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 23:44:44.847053 NOTICE: BL31: G12A normal boot!
608 23:44:44.871952 NOTICE: BL31: BL33 decompress pass
609 23:44:44.877636 ERROR: Error initializing runtime service opteed_fast
610 23:44:46.110486
611 23:44:46.111127
612 23:44:46.118929 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 23:44:46.119394
614 23:44:46.119814 Model: Libre Computer AML-A311D-CC Alta
615 23:44:46.327349 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 23:44:46.350729 DRAM: 2 GiB (effective 3.8 GiB)
617 23:44:46.493613 Core: 408 devices, 31 uclasses, devicetree: separate
618 23:44:46.499520 WDT: Not starting watchdog@f0d0
619 23:44:46.531840 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 23:44:46.544241 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 23:44:46.549261 ** Bad device specification mmc 0 **
622 23:44:46.559603 Card did not respond to voltage select! : -110
623 23:44:46.567169 ** Bad device specification mmc 0 **
624 23:44:46.567613 Couldn't find partition mmc 0
625 23:44:46.575564 Card did not respond to voltage select! : -110
626 23:44:46.580986 ** Bad device specification mmc 0 **
627 23:44:46.581438 Couldn't find partition mmc 0
628 23:44:46.586055 Error: could not access storage.
629 23:44:46.927637 Net: eth0: ethernet@ff3f0000
630 23:44:46.928292 starting USB...
631 23:44:47.180390 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 23:44:47.180910 Starting the controller
633 23:44:47.187338 USB XHCI 1.10
634 23:44:48.830604 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 23:44:48.831247 bl2_stage_init 0x01
636 23:44:48.831685 bl2_stage_init 0x81
637 23:44:48.836013 hw id: 0x0000 - pwm id 0x01
638 23:44:48.836481 bl2_stage_init 0xc1
639 23:44:48.836903 bl2_stage_init 0x02
640 23:44:48.837306
641 23:44:48.841836 L0:00000000
642 23:44:48.842299 L1:20000703
643 23:44:48.842722 L2:00008067
644 23:44:48.843132 L3:14000000
645 23:44:48.844496 B2:00402000
646 23:44:48.844960 B1:e0f83180
647 23:44:48.845366
648 23:44:48.845783 TE: 58159
649 23:44:48.846189
650 23:44:48.855660 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 23:44:48.856121
652 23:44:48.856539 Board ID = 1
653 23:44:48.856941 Set A53 clk to 24M
654 23:44:48.857336 Set A73 clk to 24M
655 23:44:48.861173 Set clk81 to 24M
656 23:44:48.861605 A53 clk: 1200 MHz
657 23:44:48.862011 A73 clk: 1200 MHz
658 23:44:48.864655 CLK81: 166.6M
659 23:44:48.865081 smccc: 00012ab5
660 23:44:48.870177 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 23:44:48.875805 board id: 1
662 23:44:48.881027 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 23:44:48.891730 fw parse done
664 23:44:48.897645 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 23:44:48.940355 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 23:44:48.951176 PIEI prepare done
667 23:44:48.951603 fastboot data load
668 23:44:48.952046 fastboot data verify
669 23:44:48.956747 verify result: 266
670 23:44:48.962357 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 23:44:48.962784 LPDDR4 probe
672 23:44:48.963196 ddr clk to 1584MHz
673 23:44:48.970347 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 23:44:49.007752
675 23:44:49.008373 dmc_version 0001
676 23:44:49.014411 Check phy result
677 23:44:49.020233 INFO : End of CA training
678 23:44:49.020718 INFO : End of initialization
679 23:44:49.025896 INFO : Training has run successfully!
680 23:44:49.026506 Check phy result
681 23:44:49.031476 INFO : End of initialization
682 23:44:49.032112 INFO : End of read enable training
683 23:44:49.037201 INFO : End of fine write leveling
684 23:44:49.042760 INFO : End of Write leveling coarse delay
685 23:44:49.043343 INFO : Training has run successfully!
686 23:44:49.043784 Check phy result
687 23:44:49.048402 INFO : End of initialization
688 23:44:49.048962 INFO : End of read dq deskew training
689 23:44:49.053878 INFO : End of MPR read delay center optimization
690 23:44:49.059355 INFO : End of write delay center optimization
691 23:44:49.065016 INFO : End of read delay center optimization
692 23:44:49.065526 INFO : End of max read latency training
693 23:44:49.070562 INFO : Training has run successfully!
694 23:44:49.071009 1D training succeed
695 23:44:49.079756 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 23:44:49.127525 Check phy result
697 23:44:49.128165 INFO : End of initialization
698 23:44:49.148841 INFO : End of 2D read delay Voltage center optimization
699 23:44:49.169183 INFO : End of 2D read delay Voltage center optimization
700 23:44:49.220162 INFO : End of 2D write delay Voltage center optimization
701 23:44:49.270481 INFO : End of 2D write delay Voltage center optimization
702 23:44:49.275867 INFO : Training has run successfully!
703 23:44:49.276350
704 23:44:49.276755 channel==0
705 23:44:49.281417 RxClkDly_Margin_A0==88 ps 9
706 23:44:49.281885 TxDqDly_Margin_A0==98 ps 10
707 23:44:49.286972 RxClkDly_Margin_A1==88 ps 9
708 23:44:49.287399 TxDqDly_Margin_A1==98 ps 10
709 23:44:49.287799 TrainedVREFDQ_A0==74
710 23:44:49.292445 TrainedVREFDQ_A1==74
711 23:44:49.292883 VrefDac_Margin_A0==25
712 23:44:49.293282 DeviceVref_Margin_A0==40
713 23:44:49.298206 VrefDac_Margin_A1==25
714 23:44:49.298625 DeviceVref_Margin_A1==40
715 23:44:49.299018
716 23:44:49.299413
717 23:44:49.303707 channel==1
718 23:44:49.304143 RxClkDly_Margin_A0==98 ps 10
719 23:44:49.304541 TxDqDly_Margin_A0==98 ps 10
720 23:44:49.309347 RxClkDly_Margin_A1==98 ps 10
721 23:44:49.309778 TxDqDly_Margin_A1==88 ps 9
722 23:44:49.314885 TrainedVREFDQ_A0==77
723 23:44:49.315310 TrainedVREFDQ_A1==77
724 23:44:49.315707 VrefDac_Margin_A0==22
725 23:44:49.320594 DeviceVref_Margin_A0==37
726 23:44:49.321019 VrefDac_Margin_A1==22
727 23:44:49.326271 DeviceVref_Margin_A1==37
728 23:44:49.326687
729 23:44:49.327077 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 23:44:49.331780
731 23:44:49.359760 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
732 23:44:49.360234 2D training succeed
733 23:44:49.365259 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 23:44:49.370932 auto size-- 65535DDR cs0 size: 2048MB
735 23:44:49.371351 DDR cs1 size: 2048MB
736 23:44:49.376451 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 23:44:49.376869 cs0 DataBus test pass
738 23:44:49.382062 cs1 DataBus test pass
739 23:44:49.382479 cs0 AddrBus test pass
740 23:44:49.382870 cs1 AddrBus test pass
741 23:44:49.383257
742 23:44:49.387629 100bdlr_step_size ps== 420
743 23:44:49.388089 result report
744 23:44:49.393240 boot times 0Enable ddr reg access
745 23:44:49.398696 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 23:44:49.412250 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 23:44:49.984251 0.0;M3 CHK:0;cm4_sp_mode 0
748 23:44:49.984896 MVN_1=0x00000000
749 23:44:49.989644 MVN_2=0x00000000
750 23:44:49.995420 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 23:44:49.995904 OPS=0x10
752 23:44:49.996358 ring efuse init
753 23:44:49.996753 chipver efuse init
754 23:44:50.001266 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 23:44:50.006634 [0.018961 Inits done]
756 23:44:50.007105 secure task start!
757 23:44:50.007512 high task start!
758 23:44:50.011294 low task start!
759 23:44:50.011726 run into bl31
760 23:44:50.017879 NOTICE: BL31: v1.3(release):4fc40b1
761 23:44:50.025789 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 23:44:50.026256 NOTICE: BL31: G12A normal boot!
763 23:44:50.051064 NOTICE: BL31: BL33 decompress pass
764 23:44:50.056734 ERROR: Error initializing runtime service opteed_fast
765 23:44:51.289853
766 23:44:51.290534
767 23:44:51.298093 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 23:44:51.298752
769 23:44:51.299225 Model: Libre Computer AML-A311D-CC Alta
770 23:44:51.506474 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 23:44:51.529840 DRAM: 2 GiB (effective 3.8 GiB)
772 23:44:51.672898 Core: 408 devices, 31 uclasses, devicetree: separate
773 23:44:51.677833 WDT: Not starting watchdog@f0d0
774 23:44:51.711012 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 23:44:51.723481 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 23:44:51.728428 ** Bad device specification mmc 0 **
777 23:44:51.738750 Card did not respond to voltage select! : -110
778 23:44:51.748567 ** Bad device specification mmc 0 **
779 23:44:51.749035 Couldn't find partition mmc 0
780 23:44:51.754768 Card did not respond to voltage select! : -110
781 23:44:51.760315 ** Bad device specification mmc 0 **
782 23:44:51.760796 Couldn't find partition mmc 0
783 23:44:51.764428 Error: could not access storage.
784 23:44:52.107835 Net: eth0: ethernet@ff3f0000
785 23:44:52.108489 starting USB...
786 23:44:52.359820 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 23:44:52.360465 Starting the controller
788 23:44:52.366733 USB XHCI 1.10
789 23:44:54.530563 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 23:44:54.531152 bl2_stage_init 0x01
791 23:44:54.531581 bl2_stage_init 0x81
792 23:44:54.536165 hw id: 0x0000 - pwm id 0x01
793 23:44:54.536644 bl2_stage_init 0xc1
794 23:44:54.537065 bl2_stage_init 0x02
795 23:44:54.537472
796 23:44:54.541723 L0:00000000
797 23:44:54.542191 L1:20000703
798 23:44:54.542605 L2:00008067
799 23:44:54.543007 L3:14000000
800 23:44:54.544689 B2:00402000
801 23:44:54.545125 B1:e0f83180
802 23:44:54.545534
803 23:44:54.545983 TE: 58124
804 23:44:54.546403
805 23:44:54.555889 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 23:44:54.556399
807 23:44:54.556832 Board ID = 1
808 23:44:54.557253 Set A53 clk to 24M
809 23:44:54.557654 Set A73 clk to 24M
810 23:44:54.561387 Set clk81 to 24M
811 23:44:54.561846 A53 clk: 1200 MHz
812 23:44:54.562273 A73 clk: 1200 MHz
813 23:44:54.564767 CLK81: 166.6M
814 23:44:54.565219 smccc: 00012a92
815 23:44:54.570309 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 23:44:54.575969 board id: 1
817 23:44:54.580216 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 23:44:54.591886 fw parse done
819 23:44:54.596866 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 23:44:54.640383 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 23:44:54.651312 PIEI prepare done
822 23:44:54.651761 fastboot data load
823 23:44:54.652230 fastboot data verify
824 23:44:54.656903 verify result: 266
825 23:44:54.662578 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 23:44:54.663037 LPDDR4 probe
827 23:44:54.663450 ddr clk to 1584MHz
828 23:44:54.670489 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 23:44:54.707735
830 23:44:54.708276 dmc_version 0001
831 23:44:54.714409 Check phy result
832 23:44:54.720356 INFO : End of CA training
833 23:44:54.720795 INFO : End of initialization
834 23:44:54.725912 INFO : Training has run successfully!
835 23:44:54.726356 Check phy result
836 23:44:54.731484 INFO : End of initialization
837 23:44:54.731924 INFO : End of read enable training
838 23:44:54.737076 INFO : End of fine write leveling
839 23:44:54.742723 INFO : End of Write leveling coarse delay
840 23:44:54.743233 INFO : Training has run successfully!
841 23:44:54.743648 Check phy result
842 23:44:54.748260 INFO : End of initialization
843 23:44:54.748702 INFO : End of read dq deskew training
844 23:44:54.753908 INFO : End of MPR read delay center optimization
845 23:44:54.759500 INFO : End of write delay center optimization
846 23:44:54.765067 INFO : End of read delay center optimization
847 23:44:54.765508 INFO : End of max read latency training
848 23:44:54.770679 INFO : Training has run successfully!
849 23:44:54.771118 1D training succeed
850 23:44:54.778984 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 23:44:54.827500 Check phy result
852 23:44:54.828046 INFO : End of initialization
853 23:44:54.850006 INFO : End of 2D read delay Voltage center optimization
854 23:44:54.869987 INFO : End of 2D read delay Voltage center optimization
855 23:44:54.921887 INFO : End of 2D write delay Voltage center optimization
856 23:44:54.971177 INFO : End of 2D write delay Voltage center optimization
857 23:44:54.976671 INFO : Training has run successfully!
858 23:44:54.977117
859 23:44:54.977537 channel==0
860 23:44:54.982276 RxClkDly_Margin_A0==88 ps 9
861 23:44:54.982718 TxDqDly_Margin_A0==98 ps 10
862 23:44:54.987910 RxClkDly_Margin_A1==88 ps 9
863 23:44:54.988388 TxDqDly_Margin_A1==98 ps 10
864 23:44:54.988821 TrainedVREFDQ_A0==74
865 23:44:54.993498 TrainedVREFDQ_A1==74
866 23:44:54.993981 VrefDac_Margin_A0==24
867 23:44:54.994381 DeviceVref_Margin_A0==40
868 23:44:54.999092 VrefDac_Margin_A1==24
869 23:44:54.999583 DeviceVref_Margin_A1==40
870 23:44:55.000064
871 23:44:55.000508
872 23:44:55.004656 channel==1
873 23:44:55.005094 RxClkDly_Margin_A0==98 ps 10
874 23:44:55.005485 TxDqDly_Margin_A0==88 ps 9
875 23:44:55.010255 RxClkDly_Margin_A1==98 ps 10
876 23:44:55.010673 TxDqDly_Margin_A1==98 ps 10
877 23:44:55.015926 TrainedVREFDQ_A0==76
878 23:44:55.016382 TrainedVREFDQ_A1==77
879 23:44:55.016776 VrefDac_Margin_A0==22
880 23:44:55.021453 DeviceVref_Margin_A0==38
881 23:44:55.021875 VrefDac_Margin_A1==24
882 23:44:55.027076 DeviceVref_Margin_A1==37
883 23:44:55.027492
884 23:44:55.027885 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 23:44:55.032659
886 23:44:55.060691 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000017 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
887 23:44:55.061179 2D training succeed
888 23:44:55.066264 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 23:44:55.071922 auto size-- 65535DDR cs0 size: 2048MB
890 23:44:55.072382 DDR cs1 size: 2048MB
891 23:44:55.077467 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 23:44:55.077885 cs0 DataBus test pass
893 23:44:55.083093 cs1 DataBus test pass
894 23:44:55.083551 cs0 AddrBus test pass
895 23:44:55.083941 cs1 AddrBus test pass
896 23:44:55.084364
897 23:44:55.088659 100bdlr_step_size ps== 420
898 23:44:55.089082 result report
899 23:44:55.094225 boot times 0Enable ddr reg access
900 23:44:55.099760 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 23:44:55.113171 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 23:44:55.685180 0.0;M3 CHK:0;cm4_sp_mode 0
903 23:44:55.685760 MVN_1=0x00000000
904 23:44:55.690721 MVN_2=0x00000000
905 23:44:55.696420 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 23:44:55.696867 OPS=0x10
907 23:44:55.697283 ring efuse init
908 23:44:55.697688 chipver efuse init
909 23:44:55.702032 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 23:44:55.707621 [0.018961 Inits done]
911 23:44:55.708116 secure task start!
912 23:44:55.708529 high task start!
913 23:44:55.712228 low task start!
914 23:44:55.712656 run into bl31
915 23:44:55.719031 NOTICE: BL31: v1.3(release):4fc40b1
916 23:44:55.726694 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 23:44:55.727147 NOTICE: BL31: G12A normal boot!
918 23:44:55.752198 NOTICE: BL31: BL33 decompress pass
919 23:44:55.757816 ERROR: Error initializing runtime service opteed_fast
920 23:44:56.990774
921 23:44:56.991411
922 23:44:56.999300 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 23:44:56.999815
924 23:44:57.000325 Model: Libre Computer AML-A311D-CC Alta
925 23:44:57.207645 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 23:44:57.230983 DRAM: 2 GiB (effective 3.8 GiB)
927 23:44:57.373931 Core: 408 devices, 31 uclasses, devicetree: separate
928 23:44:57.379828 WDT: Not starting watchdog@f0d0
929 23:44:57.412088 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 23:44:57.424510 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 23:44:57.429487 ** Bad device specification mmc 0 **
932 23:44:57.439884 Card did not respond to voltage select! : -110
933 23:44:57.447479 ** Bad device specification mmc 0 **
934 23:44:57.447941 Couldn't find partition mmc 0
935 23:44:57.455815 Card did not respond to voltage select! : -110
936 23:44:57.461380 ** Bad device specification mmc 0 **
937 23:44:57.461854 Couldn't find partition mmc 0
938 23:44:57.466433 Error: could not access storage.
939 23:44:57.808964 Net: eth0: ethernet@ff3f0000
940 23:44:57.809560 starting USB...
941 23:44:58.060752 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 23:44:58.061349 Starting the controller
943 23:44:58.067870 USB XHCI 1.10
944 23:44:59.621919 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 23:44:59.630248 scanning usb for storage devices... 0 Storage Device(s) found
947 23:44:59.681776 Hit any key to stop autoboot: 1
948 23:44:59.682830 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 23:44:59.683446 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 23:44:59.683936 Setting prompt string to ['=>']
951 23:44:59.684495 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 23:44:59.697750 0
953 23:44:59.698639 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 23:44:59.699142 Sending with 10 millisecond of delay
956 23:45:00.833999 => setenv autoload no
957 23:45:00.844788 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 23:45:00.848701 setenv autoload no
959 23:45:00.849222 Sending with 10 millisecond of delay
961 23:45:02.646365 => setenv initrd_high 0xffffffff
962 23:45:02.657134 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 23:45:02.657963 setenv initrd_high 0xffffffff
964 23:45:02.658673 Sending with 10 millisecond of delay
966 23:45:04.274726 => setenv fdt_high 0xffffffff
967 23:45:04.285488 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
968 23:45:04.286281 setenv fdt_high 0xffffffff
969 23:45:04.286991 Sending with 10 millisecond of delay
971 23:45:04.578726 => dhcp
972 23:45:04.589391 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 23:45:04.590171 dhcp
974 23:45:04.590607 Speed: 1000, full duplex
975 23:45:04.591022 BOOTP broadcast 1
976 23:45:04.778394 DHCP client bound to address 192.168.6.27 (188 ms)
977 23:45:04.779172 Sending with 10 millisecond of delay
979 23:45:06.455373 => setenv serverip 192.168.6.2
980 23:45:06.466198 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 23:45:06.467072 setenv serverip 192.168.6.2
982 23:45:06.467781 Sending with 10 millisecond of delay
984 23:45:10.190639 => tftpboot 0x01080000 931361/tftp-deploy-lwq4vcd6/kernel/uImage
985 23:45:10.201467 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 23:45:10.202366 tftpboot 0x01080000 931361/tftp-deploy-lwq4vcd6/kernel/uImage
987 23:45:10.202844 Speed: 1000, full duplex
988 23:45:10.203317 Using ethernet@ff3f0000 device
989 23:45:10.204230 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 23:45:10.209712 Filename '931361/tftp-deploy-lwq4vcd6/kernel/uImage'.
991 23:45:10.213648 Load address: 0x1080000
992 23:45:13.099514 Loading: *################################################## 43.6 MiB
993 23:45:13.100156 15.1 MiB/s
994 23:45:13.100597 done
995 23:45:13.103961 Bytes transferred = 45713984 (2b98a40 hex)
996 23:45:13.104784 Sending with 10 millisecond of delay
998 23:45:17.792451 => tftpboot 0x08000000 931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
999 23:45:17.803226 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1000 23:45:17.804065 tftpboot 0x08000000 931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot
1001 23:45:17.804519 Speed: 1000, full duplex
1002 23:45:17.804943 Using ethernet@ff3f0000 device
1003 23:45:17.806010 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 23:45:17.817933 Filename '931361/tftp-deploy-lwq4vcd6/ramdisk/ramdisk.cpio.gz.uboot'.
1005 23:45:17.818818 Load address: 0x8000000
1006 23:45:24.484908 Loading: *########################T ######################### UDP wrong checksum 00000005 0000d1d5
1007 23:45:29.485600 T UDP wrong checksum 00000005 0000d1d5
1008 23:45:39.487752 T T UDP wrong checksum 00000005 0000d1d5
1009 23:45:59.492743 T T T T UDP wrong checksum 00000005 0000d1d5
1010 23:46:06.981594 T UDP wrong checksum 000000ff 0000bcae
1011 23:46:07.009739 UDP wrong checksum 000000ff 000053a1
1012 23:46:12.162245 T UDP wrong checksum 000000ff 00009dfd
1013 23:46:12.171881 UDP wrong checksum 000000ff 000031f0
1014 23:46:14.496831
1015 23:46:14.497437 Retry count exceeded; starting again
1017 23:46:14.499243 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1020 23:46:14.501183 end: 2.4 uboot-commands (duration 00:01:47) [common]
1022 23:46:14.502559 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1024 23:46:14.503625 end: 2 uboot-action (duration 00:01:47) [common]
1026 23:46:14.505216 Cleaning after the job
1027 23:46:14.505784 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/ramdisk
1028 23:46:14.507190 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/kernel
1029 23:46:14.552604 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/dtb
1030 23:46:14.553765 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/nfsrootfs
1031 23:46:14.713051 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931361/tftp-deploy-lwq4vcd6/modules
1032 23:46:14.733465 start: 4.1 power-off (timeout 00:00:30) [common]
1033 23:46:14.734140 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1034 23:46:14.768030 >> OK - accepted request
1035 23:46:14.770038 Returned 0 in 0 seconds
1036 23:46:14.870800 end: 4.1 power-off (duration 00:00:00) [common]
1038 23:46:14.871770 start: 4.2 read-feedback (timeout 00:10:00) [common]
1039 23:46:14.872474 Listened to connection for namespace 'common' for up to 1s
1040 23:46:15.872581 Finalising connection for namespace 'common'
1041 23:46:15.873036 Disconnecting from shell: Finalise
1042 23:46:15.873318 =>
1043 23:46:15.974064 end: 4.2 read-feedback (duration 00:00:01) [common]
1044 23:46:15.974717 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/931361
1045 23:46:17.749069 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/931361
1046 23:46:17.749688 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.