Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:06:48.220888 lava-dispatcher, installed at version: 2024.01
2 00:06:48.221663 start: 0 validate
3 00:06:48.222112 Start time: 2024-11-04 00:06:48.222083+00:00 (UTC)
4 00:06:48.222690 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:06:48.223217 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:06:48.266277 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:06:48.266803 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 00:06:48.302847 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:06:48.303447 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:06:48.335526 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:06:48.336004 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:06:48.373505 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:06:48.373994 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-403-ga8cc7432728d0%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 00:06:48.422233 validate duration: 0.20
16 00:06:48.423704 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:06:48.424361 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:06:48.424962 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:06:48.425953 Not decompressing ramdisk as can be used compressed.
20 00:06:48.426744 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 00:06:48.427265 saving as /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/ramdisk/initrd.cpio.gz
22 00:06:48.427769 total size: 5628140 (5 MB)
23 00:06:48.472680 progress 0 % (0 MB)
24 00:06:48.481008 progress 5 % (0 MB)
25 00:06:48.489463 progress 10 % (0 MB)
26 00:06:48.497066 progress 15 % (0 MB)
27 00:06:48.505516 progress 20 % (1 MB)
28 00:06:48.512381 progress 25 % (1 MB)
29 00:06:48.516410 progress 30 % (1 MB)
30 00:06:48.520341 progress 35 % (1 MB)
31 00:06:48.523860 progress 40 % (2 MB)
32 00:06:48.527783 progress 45 % (2 MB)
33 00:06:48.531347 progress 50 % (2 MB)
34 00:06:48.535230 progress 55 % (2 MB)
35 00:06:48.539169 progress 60 % (3 MB)
36 00:06:48.542684 progress 65 % (3 MB)
37 00:06:48.546617 progress 70 % (3 MB)
38 00:06:48.550164 progress 75 % (4 MB)
39 00:06:48.554146 progress 80 % (4 MB)
40 00:06:48.557724 progress 85 % (4 MB)
41 00:06:48.561678 progress 90 % (4 MB)
42 00:06:48.565476 progress 95 % (5 MB)
43 00:06:48.568775 progress 100 % (5 MB)
44 00:06:48.569434 5 MB downloaded in 0.14 s (37.89 MB/s)
45 00:06:48.570003 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:06:48.570917 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:06:48.571232 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:06:48.571518 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:06:48.572016 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/kernel/Image
51 00:06:48.572274 saving as /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/kernel/Image
52 00:06:48.572492 total size: 45713920 (43 MB)
53 00:06:48.572713 No compression specified
54 00:06:48.609970 progress 0 % (0 MB)
55 00:06:48.638369 progress 5 % (2 MB)
56 00:06:48.666417 progress 10 % (4 MB)
57 00:06:48.694553 progress 15 % (6 MB)
58 00:06:48.722821 progress 20 % (8 MB)
59 00:06:48.750632 progress 25 % (10 MB)
60 00:06:48.778795 progress 30 % (13 MB)
61 00:06:48.806807 progress 35 % (15 MB)
62 00:06:48.835204 progress 40 % (17 MB)
63 00:06:48.862837 progress 45 % (19 MB)
64 00:06:48.890960 progress 50 % (21 MB)
65 00:06:48.918988 progress 55 % (24 MB)
66 00:06:48.947383 progress 60 % (26 MB)
67 00:06:48.974817 progress 65 % (28 MB)
68 00:06:49.002913 progress 70 % (30 MB)
69 00:06:49.030422 progress 75 % (32 MB)
70 00:06:49.058655 progress 80 % (34 MB)
71 00:06:49.085958 progress 85 % (37 MB)
72 00:06:49.113475 progress 90 % (39 MB)
73 00:06:49.141383 progress 95 % (41 MB)
74 00:06:49.168527 progress 100 % (43 MB)
75 00:06:49.169056 43 MB downloaded in 0.60 s (73.08 MB/s)
76 00:06:49.169533 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:06:49.170348 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:06:49.170623 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:06:49.170889 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:06:49.171356 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:06:49.171622 saving as /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:06:49.171829 total size: 53209 (0 MB)
84 00:06:49.172067 No compression specified
85 00:06:49.215735 progress 61 % (0 MB)
86 00:06:49.216618 progress 100 % (0 MB)
87 00:06:49.217172 0 MB downloaded in 0.05 s (1.12 MB/s)
88 00:06:49.217677 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:06:49.218528 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:06:49.218810 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:06:49.219085 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:06:49.219673 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 00:06:49.219963 saving as /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/nfsrootfs/full.rootfs.tar
95 00:06:49.220201 total size: 474398908 (452 MB)
96 00:06:49.220432 Using unxz to decompress xz
97 00:06:49.261239 progress 0 % (0 MB)
98 00:06:50.375234 progress 5 % (22 MB)
99 00:06:51.819192 progress 10 % (45 MB)
100 00:06:52.257081 progress 15 % (67 MB)
101 00:06:53.036243 progress 20 % (90 MB)
102 00:06:53.562914 progress 25 % (113 MB)
103 00:06:53.914213 progress 30 % (135 MB)
104 00:06:54.527884 progress 35 % (158 MB)
105 00:06:55.492602 progress 40 % (181 MB)
106 00:06:56.376195 progress 45 % (203 MB)
107 00:06:57.022157 progress 50 % (226 MB)
108 00:06:57.683744 progress 55 % (248 MB)
109 00:06:58.909513 progress 60 % (271 MB)
110 00:07:00.417826 progress 65 % (294 MB)
111 00:07:02.086983 progress 70 % (316 MB)
112 00:07:05.191031 progress 75 % (339 MB)
113 00:07:07.629378 progress 80 % (361 MB)
114 00:07:10.555065 progress 85 % (384 MB)
115 00:07:13.739043 progress 90 % (407 MB)
116 00:07:16.929718 progress 95 % (429 MB)
117 00:07:20.089515 progress 100 % (452 MB)
118 00:07:20.102406 452 MB downloaded in 30.88 s (14.65 MB/s)
119 00:07:20.103341 end: 1.4.1 http-download (duration 00:00:31) [common]
121 00:07:20.105140 end: 1.4 download-retry (duration 00:00:31) [common]
122 00:07:20.105712 start: 1.5 download-retry (timeout 00:09:28) [common]
123 00:07:20.106271 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 00:07:20.107150 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-403-ga8cc7432728d0/arm64/defconfig/gcc-12/modules.tar.xz
125 00:07:20.107653 saving as /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/modules/modules.tar
126 00:07:20.108132 total size: 11612440 (11 MB)
127 00:07:20.108595 Using unxz to decompress xz
128 00:07:20.153036 progress 0 % (0 MB)
129 00:07:20.219133 progress 5 % (0 MB)
130 00:07:20.293758 progress 10 % (1 MB)
131 00:07:20.390202 progress 15 % (1 MB)
132 00:07:20.482661 progress 20 % (2 MB)
133 00:07:20.565170 progress 25 % (2 MB)
134 00:07:20.641302 progress 30 % (3 MB)
135 00:07:20.720276 progress 35 % (3 MB)
136 00:07:20.793737 progress 40 % (4 MB)
137 00:07:20.869938 progress 45 % (5 MB)
138 00:07:20.954589 progress 50 % (5 MB)
139 00:07:21.032643 progress 55 % (6 MB)
140 00:07:21.118143 progress 60 % (6 MB)
141 00:07:21.199036 progress 65 % (7 MB)
142 00:07:21.280047 progress 70 % (7 MB)
143 00:07:21.358495 progress 75 % (8 MB)
144 00:07:21.442330 progress 80 % (8 MB)
145 00:07:21.522754 progress 85 % (9 MB)
146 00:07:21.601634 progress 90 % (9 MB)
147 00:07:21.679954 progress 95 % (10 MB)
148 00:07:21.757425 progress 100 % (11 MB)
149 00:07:21.769100 11 MB downloaded in 1.66 s (6.67 MB/s)
150 00:07:21.769697 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:07:21.770551 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:07:21.770823 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 00:07:21.771088 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 00:07:37.180657 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/931303/extract-nfsrootfs-iua9n7il
156 00:07:37.181275 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 00:07:37.181605 start: 1.6.2 lava-overlay (timeout 00:09:11) [common]
158 00:07:37.182368 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he
159 00:07:37.182910 makedir: /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin
160 00:07:37.183336 makedir: /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/tests
161 00:07:37.183817 makedir: /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/results
162 00:07:37.184230 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-add-keys
163 00:07:37.184910 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-add-sources
164 00:07:37.185546 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-background-process-start
165 00:07:37.186107 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-background-process-stop
166 00:07:37.187036 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-common-functions
167 00:07:37.187614 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-echo-ipv4
168 00:07:37.188274 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-install-packages
169 00:07:37.188865 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-installed-packages
170 00:07:37.189438 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-os-build
171 00:07:37.189981 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-probe-channel
172 00:07:37.190577 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-probe-ip
173 00:07:37.191161 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-target-ip
174 00:07:37.191825 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-target-mac
175 00:07:37.192464 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-target-storage
176 00:07:37.193222 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-case
177 00:07:37.193786 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-event
178 00:07:37.194338 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-feedback
179 00:07:37.194889 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-raise
180 00:07:37.195442 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-reference
181 00:07:37.195971 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-runner
182 00:07:37.196558 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-set
183 00:07:37.197097 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-test-shell
184 00:07:37.197689 Updating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-install-packages (oe)
185 00:07:37.198459 Updating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/bin/lava-installed-packages (oe)
186 00:07:37.199022 Creating /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/environment
187 00:07:37.199473 LAVA metadata
188 00:07:37.199762 - LAVA_JOB_ID=931303
189 00:07:37.200008 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:07:37.200438 start: 1.6.2.1 ssh-authorize (timeout 00:09:11) [common]
191 00:07:37.201607 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:07:37.201976 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:11) [common]
193 00:07:37.202185 skipped lava-vland-overlay
194 00:07:37.202428 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:07:37.202686 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:11) [common]
196 00:07:37.202917 skipped lava-multinode-overlay
197 00:07:37.203173 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:07:37.203433 start: 1.6.2.4 test-definition (timeout 00:09:11) [common]
199 00:07:37.203699 Loading test definitions
200 00:07:37.204042 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:11) [common]
201 00:07:37.204288 Using /lava-931303 at stage 0
202 00:07:37.206049 uuid=931303_1.6.2.4.1 testdef=None
203 00:07:37.206464 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:07:37.206745 start: 1.6.2.4.2 test-overlay (timeout 00:09:11) [common]
205 00:07:37.208749 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:07:37.209613 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:11) [common]
208 00:07:37.212140 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:07:37.213073 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:11) [common]
211 00:07:37.215463 runner path: /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 931303_1.6.2.4.1
212 00:07:37.216691 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:07:37.217565 Creating lava-test-runner.conf files
215 00:07:37.217771 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/931303/lava-overlay-3o2en2he/lava-931303/0 for stage 0
216 00:07:37.218162 - 0_v4l2-decoder-conformance-vp9
217 00:07:37.218572 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:07:37.218869 start: 1.6.2.5 compress-overlay (timeout 00:09:11) [common]
219 00:07:37.242443 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:07:37.242891 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:11) [common]
221 00:07:37.243148 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:07:37.243419 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:07:37.243687 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:11) [common]
224 00:07:38.101101 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:07:38.101612 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 00:07:38.101889 extracting modules file /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931303/extract-nfsrootfs-iua9n7il
227 00:07:39.491559 extracting modules file /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/modules/modules.tar to /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk
228 00:07:40.896907 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:07:40.897390 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 00:07:40.897666 [common] Applying overlay to NFS
231 00:07:40.897878 [common] Applying overlay /var/lib/lava/dispatcher/tmp/931303/compress-overlay-pm0059p5/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/931303/extract-nfsrootfs-iua9n7il
232 00:07:40.927558 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:07:40.928018 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 00:07:40.928296 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 00:07:40.928526 Converting downloaded kernel to a uImage
236 00:07:40.928838 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/kernel/Image /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/kernel/uImage
237 00:07:41.459454 output: Image Name:
238 00:07:41.459877 output: Created: Mon Nov 4 00:07:40 2024
239 00:07:41.460127 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:07:41.460335 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 00:07:41.460537 output: Load Address: 01080000
242 00:07:41.460739 output: Entry Point: 01080000
243 00:07:41.460937 output:
244 00:07:41.461268 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 00:07:41.461535 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 00:07:41.461802 start: 1.6.7 configure-preseed-file (timeout 00:09:07) [common]
247 00:07:41.462055 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:07:41.462314 start: 1.6.8 compress-ramdisk (timeout 00:09:07) [common]
249 00:07:41.462569 Building ramdisk /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk
250 00:07:43.612296 >> 166824 blocks
251 00:07:51.477119 Adding RAMdisk u-boot header.
252 00:07:51.477827 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk.cpio.gz.uboot
253 00:07:51.720822 output: Image Name:
254 00:07:51.721228 output: Created: Mon Nov 4 00:07:51 2024
255 00:07:51.721439 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:07:51.721645 output: Data Size: 23432689 Bytes = 22883.49 KiB = 22.35 MiB
257 00:07:51.721849 output: Load Address: 00000000
258 00:07:51.722050 output: Entry Point: 00000000
259 00:07:51.722249 output:
260 00:07:51.722883 rename /var/lib/lava/dispatcher/tmp/931303/extract-overlay-ramdisk-7mbfkvy7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
261 00:07:51.723318 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 00:07:51.723608 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 00:07:51.723883 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 00:07:51.724347 No LXC device requested
265 00:07:51.724871 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:07:51.725415 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 00:07:51.725919 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:07:51.726332 Checking files for TFTP limit of 4294967296 bytes.
269 00:07:51.729027 end: 1 tftp-deploy (duration 00:01:03) [common]
270 00:07:51.729609 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:07:51.730130 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:07:51.730631 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:07:51.731131 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:07:51.731661 Using kernel file from prepare-kernel: 931303/tftp-deploy-ljh319og/kernel/uImage
275 00:07:51.732333 substitutions:
276 00:07:51.732748 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:07:51.733150 - {DTB_ADDR}: 0x01070000
278 00:07:51.733548 - {DTB}: 931303/tftp-deploy-ljh319og/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 00:07:51.733946 - {INITRD}: 931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
280 00:07:51.734338 - {KERNEL_ADDR}: 0x01080000
281 00:07:51.734727 - {KERNEL}: 931303/tftp-deploy-ljh319og/kernel/uImage
282 00:07:51.735117 - {LAVA_MAC}: None
283 00:07:51.735547 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/931303/extract-nfsrootfs-iua9n7il
284 00:07:51.735943 - {NFS_SERVER_IP}: 192.168.6.2
285 00:07:51.736360 - {PRESEED_CONFIG}: None
286 00:07:51.736750 - {PRESEED_LOCAL}: None
287 00:07:51.737139 - {RAMDISK_ADDR}: 0x08000000
288 00:07:51.737524 - {RAMDISK}: 931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
289 00:07:51.737908 - {ROOT_PART}: None
290 00:07:51.738294 - {ROOT}: None
291 00:07:51.738676 - {SERVER_IP}: 192.168.6.2
292 00:07:51.739063 - {TEE_ADDR}: 0x83000000
293 00:07:51.739446 - {TEE}: None
294 00:07:51.739829 Parsed boot commands:
295 00:07:51.740246 - setenv autoload no
296 00:07:51.740638 - setenv initrd_high 0xffffffff
297 00:07:51.741022 - setenv fdt_high 0xffffffff
298 00:07:51.741413 - dhcp
299 00:07:51.741800 - setenv serverip 192.168.6.2
300 00:07:51.742184 - tftpboot 0x01080000 931303/tftp-deploy-ljh319og/kernel/uImage
301 00:07:51.742571 - tftpboot 0x08000000 931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
302 00:07:51.742954 - tftpboot 0x01070000 931303/tftp-deploy-ljh319og/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 00:07:51.743339 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/931303/extract-nfsrootfs-iua9n7il,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:07:51.743738 - bootm 0x01080000 0x08000000 0x01070000
305 00:07:51.744274 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:07:51.745761 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:07:51.746177 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 00:07:51.761373 Setting prompt string to ['lava-test: # ']
310 00:07:51.762891 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:07:51.763490 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:07:51.764116 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:07:51.764767 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:07:51.765926 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 00:07:51.803140 >> OK - accepted request
316 00:07:51.805476 Returned 0 in 0 seconds
317 00:07:51.906360 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:07:51.907970 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:07:51.908584 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:07:51.909112 Setting prompt string to ['Hit any key to stop autoboot']
322 00:07:51.909568 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:07:51.911129 Trying 192.168.56.21...
324 00:07:51.911616 Connected to conserv1.
325 00:07:51.912060 Escape character is '^]'.
326 00:07:51.912478
327 00:07:51.912887 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 00:07:51.913299
329 00:07:59.176404 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 00:07:59.177019 bl2_stage_init 0x01
331 00:07:59.177430 bl2_stage_init 0x81
332 00:07:59.181964 hw id: 0x0000 - pwm id 0x01
333 00:07:59.182416 bl2_stage_init 0xc1
334 00:07:59.187630 bl2_stage_init 0x02
335 00:07:59.188093
336 00:07:59.188501 L0:00000000
337 00:07:59.188893 L1:00000703
338 00:07:59.189295 L2:00008067
339 00:07:59.189691 L3:15000000
340 00:07:59.193191 S1:00000000
341 00:07:59.193632 B2:20282000
342 00:07:59.194039 B1:a0f83180
343 00:07:59.194427
344 00:07:59.194818 TE: 71369
345 00:07:59.195207
346 00:07:59.198795 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 00:07:59.199220
348 00:07:59.204348 Board ID = 1
349 00:07:59.204765 Set cpu clk to 24M
350 00:07:59.205154 Set clk81 to 24M
351 00:07:59.209899 Use GP1_pll as DSU clk.
352 00:07:59.210314 DSU clk: 1200 Mhz
353 00:07:59.210698 CPU clk: 1200 MHz
354 00:07:59.215514 Set clk81 to 166.6M
355 00:07:59.221106 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 00:07:59.221521 board id: 1
357 00:07:59.228329 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:07:59.238976 fw parse done
359 00:07:59.244957 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:07:59.287615 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:07:59.298598 PIEI prepare done
362 00:07:59.299011 fastboot data load
363 00:07:59.299403 fastboot data verify
364 00:07:59.304131 verify result: 266
365 00:07:59.309828 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 00:07:59.310242 LPDDR4 probe
367 00:07:59.310629 ddr clk to 1584MHz
368 00:07:59.317772 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:07:59.354957
370 00:07:59.355380 dmc_version 0001
371 00:07:59.361678 Check phy result
372 00:07:59.367577 INFO : End of CA training
373 00:07:59.368009 INFO : End of initialization
374 00:07:59.373156 INFO : Training has run successfully!
375 00:07:59.373567 Check phy result
376 00:07:59.378799 INFO : End of initialization
377 00:07:59.379209 INFO : End of read enable training
378 00:07:59.384353 INFO : End of fine write leveling
379 00:07:59.389920 INFO : End of Write leveling coarse delay
380 00:07:59.390330 INFO : Training has run successfully!
381 00:07:59.390717 Check phy result
382 00:07:59.395536 INFO : End of initialization
383 00:07:59.395947 INFO : End of read dq deskew training
384 00:07:59.401137 INFO : End of MPR read delay center optimization
385 00:07:59.406794 INFO : End of write delay center optimization
386 00:07:59.412385 INFO : End of read delay center optimization
387 00:07:59.412799 INFO : End of max read latency training
388 00:07:59.417946 INFO : Training has run successfully!
389 00:07:59.418355 1D training succeed
390 00:07:59.427146 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:07:59.474693 Check phy result
392 00:07:59.475125 INFO : End of initialization
393 00:07:59.497071 INFO : End of 2D read delay Voltage center optimization
394 00:07:59.516309 INFO : End of 2D read delay Voltage center optimization
395 00:07:59.568147 INFO : End of 2D write delay Voltage center optimization
396 00:07:59.617406 INFO : End of 2D write delay Voltage center optimization
397 00:07:59.622940 INFO : Training has run successfully!
398 00:07:59.623353
399 00:07:59.623748 channel==0
400 00:07:59.628573 RxClkDly_Margin_A0==78 ps 8
401 00:07:59.628988 TxDqDly_Margin_A0==98 ps 10
402 00:07:59.634112 RxClkDly_Margin_A1==88 ps 9
403 00:07:59.634521 TxDqDly_Margin_A1==98 ps 10
404 00:07:59.634914 TrainedVREFDQ_A0==74
405 00:07:59.639808 TrainedVREFDQ_A1==75
406 00:07:59.640244 VrefDac_Margin_A0==22
407 00:07:59.640634 DeviceVref_Margin_A0==40
408 00:07:59.645327 VrefDac_Margin_A1==23
409 00:07:59.645737 DeviceVref_Margin_A1==39
410 00:07:59.646123
411 00:07:59.646509
412 00:07:59.650956 channel==1
413 00:07:59.651366 RxClkDly_Margin_A0==88 ps 9
414 00:07:59.651756 TxDqDly_Margin_A0==98 ps 10
415 00:07:59.656590 RxClkDly_Margin_A1==78 ps 8
416 00:07:59.657005 TxDqDly_Margin_A1==88 ps 9
417 00:07:59.662077 TrainedVREFDQ_A0==78
418 00:07:59.662492 TrainedVREFDQ_A1==75
419 00:07:59.662884 VrefDac_Margin_A0==23
420 00:07:59.667670 DeviceVref_Margin_A0==36
421 00:07:59.668101 VrefDac_Margin_A1==22
422 00:07:59.673308 DeviceVref_Margin_A1==39
423 00:07:59.673713
424 00:07:59.674100 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:07:59.674486
426 00:07:59.707020 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 00:07:59.707506 2D training succeed
428 00:07:59.712610 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:07:59.718099 auto size-- 65535DDR cs0 size: 2048MB
430 00:07:59.718510 DDR cs1 size: 2048MB
431 00:07:59.723731 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:07:59.724178 cs0 DataBus test pass
433 00:07:59.729196 cs1 DataBus test pass
434 00:07:59.729605 cs0 AddrBus test pass
435 00:07:59.729994 cs1 AddrBus test pass
436 00:07:59.730380
437 00:07:59.734805 100bdlr_step_size ps== 478
438 00:07:59.735225 result report
439 00:07:59.740385 boot times 0Enable ddr reg access
440 00:07:59.745667 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:07:59.759499 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 00:08:00.412444 bl2z: ptr: 05129330, size: 00001e40
443 00:08:00.419914 0.0;M3 CHK:0;cm4_sp_mode 0
444 00:08:00.420412 MVN_1=0x00000000
445 00:08:00.420822 MVN_2=0x00000000
446 00:08:00.431394 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 00:08:00.431832 OPS=0x04
448 00:08:00.432271 ring efuse init
449 00:08:00.437067 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 00:08:00.437523 [0.017310 Inits done]
451 00:08:00.437928 secure task start!
452 00:08:00.444604 high task start!
453 00:08:00.445027 low task start!
454 00:08:00.445433 run into bl31
455 00:08:00.453260 NOTICE: BL31: v1.3(release):4fc40b1
456 00:08:00.461002 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 00:08:00.461442 NOTICE: BL31: G12A normal boot!
458 00:08:00.476464 NOTICE: BL31: BL33 decompress pass
459 00:08:00.482170 ERROR: Error initializing runtime service opteed_fast
460 00:08:03.223356 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 00:08:03.223905 bl2_stage_init 0x01
462 00:08:03.224391 bl2_stage_init 0x81
463 00:08:03.228863 hw id: 0x0000 - pwm id 0x01
464 00:08:03.229341 bl2_stage_init 0xc1
465 00:08:03.234137 bl2_stage_init 0x02
466 00:08:03.234635
467 00:08:03.235028 L0:00000000
468 00:08:03.235412 L1:00000703
469 00:08:03.235794 L2:00008067
470 00:08:03.236216 L3:15000000
471 00:08:03.239682 S1:00000000
472 00:08:03.240113 B2:20282000
473 00:08:03.240497 B1:a0f83180
474 00:08:03.240878
475 00:08:03.241258 TE: 68432
476 00:08:03.241639
477 00:08:03.245265 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 00:08:03.250875
479 00:08:03.251281 Board ID = 1
480 00:08:03.251662 Set cpu clk to 24M
481 00:08:03.252075 Set clk81 to 24M
482 00:08:03.256458 Use GP1_pll as DSU clk.
483 00:08:03.256865 DSU clk: 1200 Mhz
484 00:08:03.257246 CPU clk: 1200 MHz
485 00:08:03.262034 Set clk81 to 166.6M
486 00:08:03.267649 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 00:08:03.268091 board id: 1
488 00:08:03.275260 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 00:08:03.286182 fw parse done
490 00:08:03.292137 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 00:08:03.335232 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 00:08:03.346334 PIEI prepare done
493 00:08:03.346743 fastboot data load
494 00:08:03.347133 fastboot data verify
495 00:08:03.351919 verify result: 266
496 00:08:03.357534 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 00:08:03.357945 LPDDR4 probe
498 00:08:03.358328 ddr clk to 1584MHz
499 00:08:03.365502 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 00:08:03.403245
501 00:08:03.403655 dmc_version 0001
502 00:08:03.410247 Check phy result
503 00:08:03.416379 INFO : End of CA training
504 00:08:03.416894 INFO : End of initialization
505 00:08:03.421950 INFO : Training has run successfully!
506 00:08:03.422418 Check phy result
507 00:08:03.427557 INFO : End of initialization
508 00:08:03.428045 INFO : End of read enable training
509 00:08:03.433156 INFO : End of fine write leveling
510 00:08:03.438739 INFO : End of Write leveling coarse delay
511 00:08:03.439206 INFO : Training has run successfully!
512 00:08:03.439624 Check phy result
513 00:08:03.444442 INFO : End of initialization
514 00:08:03.444920 INFO : End of read dq deskew training
515 00:08:03.449948 INFO : End of MPR read delay center optimization
516 00:08:03.455556 INFO : End of write delay center optimization
517 00:08:03.461180 INFO : End of read delay center optimization
518 00:08:03.461656 INFO : End of max read latency training
519 00:08:03.466749 INFO : Training has run successfully!
520 00:08:03.467243 1D training succeed
521 00:08:03.475866 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 00:08:03.524228 Check phy result
523 00:08:03.524716 INFO : End of initialization
524 00:08:03.551569 INFO : End of 2D read delay Voltage center optimization
525 00:08:03.575665 INFO : End of 2D read delay Voltage center optimization
526 00:08:03.632308 INFO : End of 2D write delay Voltage center optimization
527 00:08:03.686337 INFO : End of 2D write delay Voltage center optimization
528 00:08:03.691875 INFO : Training has run successfully!
529 00:08:03.692404
530 00:08:03.692829 channel==0
531 00:08:03.697498 RxClkDly_Margin_A0==78 ps 8
532 00:08:03.697980 TxDqDly_Margin_A0==88 ps 9
533 00:08:03.703076 RxClkDly_Margin_A1==88 ps 9
534 00:08:03.703549 TxDqDly_Margin_A1==88 ps 9
535 00:08:03.703966 TrainedVREFDQ_A0==74
536 00:08:03.708698 TrainedVREFDQ_A1==74
537 00:08:03.709184 VrefDac_Margin_A0==22
538 00:08:03.709599 DeviceVref_Margin_A0==40
539 00:08:03.714334 VrefDac_Margin_A1==23
540 00:08:03.714815 DeviceVref_Margin_A1==40
541 00:08:03.715226
542 00:08:03.715632
543 00:08:03.716064 channel==1
544 00:08:03.719850 RxClkDly_Margin_A0==78 ps 8
545 00:08:03.720355 TxDqDly_Margin_A0==98 ps 10
546 00:08:03.725521 RxClkDly_Margin_A1==78 ps 8
547 00:08:03.726006 TxDqDly_Margin_A1==88 ps 9
548 00:08:03.731074 TrainedVREFDQ_A0==78
549 00:08:03.731576 TrainedVREFDQ_A1==75
550 00:08:03.732018 VrefDac_Margin_A0==22
551 00:08:03.736676 DeviceVref_Margin_A0==36
552 00:08:03.737158 VrefDac_Margin_A1==22
553 00:08:03.737574 DeviceVref_Margin_A1==39
554 00:08:03.742314
555 00:08:03.742798 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 00:08:03.743213
557 00:08:03.775793 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000015 00000017 dram_vref_reg_value 0x 00000061
558 00:08:03.776341 2D training succeed
559 00:08:03.781469 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 00:08:03.787082 auto size-- 65535DDR cs0 size: 2048MB
561 00:08:03.787567 DDR cs1 size: 2048MB
562 00:08:03.792685 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 00:08:03.793169 cs0 DataBus test pass
564 00:08:03.798337 cs1 DataBus test pass
565 00:08:03.798815 cs0 AddrBus test pass
566 00:08:03.799226 cs1 AddrBus test pass
567 00:08:03.799631
568 00:08:03.803876 100bdlr_step_size ps== 471
569 00:08:03.804397 result report
570 00:08:03.809474 boot times 0Enable ddr reg access
571 00:08:03.814583 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 00:08:03.828367 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 00:08:04.487290 bl2z: ptr: 05129330, size: 00001e40
574 00:08:04.496650 0.0;M3 CHK:0;cm4_sp_mode 0
575 00:08:04.496997 MVN_1=0x00000000
576 00:08:04.497273 MVN_2=0x00000000
577 00:08:04.508162 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 00:08:04.508642 OPS=0x04
579 00:08:04.509048 ring efuse init
580 00:08:04.511074 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 00:08:04.517017 [0.017354 Inits done]
582 00:08:04.517492 secure task start!
583 00:08:04.517877 high task start!
584 00:08:04.518294 low task start!
585 00:08:04.521342 run into bl31
586 00:08:04.529933 NOTICE: BL31: v1.3(release):4fc40b1
587 00:08:04.537746 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 00:08:04.538250 NOTICE: BL31: G12A normal boot!
589 00:08:04.553415 NOTICE: BL31: BL33 decompress pass
590 00:08:04.559034 ERROR: Error initializing runtime service opteed_fast
591 00:08:05.928054 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 00:08:05.928641 bl2_stage_init 0x01
593 00:08:05.929047 bl2_stage_init 0x81
594 00:08:05.933658 hw id: 0x0000 - pwm id 0x01
595 00:08:05.934155 bl2_stage_init 0xc1
596 00:08:05.937910 bl2_stage_init 0x02
597 00:08:05.938378
598 00:08:05.938801 L0:00000000
599 00:08:05.939192 L1:00000703
600 00:08:05.939609 L2:00008067
601 00:08:05.943388 L3:15000000
602 00:08:05.943852 S1:00000000
603 00:08:05.944296 B2:20282000
604 00:08:05.944686 B1:a0f83180
605 00:08:05.945095
606 00:08:05.945473 TE: 71422
607 00:08:05.949142
608 00:08:05.954562 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 00:08:05.955070
610 00:08:05.955470 Board ID = 1
611 00:08:05.955861 Set cpu clk to 24M
612 00:08:05.956297 Set clk81 to 24M
613 00:08:05.958239 Use GP1_pll as DSU clk.
614 00:08:05.963832 DSU clk: 1200 Mhz
615 00:08:05.964319 CPU clk: 1200 MHz
616 00:08:05.964744 Set clk81 to 166.6M
617 00:08:05.969303 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 00:08:05.974912 board id: 1
619 00:08:05.978822 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 00:08:05.990500 fw parse done
621 00:08:05.996443 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 00:08:06.039163 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 00:08:06.050032 PIEI prepare done
624 00:08:06.050502 fastboot data load
625 00:08:06.050925 fastboot data verify
626 00:08:06.055700 verify result: 266
627 00:08:06.061218 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 00:08:06.061698 LPDDR4 probe
629 00:08:06.062127 ddr clk to 1584MHz
630 00:08:06.069156 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 00:08:06.106536
632 00:08:06.107045 dmc_version 0001
633 00:08:06.113235 Check phy result
634 00:08:06.119109 INFO : End of CA training
635 00:08:06.119584 INFO : End of initialization
636 00:08:06.124745 INFO : Training has run successfully!
637 00:08:06.125216 Check phy result
638 00:08:06.130344 INFO : End of initialization
639 00:08:06.130808 INFO : End of read enable training
640 00:08:06.135876 INFO : End of fine write leveling
641 00:08:06.141476 INFO : End of Write leveling coarse delay
642 00:08:06.141947 INFO : Training has run successfully!
643 00:08:06.142329 Check phy result
644 00:08:06.147028 INFO : End of initialization
645 00:08:06.147488 INFO : End of read dq deskew training
646 00:08:06.152741 INFO : End of MPR read delay center optimization
647 00:08:06.158303 INFO : End of write delay center optimization
648 00:08:06.163945 INFO : End of read delay center optimization
649 00:08:06.164471 INFO : End of max read latency training
650 00:08:06.169519 INFO : Training has run successfully!
651 00:08:06.169988 1D training succeed
652 00:08:06.178698 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 00:08:06.226193 Check phy result
654 00:08:06.226538 INFO : End of initialization
655 00:08:06.248550 INFO : End of 2D read delay Voltage center optimization
656 00:08:06.267876 INFO : End of 2D read delay Voltage center optimization
657 00:08:06.319715 INFO : End of 2D write delay Voltage center optimization
658 00:08:06.368986 INFO : End of 2D write delay Voltage center optimization
659 00:08:06.374488 INFO : Training has run successfully!
660 00:08:06.374958
661 00:08:06.375391 channel==0
662 00:08:06.380045 RxClkDly_Margin_A0==78 ps 8
663 00:08:06.380515 TxDqDly_Margin_A0==98 ps 10
664 00:08:06.383334 RxClkDly_Margin_A1==69 ps 7
665 00:08:06.383797 TxDqDly_Margin_A1==98 ps 10
666 00:08:06.388945 TrainedVREFDQ_A0==74
667 00:08:06.389413 TrainedVREFDQ_A1==74
668 00:08:06.389837 VrefDac_Margin_A0==23
669 00:08:06.394574 DeviceVref_Margin_A0==40
670 00:08:06.395039 VrefDac_Margin_A1==23
671 00:08:06.400119 DeviceVref_Margin_A1==40
672 00:08:06.400466
673 00:08:06.400750
674 00:08:06.401019 channel==1
675 00:08:06.401284 RxClkDly_Margin_A0==78 ps 8
676 00:08:06.405754 TxDqDly_Margin_A0==98 ps 10
677 00:08:06.406083 RxClkDly_Margin_A1==78 ps 8
678 00:08:06.411308 TxDqDly_Margin_A1==88 ps 9
679 00:08:06.411650 TrainedVREFDQ_A0==78
680 00:08:06.411930 TrainedVREFDQ_A1==75
681 00:08:06.416885 VrefDac_Margin_A0==22
682 00:08:06.417216 DeviceVref_Margin_A0==36
683 00:08:06.422504 VrefDac_Margin_A1==22
684 00:08:06.422836 DeviceVref_Margin_A1==39
685 00:08:06.423109
686 00:08:06.428176 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 00:08:06.428729
688 00:08:06.456043 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000015 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 00:08:06.461724 2D training succeed
690 00:08:06.467245 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 00:08:06.467690 auto size-- 65535DDR cs0 size: 2048MB
692 00:08:06.472878 DDR cs1 size: 2048MB
693 00:08:06.473323 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 00:08:06.478446 cs0 DataBus test pass
695 00:08:06.478886 cs1 DataBus test pass
696 00:08:06.479282 cs0 AddrBus test pass
697 00:08:06.484071 cs1 AddrBus test pass
698 00:08:06.484504
699 00:08:06.484902 100bdlr_step_size ps== 478
700 00:08:06.485300 result report
701 00:08:06.489735 boot times 0Enable ddr reg access
702 00:08:06.497220 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 00:08:06.511011 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 00:08:07.166415 bl2z: ptr: 05129330, size: 00001e40
705 00:08:07.172960 0.0;M3 CHK:0;cm4_sp_mode 0
706 00:08:07.173451 MVN_1=0x00000000
707 00:08:07.173843 MVN_2=0x00000000
708 00:08:07.184398 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 00:08:07.184877 OPS=0x04
710 00:08:07.185265 ring efuse init
711 00:08:07.190097 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 00:08:07.190564 [0.017310 Inits done]
713 00:08:07.190970 secure task start!
714 00:08:07.197441 high task start!
715 00:08:07.197893 low task start!
716 00:08:07.198266 run into bl31
717 00:08:07.205963 NOTICE: BL31: v1.3(release):4fc40b1
718 00:08:07.213854 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 00:08:07.214313 NOTICE: BL31: G12A normal boot!
720 00:08:07.229247 NOTICE: BL31: BL33 decompress pass
721 00:08:07.235048 ERROR: Error initializing runtime service opteed_fast
722 00:08:08.030609
723 00:08:08.031215
724 00:08:08.035937 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 00:08:08.036502
726 00:08:08.039426 Model: Libre Computer AML-S905D3-CC Solitude
727 00:08:08.186507 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 00:08:08.201859 DRAM: 2 GiB (effective 3.8 GiB)
729 00:08:08.302632 Core: 406 devices, 33 uclasses, devicetree: separate
730 00:08:08.308644 WDT: Not starting watchdog@f0d0
731 00:08:08.333694 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 00:08:08.345953 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 00:08:08.350969 ** Bad device specification mmc 0 **
734 00:08:08.360960 Card did not respond to voltage select! : -110
735 00:08:08.368577 ** Bad device specification mmc 0 **
736 00:08:08.369059 Couldn't find partition mmc 0
737 00:08:08.376967 Card did not respond to voltage select! : -110
738 00:08:08.382377 ** Bad device specification mmc 0 **
739 00:08:08.382854 Couldn't find partition mmc 0
740 00:08:08.387576 Error: could not access storage.
741 00:08:08.684116 Net: eth0: ethernet@ff3f0000
742 00:08:08.684738 starting USB...
743 00:08:08.928593 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 00:08:08.929193 Starting the controller
745 00:08:08.935598 USB XHCI 1.10
746 00:08:10.489819 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 00:08:10.498188 scanning usb for storage devices... 0 Storage Device(s) found
749 00:08:10.549261 Hit any key to stop autoboot: 1
750 00:08:10.550271 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 00:08:10.550654 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 00:08:10.550932 Setting prompt string to ['=>']
753 00:08:10.551195 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 00:08:10.564239 0
755 00:08:10.564916 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 00:08:10.665766 => setenv autoload no
758 00:08:10.666513 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 00:08:10.671109 setenv autoload no
761 00:08:10.772637 => setenv initrd_high 0xffffffff
762 00:08:10.773344 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 00:08:10.778076 setenv initrd_high 0xffffffff
765 00:08:10.879585 => setenv fdt_high 0xffffffff
766 00:08:10.880415 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 00:08:10.885001 setenv fdt_high 0xffffffff
769 00:08:10.986506 => dhcp
770 00:08:10.987218 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 00:08:10.991702 dhcp
772 00:08:12.047445 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 00:08:12.048081 Speed: 1000, full duplex
774 00:08:12.048491 BOOTP broadcast 1
775 00:08:12.296314 BOOTP broadcast 2
776 00:08:12.311363 DHCP client bound to address 192.168.6.21 (263 ms)
778 00:08:12.412819 => setenv serverip 192.168.6.2
779 00:08:12.413536 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 00:08:12.418018 setenv serverip 192.168.6.2
782 00:08:12.519488 => tftpboot 0x01080000 931303/tftp-deploy-ljh319og/kernel/uImage
783 00:08:12.520264 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 00:08:12.527179 tftpboot 0x01080000 931303/tftp-deploy-ljh319og/kernel/uImage
785 00:08:12.527708 Speed: 1000, full duplex
786 00:08:12.528148 Using ethernet@ff3f0000 device
787 00:08:12.532687 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 00:08:12.538164 Filename '931303/tftp-deploy-ljh319og/kernel/uImage'.
789 00:08:12.542149 Load address: 0x1080000
790 00:08:15.580753 Loading: *################################################## 43.6 MiB
791 00:08:15.581432 14.3 MiB/s
792 00:08:15.581884 done
793 00:08:15.585094 Bytes transferred = 45713984 (2b98a40 hex)
795 00:08:15.686740 => tftpboot 0x08000000 931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
796 00:08:15.687556 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 00:08:15.694372 tftpboot 0x08000000 931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot
798 00:08:15.694874 Speed: 1000, full duplex
799 00:08:15.695311 Using ethernet@ff3f0000 device
800 00:08:15.699850 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 00:08:15.709619 Filename '931303/tftp-deploy-ljh319og/ramdisk/ramdisk.cpio.gz.uboot'.
802 00:08:15.710153 Load address: 0x8000000
803 00:08:17.255553 Loading: *################################################# UDP wrong checksum 00000005 0000e472
804 00:08:22.256413 T UDP wrong checksum 00000005 0000e472
805 00:08:30.070404 T UDP wrong checksum 000000ff 00000d24
806 00:08:30.124901 UDP wrong checksum 000000ff 0000a916
807 00:08:32.259873 T UDP wrong checksum 00000005 0000e472
808 00:08:46.530868 T T UDP wrong checksum 000000ff 000009b0
809 00:08:46.580079 UDP wrong checksum 000000ff 000095a2
810 00:08:52.262388 T T UDP wrong checksum 00000005 0000e472
811 00:09:11.461792 T T T UDP wrong checksum 000000ff 000065df
812 00:09:11.474730 UDP wrong checksum 000000ff 0000fbd1
813 00:09:12.266151
814 00:09:12.266748 Retry count exceeded; starting again
816 00:09:12.268201 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
819 00:09:12.269961 end: 2.4 uboot-commands (duration 00:01:21) [common]
821 00:09:12.271295 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
823 00:09:12.272352 end: 2 uboot-action (duration 00:01:21) [common]
825 00:09:12.273869 Cleaning after the job
826 00:09:12.274418 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/ramdisk
827 00:09:12.275800 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/kernel
828 00:09:12.317361 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/dtb
829 00:09:12.318269 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/nfsrootfs
830 00:09:12.641814 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/931303/tftp-deploy-ljh319og/modules
831 00:09:12.664555 start: 4.1 power-off (timeout 00:00:30) [common]
832 00:09:12.665255 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
833 00:09:12.722272 >> OK - accepted request
834 00:09:12.724787 Returned 0 in 0 seconds
835 00:09:12.825737 end: 4.1 power-off (duration 00:00:00) [common]
837 00:09:12.827026 start: 4.2 read-feedback (timeout 00:10:00) [common]
838 00:09:12.827757 Listened to connection for namespace 'common' for up to 1s
839 00:09:13.828322 Finalising connection for namespace 'common'
840 00:09:13.828816 Disconnecting from shell: Finalise
841 00:09:13.829081 =>
842 00:09:13.929853 end: 4.2 read-feedback (duration 00:00:01) [common]
843 00:09:13.930626 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/931303
844 00:09:17.246629 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/931303
845 00:09:17.247222 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.