Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:37:06.361937 lava-dispatcher, installed at version: 2024.01
2 00:37:06.362758 start: 0 validate
3 00:37:06.363248 Start time: 2024-10-31 00:37:06.363218+00:00 (UTC)
4 00:37:06.363798 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:37:06.364355 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:37:06.410176 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:37:06.410822 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fkernel%2FImage exists
8 00:37:06.448239 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:37:06.448897 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:37:06.482694 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:37:06.483159 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:37:06.515247 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:37:06.515727 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2BCONFIG_CPU_BIG_ENDIAN%3Dy%2Fgcc-12%2Fmodules.tar.xz exists
14 00:37:06.561151 validate duration: 0.20
16 00:37:06.562635 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:37:06.563269 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:37:06.563854 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:37:06.564901 Not decompressing ramdisk as can be used compressed.
20 00:37:06.565699 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 00:37:06.566211 saving as /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/ramdisk/initrd.cpio.gz
22 00:37:06.566738 total size: 5628182 (5 MB)
23 00:37:06.610241 progress 0 % (0 MB)
24 00:37:06.618168 progress 5 % (0 MB)
25 00:37:06.625796 progress 10 % (0 MB)
26 00:37:06.632604 progress 15 % (0 MB)
27 00:37:06.640056 progress 20 % (1 MB)
28 00:37:06.645504 progress 25 % (1 MB)
29 00:37:06.649557 progress 30 % (1 MB)
30 00:37:06.653553 progress 35 % (1 MB)
31 00:37:06.657083 progress 40 % (2 MB)
32 00:37:06.660979 progress 45 % (2 MB)
33 00:37:06.664534 progress 50 % (2 MB)
34 00:37:06.668758 progress 55 % (2 MB)
35 00:37:06.672721 progress 60 % (3 MB)
36 00:37:06.676292 progress 65 % (3 MB)
37 00:37:06.680266 progress 70 % (3 MB)
38 00:37:06.683786 progress 75 % (4 MB)
39 00:37:06.687733 progress 80 % (4 MB)
40 00:37:06.691266 progress 85 % (4 MB)
41 00:37:06.695083 progress 90 % (4 MB)
42 00:37:06.698673 progress 95 % (5 MB)
43 00:37:06.701939 progress 100 % (5 MB)
44 00:37:06.702599 5 MB downloaded in 0.14 s (39.51 MB/s)
45 00:37:06.703154 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:37:06.704140 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:37:06.704458 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:37:06.704734 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:37:06.705212 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/kernel/Image
51 00:37:06.705488 saving as /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/kernel/Image
52 00:37:06.705700 total size: 44138504 (42 MB)
53 00:37:06.705912 No compression specified
54 00:37:06.737111 progress 0 % (0 MB)
55 00:37:06.764561 progress 5 % (2 MB)
56 00:37:06.791747 progress 10 % (4 MB)
57 00:37:06.819761 progress 15 % (6 MB)
58 00:37:06.847018 progress 20 % (8 MB)
59 00:37:06.874081 progress 25 % (10 MB)
60 00:37:06.901287 progress 30 % (12 MB)
61 00:37:06.929076 progress 35 % (14 MB)
62 00:37:06.956270 progress 40 % (16 MB)
63 00:37:06.984225 progress 45 % (18 MB)
64 00:37:07.011397 progress 50 % (21 MB)
65 00:37:07.038927 progress 55 % (23 MB)
66 00:37:07.066447 progress 60 % (25 MB)
67 00:37:07.093811 progress 65 % (27 MB)
68 00:37:07.121677 progress 70 % (29 MB)
69 00:37:07.149269 progress 75 % (31 MB)
70 00:37:07.176610 progress 80 % (33 MB)
71 00:37:07.203849 progress 85 % (35 MB)
72 00:37:07.235962 progress 90 % (37 MB)
73 00:37:07.272252 progress 95 % (40 MB)
74 00:37:07.305118 progress 100 % (42 MB)
75 00:37:07.305687 42 MB downloaded in 0.60 s (70.16 MB/s)
76 00:37:07.306172 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:37:07.307037 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:37:07.307318 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:37:07.307585 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:37:07.308112 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:37:07.308383 saving as /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:37:07.308589 total size: 53209 (0 MB)
84 00:37:07.308797 No compression specified
85 00:37:07.352181 progress 61 % (0 MB)
86 00:37:07.353056 progress 100 % (0 MB)
87 00:37:07.353619 0 MB downloaded in 0.05 s (1.13 MB/s)
88 00:37:07.354130 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:37:07.354995 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:37:07.355289 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:37:07.355577 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:37:07.356087 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 00:37:07.356358 saving as /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/nfsrootfs/full.rootfs.tar
95 00:37:07.356573 total size: 107552908 (102 MB)
96 00:37:07.356792 Using unxz to decompress xz
97 00:37:07.397679 progress 0 % (0 MB)
98 00:37:08.044900 progress 5 % (5 MB)
99 00:37:08.771004 progress 10 % (10 MB)
100 00:37:09.493438 progress 15 % (15 MB)
101 00:37:10.250794 progress 20 % (20 MB)
102 00:37:10.829216 progress 25 % (25 MB)
103 00:37:11.445875 progress 30 % (30 MB)
104 00:37:12.179171 progress 35 % (35 MB)
105 00:37:12.532280 progress 40 % (41 MB)
106 00:37:12.982142 progress 45 % (46 MB)
107 00:37:13.732693 progress 50 % (51 MB)
108 00:37:14.423411 progress 55 % (56 MB)
109 00:37:15.203653 progress 60 % (61 MB)
110 00:37:15.959614 progress 65 % (66 MB)
111 00:37:16.688301 progress 70 % (71 MB)
112 00:37:17.451905 progress 75 % (76 MB)
113 00:37:18.126361 progress 80 % (82 MB)
114 00:37:18.829278 progress 85 % (87 MB)
115 00:37:19.556520 progress 90 % (92 MB)
116 00:37:20.269279 progress 95 % (97 MB)
117 00:37:21.018045 progress 100 % (102 MB)
118 00:37:21.030848 102 MB downloaded in 13.67 s (7.50 MB/s)
119 00:37:21.031783 end: 1.4.1 http-download (duration 00:00:14) [common]
121 00:37:21.033587 end: 1.4 download-retry (duration 00:00:14) [common]
122 00:37:21.034154 start: 1.5 download-retry (timeout 00:09:46) [common]
123 00:37:21.034717 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 00:37:21.035568 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig+CONFIG_CPU_BIG_ENDIAN=y/gcc-12/modules.tar.xz
125 00:37:21.036097 saving as /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/modules/modules.tar
126 00:37:21.036547 total size: 11438372 (10 MB)
127 00:37:21.037004 Using unxz to decompress xz
128 00:37:21.086852 progress 0 % (0 MB)
129 00:37:21.156556 progress 5 % (0 MB)
130 00:37:21.229465 progress 10 % (1 MB)
131 00:37:21.312571 progress 15 % (1 MB)
132 00:37:21.389510 progress 20 % (2 MB)
133 00:37:21.466093 progress 25 % (2 MB)
134 00:37:21.540401 progress 30 % (3 MB)
135 00:37:21.618940 progress 35 % (3 MB)
136 00:37:21.694897 progress 40 % (4 MB)
137 00:37:21.781554 progress 45 % (4 MB)
138 00:37:21.858392 progress 50 % (5 MB)
139 00:37:21.937161 progress 55 % (6 MB)
140 00:37:22.019588 progress 60 % (6 MB)
141 00:37:22.102606 progress 65 % (7 MB)
142 00:37:22.193535 progress 70 % (7 MB)
143 00:37:22.273238 progress 75 % (8 MB)
144 00:37:22.358911 progress 80 % (8 MB)
145 00:37:22.434247 progress 85 % (9 MB)
146 00:37:22.506459 progress 90 % (9 MB)
147 00:37:22.602556 progress 95 % (10 MB)
148 00:37:22.702847 progress 100 % (10 MB)
149 00:37:22.714786 10 MB downloaded in 1.68 s (6.50 MB/s)
150 00:37:22.715346 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:37:22.716350 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:37:22.716874 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 00:37:22.717386 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 00:37:32.404032 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/915428/extract-nfsrootfs-pq6gkyih
156 00:37:32.404626 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 00:37:32.404913 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 00:37:32.405539 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp
159 00:37:32.405988 makedir: /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin
160 00:37:32.406317 makedir: /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/tests
161 00:37:32.406630 makedir: /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/results
162 00:37:32.406965 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-add-keys
163 00:37:32.407493 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-add-sources
164 00:37:32.408020 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-background-process-start
165 00:37:32.408523 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-background-process-stop
166 00:37:32.409036 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-common-functions
167 00:37:32.409516 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-echo-ipv4
168 00:37:32.409995 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-install-packages
169 00:37:32.410474 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-installed-packages
170 00:37:32.410945 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-os-build
171 00:37:32.411436 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-probe-channel
172 00:37:32.411928 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-probe-ip
173 00:37:32.412444 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-target-ip
174 00:37:32.412913 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-target-mac
175 00:37:32.413387 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-target-storage
176 00:37:32.413876 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-case
177 00:37:32.414354 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-event
178 00:37:32.414824 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-feedback
179 00:37:32.415314 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-raise
180 00:37:32.415800 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-reference
181 00:37:32.416313 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-runner
182 00:37:32.416791 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-set
183 00:37:32.417263 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-test-shell
184 00:37:32.417744 Updating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-install-packages (oe)
185 00:37:32.418345 Updating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/bin/lava-installed-packages (oe)
186 00:37:32.418797 Creating /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/environment
187 00:37:32.419166 LAVA metadata
188 00:37:32.419427 - LAVA_JOB_ID=915428
189 00:37:32.419642 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:37:32.420011 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 00:37:32.420955 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:37:32.421264 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 00:37:32.421474 skipped lava-vland-overlay
194 00:37:32.421717 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:37:32.421971 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 00:37:32.422189 skipped lava-multinode-overlay
197 00:37:32.422430 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:37:32.422679 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 00:37:32.422924 Loading test definitions
200 00:37:32.423203 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 00:37:32.423423 Using /lava-915428 at stage 0
202 00:37:32.424644 uuid=915428_1.6.2.4.1 testdef=None
203 00:37:32.424948 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:37:32.425208 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 00:37:32.426956 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:37:32.427733 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 00:37:32.429954 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:37:32.430774 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 00:37:32.432911 runner path: /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/0/tests/0_dmesg test_uuid 915428_1.6.2.4.1
212 00:37:32.433445 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:37:32.434200 Creating lava-test-runner.conf files
215 00:37:32.434400 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/915428/lava-overlay-jfgayyjp/lava-915428/0 for stage 0
216 00:37:32.434736 - 0_dmesg
217 00:37:32.435090 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:37:32.435365 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 00:37:32.456681 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:37:32.457021 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 00:37:32.457279 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:37:32.457539 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:37:32.457799 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 00:37:33.072613 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:37:33.073085 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 00:37:33.073331 extracting modules file /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915428/extract-nfsrootfs-pq6gkyih
227 00:37:34.420185 extracting modules file /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk
228 00:37:35.818635 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:37:35.819092 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 00:37:35.819390 [common] Applying overlay to NFS
231 00:37:35.819617 [common] Applying overlay /var/lib/lava/dispatcher/tmp/915428/compress-overlay-ilmmt0l8/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/915428/extract-nfsrootfs-pq6gkyih
232 00:37:35.849560 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:37:35.849939 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 00:37:35.850233 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 00:37:35.850478 Converting downloaded kernel to a uImage
236 00:37:35.850793 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/kernel/Image /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/kernel/uImage
237 00:37:36.281753 output: Image Name:
238 00:37:36.282171 output: Created: Thu Oct 31 00:37:35 2024
239 00:37:36.282380 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:37:36.282586 output: Data Size: 44138504 Bytes = 43104.01 KiB = 42.09 MiB
241 00:37:36.282789 output: Load Address: 01080000
242 00:37:36.282988 output: Entry Point: 01080000
243 00:37:36.283185 output:
244 00:37:36.283519 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 00:37:36.283782 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 00:37:36.284085 start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
247 00:37:36.284351 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:37:36.284610 start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
249 00:37:36.284869 Building ramdisk /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk
250 00:37:38.432029 >> 165187 blocks
251 00:37:47.140688 Adding RAMdisk u-boot header.
252 00:37:47.141403 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk.cpio.gz.uboot
253 00:37:47.391621 output: Image Name:
254 00:37:47.392106 output: Created: Thu Oct 31 00:37:47 2024
255 00:37:47.392538 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:37:47.392947 output: Data Size: 23584349 Bytes = 23031.59 KiB = 22.49 MiB
257 00:37:47.393347 output: Load Address: 00000000
258 00:37:47.393740 output: Entry Point: 00000000
259 00:37:47.394132 output:
260 00:37:47.395299 rename /var/lib/lava/dispatcher/tmp/915428/extract-overlay-ramdisk-udm8kgcf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
261 00:37:47.396061 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 00:37:47.396608 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 00:37:47.397131 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 00:37:47.397601 No LXC device requested
265 00:37:47.398156 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:37:47.398698 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 00:37:47.399198 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:37:47.399605 Checking files for TFTP limit of 4294967296 bytes.
269 00:37:47.402278 end: 1 tftp-deploy (duration 00:00:41) [common]
270 00:37:47.402858 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:37:47.403381 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:37:47.403870 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:37:47.404414 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:37:47.404943 Using kernel file from prepare-kernel: 915428/tftp-deploy-bwd9bg9_/kernel/uImage
275 00:37:47.405564 substitutions:
276 00:37:47.405962 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:37:47.406358 - {DTB_ADDR}: 0x01070000
278 00:37:47.406750 - {DTB}: 915428/tftp-deploy-bwd9bg9_/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 00:37:47.407140 - {INITRD}: 915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
280 00:37:47.407531 - {KERNEL_ADDR}: 0x01080000
281 00:37:47.407916 - {KERNEL}: 915428/tftp-deploy-bwd9bg9_/kernel/uImage
282 00:37:47.408335 - {LAVA_MAC}: None
283 00:37:47.408764 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/915428/extract-nfsrootfs-pq6gkyih
284 00:37:47.409156 - {NFS_SERVER_IP}: 192.168.6.2
285 00:37:47.409539 - {PRESEED_CONFIG}: None
286 00:37:47.409921 - {PRESEED_LOCAL}: None
287 00:37:47.410302 - {RAMDISK_ADDR}: 0x08000000
288 00:37:47.410682 - {RAMDISK}: 915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
289 00:37:47.411064 - {ROOT_PART}: None
290 00:37:47.411447 - {ROOT}: None
291 00:37:47.411828 - {SERVER_IP}: 192.168.6.2
292 00:37:47.412237 - {TEE_ADDR}: 0x83000000
293 00:37:47.412621 - {TEE}: None
294 00:37:47.413005 Parsed boot commands:
295 00:37:47.413377 - setenv autoload no
296 00:37:47.413757 - setenv initrd_high 0xffffffff
297 00:37:47.414134 - setenv fdt_high 0xffffffff
298 00:37:47.414514 - dhcp
299 00:37:47.414889 - setenv serverip 192.168.6.2
300 00:37:47.415270 - tftpboot 0x01080000 915428/tftp-deploy-bwd9bg9_/kernel/uImage
301 00:37:47.415682 - tftpboot 0x08000000 915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
302 00:37:47.416154 - tftpboot 0x01070000 915428/tftp-deploy-bwd9bg9_/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 00:37:47.416578 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/915428/extract-nfsrootfs-pq6gkyih,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:37:47.416985 - bootm 0x01080000 0x08000000 0x01070000
305 00:37:47.417498 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:37:47.418974 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:37:47.419388 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 00:37:47.434400 Setting prompt string to ['lava-test: # ']
310 00:37:47.435923 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:37:47.436559 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:37:47.437109 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:37:47.437625 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:37:47.438749 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 00:37:47.476282 >> OK - accepted request
316 00:37:47.478395 Returned 0 in 0 seconds
317 00:37:47.579524 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:37:47.581224 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:37:47.581801 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:37:47.582312 Setting prompt string to ['Hit any key to stop autoboot']
322 00:37:47.582770 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:37:47.584369 Trying 192.168.56.21...
324 00:37:47.584856 Connected to conserv1.
325 00:37:47.585270 Escape character is '^]'.
326 00:37:47.585684
327 00:37:47.586106 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 00:37:47.586518
329 00:37:55.094275 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 00:37:55.094704 bl2_stage_init 0x01
331 00:37:55.094925 bl2_stage_init 0x81
332 00:37:55.099658 hw id: 0x0000 - pwm id 0x01
333 00:37:55.099938 bl2_stage_init 0xc1
334 00:37:55.105259 bl2_stage_init 0x02
335 00:37:55.105542
336 00:37:55.105772 L0:00000000
337 00:37:55.105987 L1:00000703
338 00:37:55.106197 L2:00008067
339 00:37:55.106407 L3:15000000
340 00:37:55.111001 S1:00000000
341 00:37:55.111285 B2:20282000
342 00:37:55.111510 B1:a0f83180
343 00:37:55.111718
344 00:37:55.111924 TE: 66925
345 00:37:55.112167
346 00:37:55.116517 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 00:37:55.116796
348 00:37:55.122149 Board ID = 1
349 00:37:55.122421 Set cpu clk to 24M
350 00:37:55.122629 Set clk81 to 24M
351 00:37:55.127675 Use GP1_pll as DSU clk.
352 00:37:55.127944 DSU clk: 1200 Mhz
353 00:37:55.128178 CPU clk: 1200 MHz
354 00:37:55.133291 Set clk81 to 166.6M
355 00:37:55.139009 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 00:37:55.139298 board id: 1
357 00:37:55.146188 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:37:55.157085 fw parse done
359 00:37:55.163103 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:37:55.205996 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:37:55.217142 PIEI prepare done
362 00:37:55.217462 fastboot data load
363 00:37:55.217675 fastboot data verify
364 00:37:55.222724 verify result: 266
365 00:37:55.228309 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 00:37:55.228582 LPDDR4 probe
367 00:37:55.228788 ddr clk to 1584MHz
368 00:37:55.236314 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:37:55.274061
370 00:37:55.274419 dmc_version 0001
371 00:37:55.281042 Check phy result
372 00:37:55.286986 INFO : End of CA training
373 00:37:55.287269 INFO : End of initialization
374 00:37:55.292882 INFO : Training has run successfully!
375 00:37:55.293177 Check phy result
376 00:37:55.298241 INFO : End of initialization
377 00:37:55.298526 INFO : End of read enable training
378 00:37:55.303836 INFO : End of fine write leveling
379 00:37:55.309435 INFO : End of Write leveling coarse delay
380 00:37:55.309718 INFO : Training has run successfully!
381 00:37:55.309927 Check phy result
382 00:37:55.315071 INFO : End of initialization
383 00:37:55.315358 INFO : End of read dq deskew training
384 00:37:55.320662 INFO : End of MPR read delay center optimization
385 00:37:55.326201 INFO : End of write delay center optimization
386 00:37:55.331862 INFO : End of read delay center optimization
387 00:37:55.332158 INFO : End of max read latency training
388 00:37:55.337458 INFO : Training has run successfully!
389 00:37:55.337752 1D training succeed
390 00:37:55.346660 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:37:55.395162 Check phy result
392 00:37:55.395592 INFO : End of initialization
393 00:37:55.422330 INFO : End of 2D read delay Voltage center optimization
394 00:37:55.446421 INFO : End of 2D read delay Voltage center optimization
395 00:37:55.503242 INFO : End of 2D write delay Voltage center optimization
396 00:37:55.557133 INFO : End of 2D write delay Voltage center optimization
397 00:37:55.562634 INFO : Training has run successfully!
398 00:37:55.562942
399 00:37:55.563166 channel==0
400 00:37:55.568589 RxClkDly_Margin_A0==78 ps 8
401 00:37:55.568918 TxDqDly_Margin_A0==98 ps 10
402 00:37:55.573953 RxClkDly_Margin_A1==88 ps 9
403 00:37:55.574244 TxDqDly_Margin_A1==98 ps 10
404 00:37:55.574463 TrainedVREFDQ_A0==74
405 00:37:55.579407 TrainedVREFDQ_A1==74
406 00:37:55.579692 VrefDac_Margin_A0==23
407 00:37:55.579904 DeviceVref_Margin_A0==40
408 00:37:55.585041 VrefDac_Margin_A1==22
409 00:37:55.585307 DeviceVref_Margin_A1==40
410 00:37:55.585517
411 00:37:55.585725
412 00:37:55.590647 channel==1
413 00:37:55.590919 RxClkDly_Margin_A0==78 ps 8
414 00:37:55.591129 TxDqDly_Margin_A0==98 ps 10
415 00:37:55.596275 RxClkDly_Margin_A1==78 ps 8
416 00:37:55.596571 TxDqDly_Margin_A1==88 ps 9
417 00:37:55.601880 TrainedVREFDQ_A0==78
418 00:37:55.602153 TrainedVREFDQ_A1==75
419 00:37:55.602362 VrefDac_Margin_A0==23
420 00:37:55.607371 DeviceVref_Margin_A0==36
421 00:37:55.607643 VrefDac_Margin_A1==22
422 00:37:55.612976 DeviceVref_Margin_A1==39
423 00:37:55.613248
424 00:37:55.613456 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:37:55.613661
426 00:37:55.646553 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000014 00000015 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 00:37:55.646958 2D training succeed
428 00:37:55.652173 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:37:55.657760 auto size-- 65535DDR cs0 size: 2048MB
430 00:37:55.658030 DDR cs1 size: 2048MB
431 00:37:55.663356 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:37:55.663629 cs0 DataBus test pass
433 00:37:55.669030 cs1 DataBus test pass
434 00:37:55.669323 cs0 AddrBus test pass
435 00:37:55.669536 cs1 AddrBus test pass
436 00:37:55.669744
437 00:37:55.674577 100bdlr_step_size ps== 471
438 00:37:55.674882 result report
439 00:37:55.680174 boot times 0Enable ddr reg access
440 00:37:55.685437 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:37:55.699347 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 00:37:56.357646 bl2z: ptr: 05129330, size: 00001e40
443 00:37:56.366053 0.0;M3 CHK:0;cm4_sp_mode 0
444 00:37:56.366355 MVN_1=0x00000000
445 00:37:56.366560 MVN_2=0x00000000
446 00:37:56.377551 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 00:37:56.377859 OPS=0x04
448 00:37:56.378074 ring efuse init
449 00:37:56.380449 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 00:37:56.386541 [0.017355 Inits done]
451 00:37:56.386862 secure task start!
452 00:37:56.387098 high task start!
453 00:37:56.387311 low task start!
454 00:37:56.390781 run into bl31
455 00:37:56.399384 NOTICE: BL31: v1.3(release):4fc40b1
456 00:37:56.407183 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 00:37:56.407518 NOTICE: BL31: G12A normal boot!
458 00:37:56.422734 NOTICE: BL31: BL33 decompress pass
459 00:37:56.428420 ERROR: Error initializing runtime service opteed_fast
460 00:37:57.645510 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 00:37:57.645940 bl2_stage_init 0x01
462 00:37:57.646162 bl2_stage_init 0x81
463 00:37:57.651100 hw id: 0x0000 - pwm id 0x01
464 00:37:57.651421 bl2_stage_init 0xc1
465 00:37:57.656619 bl2_stage_init 0x02
466 00:37:57.656964
467 00:37:57.657180 L0:00000000
468 00:37:57.657382 L1:00000703
469 00:37:57.657581 L2:00008067
470 00:37:57.657777 L3:15000000
471 00:37:57.662208 S1:00000000
472 00:37:57.662499 B2:20282000
473 00:37:57.662704 B1:a0f83180
474 00:37:57.662902
475 00:37:57.663099 TE: 68211
476 00:37:57.663299
477 00:37:57.667801 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 00:37:57.668121
479 00:37:57.673418 Board ID = 1
480 00:37:57.673751 Set cpu clk to 24M
481 00:37:57.673960 Set clk81 to 24M
482 00:37:57.679061 Use GP1_pll as DSU clk.
483 00:37:57.679362 DSU clk: 1200 Mhz
484 00:37:57.679572 CPU clk: 1200 MHz
485 00:37:57.684612 Set clk81 to 166.6M
486 00:37:57.690179 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 00:37:57.690472 board id: 1
488 00:37:57.697444 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 00:37:57.708306 fw parse done
490 00:37:57.714348 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 00:37:57.757377 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 00:37:57.768564 PIEI prepare done
493 00:37:57.768921 fastboot data load
494 00:37:57.769139 fastboot data verify
495 00:37:57.774153 verify result: 266
496 00:37:57.779724 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 00:37:57.780057 LPDDR4 probe
498 00:37:57.780274 ddr clk to 1584MHz
499 00:37:59.150292 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: p SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 00:37:59.150727 bl2_stage_init 0x01
501 00:37:59.150952 bl2_stage_init 0x81
502 00:37:59.155849 hw id: 0x0000 - pwm id 0x01
503 00:37:59.156348 bl2_stage_init 0xc1
504 00:37:59.156832 bl2_stage_init 0x02
505 00:37:59.157312
506 00:37:59.161589 L0:00000000
507 00:37:59.162111 L1:00000703
508 00:37:59.162566 L2:00008067
509 00:37:59.163019 L3:15000000
510 00:37:59.163473 S1:00000000
511 00:37:59.167176 B2:20282000
512 00:37:59.167698 B1:a0f83180
513 00:37:59.168195
514 00:37:59.168654 TE: 71184
515 00:37:59.169102
516 00:37:59.172757 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 00:37:59.173282
518 00:37:59.178434 Board ID = 1
519 00:37:59.178951 Set cpu clk to 24M
520 00:37:59.179403 Set clk81 to 24M
521 00:37:59.183947 Use GP1_pll as DSU clk.
522 00:37:59.184498 DSU clk: 1200 Mhz
523 00:37:59.184953 CPU clk: 1200 MHz
524 00:37:59.185397 Set clk81 to 166.6M
525 00:37:59.195117 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 00:37:59.195660 board id: 1
527 00:37:59.201579 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 00:37:59.212484 fw parse done
529 00:37:59.218489 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 00:37:59.261515 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 00:37:59.272781 PIEI prepare done
532 00:37:59.273314 fastboot data load
533 00:37:59.273773 fastboot data verify
534 00:37:59.278356 verify result: 266
535 00:37:59.283951 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 00:37:59.284514 LPDDR4 probe
537 00:37:59.284988 ddr clk to 1584MHz
538 00:37:59.291881 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 00:37:59.329692
540 00:37:59.330250 dmc_version 0001
541 00:37:59.336698 Check phy result
542 00:37:59.342682 INFO : End of CA training
543 00:37:59.343213 INFO : End of initialization
544 00:37:59.348293 INFO : Training has run successfully!
545 00:37:59.348818 Check phy result
546 00:37:59.353907 INFO : End of initialization
547 00:37:59.354421 INFO : End of read enable training
548 00:37:59.359551 INFO : End of fine write leveling
549 00:37:59.365084 INFO : End of Write leveling coarse delay
550 00:37:59.365607 INFO : Training has run successfully!
551 00:37:59.366063 Check phy result
552 00:37:59.370690 INFO : End of initialization
553 00:37:59.371207 INFO : End of read dq deskew training
554 00:37:59.376328 INFO : End of MPR read delay center optimization
555 00:37:59.381894 INFO : End of write delay center optimization
556 00:37:59.387541 INFO : End of read delay center optimization
557 00:37:59.388096 INFO : End of max read latency training
558 00:37:59.393094 INFO : Training has run successfully!
559 00:37:59.393609 1D training succeed
560 00:37:59.402218 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 00:37:59.450638 Check phy result
562 00:37:59.451171 INFO : End of initialization
563 00:37:59.477951 INFO : End of 2D read delay Voltage center optimization
564 00:37:59.502164 INFO : End of 2D read delay Voltage center optimization
565 00:37:59.558823 INFO : End of 2D write delay Voltage center optimization
566 00:37:59.612838 INFO : End of 2D write delay Voltage center optimization
567 00:37:59.618405 INFO : Training has run successfully!
568 00:37:59.618922
569 00:37:59.619397 channel==0
570 00:37:59.624046 RxClkDly_Margin_A0==78 ps 8
571 00:37:59.624559 TxDqDly_Margin_A0==98 ps 10
572 00:37:59.629636 RxClkDly_Margin_A1==88 ps 9
573 00:37:59.630153 TxDqDly_Margin_A1==98 ps 10
574 00:37:59.630610 TrainedVREFDQ_A0==75
575 00:37:59.635221 TrainedVREFDQ_A1==75
576 00:37:59.635740 VrefDac_Margin_A0==22
577 00:37:59.636232 DeviceVref_Margin_A0==39
578 00:37:59.640811 VrefDac_Margin_A1==23
579 00:37:59.641323 DeviceVref_Margin_A1==39
580 00:37:59.641778
581 00:37:59.642227
582 00:37:59.646408 channel==1
583 00:37:59.646911 RxClkDly_Margin_A0==88 ps 9
584 00:37:59.647363 TxDqDly_Margin_A0==88 ps 9
585 00:37:59.652000 RxClkDly_Margin_A1==88 ps 9
586 00:37:59.652523 TxDqDly_Margin_A1==78 ps 8
587 00:37:59.657635 TrainedVREFDQ_A0==75
588 00:37:59.658153 TrainedVREFDQ_A1==75
589 00:37:59.658607 VrefDac_Margin_A0==22
590 00:37:59.663208 DeviceVref_Margin_A0==39
591 00:37:59.663727 VrefDac_Margin_A1==20
592 00:37:59.668839 DeviceVref_Margin_A1==38
593 00:37:59.669361
594 00:37:59.669812 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 00:37:59.670258
596 00:37:59.702297 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000019 00000018 00000017 00000019 00000016 00000018 00000015 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
597 00:37:59.702897 2D training succeed
598 00:37:59.708008 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 00:37:59.713661 auto size-- 65535DDR cs0 size: 2048MB
600 00:37:59.714198 DDR cs1 size: 2048MB
601 00:37:59.719188 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 00:37:59.719711 cs0 DataBus test pass
603 00:37:59.724759 cs1 DataBus test pass
604 00:37:59.725295 cs0 AddrBus test pass
605 00:37:59.725744 cs1 AddrBus test pass
606 00:37:59.726180
607 00:37:59.730368 100bdlr_step_size ps== 478
608 00:37:59.730897 result report
609 00:37:59.736014 boot times 0Enable ddr reg access
610 00:37:59.741208 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 00:37:59.755001 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 00:38:00.414334 bl2z: ptr: 05129330, size: 00001e40
613 00:38:00.421925 0.0;M3 CHK:0;cm4_sp_mode 0
614 00:38:00.422367 MVN_1=0x00000000
615 00:38:00.422625 MVN_2=0x00000000
616 00:38:00.433518 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 00:38:00.433843 OPS=0x04
618 00:38:00.434067 ring efuse init
619 00:38:00.439043 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 00:38:00.439464 [0.017354 Inits done]
621 00:38:00.439861 secure task start!
622 00:38:00.446632 high task start!
623 00:38:00.446957 low task start!
624 00:38:00.447193 run into bl31
625 00:38:00.455172 NOTICE: BL31: v1.3(release):4fc40b1
626 00:38:00.462948 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 00:38:00.463266 NOTICE: BL31: G12A normal boot!
628 00:38:00.478544 NOTICE: BL31: BL33 decompress pass
629 00:38:00.485564 ERROR: Error initializing runtime service opteed_fast
630 00:38:01.698283 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 00:38:01.698719 bl2_stage_init 0x01
632 00:38:01.698973 bl2_stage_init 0x81
633 00:38:01.703773 hw id: 0x0000 - pwm id 0x01
634 00:38:01.704271 bl2_stage_init 0xc1
635 00:38:01.709313 bl2_stage_init 0x02
636 00:38:01.709787
637 00:38:01.710187 L0:00000000
638 00:38:01.710453 L1:00000703
639 00:38:01.710688 L2:00008067
640 00:38:01.710914 L3:15000000
641 00:38:01.714939 S1:00000000
642 00:38:01.715572 B2:20282000
643 00:38:01.715975 B1:a0f83180
644 00:38:01.716407
645 00:38:01.716792 TE: 70789
646 00:38:01.717060
647 00:38:01.720543 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 00:38:01.721001
649 00:38:01.726190 Board ID = 1
650 00:38:01.726496 Set cpu clk to 24M
651 00:38:01.726736 Set clk81 to 24M
652 00:38:01.731785 Use GP1_pll as DSU clk.
653 00:38:01.732268 DSU clk: 1200 Mhz
654 00:38:01.732663 CPU clk: 1200 MHz
655 00:38:01.737310 Set clk81 to 166.6M
656 00:38:01.742967 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 00:38:01.743293 board id: 1
658 00:38:01.750251 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 00:38:01.761126 fw parse done
660 00:38:01.767032 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 00:38:01.810177 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 00:38:01.821258 PIEI prepare done
663 00:38:01.821769 fastboot data load
664 00:38:01.822048 fastboot data verify
665 00:38:01.826865 verify result: 266
666 00:38:01.832433 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 00:38:01.832775 LPDDR4 probe
668 00:38:01.833018 ddr clk to 1584MHz
669 00:38:01.840432 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 00:38:01.878143
671 00:38:01.878507 dmc_version 0001
672 00:38:01.885141 Check phy result
673 00:38:01.891120 INFO : End of CA training
674 00:38:01.891533 INFO : End of initialization
675 00:38:01.896783 INFO : Training has run successfully!
676 00:38:01.897063 Check phy result
677 00:38:01.902397 INFO : End of initialization
678 00:38:01.902836 INFO : End of read enable training
679 00:38:01.907952 INFO : End of fine write leveling
680 00:38:01.913528 INFO : End of Write leveling coarse delay
681 00:38:01.913810 INFO : Training has run successfully!
682 00:38:01.914020 Check phy result
683 00:38:01.919186 INFO : End of initialization
684 00:38:01.919605 INFO : End of read dq deskew training
685 00:38:01.924800 INFO : End of MPR read delay center optimization
686 00:38:01.930386 INFO : End of write delay center optimization
687 00:38:01.935954 INFO : End of read delay center optimization
688 00:38:01.936263 INFO : End of max read latency training
689 00:38:01.941575 INFO : Training has run successfully!
690 00:38:01.941989 1D training succeed
691 00:38:01.950844 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 00:38:01.999007 Check phy result
693 00:38:01.999347 INFO : End of initialization
694 00:38:02.026450 INFO : End of 2D read delay Voltage center optimization
695 00:38:02.050592 INFO : End of 2D read delay Voltage center optimization
696 00:38:02.107209 INFO : End of 2D write delay Voltage center optimization
697 00:38:02.161189 INFO : End of 2D write delay Voltage center optimization
698 00:38:02.166858 INFO : Training has run successfully!
699 00:38:02.167133
700 00:38:02.167362 channel==0
701 00:38:02.172470 RxClkDly_Margin_A0==78 ps 8
702 00:38:02.172878 TxDqDly_Margin_A0==98 ps 10
703 00:38:02.175916 RxClkDly_Margin_A1==88 ps 9
704 00:38:02.176344 TxDqDly_Margin_A1==88 ps 9
705 00:38:02.181372 TrainedVREFDQ_A0==77
706 00:38:02.181650 TrainedVREFDQ_A1==74
707 00:38:02.181867 VrefDac_Margin_A0==24
708 00:38:02.187086 DeviceVref_Margin_A0==37
709 00:38:02.187642 VrefDac_Margin_A1==22
710 00:38:02.192651 DeviceVref_Margin_A1==40
711 00:38:02.193250
712 00:38:02.193848
713 00:38:02.194392 channel==1
714 00:38:02.194934 RxClkDly_Margin_A0==78 ps 8
715 00:38:02.198389 TxDqDly_Margin_A0==98 ps 10
716 00:38:02.199258 RxClkDly_Margin_A1==88 ps 9
717 00:38:02.203841 TxDqDly_Margin_A1==88 ps 9
718 00:38:02.204394 TrainedVREFDQ_A0==78
719 00:38:02.204860 TrainedVREFDQ_A1==75
720 00:38:02.209379 VrefDac_Margin_A0==22
721 00:38:02.209966 DeviceVref_Margin_A0==36
722 00:38:02.210550 VrefDac_Margin_A1==22
723 00:38:02.215136 DeviceVref_Margin_A1==39
724 00:38:02.216062
725 00:38:02.220598 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 00:38:02.221115
727 00:38:02.248629 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001b 00000017 00000015 00000016 dram_vref_reg_value 0x 00000062
728 00:38:02.254101 2D training succeed
729 00:38:02.259768 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 00:38:02.260091 auto size-- 65535DDR cs0 size: 2048MB
731 00:38:02.265346 DDR cs1 size: 2048MB
732 00:38:02.265774 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 00:38:02.270937 cs0 DataBus test pass
734 00:38:02.271363 cs1 DataBus test pass
735 00:38:02.271626 cs0 AddrBus test pass
736 00:38:02.276560 cs1 AddrBus test pass
737 00:38:02.276863
738 00:38:02.277093 100bdlr_step_size ps== 471
739 00:38:02.277309 result report
740 00:38:02.282141 boot times 0Enable ddr reg access
741 00:38:02.289502 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 00:38:02.303347 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 00:38:02.964060 bl2z: ptr: 05129330, size: 00001e40
744 00:38:02.971556 0.0;M3 CHK:0;cm4_sp_mode 0
745 00:38:02.971941 MVN_1=0x00000000
746 00:38:02.972220 MVN_2=0x00000000
747 00:38:02.982864 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 00:38:02.983209 OPS=0x04
749 00:38:02.983442 ring efuse init
750 00:38:02.985797 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 00:38:02.991663 [0.017354 Inits done]
752 00:38:02.992030 secure task start!
753 00:38:02.992274 high task start!
754 00:38:02.992488 low task start!
755 00:38:02.995950 run into bl31
756 00:38:03.004605 NOTICE: BL31: v1.3(release):4fc40b1
757 00:38:03.012407 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 00:38:03.012754 NOTICE: BL31: G12A normal boot!
759 00:38:03.027994 NOTICE: BL31: BL33 decompress pass
760 00:38:03.033706 ERROR: Error initializing runtime service opteed_fast
761 00:38:03.829125
762 00:38:03.829551
763 00:38:03.834455 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 00:38:03.834773
765 00:38:03.837970 Model: Libre Computer AML-S905D3-CC Solitude
766 00:38:03.985147 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 00:38:04.000471 DRAM: 2 GiB (effective 3.8 GiB)
768 00:38:04.101382 Core: 406 devices, 33 uclasses, devicetree: separate
769 00:38:04.107244 WDT: Not starting watchdog@f0d0
770 00:38:04.132328 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 00:38:04.144568 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 00:38:04.149552 ** Bad device specification mmc 0 **
773 00:38:04.159612 Card did not respond to voltage select! : -110
774 00:38:04.167237 ** Bad device specification mmc 0 **
775 00:38:04.167558 Couldn't find partition mmc 0
776 00:38:04.175589 Card did not respond to voltage select! : -110
777 00:38:04.181089 ** Bad device specification mmc 0 **
778 00:38:04.181474 Couldn't find partition mmc 0
779 00:38:04.186144 Error: could not access storage.
780 00:38:04.482625 Net: eth0: ethernet@ff3f0000
781 00:38:04.483240 starting USB...
782 00:38:04.727223 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 00:38:04.727722 Starting the controller
784 00:38:04.734220 USB XHCI 1.10
785 00:38:06.290471 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 00:38:06.298633 scanning usb for storage devices... 0 Storage Device(s) found
788 00:38:06.350240 Hit any key to stop autoboot: 1
789 00:38:06.351168 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 00:38:06.351770 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 00:38:06.352289 Setting prompt string to ['=>']
792 00:38:06.352774 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 00:38:06.364740 0
794 00:38:06.365742 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 00:38:06.467047 => setenv autoload no
797 00:38:06.468194 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 00:38:06.472370 setenv autoload no
800 00:38:06.573938 => setenv initrd_high 0xffffffff
801 00:38:06.574510 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 00:38:06.578795 setenv initrd_high 0xffffffff
804 00:38:06.680397 => setenv fdt_high 0xffffffff
805 00:38:06.681080 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 00:38:06.685247 setenv fdt_high 0xffffffff
808 00:38:06.786402 => dhcp
809 00:38:06.786969 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 00:38:06.790943 dhcp
811 00:38:07.696961 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 00:38:07.697596 Speed: 1000, full duplex
813 00:38:07.697985 BOOTP broadcast 1
814 00:38:07.717205 DHCP client bound to address 192.168.6.21 (20 ms)
816 00:38:07.818958 => setenv serverip 192.168.6.2
817 00:38:07.819816 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 00:38:07.824901 setenv serverip 192.168.6.2
820 00:38:07.926106 => tftpboot 0x01080000 915428/tftp-deploy-bwd9bg9_/kernel/uImage
821 00:38:07.926909 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
822 00:38:07.933445 tftpboot 0x01080000 915428/tftp-deploy-bwd9bg9_/kernel/uImage
823 00:38:07.933871 Speed: 1000, full duplex
824 00:38:07.934118 Using ethernet@ff3f0000 device
825 00:38:07.938869 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 00:38:07.944420 Filename '915428/tftp-deploy-bwd9bg9_/kernel/uImage'.
827 00:38:07.948250 Load address: 0x1080000
828 00:38:10.688287 Loading: *################################################## 42.1 MiB
829 00:38:10.688920 15.4 MiB/s
830 00:38:10.689359 done
831 00:38:10.692502 Bytes transferred = 44138568 (2a18048 hex)
833 00:38:10.794042 => tftpboot 0x08000000 915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
834 00:38:10.794821 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
835 00:38:10.801546 tftpboot 0x08000000 915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot
836 00:38:10.802093 Speed: 1000, full duplex
837 00:38:10.802496 Using ethernet@ff3f0000 device
838 00:38:10.807079 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 00:38:10.816835 Filename '915428/tftp-deploy-bwd9bg9_/ramdisk/ramdisk.cpio.gz.uboot'.
840 00:38:10.817308 Load address: 0x8000000
841 00:38:12.341775 Loading: *################################################# UDP wrong checksum 00000005 00005c1c
842 00:38:17.343177 T UDP wrong checksum 00000005 00005c1c
843 00:38:27.345003 T T UDP wrong checksum 00000005 00005c1c
844 00:38:41.543492 T T UDP wrong checksum 000000ff 000030eb
845 00:38:41.613273 UDP wrong checksum 000000ff 0000c9dd
846 00:38:47.349008 T T UDP wrong checksum 00000005 00005c1c
847 00:38:53.854441 T UDP wrong checksum 000000ff 00009568
848 00:38:53.867716 UDP wrong checksum 000000ff 00002a5b
849 00:39:07.353948 T T
850 00:39:07.354625 Retry count exceeded; starting again
852 00:39:07.356251 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
855 00:39:07.358347 end: 2.4 uboot-commands (duration 00:01:20) [common]
857 00:39:07.359882 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
859 00:39:07.361434 end: 2 uboot-action (duration 00:01:20) [common]
861 00:39:07.363100 Cleaning after the job
862 00:39:07.363692 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/ramdisk
863 00:39:07.365164 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/kernel
864 00:39:07.414212 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/dtb
865 00:39:07.415036 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/nfsrootfs
866 00:39:07.578013 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915428/tftp-deploy-bwd9bg9_/modules
867 00:39:07.600857 start: 4.1 power-off (timeout 00:00:30) [common]
868 00:39:07.601547 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
869 00:39:07.636155 >> OK - accepted request
870 00:39:07.638323 Returned 0 in 0 seconds
871 00:39:07.739108 end: 4.1 power-off (duration 00:00:00) [common]
873 00:39:07.740183 start: 4.2 read-feedback (timeout 00:10:00) [common]
874 00:39:07.740867 Listened to connection for namespace 'common' for up to 1s
875 00:39:08.741789 Finalising connection for namespace 'common'
876 00:39:08.742275 Disconnecting from shell: Finalise
877 00:39:08.742551 =>
878 00:39:08.843212 end: 4.2 read-feedback (duration 00:00:01) [common]
879 00:39:08.843637 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/915428
880 00:39:10.589376 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/915428
881 00:39:10.590018 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.