Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:39:46.602692 lava-dispatcher, installed at version: 2024.01
2 00:39:46.603535 start: 0 validate
3 00:39:46.604036 Start time: 2024-10-31 00:39:46.604004+00:00 (UTC)
4 00:39:46.604598 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:39:46.605144 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:39:46.643346 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:39:46.643916 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:39:46.679125 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:39:46.680078 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:39:46.716060 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:39:46.716641 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:39:46.749372 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:39:46.749858 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:39:46.788403 validate duration: 0.18
16 00:39:46.789852 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:39:46.790456 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:39:46.791012 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:39:46.792009 Not decompressing ramdisk as can be used compressed.
20 00:39:46.792838 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:39:46.793339 saving as /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/ramdisk/initrd.cpio.gz
22 00:39:46.793859 total size: 5628169 (5 MB)
23 00:39:46.839722 progress 0 % (0 MB)
24 00:39:46.847592 progress 5 % (0 MB)
25 00:39:46.855542 progress 10 % (0 MB)
26 00:39:46.862573 progress 15 % (0 MB)
27 00:39:46.869463 progress 20 % (1 MB)
28 00:39:46.873153 progress 25 % (1 MB)
29 00:39:46.877181 progress 30 % (1 MB)
30 00:39:46.881176 progress 35 % (1 MB)
31 00:39:46.884769 progress 40 % (2 MB)
32 00:39:46.888819 progress 45 % (2 MB)
33 00:39:46.892446 progress 50 % (2 MB)
34 00:39:46.896450 progress 55 % (2 MB)
35 00:39:46.900421 progress 60 % (3 MB)
36 00:39:46.903940 progress 65 % (3 MB)
37 00:39:46.907888 progress 70 % (3 MB)
38 00:39:46.911472 progress 75 % (4 MB)
39 00:39:46.915464 progress 80 % (4 MB)
40 00:39:46.919062 progress 85 % (4 MB)
41 00:39:46.923045 progress 90 % (4 MB)
42 00:39:46.926784 progress 95 % (5 MB)
43 00:39:46.930057 progress 100 % (5 MB)
44 00:39:46.930716 5 MB downloaded in 0.14 s (39.22 MB/s)
45 00:39:46.931248 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:39:46.932170 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:39:46.932473 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:39:46.932743 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:39:46.933223 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kernel/Image
51 00:39:46.933472 saving as /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/kernel/Image
52 00:39:46.933681 total size: 37878272 (36 MB)
53 00:39:46.933892 No compression specified
54 00:39:46.969061 progress 0 % (0 MB)
55 00:39:46.993010 progress 5 % (1 MB)
56 00:39:47.017894 progress 10 % (3 MB)
57 00:39:47.044914 progress 15 % (5 MB)
58 00:39:47.069752 progress 20 % (7 MB)
59 00:39:47.093723 progress 25 % (9 MB)
60 00:39:47.118022 progress 30 % (10 MB)
61 00:39:47.142585 progress 35 % (12 MB)
62 00:39:47.167642 progress 40 % (14 MB)
63 00:39:47.192551 progress 45 % (16 MB)
64 00:39:47.216345 progress 50 % (18 MB)
65 00:39:47.240652 progress 55 % (19 MB)
66 00:39:47.264959 progress 60 % (21 MB)
67 00:39:47.288922 progress 65 % (23 MB)
68 00:39:47.313739 progress 70 % (25 MB)
69 00:39:47.337911 progress 75 % (27 MB)
70 00:39:47.362362 progress 80 % (28 MB)
71 00:39:47.387119 progress 85 % (30 MB)
72 00:39:47.411778 progress 90 % (32 MB)
73 00:39:47.436081 progress 95 % (34 MB)
74 00:39:47.459769 progress 100 % (36 MB)
75 00:39:47.460629 36 MB downloaded in 0.53 s (68.55 MB/s)
76 00:39:47.461128 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:39:47.461958 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:39:47.462238 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:39:47.462509 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:39:47.463019 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:39:47.463306 saving as /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:39:47.463518 total size: 53209 (0 MB)
84 00:39:47.463733 No compression specified
85 00:39:47.498160 progress 61 % (0 MB)
86 00:39:47.499123 progress 100 % (0 MB)
87 00:39:47.499765 0 MB downloaded in 0.04 s (1.40 MB/s)
88 00:39:47.500330 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:39:47.501166 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:39:47.501502 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:39:47.501843 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:39:47.502376 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:39:47.502678 saving as /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/nfsrootfs/full.rootfs.tar
95 00:39:47.502903 total size: 120894716 (115 MB)
96 00:39:47.503154 Using unxz to decompress xz
97 00:39:47.545039 progress 0 % (0 MB)
98 00:39:48.375097 progress 5 % (5 MB)
99 00:39:49.227186 progress 10 % (11 MB)
100 00:39:50.041267 progress 15 % (17 MB)
101 00:39:50.899042 progress 20 % (23 MB)
102 00:39:51.553727 progress 25 % (28 MB)
103 00:39:52.529938 progress 30 % (34 MB)
104 00:39:53.462863 progress 35 % (40 MB)
105 00:39:53.882807 progress 40 % (46 MB)
106 00:39:54.335577 progress 45 % (51 MB)
107 00:39:55.192315 progress 50 % (57 MB)
108 00:39:56.270656 progress 55 % (63 MB)
109 00:39:57.192459 progress 60 % (69 MB)
110 00:39:58.079142 progress 65 % (74 MB)
111 00:39:58.850094 progress 70 % (80 MB)
112 00:39:59.675130 progress 75 % (86 MB)
113 00:40:00.468621 progress 80 % (92 MB)
114 00:40:01.320947 progress 85 % (98 MB)
115 00:40:02.301114 progress 90 % (103 MB)
116 00:40:03.128061 progress 95 % (109 MB)
117 00:40:03.956141 progress 100 % (115 MB)
118 00:40:03.968541 115 MB downloaded in 16.47 s (7.00 MB/s)
119 00:40:03.969429 end: 1.4.1 http-download (duration 00:00:16) [common]
121 00:40:03.971047 end: 1.4 download-retry (duration 00:00:16) [common]
122 00:40:03.971578 start: 1.5 download-retry (timeout 00:09:43) [common]
123 00:40:03.972150 start: 1.5.1 http-download (timeout 00:09:43) [common]
124 00:40:03.972967 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/modules.tar.xz
125 00:40:03.973431 saving as /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/modules/modules.tar
126 00:40:03.973847 total size: 11755844 (11 MB)
127 00:40:03.974271 Using unxz to decompress xz
128 00:40:04.022572 progress 0 % (0 MB)
129 00:40:04.090102 progress 5 % (0 MB)
130 00:40:04.165682 progress 10 % (1 MB)
131 00:40:04.246266 progress 15 % (1 MB)
132 00:40:04.326737 progress 20 % (2 MB)
133 00:40:04.403609 progress 25 % (2 MB)
134 00:40:04.484038 progress 30 % (3 MB)
135 00:40:04.560560 progress 35 % (3 MB)
136 00:40:04.641607 progress 40 % (4 MB)
137 00:40:04.726663 progress 45 % (5 MB)
138 00:40:04.807963 progress 50 % (5 MB)
139 00:40:04.891310 progress 55 % (6 MB)
140 00:40:04.973386 progress 60 % (6 MB)
141 00:40:05.059538 progress 65 % (7 MB)
142 00:40:05.141675 progress 70 % (7 MB)
143 00:40:05.223384 progress 75 % (8 MB)
144 00:40:05.306642 progress 80 % (9 MB)
145 00:40:05.382124 progress 85 % (9 MB)
146 00:40:05.455317 progress 90 % (10 MB)
147 00:40:05.553015 progress 95 % (10 MB)
148 00:40:05.649624 progress 100 % (11 MB)
149 00:40:05.663053 11 MB downloaded in 1.69 s (6.64 MB/s)
150 00:40:05.663637 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:40:05.665285 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:40:05.665836 start: 1.6 prepare-tftp-overlay (timeout 00:09:41) [common]
154 00:40:05.666357 start: 1.6.1 extract-nfsrootfs (timeout 00:09:41) [common]
155 00:40:22.383688 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/915244/extract-nfsrootfs-73imeie0
156 00:40:22.384302 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:40:22.384592 start: 1.6.2 lava-overlay (timeout 00:09:24) [common]
158 00:40:22.385256 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9
159 00:40:22.385723 makedir: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin
160 00:40:22.386065 makedir: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/tests
161 00:40:22.386390 makedir: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/results
162 00:40:22.386728 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-add-keys
163 00:40:22.387257 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-add-sources
164 00:40:22.387765 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-background-process-start
165 00:40:22.388329 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-background-process-stop
166 00:40:22.388879 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-common-functions
167 00:40:22.389382 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-echo-ipv4
168 00:40:22.389871 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-install-packages
169 00:40:22.390355 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-installed-packages
170 00:40:22.390832 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-os-build
171 00:40:22.391310 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-probe-channel
172 00:40:22.391800 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-probe-ip
173 00:40:22.392326 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-target-ip
174 00:40:22.392808 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-target-mac
175 00:40:22.393298 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-target-storage
176 00:40:22.393788 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-case
177 00:40:22.394273 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-event
178 00:40:22.394754 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-feedback
179 00:40:22.395233 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-raise
180 00:40:22.395713 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-reference
181 00:40:22.396228 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-runner
182 00:40:22.396723 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-set
183 00:40:22.397217 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-test-shell
184 00:40:22.397785 Updating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-add-keys (debian)
185 00:40:22.398348 Updating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-add-sources (debian)
186 00:40:22.398876 Updating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-install-packages (debian)
187 00:40:22.399374 Updating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-installed-packages (debian)
188 00:40:22.399866 Updating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/bin/lava-os-build (debian)
189 00:40:22.400335 Creating /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/environment
190 00:40:22.400718 LAVA metadata
191 00:40:22.400982 - LAVA_JOB_ID=915244
192 00:40:22.401197 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:40:22.401568 start: 1.6.2.1 ssh-authorize (timeout 00:09:24) [common]
194 00:40:22.402543 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:40:22.402858 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:24) [common]
196 00:40:22.403064 skipped lava-vland-overlay
197 00:40:22.403303 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:40:22.403555 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:24) [common]
199 00:40:22.403768 skipped lava-multinode-overlay
200 00:40:22.404076 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:40:22.404338 start: 1.6.2.4 test-definition (timeout 00:09:24) [common]
202 00:40:22.404588 Loading test definitions
203 00:40:22.404862 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:24) [common]
204 00:40:22.405081 Using /lava-915244 at stage 0
205 00:40:22.406274 uuid=915244_1.6.2.4.1 testdef=None
206 00:40:22.406586 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:40:22.406850 start: 1.6.2.4.2 test-overlay (timeout 00:09:24) [common]
208 00:40:22.408515 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:40:22.409307 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:24) [common]
211 00:40:22.411289 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:40:22.412140 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:24) [common]
214 00:40:22.414001 runner path: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/0/tests/0_timesync-off test_uuid 915244_1.6.2.4.1
215 00:40:22.414550 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:40:22.415353 start: 1.6.2.4.5 git-repo-action (timeout 00:09:24) [common]
218 00:40:22.415574 Using /lava-915244 at stage 0
219 00:40:22.415924 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:40:22.416241 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/0/tests/1_kselftest-alsa'
221 00:40:25.757969 Running '/usr/bin/git checkout kernelci.org
222 00:40:26.210573 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 00:40:26.212222 uuid=915244_1.6.2.4.5 testdef=None
224 00:40:26.212884 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:40:26.214426 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 00:40:26.220062 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:40:26.221697 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 00:40:26.229357 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:40:26.231107 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 00:40:26.238387 runner path: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/0/tests/1_kselftest-alsa test_uuid 915244_1.6.2.4.5
234 00:40:26.238967 BOARD='meson-sm1-s905d3-libretech-cc'
235 00:40:26.239376 BRANCH='mainline'
236 00:40:26.239767 SKIPFILE='/dev/null'
237 00:40:26.240199 SKIP_INSTALL='True'
238 00:40:26.240590 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:40:26.240988 TST_CASENAME=''
240 00:40:26.241376 TST_CMDFILES='alsa'
241 00:40:26.242508 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:40:26.244138 Creating lava-test-runner.conf files
244 00:40:26.244554 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/915244/lava-overlay-93_8w1l9/lava-915244/0 for stage 0
245 00:40:26.245242 - 0_timesync-off
246 00:40:26.245707 - 1_kselftest-alsa
247 00:40:26.246369 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:40:26.246939 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 00:40:49.633979 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:40:49.634451 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:57) [common]
251 00:40:49.634757 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:40:49.635078 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:40:49.635383 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:57) [common]
254 00:40:50.249701 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:40:50.250194 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 00:40:50.250465 extracting modules file /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915244/extract-nfsrootfs-73imeie0
257 00:40:51.692565 extracting modules file /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk
258 00:40:53.131579 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:40:53.132109 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 00:40:53.132397 [common] Applying overlay to NFS
261 00:40:53.132619 [common] Applying overlay /var/lib/lava/dispatcher/tmp/915244/compress-overlay-ir67kqf_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/915244/extract-nfsrootfs-73imeie0
262 00:40:55.873294 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:40:55.873768 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 00:40:55.874041 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 00:40:55.874270 Converting downloaded kernel to a uImage
266 00:40:55.874577 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/kernel/Image /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/kernel/uImage
267 00:40:56.336909 output: Image Name:
268 00:40:56.337336 output: Created: Thu Oct 31 00:40:55 2024
269 00:40:56.337546 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:40:56.337749 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:40:56.337949 output: Load Address: 01080000
272 00:40:56.338149 output: Entry Point: 01080000
273 00:40:56.338347 output:
274 00:40:56.338688 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:40:56.338961 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:40:56.339235 start: 1.6.7 configure-preseed-file (timeout 00:08:50) [common]
277 00:40:56.339496 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:40:56.339759 start: 1.6.8 compress-ramdisk (timeout 00:08:50) [common]
279 00:40:56.340095 Building ramdisk /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk
280 00:40:58.600306 >> 173421 blocks
281 00:41:06.351601 Adding RAMdisk u-boot header.
282 00:41:06.352165 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk.cpio.gz.uboot
283 00:41:06.607065 output: Image Name:
284 00:41:06.607745 output: Created: Thu Oct 31 00:41:06 2024
285 00:41:06.608272 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:41:06.608728 output: Data Size: 24150709 Bytes = 23584.68 KiB = 23.03 MiB
287 00:41:06.609176 output: Load Address: 00000000
288 00:41:06.609612 output: Entry Point: 00000000
289 00:41:06.610047 output:
290 00:41:06.611089 rename /var/lib/lava/dispatcher/tmp/915244/extract-overlay-ramdisk-ol0zlisf/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
291 00:41:06.611864 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:41:06.612643 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 00:41:06.613225 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:40) [common]
294 00:41:06.613721 No LXC device requested
295 00:41:06.614269 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:41:06.614830 start: 1.8 deploy-device-env (timeout 00:08:40) [common]
297 00:41:06.615376 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:41:06.615830 Checking files for TFTP limit of 4294967296 bytes.
299 00:41:06.618766 end: 1 tftp-deploy (duration 00:01:20) [common]
300 00:41:06.619409 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:41:06.620020 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:41:06.620579 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:41:06.621134 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:41:06.621712 Using kernel file from prepare-kernel: 915244/tftp-deploy-snk9z_bt/kernel/uImage
305 00:41:06.622401 substitutions:
306 00:41:06.622856 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:41:06.623299 - {DTB_ADDR}: 0x01070000
308 00:41:06.623738 - {DTB}: 915244/tftp-deploy-snk9z_bt/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 00:41:06.624222 - {INITRD}: 915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
310 00:41:06.624667 - {KERNEL_ADDR}: 0x01080000
311 00:41:06.625100 - {KERNEL}: 915244/tftp-deploy-snk9z_bt/kernel/uImage
312 00:41:06.625534 - {LAVA_MAC}: None
313 00:41:06.626009 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/915244/extract-nfsrootfs-73imeie0
314 00:41:06.626449 - {NFS_SERVER_IP}: 192.168.6.2
315 00:41:06.626876 - {PRESEED_CONFIG}: None
316 00:41:06.627300 - {PRESEED_LOCAL}: None
317 00:41:06.627731 - {RAMDISK_ADDR}: 0x08000000
318 00:41:06.628215 - {RAMDISK}: 915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
319 00:41:06.628650 - {ROOT_PART}: None
320 00:41:06.629072 - {ROOT}: None
321 00:41:06.629492 - {SERVER_IP}: 192.168.6.2
322 00:41:06.629911 - {TEE_ADDR}: 0x83000000
323 00:41:06.630332 - {TEE}: None
324 00:41:06.630754 Parsed boot commands:
325 00:41:06.631167 - setenv autoload no
326 00:41:06.631589 - setenv initrd_high 0xffffffff
327 00:41:06.632041 - setenv fdt_high 0xffffffff
328 00:41:06.632474 - dhcp
329 00:41:06.632896 - setenv serverip 192.168.6.2
330 00:41:06.633321 - tftpboot 0x01080000 915244/tftp-deploy-snk9z_bt/kernel/uImage
331 00:41:06.633746 - tftpboot 0x08000000 915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
332 00:41:06.634172 - tftpboot 0x01070000 915244/tftp-deploy-snk9z_bt/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 00:41:06.634596 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/915244/extract-nfsrootfs-73imeie0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:41:06.635036 - bootm 0x01080000 0x08000000 0x01070000
335 00:41:06.635598 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:41:06.637259 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:41:06.637716 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 00:41:06.651970 Setting prompt string to ['lava-test: # ']
340 00:41:06.653892 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:41:06.654616 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:41:06.655305 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:41:06.655901 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:41:06.657300 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 00:41:06.693006 >> OK - accepted request
346 00:41:06.695146 Returned 0 in 0 seconds
347 00:41:06.796124 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:41:06.798011 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:41:06.798642 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:41:06.799219 Setting prompt string to ['Hit any key to stop autoboot']
352 00:41:06.799724 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:41:06.801565 Trying 192.168.56.21...
354 00:41:06.802126 Connected to conserv1.
355 00:41:06.802589 Escape character is '^]'.
356 00:41:06.803063
357 00:41:06.803537 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:41:06.804033
359 00:41:14.048273 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 00:41:14.048953 bl2_stage_init 0x01
361 00:41:14.049461 bl2_stage_init 0x81
362 00:41:14.053663 hw id: 0x0000 - pwm id 0x01
363 00:41:14.053977 bl2_stage_init 0xc1
364 00:41:14.059188 bl2_stage_init 0x02
365 00:41:14.059748
366 00:41:14.060254 L0:00000000
367 00:41:14.060690 L1:00000703
368 00:41:14.061117 L2:00008067
369 00:41:14.061529 L3:15000000
370 00:41:14.064786 S1:00000000
371 00:41:14.065273 B2:20282000
372 00:41:14.065697 B1:a0f83180
373 00:41:14.066099
374 00:41:14.066501 TE: 70279
375 00:41:14.066902
376 00:41:14.070436 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 00:41:14.070903
378 00:41:14.076095 Board ID = 1
379 00:41:14.076568 Set cpu clk to 24M
380 00:41:14.076981 Set clk81 to 24M
381 00:41:14.081609 Use GP1_pll as DSU clk.
382 00:41:14.082111 DSU clk: 1200 Mhz
383 00:41:14.082590 CPU clk: 1200 MHz
384 00:41:14.087195 Set clk81 to 166.6M
385 00:41:14.092940 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 00:41:14.093455 board id: 1
387 00:41:14.099197 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:41:14.110875 fw parse done
389 00:41:14.116773 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:41:14.159881 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:41:14.171105 PIEI prepare done
392 00:41:14.171484 fastboot data load
393 00:41:14.171730 fastboot data verify
394 00:41:14.176682 verify result: 266
395 00:41:14.182296 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 00:41:14.182960 LPDDR4 probe
397 00:41:14.183223 ddr clk to 1584MHz
398 00:41:14.190281 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:41:14.228033
400 00:41:14.228430 dmc_version 0001
401 00:41:14.235058 Check phy result
402 00:41:14.241164 INFO : End of CA training
403 00:41:14.241564 INFO : End of initialization
404 00:41:14.246559 INFO : Training has run successfully!
405 00:41:14.247117 Check phy result
406 00:41:14.252128 INFO : End of initialization
407 00:41:14.252683 INFO : End of read enable training
408 00:41:14.257680 INFO : End of fine write leveling
409 00:41:14.263371 INFO : End of Write leveling coarse delay
410 00:41:14.263759 INFO : Training has run successfully!
411 00:41:14.264007 Check phy result
412 00:41:14.269029 INFO : End of initialization
413 00:41:14.269347 INFO : End of read dq deskew training
414 00:41:14.274510 INFO : End of MPR read delay center optimization
415 00:41:14.280144 INFO : End of write delay center optimization
416 00:41:14.285765 INFO : End of read delay center optimization
417 00:41:14.286115 INFO : End of max read latency training
418 00:41:14.291434 INFO : Training has run successfully!
419 00:41:14.291767 1D training succeed
420 00:41:14.300500 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:41:14.348890 Check phy result
422 00:41:14.349304 INFO : End of initialization
423 00:41:14.376310 INFO : End of 2D read delay Voltage center optimization
424 00:41:14.399501 INFO : End of 2D read delay Voltage center optimization
425 00:41:14.456067 INFO : End of 2D write delay Voltage center optimization
426 00:41:14.511150 INFO : End of 2D write delay Voltage center optimization
427 00:41:14.516560 INFO : Training has run successfully!
428 00:41:14.516925
429 00:41:14.517143 channel==0
430 00:41:14.522182 RxClkDly_Margin_A0==88 ps 9
431 00:41:14.522494 TxDqDly_Margin_A0==88 ps 9
432 00:41:14.527799 RxClkDly_Margin_A1==78 ps 8
433 00:41:14.528146 TxDqDly_Margin_A1==88 ps 9
434 00:41:14.528365 TrainedVREFDQ_A0==74
435 00:41:14.533475 TrainedVREFDQ_A1==74
436 00:41:14.533789 VrefDac_Margin_A0==24
437 00:41:14.534016 DeviceVref_Margin_A0==40
438 00:41:14.539008 VrefDac_Margin_A1==23
439 00:41:14.539323 DeviceVref_Margin_A1==40
440 00:41:14.539541
441 00:41:14.539749
442 00:41:14.539959 channel==1
443 00:41:14.544569 RxClkDly_Margin_A0==78 ps 8
444 00:41:14.544860 TxDqDly_Margin_A0==98 ps 10
445 00:41:14.550163 RxClkDly_Margin_A1==88 ps 9
446 00:41:14.550454 TxDqDly_Margin_A1==88 ps 9
447 00:41:14.555758 TrainedVREFDQ_A0==78
448 00:41:14.556083 TrainedVREFDQ_A1==75
449 00:41:14.556310 VrefDac_Margin_A0==23
450 00:41:14.561401 DeviceVref_Margin_A0==36
451 00:41:14.561679 VrefDac_Margin_A1==22
452 00:41:14.561897 DeviceVref_Margin_A1==39
453 00:41:14.566960
454 00:41:14.567254 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:41:14.567473
456 00:41:14.600627 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000015 00000018 00000015 00000016 00000017 00000018 0000001a 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
457 00:41:14.601061 2D training succeed
458 00:41:14.606223 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:41:14.611901 auto size-- 65535DDR cs0 size: 2048MB
460 00:41:14.612482 DDR cs1 size: 2048MB
461 00:41:14.617546 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:41:14.617901 cs0 DataBus test pass
463 00:41:14.623129 cs1 DataBus test pass
464 00:41:14.623502 cs0 AddrBus test pass
465 00:41:14.623719 cs1 AddrBus test pass
466 00:41:14.623926
467 00:41:14.628693 100bdlr_step_size ps== 471
468 00:41:14.629089 result report
469 00:41:14.634394 boot times 0Enable ddr reg access
470 00:41:14.638507 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:41:14.653241 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 00:41:15.311685 bl2z: ptr: 05129330, size: 00001e40
473 00:41:15.318937 0.0;M3 CHK:0;cm4_sp_mode 0
474 00:41:15.319394 MVN_1=0x00000000
475 00:41:15.319788 MVN_2=0x00000000
476 00:41:15.330496 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 00:41:15.330951 OPS=0x04
478 00:41:15.331351 ring efuse init
479 00:41:15.336040 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 00:41:15.336502 [0.017355 Inits done]
481 00:41:15.336898 secure task start!
482 00:41:15.343691 high task start!
483 00:41:15.344177 low task start!
484 00:41:15.344575 run into bl31
485 00:41:15.352301 NOTICE: BL31: v1.3(release):4fc40b1
486 00:41:15.360113 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 00:41:15.360559 NOTICE: BL31: G12A normal boot!
488 00:41:15.375666 NOTICE: BL31: BL33 decompress pass
489 00:41:15.381306 ERROR: Error initializing runtime service opteed_fast
490 00:41:16.596812 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 00:41:16.597199 bl2_stage_init 0x01
492 00:41:16.597421 bl2_stage_init 0x81
493 00:41:16.602365 hw id: 0x0000 - pwm id 0x01
494 00:41:16.602672 bl2_stage_init 0xc1
495 00:41:16.607473 bl2_stage_init 0x02
496 00:41:16.607782
497 00:41:16.608048 L0:00000000
498 00:41:16.608280 L1:00000703
499 00:41:16.608494 L2:00008067
500 00:41:16.613019 L3:15000000
501 00:41:16.613308 S1:00000000
502 00:41:16.613534 B2:20282000
503 00:41:16.613751 B1:a0f83180
504 00:41:16.613968
505 00:41:16.614183 TE: 69000
506 00:41:16.614387
507 00:41:16.624350 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 00:41:16.624666
509 00:41:16.624888 Board ID = 1
510 00:41:16.625099 Set cpu clk to 24M
511 00:41:16.625304 Set clk81 to 24M
512 00:41:16.627710 Use GP1_pll as DSU clk.
513 00:41:16.628008 DSU clk: 1200 Mhz
514 00:41:16.633305 CPU clk: 1200 MHz
515 00:41:16.633602 Set clk81 to 166.6M
516 00:41:16.638812 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 00:41:16.639104 board id: 1
518 00:41:16.648732 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 00:41:16.659675 fw parse done
520 00:41:16.665755 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 00:41:16.707910 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 00:41:16.719957 PIEI prepare done
523 00:41:16.720292 fastboot data load
524 00:41:16.720511 fastboot data verify
525 00:41:16.725495 verify result: 266
526 00:41:16.731118 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 00:41:16.731405 LPDDR4 probe
528 00:41:16.731613 ddr clk to 1584MHz
529 00:41:18.096810 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, pa SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 00:41:18.097424 bl2_stage_init 0x01
531 00:41:18.097868 bl2_stage_init 0x81
532 00:41:18.102364 hw id: 0x0000 - pwm id 0x01
533 00:41:18.102927 bl2_stage_init 0xc1
534 00:41:18.108019 bl2_stage_init 0x02
535 00:41:18.108582
536 00:41:18.108981 L0:00000000
537 00:41:18.109371 L1:00000703
538 00:41:18.109757 L2:00008067
539 00:41:18.110146 L3:15000000
540 00:41:18.113525 S1:00000000
541 00:41:18.113966 B2:20282000
542 00:41:18.114353 B1:a0f83180
543 00:41:18.114740
544 00:41:18.115127 TE: 68428
545 00:41:18.115511
546 00:41:18.119153 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 00:41:18.119591
548 00:41:18.124719 Board ID = 1
549 00:41:18.125151 Set cpu clk to 24M
550 00:41:18.125539 Set clk81 to 24M
551 00:41:18.130314 Use GP1_pll as DSU clk.
552 00:41:18.130735 DSU clk: 1200 Mhz
553 00:41:18.131120 CPU clk: 1200 MHz
554 00:41:18.135933 Set clk81 to 166.6M
555 00:41:18.141514 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 00:41:18.141948 board id: 1
557 00:41:18.148746 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 00:41:18.159675 fw parse done
559 00:41:18.165588 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 00:41:18.207852 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 00:41:18.220020 PIEI prepare done
562 00:41:18.220373 fastboot data load
563 00:41:18.220595 fastboot data verify
564 00:41:18.225488 verify result: 266
565 00:41:18.231060 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 00:41:18.231366 LPDDR4 probe
567 00:41:18.231581 ddr clk to 1584MHz
568 00:41:18.239110 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 00:41:18.275909
570 00:41:18.276298 dmc_version 0001
571 00:41:18.282822 Check phy result
572 00:41:18.289766 INFO : End of CA training
573 00:41:18.290089 INFO : End of initialization
574 00:41:18.295529 INFO : Training has run successfully!
575 00:41:18.295861 Check phy result
576 00:41:18.300912 INFO : End of initialization
577 00:41:18.301204 INFO : End of read enable training
578 00:41:18.306531 INFO : End of fine write leveling
579 00:41:18.312136 INFO : End of Write leveling coarse delay
580 00:41:18.312454 INFO : Training has run successfully!
581 00:41:18.312677 Check phy result
582 00:41:18.317764 INFO : End of initialization
583 00:41:18.318107 INFO : End of read dq deskew training
584 00:41:18.323404 INFO : End of MPR read delay center optimization
585 00:41:18.328980 INFO : End of write delay center optimization
586 00:41:18.334656 INFO : End of read delay center optimization
587 00:41:18.335167 INFO : End of max read latency training
588 00:41:18.340170 INFO : Training has run successfully!
589 00:41:18.340672 1D training succeed
590 00:41:18.348362 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 00:41:18.397787 Check phy result
592 00:41:18.398344 INFO : End of initialization
593 00:41:18.425109 INFO : End of 2D read delay Voltage center optimization
594 00:41:18.449181 INFO : End of 2D read delay Voltage center optimization
595 00:41:18.505902 INFO : End of 2D write delay Voltage center optimization
596 00:41:18.559923 INFO : End of 2D write delay Voltage center optimization
597 00:41:18.565436 INFO : Training has run successfully!
598 00:41:18.565944
599 00:41:18.566409 channel==0
600 00:41:18.571054 RxClkDly_Margin_A0==78 ps 8
601 00:41:18.571546 TxDqDly_Margin_A0==98 ps 10
602 00:41:18.576630 RxClkDly_Margin_A1==78 ps 8
603 00:41:18.577135 TxDqDly_Margin_A1==88 ps 9
604 00:41:18.577595 TrainedVREFDQ_A0==74
605 00:41:18.582248 TrainedVREFDQ_A1==74
606 00:41:18.582760 VrefDac_Margin_A0==23
607 00:41:18.583214 DeviceVref_Margin_A0==40
608 00:41:18.587816 VrefDac_Margin_A1==23
609 00:41:18.588348 DeviceVref_Margin_A1==40
610 00:41:18.588805
611 00:41:18.589252
612 00:41:18.589691 channel==1
613 00:41:18.593442 RxClkDly_Margin_A0==78 ps 8
614 00:41:18.593945 TxDqDly_Margin_A0==98 ps 10
615 00:41:18.599041 RxClkDly_Margin_A1==78 ps 8
616 00:41:18.599538 TxDqDly_Margin_A1==88 ps 9
617 00:41:18.604625 TrainedVREFDQ_A0==78
618 00:41:18.605127 TrainedVREFDQ_A1==77
619 00:41:18.605588 VrefDac_Margin_A0==22
620 00:41:18.610282 DeviceVref_Margin_A0==36
621 00:41:18.610787 VrefDac_Margin_A1==20
622 00:41:18.615825 DeviceVref_Margin_A1==37
623 00:41:18.616355
624 00:41:18.616817 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 00:41:18.617263
626 00:41:18.649429 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 00:41:18.649991 2D training succeed
628 00:41:18.655060 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 00:41:18.660627 auto size-- 65535DDR cs0 size: 2048MB
630 00:41:18.661143 DDR cs1 size: 2048MB
631 00:41:18.666212 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 00:41:18.666707 cs0 DataBus test pass
633 00:41:18.671821 cs1 DataBus test pass
634 00:41:18.672357 cs0 AddrBus test pass
635 00:41:18.672810 cs1 AddrBus test pass
636 00:41:18.673251
637 00:41:18.677440 100bdlr_step_size ps== 471
638 00:41:18.677961 result report
639 00:41:18.683028 boot times 0Enable ddr reg access
640 00:41:18.687317 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 00:41:18.702093 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 00:41:19.360741 bl2z: ptr: 05129330, size: 00001e40
643 00:41:19.371798 0.0;M3 CHK:0;cm4_sp_mode 0
644 00:41:19.372377 MVN_1=0x00000000
645 00:41:19.372841 MVN_2=0x00000000
646 00:41:19.383278 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 00:41:19.383795 OPS=0x04
648 00:41:19.384297 ring efuse init
649 00:41:19.386405 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 00:41:19.392773 [0.017354 Inits done]
651 00:41:19.393261 secure task start!
652 00:41:19.393710 high task start!
653 00:41:19.394150 low task start!
654 00:41:19.395890 run into bl31
655 00:41:19.405519 NOTICE: BL31: v1.3(release):4fc40b1
656 00:41:19.412569 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 00:41:19.413102 NOTICE: BL31: G12A normal boot!
658 00:41:19.428634 NOTICE: BL31: BL33 decompress pass
659 00:41:19.433330 ERROR: Error initializing runtime service opteed_fast
660 00:41:20.647879 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 00:41:20.648551 bl2_stage_init 0x01
662 00:41:20.649012 bl2_stage_init 0x81
663 00:41:20.653510 hw id: 0x0000 - pwm id 0x01
664 00:41:20.653997 bl2_stage_init 0xc1
665 00:41:20.654446 bl2_stage_init 0x02
666 00:41:20.654894
667 00:41:20.659080 L0:00000000
668 00:41:20.659559 L1:00000703
669 00:41:20.660034 L2:00008067
670 00:41:20.660478 L3:15000000
671 00:41:20.660911 S1:00000000
672 00:41:20.661688 B2:20282000
673 00:41:20.665985 B1:a0f83180
674 00:41:20.666457
675 00:41:20.666905 TE: 69141
676 00:41:20.667351
677 00:41:20.671596 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 00:41:20.672106
679 00:41:20.672555 Board ID = 1
680 00:41:20.677273 Set cpu clk to 24M
681 00:41:20.677745 Set clk81 to 24M
682 00:41:20.678188 Use GP1_pll as DSU clk.
683 00:41:20.680659 DSU clk: 1200 Mhz
684 00:41:20.681133 CPU clk: 1200 MHz
685 00:41:20.686255 Set clk81 to 166.6M
686 00:41:20.691820 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 00:41:20.692323 board id: 1
688 00:41:20.698069 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 00:41:20.709900 fw parse done
690 00:41:20.714922 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 00:41:20.758149 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:41:20.770208 PIEI prepare done
693 00:41:20.770691 fastboot data load
694 00:41:20.771143 fastboot data verify
695 00:41:20.775833 verify result: 266
696 00:41:20.781535 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 00:41:20.782034 LPDDR4 probe
698 00:41:20.782488 ddr clk to 1584MHz
699 00:41:20.788616 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 00:41:20.826218
701 00:41:20.826736 dmc_version 0001
702 00:41:20.833118 Check phy result
703 00:41:20.840141 INFO : End of CA training
704 00:41:20.840621 INFO : End of initialization
705 00:41:20.845656 INFO : Training has run successfully!
706 00:41:20.846128 Check phy result
707 00:41:20.851327 INFO : End of initialization
708 00:41:20.851802 INFO : End of read enable training
709 00:41:20.854556 INFO : End of fine write leveling
710 00:41:20.860163 INFO : End of Write leveling coarse delay
711 00:41:20.865715 INFO : Training has run successfully!
712 00:41:20.866186 Check phy result
713 00:41:20.866628 INFO : End of initialization
714 00:41:20.871365 INFO : End of read dq deskew training
715 00:41:20.874674 INFO : End of MPR read delay center optimization
716 00:41:20.880368 INFO : End of write delay center optimization
717 00:41:20.885803 INFO : End of read delay center optimization
718 00:41:20.886279 INFO : End of max read latency training
719 00:41:20.891450 INFO : Training has run successfully!
720 00:41:20.891931 1D training succeed
721 00:41:20.898655 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 00:41:20.947053 Check phy result
723 00:41:20.947543 INFO : End of initialization
724 00:41:20.974378 INFO : End of 2D read delay Voltage center optimization
725 00:41:20.998604 INFO : End of 2D read delay Voltage center optimization
726 00:41:21.056230 INFO : End of 2D write delay Voltage center optimization
727 00:41:21.110212 INFO : End of 2D write delay Voltage center optimization
728 00:41:21.115718 INFO : Training has run successfully!
729 00:41:21.116242
730 00:41:21.116701 channel==0
731 00:41:21.121436 RxClkDly_Margin_A0==78 ps 8
732 00:41:21.121922 TxDqDly_Margin_A0==98 ps 10
733 00:41:21.126878 RxClkDly_Margin_A1==88 ps 9
734 00:41:21.127358 TxDqDly_Margin_A1==98 ps 10
735 00:41:21.127808 TrainedVREFDQ_A0==74
736 00:41:21.132474 TrainedVREFDQ_A1==75
737 00:41:21.132951 VrefDac_Margin_A0==23
738 00:41:21.133392 DeviceVref_Margin_A0==40
739 00:41:21.138062 VrefDac_Margin_A1==23
740 00:41:21.138540 DeviceVref_Margin_A1==39
741 00:41:21.138984
742 00:41:21.139423
743 00:41:21.143676 channel==1
744 00:41:21.144180 RxClkDly_Margin_A0==88 ps 9
745 00:41:21.144624 TxDqDly_Margin_A0==98 ps 10
746 00:41:21.149400 RxClkDly_Margin_A1==78 ps 8
747 00:41:21.149874 TxDqDly_Margin_A1==88 ps 9
748 00:41:21.154866 TrainedVREFDQ_A0==78
749 00:41:21.155357 TrainedVREFDQ_A1==75
750 00:41:21.155810 VrefDac_Margin_A0==22
751 00:41:21.160465 DeviceVref_Margin_A0==36
752 00:41:21.160939 VrefDac_Margin_A1==22
753 00:41:21.166059 DeviceVref_Margin_A1==39
754 00:41:21.166544
755 00:41:21.166989 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 00:41:21.167427
757 00:41:21.199669 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
758 00:41:21.200229 2D training succeed
759 00:41:21.205389 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 00:41:21.210881 auto size-- 65535DDR cs0 size: 2048MB
761 00:41:21.211365 DDR cs1 size: 2048MB
762 00:41:21.216435 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 00:41:21.216917 cs0 DataBus test pass
764 00:41:21.222133 cs1 DataBus test pass
765 00:41:21.222612 cs0 AddrBus test pass
766 00:41:21.223058 cs1 AddrBus test pass
767 00:41:21.223496
768 00:41:21.227736 100bdlr_step_size ps== 478
769 00:41:21.228275 result report
770 00:41:21.233389 boot times 0Enable ddr reg access
771 00:41:21.238024 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 00:41:21.252476 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 00:41:21.911486 bl2z: ptr: 05129330, size: 00001e40
774 00:41:21.919607 0.0;M3 CHK:0;cm4_sp_mode 0
775 00:41:21.920174 MVN_1=0x00000000
776 00:41:21.920645 MVN_2=0x00000000
777 00:41:21.931033 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 00:41:21.931545 OPS=0x04
779 00:41:21.932037 ring efuse init
780 00:41:21.933945 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 00:41:21.940232 [0.017355 Inits done]
782 00:41:21.940717 secure task start!
783 00:41:21.941169 high task start!
784 00:41:21.941612 low task start!
785 00:41:21.944684 run into bl31
786 00:41:21.953371 NOTICE: BL31: v1.3(release):4fc40b1
787 00:41:21.961211 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 00:41:21.961750 NOTICE: BL31: G12A normal boot!
789 00:41:21.976663 NOTICE: BL31: BL33 decompress pass
790 00:41:21.982354 ERROR: Error initializing runtime service opteed_fast
791 00:41:22.777853
792 00:41:22.778496
793 00:41:22.783128 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 00:41:22.783629
795 00:41:22.785742 Model: Libre Computer AML-S905D3-CC Solitude
796 00:41:22.933644 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 00:41:22.948100 DRAM: 2 GiB (effective 3.8 GiB)
798 00:41:23.049955 Core: 406 devices, 33 uclasses, devicetree: separate
799 00:41:23.055875 WDT: Not starting watchdog@f0d0
800 00:41:23.080907 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 00:41:23.093159 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 00:41:23.098129 ** Bad device specification mmc 0 **
803 00:41:23.108307 Card did not respond to voltage select! : -110
804 00:41:23.115879 ** Bad device specification mmc 0 **
805 00:41:23.116428 Couldn't find partition mmc 0
806 00:41:23.124164 Card did not respond to voltage select! : -110
807 00:41:23.129632 ** Bad device specification mmc 0 **
808 00:41:23.130099 Couldn't find partition mmc 0
809 00:41:23.134767 Error: could not access storage.
810 00:41:23.431270 Net: eth0: ethernet@ff3f0000
811 00:41:23.431892 starting USB...
812 00:41:23.676906 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 00:41:23.677457 Starting the controller
814 00:41:23.683863 USB XHCI 1.10
815 00:41:25.239059 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 00:41:25.247188 scanning usb for storage devices... 0 Storage Device(s) found
818 00:41:25.298815 Hit any key to stop autoboot: 1
819 00:41:25.299683 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 00:41:25.300370 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 00:41:25.300887 Setting prompt string to ['=>']
822 00:41:25.301425 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 00:41:25.312533 0
824 00:41:25.313488 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 00:41:25.414753 => setenv autoload no
827 00:41:25.415428 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 00:41:25.420896 setenv autoload no
830 00:41:25.522515 => setenv initrd_high 0xffffffff
831 00:41:25.523083 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 00:41:25.527423 setenv initrd_high 0xffffffff
834 00:41:25.628547 => setenv fdt_high 0xffffffff
835 00:41:25.629355 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 00:41:25.633007 setenv fdt_high 0xffffffff
838 00:41:25.734646 => dhcp
839 00:41:25.735342 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 00:41:25.739715 dhcp
841 00:41:26.244080 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 00:41:26.244766 Speed: 1000, full duplex
843 00:41:26.245250 BOOTP broadcast 1
844 00:41:26.493788 BOOTP broadcast 2
845 00:41:26.523831 DHCP client bound to address 192.168.6.21 (278 ms)
847 00:41:26.625800 => setenv serverip 192.168.6.2
848 00:41:26.626625 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
849 00:41:26.631345 setenv serverip 192.168.6.2
851 00:41:26.732888 => tftpboot 0x01080000 915244/tftp-deploy-snk9z_bt/kernel/uImage
852 00:41:26.733564 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
853 00:41:26.740194 tftpboot 0x01080000 915244/tftp-deploy-snk9z_bt/kernel/uImage
854 00:41:26.740702 Speed: 1000, full duplex
855 00:41:26.741157 Using ethernet@ff3f0000 device
856 00:41:26.745695 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 00:41:26.751189 Filename '915244/tftp-deploy-snk9z_bt/kernel/uImage'.
858 00:41:26.755044 Load address: 0x1080000
859 00:41:26.951038 Loading: *#### UDP wrong checksum 000000ff 00002aa7
860 00:41:27.001108 # UDP wrong checksum 000000ff 00008331
861 00:41:29.073405 ############################################# 36.1 MiB
862 00:41:29.074069 15.6 MiB/s
863 00:41:29.074516 done
864 00:41:29.077753 Bytes transferred = 37878336 (241fa40 hex)
866 00:41:29.179395 => tftpboot 0x08000000 915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
867 00:41:29.180296 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
868 00:41:29.187142 tftpboot 0x08000000 915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot
869 00:41:29.187690 Speed: 1000, full duplex
870 00:41:29.188174 Using ethernet@ff3f0000 device
871 00:41:29.192761 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
872 00:41:29.202519 Filename '915244/tftp-deploy-snk9z_bt/ramdisk/ramdisk.cpio.gz.uboot'.
873 00:41:29.203070 Load address: 0x8000000
874 00:41:30.715695 Loading: *################################################# UDP wrong checksum 00000005 0000f5e3
875 00:41:35.715457 T UDP wrong checksum 00000005 0000f5e3
876 00:41:45.716840 T T UDP wrong checksum 00000005 0000f5e3
877 00:41:46.633449 UDP wrong checksum 000000ff 00000632
878 00:41:46.678132 UDP wrong checksum 000000ff 00009d24
879 00:42:05.720358 T T T UDP wrong checksum 00000005 0000f5e3
880 00:42:15.889625 T T T UDP wrong checksum 000000ff 0000df25
881 00:42:15.910355 UDP wrong checksum 000000ff 00007418
882 00:42:25.726630 T
883 00:42:25.727068 Retry count exceeded; starting again
885 00:42:25.728264 end: 2.4.3 bootloader-commands (duration 00:01:00) [common]
888 00:42:25.729639 end: 2.4 uboot-commands (duration 00:01:19) [common]
890 00:42:25.730454 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
892 00:42:25.731216 end: 2 uboot-action (duration 00:01:19) [common]
894 00:42:25.732199 Cleaning after the job
895 00:42:25.732559 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/ramdisk
896 00:42:25.733408 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/kernel
897 00:42:25.755881 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/dtb
898 00:42:25.757114 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/nfsrootfs
899 00:42:25.934994 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915244/tftp-deploy-snk9z_bt/modules
900 00:42:25.957623 start: 4.1 power-off (timeout 00:00:30) [common]
901 00:42:25.958312 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
902 00:42:25.996234 >> OK - accepted request
903 00:42:25.997612 Returned 0 in 0 seconds
904 00:42:26.098460 end: 4.1 power-off (duration 00:00:00) [common]
906 00:42:26.099580 start: 4.2 read-feedback (timeout 00:10:00) [common]
907 00:42:26.100410 Listened to connection for namespace 'common' for up to 1s
908 00:42:27.101240 Finalising connection for namespace 'common'
909 00:42:27.101722 Disconnecting from shell: Finalise
910 00:42:27.102036 =>
911 00:42:27.202752 end: 4.2 read-feedback (duration 00:00:01) [common]
912 00:42:27.203216 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/915244
913 00:42:31.040502 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/915244
914 00:42:31.041133 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.