Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:13:05.389702 lava-dispatcher, installed at version: 2024.01
2 00:13:05.390505 start: 0 validate
3 00:13:05.390983 Start time: 2024-10-31 00:13:05.390951+00:00 (UTC)
4 00:13:05.391543 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:13:05.392107 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:13:05.431443 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:13:05.432103 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:13:05.460327 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:13:05.460954 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:13:05.492638 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:13:05.493111 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:13:05.521082 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:13:05.521569 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:13:05.555220 validate duration: 0.16
16 00:13:05.556063 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:13:05.556406 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:13:05.556719 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:13:05.557328 Not decompressing ramdisk as can be used compressed.
20 00:13:05.557790 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:13:05.558067 saving as /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/ramdisk/initrd.cpio.gz
22 00:13:05.558353 total size: 5628169 (5 MB)
23 00:13:05.594949 progress 0 % (0 MB)
24 00:13:05.599911 progress 5 % (0 MB)
25 00:13:05.604021 progress 10 % (0 MB)
26 00:13:05.607644 progress 15 % (0 MB)
27 00:13:05.611698 progress 20 % (1 MB)
28 00:13:05.615325 progress 25 % (1 MB)
29 00:13:05.619379 progress 30 % (1 MB)
30 00:13:05.623340 progress 35 % (1 MB)
31 00:13:05.626957 progress 40 % (2 MB)
32 00:13:05.630913 progress 45 % (2 MB)
33 00:13:05.634495 progress 50 % (2 MB)
34 00:13:05.638451 progress 55 % (2 MB)
35 00:13:05.642387 progress 60 % (3 MB)
36 00:13:05.645973 progress 65 % (3 MB)
37 00:13:05.652181 progress 70 % (3 MB)
38 00:13:05.655757 progress 75 % (4 MB)
39 00:13:05.659773 progress 80 % (4 MB)
40 00:13:05.663197 progress 85 % (4 MB)
41 00:13:05.666851 progress 90 % (4 MB)
42 00:13:05.670459 progress 95 % (5 MB)
43 00:13:05.673764 progress 100 % (5 MB)
44 00:13:05.674404 5 MB downloaded in 0.12 s (46.26 MB/s)
45 00:13:05.674947 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:13:05.675850 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:13:05.676189 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:13:05.676475 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:13:05.676959 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kernel/Image
51 00:13:05.677206 saving as /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/kernel/Image
52 00:13:05.677423 total size: 37878272 (36 MB)
53 00:13:05.677637 No compression specified
54 00:13:05.716034 progress 0 % (0 MB)
55 00:13:05.739287 progress 5 % (1 MB)
56 00:13:05.762830 progress 10 % (3 MB)
57 00:13:05.787810 progress 15 % (5 MB)
58 00:13:05.811415 progress 20 % (7 MB)
59 00:13:05.834461 progress 25 % (9 MB)
60 00:13:05.857916 progress 30 % (10 MB)
61 00:13:05.881559 progress 35 % (12 MB)
62 00:13:05.905131 progress 40 % (14 MB)
63 00:13:05.928494 progress 45 % (16 MB)
64 00:13:05.951329 progress 50 % (18 MB)
65 00:13:05.974731 progress 55 % (19 MB)
66 00:13:05.997882 progress 60 % (21 MB)
67 00:13:06.021297 progress 65 % (23 MB)
68 00:13:06.044634 progress 70 % (25 MB)
69 00:13:06.067766 progress 75 % (27 MB)
70 00:13:06.091309 progress 80 % (28 MB)
71 00:13:06.114861 progress 85 % (30 MB)
72 00:13:06.138494 progress 90 % (32 MB)
73 00:13:06.162214 progress 95 % (34 MB)
74 00:13:06.184422 progress 100 % (36 MB)
75 00:13:06.185179 36 MB downloaded in 0.51 s (71.15 MB/s)
76 00:13:06.185660 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:13:06.186470 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:13:06.186744 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:13:06.187012 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:13:06.187483 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:13:06.187752 saving as /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:13:06.187961 total size: 53209 (0 MB)
84 00:13:06.188201 No compression specified
85 00:13:06.230710 progress 61 % (0 MB)
86 00:13:06.231526 progress 100 % (0 MB)
87 00:13:06.232093 0 MB downloaded in 0.04 s (1.15 MB/s)
88 00:13:06.232584 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:13:06.233392 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:13:06.233653 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:13:06.233914 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:13:06.234360 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:13:06.234601 saving as /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/nfsrootfs/full.rootfs.tar
95 00:13:06.234807 total size: 120894716 (115 MB)
96 00:13:06.235016 Using unxz to decompress xz
97 00:13:06.273805 progress 0 % (0 MB)
98 00:13:07.058378 progress 5 % (5 MB)
99 00:13:07.898296 progress 10 % (11 MB)
100 00:13:08.691047 progress 15 % (17 MB)
101 00:13:09.418560 progress 20 % (23 MB)
102 00:13:10.006901 progress 25 % (28 MB)
103 00:13:10.828002 progress 30 % (34 MB)
104 00:13:11.625276 progress 35 % (40 MB)
105 00:13:11.974570 progress 40 % (46 MB)
106 00:13:12.347815 progress 45 % (51 MB)
107 00:13:13.056028 progress 50 % (57 MB)
108 00:13:13.932451 progress 55 % (63 MB)
109 00:13:14.707139 progress 60 % (69 MB)
110 00:13:15.458087 progress 65 % (74 MB)
111 00:13:16.235298 progress 70 % (80 MB)
112 00:13:17.055483 progress 75 % (86 MB)
113 00:13:17.850598 progress 80 % (92 MB)
114 00:13:18.603594 progress 85 % (98 MB)
115 00:13:19.457368 progress 90 % (103 MB)
116 00:13:20.228580 progress 95 % (109 MB)
117 00:13:21.066140 progress 100 % (115 MB)
118 00:13:21.078627 115 MB downloaded in 14.84 s (7.77 MB/s)
119 00:13:21.079491 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:13:21.081133 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:13:21.081646 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:13:21.082158 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:13:21.083299 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/modules.tar.xz
125 00:13:21.083822 saving as /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/modules/modules.tar
126 00:13:21.084278 total size: 11755844 (11 MB)
127 00:13:21.084698 Using unxz to decompress xz
128 00:13:21.133231 progress 0 % (0 MB)
129 00:13:21.200780 progress 5 % (0 MB)
130 00:13:21.276088 progress 10 % (1 MB)
131 00:13:21.355816 progress 15 % (1 MB)
132 00:13:21.435461 progress 20 % (2 MB)
133 00:13:21.511771 progress 25 % (2 MB)
134 00:13:21.592433 progress 30 % (3 MB)
135 00:13:21.668399 progress 35 % (3 MB)
136 00:13:21.748811 progress 40 % (4 MB)
137 00:13:21.833048 progress 45 % (5 MB)
138 00:13:21.913680 progress 50 % (5 MB)
139 00:13:21.996270 progress 55 % (6 MB)
140 00:13:22.077415 progress 60 % (6 MB)
141 00:13:22.160165 progress 65 % (7 MB)
142 00:13:22.241979 progress 70 % (7 MB)
143 00:13:22.322809 progress 75 % (8 MB)
144 00:13:22.405267 progress 80 % (9 MB)
145 00:13:22.482670 progress 85 % (9 MB)
146 00:13:22.558645 progress 90 % (10 MB)
147 00:13:22.662020 progress 95 % (10 MB)
148 00:13:22.760243 progress 100 % (11 MB)
149 00:13:22.773890 11 MB downloaded in 1.69 s (6.64 MB/s)
150 00:13:22.774538 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:13:22.775395 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:13:22.776054 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:13:22.776687 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:13:40.514647 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/915240/extract-nfsrootfs-3mo7z7q6
156 00:13:40.515247 end: 1.6.1 extract-nfsrootfs (duration 00:00:18) [common]
157 00:13:40.515531 start: 1.6.2 lava-overlay (timeout 00:09:25) [common]
158 00:13:40.516278 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7
159 00:13:40.516740 makedir: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin
160 00:13:40.517077 makedir: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/tests
161 00:13:40.517389 makedir: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/results
162 00:13:40.517719 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-add-keys
163 00:13:40.518260 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-add-sources
164 00:13:40.518788 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-background-process-start
165 00:13:40.519276 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-background-process-stop
166 00:13:40.519797 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-common-functions
167 00:13:40.520331 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-echo-ipv4
168 00:13:40.520815 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-install-packages
169 00:13:40.521357 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-installed-packages
170 00:13:40.521839 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-os-build
171 00:13:40.522338 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-probe-channel
172 00:13:40.522833 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-probe-ip
173 00:13:40.523307 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-target-ip
174 00:13:40.523774 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-target-mac
175 00:13:40.524279 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-target-storage
176 00:13:40.524768 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-case
177 00:13:40.525238 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-event
178 00:13:40.525704 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-feedback
179 00:13:40.526195 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-raise
180 00:13:40.526692 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-reference
181 00:13:40.527163 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-runner
182 00:13:40.527634 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-set
183 00:13:40.528123 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-test-shell
184 00:13:40.528609 Updating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-add-keys (debian)
185 00:13:40.529132 Updating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-add-sources (debian)
186 00:13:40.529628 Updating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-install-packages (debian)
187 00:13:40.530122 Updating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-installed-packages (debian)
188 00:13:40.530608 Updating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/bin/lava-os-build (debian)
189 00:13:40.531035 Creating /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/environment
190 00:13:40.531398 LAVA metadata
191 00:13:40.531653 - LAVA_JOB_ID=915240
192 00:13:40.531865 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:13:40.532262 start: 1.6.2.1 ssh-authorize (timeout 00:09:25) [common]
194 00:13:40.533204 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:13:40.533511 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:25) [common]
196 00:13:40.533719 skipped lava-vland-overlay
197 00:13:40.533956 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:13:40.534207 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:25) [common]
199 00:13:40.534422 skipped lava-multinode-overlay
200 00:13:40.534662 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:13:40.534912 start: 1.6.2.4 test-definition (timeout 00:09:25) [common]
202 00:13:40.535155 Loading test definitions
203 00:13:40.535425 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:25) [common]
204 00:13:40.535644 Using /lava-915240 at stage 0
205 00:13:40.536756 uuid=915240_1.6.2.4.1 testdef=None
206 00:13:40.537060 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:13:40.537322 start: 1.6.2.4.2 test-overlay (timeout 00:09:25) [common]
208 00:13:40.538852 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:13:40.539638 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:25) [common]
211 00:13:40.541603 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:13:40.542421 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:25) [common]
214 00:13:40.544299 runner path: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/0/tests/0_timesync-off test_uuid 915240_1.6.2.4.1
215 00:13:40.544837 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:13:40.545640 start: 1.6.2.4.5 git-repo-action (timeout 00:09:25) [common]
218 00:13:40.545863 Using /lava-915240 at stage 0
219 00:13:40.546214 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:13:40.546501 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/0/tests/1_kselftest-dt'
221 00:13:44.097304 Running '/usr/bin/git checkout kernelci.org
222 00:13:44.243327 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
223 00:13:44.245737 uuid=915240_1.6.2.4.5 testdef=None
224 00:13:44.246410 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:13:44.248037 start: 1.6.2.4.6 test-overlay (timeout 00:09:21) [common]
227 00:13:44.253988 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:13:44.255736 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:21) [common]
230 00:13:44.263697 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:13:44.265592 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:21) [common]
233 00:13:44.273382 runner path: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/0/tests/1_kselftest-dt test_uuid 915240_1.6.2.4.5
234 00:13:44.273994 BOARD='meson-sm1-s905d3-libretech-cc'
235 00:13:44.274446 BRANCH='mainline'
236 00:13:44.274881 SKIPFILE='/dev/null'
237 00:13:44.275314 SKIP_INSTALL='True'
238 00:13:44.275743 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:13:44.276221 TST_CASENAME=''
240 00:13:44.276659 TST_CMDFILES='dt'
241 00:13:44.277750 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:13:44.279454 Creating lava-test-runner.conf files
244 00:13:44.279901 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/915240/lava-overlay-pca795f7/lava-915240/0 for stage 0
245 00:13:44.280638 - 0_timesync-off
246 00:13:44.281144 - 1_kselftest-dt
247 00:13:44.281836 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:13:44.282429 start: 1.6.2.5 compress-overlay (timeout 00:09:21) [common]
249 00:14:07.518504 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:14:07.518959 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 00:14:07.519225 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:14:07.519494 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:14:07.519759 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 00:14:08.192338 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:14:08.192793 start: 1.6.4 extract-modules (timeout 00:08:57) [common]
256 00:14:08.193069 extracting modules file /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915240/extract-nfsrootfs-3mo7z7q6
257 00:14:09.580338 extracting modules file /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk
258 00:14:11.274604 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:14:11.275158 start: 1.6.5 apply-overlay-tftp (timeout 00:08:54) [common]
260 00:14:11.275510 [common] Applying overlay to NFS
261 00:14:11.275772 [common] Applying overlay /var/lib/lava/dispatcher/tmp/915240/compress-overlay-cy9kiz3u/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/915240/extract-nfsrootfs-3mo7z7q6
262 00:14:14.168990 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:14:14.169473 start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
264 00:14:14.169755 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
265 00:14:14.169988 Converting downloaded kernel to a uImage
266 00:14:14.170304 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/kernel/Image /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/kernel/uImage
267 00:14:14.615421 output: Image Name:
268 00:14:14.615878 output: Created: Thu Oct 31 00:14:14 2024
269 00:14:14.616176 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:14:14.616404 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:14:14.616612 output: Load Address: 01080000
272 00:14:14.616821 output: Entry Point: 01080000
273 00:14:14.617043 output:
274 00:14:14.617400 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:14:14.617723 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:14:14.618081 start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
277 00:14:14.618396 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:14:14.618702 start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
279 00:14:14.618998 Building ramdisk /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk
280 00:14:17.057749 >> 173421 blocks
281 00:14:24.745837 Adding RAMdisk u-boot header.
282 00:14:24.746561 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk.cpio.gz.uboot
283 00:14:25.022348 output: Image Name:
284 00:14:25.022780 output: Created: Thu Oct 31 00:14:24 2024
285 00:14:25.022992 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:14:25.023198 output: Data Size: 24149449 Bytes = 23583.45 KiB = 23.03 MiB
287 00:14:25.023402 output: Load Address: 00000000
288 00:14:25.023602 output: Entry Point: 00000000
289 00:14:25.023803 output:
290 00:14:25.024745 rename /var/lib/lava/dispatcher/tmp/915240/extract-overlay-ramdisk-41jf1x5k/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
291 00:14:25.025553 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:14:25.026148 end: 1.6 prepare-tftp-overlay (duration 00:01:02) [common]
293 00:14:25.026730 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 00:14:25.027228 No LXC device requested
295 00:14:25.027774 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:14:25.028381 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 00:14:25.028931 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:14:25.029381 Checking files for TFTP limit of 4294967296 bytes.
299 00:14:25.032455 end: 1 tftp-deploy (duration 00:01:19) [common]
300 00:14:25.033129 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:14:25.033707 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:14:25.034256 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:14:25.034809 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:14:25.035392 Using kernel file from prepare-kernel: 915240/tftp-deploy-0fj4846e/kernel/uImage
305 00:14:25.036114 substitutions:
306 00:14:25.036578 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:14:25.037028 - {DTB_ADDR}: 0x01070000
308 00:14:25.037469 - {DTB}: 915240/tftp-deploy-0fj4846e/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 00:14:25.037912 - {INITRD}: 915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
310 00:14:25.038354 - {KERNEL_ADDR}: 0x01080000
311 00:14:25.038788 - {KERNEL}: 915240/tftp-deploy-0fj4846e/kernel/uImage
312 00:14:25.039221 - {LAVA_MAC}: None
313 00:14:25.039696 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/915240/extract-nfsrootfs-3mo7z7q6
314 00:14:25.040167 - {NFS_SERVER_IP}: 192.168.6.2
315 00:14:25.040602 - {PRESEED_CONFIG}: None
316 00:14:25.041032 - {PRESEED_LOCAL}: None
317 00:14:25.041465 - {RAMDISK_ADDR}: 0x08000000
318 00:14:25.041891 - {RAMDISK}: 915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
319 00:14:25.042321 - {ROOT_PART}: None
320 00:14:25.042748 - {ROOT}: None
321 00:14:25.043175 - {SERVER_IP}: 192.168.6.2
322 00:14:25.043603 - {TEE_ADDR}: 0x83000000
323 00:14:25.044053 - {TEE}: None
324 00:14:25.044488 Parsed boot commands:
325 00:14:25.044908 - setenv autoload no
326 00:14:25.045335 - setenv initrd_high 0xffffffff
327 00:14:25.045763 - setenv fdt_high 0xffffffff
328 00:14:25.046183 - dhcp
329 00:14:25.046602 - setenv serverip 192.168.6.2
330 00:14:25.047029 - tftpboot 0x01080000 915240/tftp-deploy-0fj4846e/kernel/uImage
331 00:14:25.047458 - tftpboot 0x08000000 915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
332 00:14:25.047887 - tftpboot 0x01070000 915240/tftp-deploy-0fj4846e/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 00:14:25.048346 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/915240/extract-nfsrootfs-3mo7z7q6,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:14:25.048794 - bootm 0x01080000 0x08000000 0x01070000
335 00:14:25.049353 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:14:25.051002 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:14:25.051464 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 00:14:25.067369 Setting prompt string to ['lava-test: # ']
340 00:14:25.069068 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:14:25.069724 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:14:25.070336 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:14:25.070911 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:14:25.072197 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 00:14:25.112690 >> OK - accepted request
346 00:14:25.114909 Returned 0 in 0 seconds
347 00:14:25.216194 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:14:25.217946 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:14:25.218556 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:14:25.219101 Setting prompt string to ['Hit any key to stop autoboot']
352 00:14:25.219587 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:14:25.221314 Trying 192.168.56.21...
354 00:14:25.221855 Connected to conserv1.
355 00:14:25.222304 Escape character is '^]'.
356 00:14:25.222764
357 00:14:25.223230 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 00:14:25.223708
359 00:14:32.779392 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 00:14:32.780094 bl2_stage_init 0x01
361 00:14:32.780574 bl2_stage_init 0x81
362 00:14:32.784595 hw id: 0x0000 - pwm id 0x01
363 00:14:32.785091 bl2_stage_init 0xc1
364 00:14:32.790231 bl2_stage_init 0x02
365 00:14:32.790735
366 00:14:32.791211 L0:00000000
367 00:14:32.791677 L1:00000703
368 00:14:32.792170 L2:00008067
369 00:14:32.792628 L3:15000000
370 00:14:32.795852 S1:00000000
371 00:14:32.796394 B2:20282000
372 00:14:32.796852 B1:a0f83180
373 00:14:32.797287
374 00:14:32.797724 TE: 70135
375 00:14:32.798161
376 00:14:32.801519 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 00:14:32.801998
378 00:14:32.807141 Board ID = 1
379 00:14:32.807609 Set cpu clk to 24M
380 00:14:32.808075 Set clk81 to 24M
381 00:14:32.812682 Use GP1_pll as DSU clk.
382 00:14:32.813153 DSU clk: 1200 Mhz
383 00:14:32.813588 CPU clk: 1200 MHz
384 00:14:32.818237 Set clk81 to 166.6M
385 00:14:32.823862 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 00:14:32.824365 board id: 1
387 00:14:32.830015 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:14:32.841921 fw parse done
389 00:14:32.847557 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:14:32.890093 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:14:32.902056 PIEI prepare done
392 00:14:32.902522 fastboot data load
393 00:14:32.902961 fastboot data verify
394 00:14:32.907653 verify result: 266
395 00:14:32.913278 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 00:14:32.913746 LPDDR4 probe
397 00:14:32.914184 ddr clk to 1584MHz
398 00:14:32.920386 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:14:32.958589
400 00:14:32.959157 dmc_version 0001
401 00:14:32.965357 Check phy result
402 00:14:32.972165 INFO : End of CA training
403 00:14:32.972688 INFO : End of initialization
404 00:14:32.977574 INFO : Training has run successfully!
405 00:14:32.978042 Check phy result
406 00:14:32.983187 INFO : End of initialization
407 00:14:32.983701 INFO : End of read enable training
408 00:14:32.988793 INFO : End of fine write leveling
409 00:14:32.994402 INFO : End of Write leveling coarse delay
410 00:14:32.994887 INFO : Training has run successfully!
411 00:14:32.995337 Check phy result
412 00:14:33.000007 INFO : End of initialization
413 00:14:33.000480 INFO : End of read dq deskew training
414 00:14:33.005624 INFO : End of MPR read delay center optimization
415 00:14:33.011256 INFO : End of write delay center optimization
416 00:14:33.016802 INFO : End of read delay center optimization
417 00:14:33.017120 INFO : End of max read latency training
418 00:14:33.022418 INFO : Training has run successfully!
419 00:14:33.022726 1D training succeed
420 00:14:33.031279 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:14:33.079680 Check phy result
422 00:14:33.080048 INFO : End of initialization
423 00:14:33.106912 INFO : End of 2D read delay Voltage center optimization
424 00:14:33.131242 INFO : End of 2D read delay Voltage center optimization
425 00:14:33.187191 INFO : End of 2D write delay Voltage center optimization
426 00:14:33.242226 INFO : End of 2D write delay Voltage center optimization
427 00:14:33.247687 INFO : Training has run successfully!
428 00:14:33.248054
429 00:14:33.248307 channel==0
430 00:14:33.253310 RxClkDly_Margin_A0==78 ps 8
431 00:14:33.253640 TxDqDly_Margin_A0==98 ps 10
432 00:14:33.258887 RxClkDly_Margin_A1==78 ps 8
433 00:14:33.259205 TxDqDly_Margin_A1==88 ps 9
434 00:14:33.259436 TrainedVREFDQ_A0==74
435 00:14:33.264543 TrainedVREFDQ_A1==74
436 00:14:33.264885 VrefDac_Margin_A0==24
437 00:14:33.265119 DeviceVref_Margin_A0==40
438 00:14:33.270132 VrefDac_Margin_A1==22
439 00:14:33.270450 DeviceVref_Margin_A1==40
440 00:14:33.270679
441 00:14:33.270902
442 00:14:33.271118 channel==1
443 00:14:33.275677 RxClkDly_Margin_A0==78 ps 8
444 00:14:33.276013 TxDqDly_Margin_A0==98 ps 10
445 00:14:33.281339 RxClkDly_Margin_A1==78 ps 8
446 00:14:33.281657 TxDqDly_Margin_A1==88 ps 9
447 00:14:33.286938 TrainedVREFDQ_A0==78
448 00:14:33.287260 TrainedVREFDQ_A1==78
449 00:14:33.287492 VrefDac_Margin_A0==22
450 00:14:33.292481 DeviceVref_Margin_A0==36
451 00:14:33.292808 VrefDac_Margin_A1==22
452 00:14:33.298129 DeviceVref_Margin_A1==36
453 00:14:33.298439
454 00:14:33.298671 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:14:33.298891
456 00:14:33.331719 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000019 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 00:14:33.332256 2D training succeed
458 00:14:33.337322 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:14:33.342935 auto size-- 65535DDR cs0 size: 2048MB
460 00:14:33.343280 DDR cs1 size: 2048MB
461 00:14:33.348469 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:14:33.348817 cs0 DataBus test pass
463 00:14:33.354137 cs1 DataBus test pass
464 00:14:33.354458 cs0 AddrBus test pass
465 00:14:33.354690 cs1 AddrBus test pass
466 00:14:33.354909
467 00:14:33.359685 100bdlr_step_size ps== 471
468 00:14:33.360027 result report
469 00:14:33.365525 boot times 0Enable ddr reg access
470 00:14:33.370333 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:14:33.383546 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 00:14:34.042923 bl2z: ptr: 05129330, size: 00001e40
473 00:14:34.050940 0.0;M3 CHK:0;cm4_sp_mode 0
474 00:14:34.051248 MVN_1=0x00000000
475 00:14:34.051467 MVN_2=0x00000000
476 00:14:34.062431 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 00:14:34.062754 OPS=0x04
478 00:14:34.062973 ring efuse init
479 00:14:34.065354 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 00:14:34.071142 [0.017355 Inits done]
481 00:14:34.071435 secure task start!
482 00:14:34.071652 high task start!
483 00:14:34.071859 low task start!
484 00:14:34.074513 run into bl31
485 00:14:34.084156 NOTICE: BL31: v1.3(release):4fc40b1
486 00:14:34.091306 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 00:14:34.091601 NOTICE: BL31: G12A normal boot!
488 00:14:34.107485 NOTICE: BL31: BL33 decompress pass
489 00:14:34.113018 ERROR: Error initializing runtime service opteed_fast
490 00:14:35.327270 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 00:14:35.327904 bl2_stage_init 0x01
492 00:14:35.328389 bl2_stage_init 0x81
493 00:14:35.332891 hw id: 0x0000 - pwm id 0x01
494 00:14:35.333416 bl2_stage_init 0xc1
495 00:14:35.338452 bl2_stage_init 0x02
496 00:14:35.338966
497 00:14:35.339369 L0:00000000
498 00:14:35.339764 L1:00000703
499 00:14:35.340217 L2:00008067
500 00:14:35.340615 L3:15000000
501 00:14:35.344027 S1:00000000
502 00:14:35.344511 B2:20282000
503 00:14:35.344905 B1:a0f83180
504 00:14:35.345291
505 00:14:35.345685 TE: 69498
506 00:14:35.346073
507 00:14:35.349576 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 00:14:35.350062
509 00:14:35.355222 Board ID = 1
510 00:14:35.355732 Set cpu clk to 24M
511 00:14:35.356193 Set clk81 to 24M
512 00:14:35.360813 Use GP1_pll as DSU clk.
513 00:14:35.361306 DSU clk: 1200 Mhz
514 00:14:35.361707 CPU clk: 1200 MHz
515 00:14:35.366441 Set clk81 to 166.6M
516 00:14:35.372051 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 00:14:35.372567 board id: 1
518 00:14:35.378824 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 00:14:35.389861 fw parse done
520 00:14:35.395820 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 00:14:35.438409 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 00:14:35.449504 PIEI prepare done
523 00:14:35.450038 fastboot data load
524 00:14:35.450442 fastboot data verify
525 00:14:35.455025 verify result: 266
526 00:14:35.460662 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 00:14:35.461148 LPDDR4 probe
528 00:14:35.461546 ddr clk to 1584MHz
529 00:14:36.830280 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 00:14:36.830936 bl2_stage_init 0x01
531 00:14:36.831372 bl2_stage_init 0x81
532 00:14:36.835956 hw id: 0x0000 - pwm id 0x01
533 00:14:36.836485 bl2_stage_init 0xc1
534 00:14:36.836906 bl2_stage_init 0x02
535 00:14:36.837316
536 00:14:36.841505 L0:00000000
537 00:14:36.841986 L1:00000703
538 00:14:36.842405 L2:00008067
539 00:14:36.842831 L3:15000000
540 00:14:36.843230 S1:00000000
541 00:14:36.847116 B2:20282000
542 00:14:36.847589 B1:a0f83180
543 00:14:36.848034
544 00:14:36.848448 TE: 71864
545 00:14:36.848852
546 00:14:36.852798 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 00:14:36.853267
548 00:14:36.858307 Board ID = 1
549 00:14:36.858772 Set cpu clk to 24M
550 00:14:36.859182 Set clk81 to 24M
551 00:14:36.863903 Use GP1_pll as DSU clk.
552 00:14:36.864394 DSU clk: 1200 Mhz
553 00:14:36.864803 CPU clk: 1200 MHz
554 00:14:36.865201 Set clk81 to 166.6M
555 00:14:36.875029 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 00:14:36.875503 board id: 1
557 00:14:36.881489 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 00:14:36.892383 fw parse done
559 00:14:36.898360 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 00:14:36.941432 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 00:14:36.952683 PIEI prepare done
562 00:14:36.953162 fastboot data load
563 00:14:36.953583 fastboot data verify
564 00:14:36.958261 verify result: 266
565 00:14:36.963953 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 00:14:36.964459 LPDDR4 probe
567 00:14:36.964870 ddr clk to 1584MHz
568 00:14:36.971820 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 00:14:37.009559
570 00:14:37.010047 dmc_version 0001
571 00:14:37.016605 Check phy result
572 00:14:37.022592 INFO : End of CA training
573 00:14:37.023052 INFO : End of initialization
574 00:14:37.028269 INFO : Training has run successfully!
575 00:14:37.028731 Check phy result
576 00:14:37.033896 INFO : End of initialization
577 00:14:37.034360 INFO : End of read enable training
578 00:14:37.037140 INFO : End of fine write leveling
579 00:14:37.042654 INFO : End of Write leveling coarse delay
580 00:14:37.048247 INFO : Training has run successfully!
581 00:14:37.048708 Check phy result
582 00:14:37.049123 INFO : End of initialization
583 00:14:37.053899 INFO : End of read dq deskew training
584 00:14:37.059434 INFO : End of MPR read delay center optimization
585 00:14:37.059894 INFO : End of write delay center optimization
586 00:14:37.065036 INFO : End of read delay center optimization
587 00:14:37.070676 INFO : End of max read latency training
588 00:14:37.071154 INFO : Training has run successfully!
589 00:14:37.076298 1D training succeed
590 00:14:37.082089 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 00:14:37.130527 Check phy result
592 00:14:37.131041 INFO : End of initialization
593 00:14:37.157890 INFO : End of 2D read delay Voltage center optimization
594 00:14:37.182097 INFO : End of 2D read delay Voltage center optimization
595 00:14:37.238755 INFO : End of 2D write delay Voltage center optimization
596 00:14:37.292687 INFO : End of 2D write delay Voltage center optimization
597 00:14:37.298250 INFO : Training has run successfully!
598 00:14:37.298625
599 00:14:37.298909 channel==0
600 00:14:37.303869 RxClkDly_Margin_A0==78 ps 8
601 00:14:37.304404 TxDqDly_Margin_A0==88 ps 9
602 00:14:37.309456 RxClkDly_Margin_A1==88 ps 9
603 00:14:37.309960 TxDqDly_Margin_A1==88 ps 9
604 00:14:37.310256 TrainedVREFDQ_A0==74
605 00:14:37.315058 TrainedVREFDQ_A1==74
606 00:14:37.315565 VrefDac_Margin_A0==24
607 00:14:37.315961 DeviceVref_Margin_A0==40
608 00:14:37.320661 VrefDac_Margin_A1==22
609 00:14:37.321189 DeviceVref_Margin_A1==40
610 00:14:37.321646
611 00:14:37.322096
612 00:14:37.322540 channel==1
613 00:14:37.326239 RxClkDly_Margin_A0==88 ps 9
614 00:14:37.326748 TxDqDly_Margin_A0==98 ps 10
615 00:14:37.331818 RxClkDly_Margin_A1==78 ps 8
616 00:14:37.332333 TxDqDly_Margin_A1==88 ps 9
617 00:14:37.337450 TrainedVREFDQ_A0==78
618 00:14:37.337933 TrainedVREFDQ_A1==78
619 00:14:37.338387 VrefDac_Margin_A0==22
620 00:14:37.343022 DeviceVref_Margin_A0==36
621 00:14:37.343545 VrefDac_Margin_A1==22
622 00:14:37.344019 DeviceVref_Margin_A1==36
623 00:14:37.348611
624 00:14:37.349105 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 00:14:37.349551
626 00:14:37.382270 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 00:14:37.382810 2D training succeed
628 00:14:37.387885 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 00:14:37.393404 auto size-- 65535DDR cs0 size: 2048MB
630 00:14:37.393903 DDR cs1 size: 2048MB
631 00:14:37.399024 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 00:14:37.399515 cs0 DataBus test pass
633 00:14:37.404635 cs1 DataBus test pass
634 00:14:37.405172 cs0 AddrBus test pass
635 00:14:37.405615 cs1 AddrBus test pass
636 00:14:37.406049
637 00:14:37.410196 100bdlr_step_size ps== 478
638 00:14:37.410703 result report
639 00:14:37.415834 boot times 0Enable ddr reg access
640 00:14:37.420947 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 00:14:37.434771 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 00:14:38.093512 bl2z: ptr: 05129330, size: 00001e40
643 00:14:38.101217 0.0;M3 CHK:0;cm4_sp_mode 0
644 00:14:38.101765 MVN_1=0x00000000
645 00:14:38.102236 MVN_2=0x00000000
646 00:14:38.112697 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 00:14:38.113311 OPS=0x04
648 00:14:38.113797 ring efuse init
649 00:14:38.118329 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 00:14:38.118908 [0.017354 Inits done]
651 00:14:38.119386 secure task start!
652 00:14:38.126577 high task start!
653 00:14:38.127130 low task start!
654 00:14:38.127600 run into bl31
655 00:14:38.135072 NOTICE: BL31: v1.3(release):4fc40b1
656 00:14:38.142999 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 00:14:38.143558 NOTICE: BL31: G12A normal boot!
658 00:14:38.158372 NOTICE: BL31: BL33 decompress pass
659 00:14:38.164125 ERROR: Error initializing runtime service opteed_fast
660 00:14:39.381056 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 00:14:39.381729 bl2_stage_init 0x01
662 00:14:39.382213 bl2_stage_init 0x81
663 00:14:39.386323 hw id: 0x0000 - pwm id 0x01
664 00:14:39.386852 bl2_stage_init 0xc1
665 00:14:39.390795 bl2_stage_init 0x02
666 00:14:39.391317
667 00:14:39.391786 L0:00000000
668 00:14:39.392300 L1:00000703
669 00:14:39.392764 L2:00008067
670 00:14:39.396414 L3:15000000
671 00:14:39.396929 S1:00000000
672 00:14:39.397394 B2:20282000
673 00:14:39.397852 B1:a0f83180
674 00:14:39.398298
675 00:14:39.398749 TE: 71459
676 00:14:39.399199
677 00:14:39.407431 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 00:14:39.407970
679 00:14:39.408491 Board ID = 1
680 00:14:39.408955 Set cpu clk to 24M
681 00:14:39.409405 Set clk81 to 24M
682 00:14:39.413195 Use GP1_pll as DSU clk.
683 00:14:39.413730 DSU clk: 1200 Mhz
684 00:14:39.414190 CPU clk: 1200 MHz
685 00:14:39.418722 Set clk81 to 166.6M
686 00:14:39.424328 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 00:14:39.424860 board id: 1
688 00:14:39.432710 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 00:14:39.443334 fw parse done
690 00:14:39.449337 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 00:14:39.491790 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:14:39.502840 PIEI prepare done
693 00:14:39.503351 fastboot data load
694 00:14:39.503816 fastboot data verify
695 00:14:39.508400 verify result: 266
696 00:14:39.514003 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 00:14:39.514553 LPDDR4 probe
698 00:14:39.515027 ddr clk to 1584MHz
699 00:14:39.521917 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 00:14:39.559288
701 00:14:39.559854 dmc_version 0001
702 00:14:39.565881 Check phy result
703 00:14:39.571768 INFO : End of CA training
704 00:14:39.572306 INFO : End of initialization
705 00:14:39.577397 INFO : Training has run successfully!
706 00:14:39.577901 Check phy result
707 00:14:39.583032 INFO : End of initialization
708 00:14:39.583526 INFO : End of read enable training
709 00:14:39.588626 INFO : End of fine write leveling
710 00:14:39.594161 INFO : End of Write leveling coarse delay
711 00:14:39.594667 INFO : Training has run successfully!
712 00:14:39.595128 Check phy result
713 00:14:39.599728 INFO : End of initialization
714 00:14:39.600275 INFO : End of read dq deskew training
715 00:14:39.605326 INFO : End of MPR read delay center optimization
716 00:14:39.610982 INFO : End of write delay center optimization
717 00:14:39.616562 INFO : End of read delay center optimization
718 00:14:39.617088 INFO : End of max read latency training
719 00:14:39.622163 INFO : Training has run successfully!
720 00:14:39.622675 1D training succeed
721 00:14:39.631455 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 00:14:39.678966 Check phy result
723 00:14:39.679502 INFO : End of initialization
724 00:14:39.701336 INFO : End of 2D read delay Voltage center optimization
725 00:14:39.720461 INFO : End of 2D read delay Voltage center optimization
726 00:14:39.772355 INFO : End of 2D write delay Voltage center optimization
727 00:14:39.821581 INFO : End of 2D write delay Voltage center optimization
728 00:14:39.827124 INFO : Training has run successfully!
729 00:14:39.827624
730 00:14:39.828134 channel==0
731 00:14:39.832618 RxClkDly_Margin_A0==88 ps 9
732 00:14:39.833109 TxDqDly_Margin_A0==98 ps 10
733 00:14:39.835962 RxClkDly_Margin_A1==88 ps 9
734 00:14:39.836473 TxDqDly_Margin_A1==98 ps 10
735 00:14:39.841574 TrainedVREFDQ_A0==75
736 00:14:39.842069 TrainedVREFDQ_A1==74
737 00:14:39.842529 VrefDac_Margin_A0==23
738 00:14:39.847175 DeviceVref_Margin_A0==39
739 00:14:39.847674 VrefDac_Margin_A1==22
740 00:14:39.852752 DeviceVref_Margin_A1==40
741 00:14:39.853241
742 00:14:39.853702
743 00:14:39.854147 channel==1
744 00:14:39.854586 RxClkDly_Margin_A0==78 ps 8
745 00:14:39.858462 TxDqDly_Margin_A0==88 ps 9
746 00:14:39.858960 RxClkDly_Margin_A1==88 ps 9
747 00:14:39.864023 TxDqDly_Margin_A1==78 ps 8
748 00:14:39.864521 TrainedVREFDQ_A0==75
749 00:14:39.864981 TrainedVREFDQ_A1==75
750 00:14:39.869558 VrefDac_Margin_A0==22
751 00:14:39.870051 DeviceVref_Margin_A0==39
752 00:14:39.875167 VrefDac_Margin_A1==23
753 00:14:39.875655 DeviceVref_Margin_A1==38
754 00:14:39.876143
755 00:14:39.880783 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 00:14:39.881276
757 00:14:39.908777 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
758 00:14:39.914354 2D training succeed
759 00:14:39.920015 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 00:14:39.920522 auto size-- 65535DDR cs0 size: 2048MB
761 00:14:39.925590 DDR cs1 size: 2048MB
762 00:14:39.926166 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 00:14:39.931173 cs0 DataBus test pass
764 00:14:39.931680 cs1 DataBus test pass
765 00:14:39.932179 cs0 AddrBus test pass
766 00:14:39.936760 cs1 AddrBus test pass
767 00:14:39.937253
768 00:14:39.937710 100bdlr_step_size ps== 478
769 00:14:39.938159 result report
770 00:14:39.942337 boot times 0Enable ddr reg access
771 00:14:39.949892 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 00:14:39.963627 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 00:14:40.618772 bl2z: ptr: 05129330, size: 00001e40
774 00:14:40.624366 0.0;M3 CHK:0;cm4_sp_mode 0
775 00:14:40.624950 MVN_1=0x00000000
776 00:14:40.625485 MVN_2=0x00000000
777 00:14:40.635822 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 00:14:40.636458 OPS=0x04
779 00:14:40.636934 ring efuse init
780 00:14:40.641413 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 00:14:40.641977 [0.017319 Inits done]
782 00:14:40.642463 secure task start!
783 00:14:40.649140 high task start!
784 00:14:40.649709 low task start!
785 00:14:40.650175 run into bl31
786 00:14:40.657560 NOTICE: BL31: v1.3(release):4fc40b1
787 00:14:40.665387 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 00:14:40.665956 NOTICE: BL31: G12A normal boot!
789 00:14:40.680781 NOTICE: BL31: BL33 decompress pass
790 00:14:40.686615 ERROR: Error initializing runtime service opteed_fast
791 00:14:41.482423
792 00:14:41.482882
793 00:14:41.488334 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 00:14:41.488812
795 00:14:41.497098 Model: Libre Computer AML-S905D3-CC Solitude
796 00:14:41.637755 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 00:14:41.653454 DRAM: 2 GiB (effective 3.8 GiB)
798 00:14:41.754496 Core: 406 devices, 33 uclasses, devicetree: separate
799 00:14:41.760012 WDT: Not starting watchdog@f0d0
800 00:14:41.785140 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 00:14:41.797514 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 00:14:41.802477 ** Bad device specification mmc 0 **
803 00:14:41.812448 Card did not respond to voltage select! : -110
804 00:14:41.820019 ** Bad device specification mmc 0 **
805 00:14:41.820625 Couldn't find partition mmc 0
806 00:14:41.828481 Card did not respond to voltage select! : -110
807 00:14:41.833857 ** Bad device specification mmc 0 **
808 00:14:41.834501 Couldn't find partition mmc 0
809 00:14:41.838941 Error: could not access storage.
810 00:14:42.135404 Net: eth0: ethernet@ff3f0000
811 00:14:42.135844 starting USB...
812 00:14:42.379955 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 00:14:42.380394 Starting the controller
814 00:14:42.386883 USB XHCI 1.10
815 00:14:43.941446 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 00:14:43.949697 scanning usb for storage devices... 0 Storage Device(s) found
818 00:14:44.001549 Hit any key to stop autoboot: 1
819 00:14:44.002746 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
820 00:14:44.003533 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
821 00:14:44.004167 Setting prompt string to ['=>']
822 00:14:44.004747 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
823 00:14:44.015731 0
824 00:14:44.016859 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 00:14:44.118249 => setenv autoload no
827 00:14:44.119359 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
828 00:14:44.124910 setenv autoload no
830 00:14:44.226908 => setenv initrd_high 0xffffffff
831 00:14:44.227783 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 00:14:44.232387 setenv initrd_high 0xffffffff
834 00:14:44.333868 => setenv fdt_high 0xffffffff
835 00:14:44.334630 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 00:14:44.340159 setenv fdt_high 0xffffffff
838 00:14:44.441476 => dhcp
839 00:14:44.442150 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 00:14:44.446279 dhcp
841 00:14:45.402364 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
842 00:14:45.402872 Speed: 1000, full duplex
843 00:14:45.403135 BOOTP broadcast 1
844 00:14:45.412178 DHCP client bound to address 192.168.6.21 (10 ms)
846 00:14:45.513762 => setenv serverip 192.168.6.2
847 00:14:45.514789 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
848 00:14:45.519183 setenv serverip 192.168.6.2
850 00:14:45.621662 => tftpboot 0x01080000 915240/tftp-deploy-0fj4846e/kernel/uImage
851 00:14:45.622504 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
852 00:14:45.629418 tftpboot 0x01080000 915240/tftp-deploy-0fj4846e/kernel/uImage
853 00:14:45.630086 Speed: 1000, full duplex
854 00:14:45.630562 Using ethernet@ff3f0000 device
855 00:14:45.634930 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
856 00:14:45.640533 Filename '915240/tftp-deploy-0fj4846e/kernel/uImage'.
857 00:14:45.644345 Load address: 0x1080000
858 00:14:48.208560 Loading: *################################################## 36.1 MiB
859 00:14:48.209000 14.1 MiB/s
860 00:14:48.209227 done
861 00:14:48.213001 Bytes transferred = 37878336 (241fa40 hex)
863 00:14:48.314171 => tftpboot 0x08000000 915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
864 00:14:48.314860 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
865 00:14:48.321490 tftpboot 0x08000000 915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot
866 00:14:48.321799 Speed: 1000, full duplex
867 00:14:48.322013 Using ethernet@ff3f0000 device
868 00:14:48.327250 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
869 00:14:48.336825 Filename '915240/tftp-deploy-0fj4846e/ramdisk/ramdisk.cpio.gz.uboot'.
870 00:14:48.337303 Load address: 0x8000000
871 00:14:49.892371 Loading: *################################################# UDP wrong checksum 00000005 00000493
872 00:14:51.015945 UDP wrong checksum 000000ff 00009279
873 00:14:51.052741 UDP wrong checksum 000000ff 00001e6c
874 00:14:54.893730 T UDP wrong checksum 00000005 00000493
875 00:14:55.562584 UDP wrong checksum 000000ff 0000600d
876 00:14:55.724191 UDP wrong checksum 000000ff 0000faff
877 00:14:56.232901 UDP wrong checksum 000000ff 000017ca
878 00:14:56.252526 UDP wrong checksum 000000ff 0000acbc
879 00:15:04.895969 T T UDP wrong checksum 00000005 00000493
880 00:15:24.899957 T T T T UDP wrong checksum 00000005 00000493
881 00:15:39.800429 T T UDP wrong checksum 000000ff 00001094
882 00:15:39.856292 UDP wrong checksum 000000ff 00009586
883 00:15:41.545973 T UDP wrong checksum 000000ff 0000c237
884 00:15:41.596668 UDP wrong checksum 000000ff 00005b2a
885 00:15:44.905026
886 00:15:44.905442 Retry count exceeded; starting again
888 00:15:44.908376 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
891 00:15:44.909438 end: 2.4 uboot-commands (duration 00:01:20) [common]
893 00:15:44.910204 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
895 00:15:44.910801 end: 2 uboot-action (duration 00:01:20) [common]
897 00:15:44.911677 Cleaning after the job
898 00:15:44.912025 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/ramdisk
899 00:15:44.912883 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/kernel
900 00:15:44.927373 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/dtb
901 00:15:44.928970 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/nfsrootfs
902 00:15:44.963004 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915240/tftp-deploy-0fj4846e/modules
903 00:15:44.969348 start: 4.1 power-off (timeout 00:00:30) [common]
904 00:15:44.969999 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
905 00:15:45.003463 >> OK - accepted request
906 00:15:45.005779 Returned 0 in 0 seconds
907 00:15:45.106599 end: 4.1 power-off (duration 00:00:00) [common]
909 00:15:45.107622 start: 4.2 read-feedback (timeout 00:10:00) [common]
910 00:15:45.108300 Listened to connection for namespace 'common' for up to 1s
911 00:15:46.109246 Finalising connection for namespace 'common'
912 00:15:46.109737 Disconnecting from shell: Finalise
913 00:15:46.110035 =>
914 00:15:46.210815 end: 4.2 read-feedback (duration 00:00:01) [common]
915 00:15:46.211521 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/915240
916 00:15:49.250891 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/915240
917 00:15:49.251478 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.