Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:59:27.128114 lava-dispatcher, installed at version: 2024.01
2 00:59:27.128864 start: 0 validate
3 00:59:27.129310 Start time: 2024-10-31 00:59:27.129282+00:00 (UTC)
4 00:59:27.129809 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:59:27.130323 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:59:27.170323 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:59:27.170876 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:59:27.200371 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:59:27.200989 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:59:27.230508 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:59:27.231020 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:59:27.261601 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:59:27.262099 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:59:27.298449 validate duration: 0.17
16 00:59:27.299278 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:59:27.299609 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:59:27.299927 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:59:27.300556 Not decompressing ramdisk as can be used compressed.
20 00:59:27.301018 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:59:27.301305 saving as /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/ramdisk/initrd.cpio.gz
22 00:59:27.301585 total size: 5628169 (5 MB)
23 00:59:27.337445 progress 0 % (0 MB)
24 00:59:27.341487 progress 5 % (0 MB)
25 00:59:27.345599 progress 10 % (0 MB)
26 00:59:27.349298 progress 15 % (0 MB)
27 00:59:27.353301 progress 20 % (1 MB)
28 00:59:27.357033 progress 25 % (1 MB)
29 00:59:27.361103 progress 30 % (1 MB)
30 00:59:27.365198 progress 35 % (1 MB)
31 00:59:27.368956 progress 40 % (2 MB)
32 00:59:27.372995 progress 45 % (2 MB)
33 00:59:27.376630 progress 50 % (2 MB)
34 00:59:27.380731 progress 55 % (2 MB)
35 00:59:27.384739 progress 60 % (3 MB)
36 00:59:27.388399 progress 65 % (3 MB)
37 00:59:27.392425 progress 70 % (3 MB)
38 00:59:27.396033 progress 75 % (4 MB)
39 00:59:27.400091 progress 80 % (4 MB)
40 00:59:27.403671 progress 85 % (4 MB)
41 00:59:27.407668 progress 90 % (4 MB)
42 00:59:27.411574 progress 95 % (5 MB)
43 00:59:27.414897 progress 100 % (5 MB)
44 00:59:27.415584 5 MB downloaded in 0.11 s (47.09 MB/s)
45 00:59:27.416152 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:59:27.417103 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:59:27.417421 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:59:27.417706 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:59:27.418211 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kernel/Image
51 00:59:27.418473 saving as /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/kernel/Image
52 00:59:27.418693 total size: 37878272 (36 MB)
53 00:59:27.418913 No compression specified
54 00:59:27.462492 progress 0 % (0 MB)
55 00:59:27.486429 progress 5 % (1 MB)
56 00:59:27.510221 progress 10 % (3 MB)
57 00:59:27.533693 progress 15 % (5 MB)
58 00:59:27.557182 progress 20 % (7 MB)
59 00:59:27.580516 progress 25 % (9 MB)
60 00:59:27.603817 progress 30 % (10 MB)
61 00:59:27.627256 progress 35 % (12 MB)
62 00:59:27.650710 progress 40 % (14 MB)
63 00:59:27.674357 progress 45 % (16 MB)
64 00:59:27.698971 progress 50 % (18 MB)
65 00:59:27.724023 progress 55 % (19 MB)
66 00:59:27.748935 progress 60 % (21 MB)
67 00:59:27.773864 progress 65 % (23 MB)
68 00:59:27.799289 progress 70 % (25 MB)
69 00:59:27.823520 progress 75 % (27 MB)
70 00:59:27.847879 progress 80 % (28 MB)
71 00:59:27.872356 progress 85 % (30 MB)
72 00:59:27.896986 progress 90 % (32 MB)
73 00:59:27.921840 progress 95 % (34 MB)
74 00:59:27.945830 progress 100 % (36 MB)
75 00:59:27.946585 36 MB downloaded in 0.53 s (68.43 MB/s)
76 00:59:27.947105 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:59:27.948047 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:59:27.948343 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:59:27.948612 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:59:27.949091 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:59:27.949377 saving as /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:59:27.949635 total size: 54703 (0 MB)
84 00:59:27.949895 No compression specified
85 00:59:27.994477 progress 59 % (0 MB)
86 00:59:27.995324 progress 100 % (0 MB)
87 00:59:27.995867 0 MB downloaded in 0.05 s (1.13 MB/s)
88 00:59:27.996400 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:59:27.997225 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:59:27.997491 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:59:27.997753 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:59:27.998189 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:59:27.998430 saving as /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/nfsrootfs/full.rootfs.tar
95 00:59:27.998632 total size: 120894716 (115 MB)
96 00:59:27.998843 Using unxz to decompress xz
97 00:59:28.039201 progress 0 % (0 MB)
98 00:59:28.829997 progress 5 % (5 MB)
99 00:59:29.727365 progress 10 % (11 MB)
100 00:59:30.553482 progress 15 % (17 MB)
101 00:59:31.367777 progress 20 % (23 MB)
102 00:59:31.981644 progress 25 % (28 MB)
103 00:59:32.875885 progress 30 % (34 MB)
104 00:59:33.726863 progress 35 % (40 MB)
105 00:59:34.123490 progress 40 % (46 MB)
106 00:59:34.542151 progress 45 % (51 MB)
107 00:59:35.266181 progress 50 % (57 MB)
108 00:59:36.151192 progress 55 % (63 MB)
109 00:59:36.929994 progress 60 % (69 MB)
110 00:59:37.685695 progress 65 % (74 MB)
111 00:59:38.460413 progress 70 % (80 MB)
112 00:59:39.282492 progress 75 % (86 MB)
113 00:59:40.066404 progress 80 % (92 MB)
114 00:59:40.823164 progress 85 % (98 MB)
115 00:59:41.680899 progress 90 % (103 MB)
116 00:59:42.448320 progress 95 % (109 MB)
117 00:59:43.271687 progress 100 % (115 MB)
118 00:59:43.284151 115 MB downloaded in 15.29 s (7.54 MB/s)
119 00:59:43.285046 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:59:43.286651 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:59:43.287184 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:59:43.287709 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:59:43.288554 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/modules.tar.xz
125 00:59:43.289022 saving as /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/modules/modules.tar
126 00:59:43.289434 total size: 11755844 (11 MB)
127 00:59:43.289858 Using unxz to decompress xz
128 00:59:43.334832 progress 0 % (0 MB)
129 00:59:43.402083 progress 5 % (0 MB)
130 00:59:43.477490 progress 10 % (1 MB)
131 00:59:43.560033 progress 15 % (1 MB)
132 00:59:43.640643 progress 20 % (2 MB)
133 00:59:43.717885 progress 25 % (2 MB)
134 00:59:43.798790 progress 30 % (3 MB)
135 00:59:43.875534 progress 35 % (3 MB)
136 00:59:43.956921 progress 40 % (4 MB)
137 00:59:44.042281 progress 45 % (5 MB)
138 00:59:44.123573 progress 50 % (5 MB)
139 00:59:44.211406 progress 55 % (6 MB)
140 00:59:44.318777 progress 60 % (6 MB)
141 00:59:44.457213 progress 65 % (7 MB)
142 00:59:44.563412 progress 70 % (7 MB)
143 00:59:44.645365 progress 75 % (8 MB)
144 00:59:44.729378 progress 80 % (9 MB)
145 00:59:44.805934 progress 85 % (9 MB)
146 00:59:44.879814 progress 90 % (10 MB)
147 00:59:44.977836 progress 95 % (10 MB)
148 00:59:45.074402 progress 100 % (11 MB)
149 00:59:45.090277 11 MB downloaded in 1.80 s (6.23 MB/s)
150 00:59:45.091245 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:59:45.092884 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:59:45.093400 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:59:45.093914 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 01:00:01.471118 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/915236/extract-nfsrootfs-6d9b2yan
156 01:00:01.471730 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:00:01.472041 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:00:01.472641 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk
159 01:00:01.473082 makedir: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin
160 01:00:01.473431 makedir: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/tests
161 01:00:01.473754 makedir: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/results
162 01:00:01.474085 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-add-keys
163 01:00:01.474630 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-add-sources
164 01:00:01.475149 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-background-process-start
165 01:00:01.475668 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-background-process-stop
166 01:00:01.476275 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-common-functions
167 01:00:01.476811 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-echo-ipv4
168 01:00:01.477299 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-install-packages
169 01:00:01.477783 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-installed-packages
170 01:00:01.478259 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-os-build
171 01:00:01.478735 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-probe-channel
172 01:00:01.479210 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-probe-ip
173 01:00:01.479687 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-target-ip
174 01:00:01.480189 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-target-mac
175 01:00:01.480677 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-target-storage
176 01:00:01.481166 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-case
177 01:00:01.481645 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-event
178 01:00:01.482119 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-feedback
179 01:00:01.482602 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-raise
180 01:00:01.483085 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-reference
181 01:00:01.483581 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-runner
182 01:00:01.484084 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-set
183 01:00:01.484568 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-test-shell
184 01:00:01.485081 Updating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-add-keys (debian)
185 01:00:01.485623 Updating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-add-sources (debian)
186 01:00:01.486150 Updating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-install-packages (debian)
187 01:00:01.486663 Updating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-installed-packages (debian)
188 01:00:01.487159 Updating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/bin/lava-os-build (debian)
189 01:00:01.487651 Creating /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/environment
190 01:00:01.488057 LAVA metadata
191 01:00:01.488324 - LAVA_JOB_ID=915236
192 01:00:01.488539 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:00:01.488906 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:00:01.489888 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:00:01.490195 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:00:01.490400 skipped lava-vland-overlay
197 01:00:01.490638 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:00:01.490888 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:00:01.491101 skipped lava-multinode-overlay
200 01:00:01.491339 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:00:01.491589 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:00:01.491834 Loading test definitions
203 01:00:01.492248 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:00:01.492476 Using /lava-915236 at stage 0
205 01:00:01.493615 uuid=915236_1.6.2.4.1 testdef=None
206 01:00:01.493928 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:00:01.494187 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:00:01.495783 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:00:01.496592 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:00:01.498523 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:00:01.499333 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:00:01.501237 runner path: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/0/tests/0_timesync-off test_uuid 915236_1.6.2.4.1
215 01:00:01.501793 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:00:01.502597 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:00:01.502834 Using /lava-915236 at stage 0
219 01:00:01.503189 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:00:01.503473 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/0/tests/1_kselftest-rtc'
221 01:00:05.237340 Running '/usr/bin/git checkout kernelci.org
222 01:00:05.437965 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 01:00:05.439467 uuid=915236_1.6.2.4.5 testdef=None
224 01:00:05.439820 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 01:00:05.441249 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:00:05.446676 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:00:05.448305 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:00:05.455599 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:00:05.457297 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:00:05.464328 runner path: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/0/tests/1_kselftest-rtc test_uuid 915236_1.6.2.4.5
234 01:00:05.464873 BOARD='meson-g12b-a311d-libretech-cc'
235 01:00:05.465276 BRANCH='mainline'
236 01:00:05.465665 SKIPFILE='/dev/null'
237 01:00:05.466054 SKIP_INSTALL='True'
238 01:00:05.466439 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kselftest.tar.xz'
239 01:00:05.466835 TST_CASENAME=''
240 01:00:05.467226 TST_CMDFILES='rtc'
241 01:00:05.468344 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:00:05.469891 Creating lava-test-runner.conf files
244 01:00:05.470293 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/915236/lava-overlay-qtt6hpkk/lava-915236/0 for stage 0
245 01:00:05.470984 - 0_timesync-off
246 01:00:05.471447 - 1_kselftest-rtc
247 01:00:05.472105 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 01:00:05.472649 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:00:28.963436 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:00:28.963877 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 01:00:28.964174 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:00:28.964445 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:00:28.964711 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 01:00:29.638670 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:00:29.639158 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:00:29.639427 extracting modules file /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915236/extract-nfsrootfs-6d9b2yan
257 01:00:31.016296 extracting modules file /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk
258 01:00:32.421912 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:00:32.422391 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 01:00:32.422696 [common] Applying overlay to NFS
261 01:00:32.422925 [common] Applying overlay /var/lib/lava/dispatcher/tmp/915236/compress-overlay-h6jfydgq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/915236/extract-nfsrootfs-6d9b2yan
262 01:00:35.151463 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:00:35.151934 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 01:00:35.152264 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 01:00:35.152527 Converting downloaded kernel to a uImage
266 01:00:35.152853 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/kernel/Image /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/kernel/uImage
267 01:00:35.571592 output: Image Name:
268 01:00:35.572040 output: Created: Thu Oct 31 01:00:35 2024
269 01:00:35.572257 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:00:35.572464 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 01:00:35.572664 output: Load Address: 01080000
272 01:00:35.572863 output: Entry Point: 01080000
273 01:00:35.573060 output:
274 01:00:35.573391 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:00:35.573656 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:00:35.573926 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:00:35.574180 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:00:35.574437 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:00:35.574689 Building ramdisk /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk
280 01:00:37.827274 >> 173421 blocks
281 01:00:45.547794 Adding RAMdisk u-boot header.
282 01:00:45.548283 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk.cpio.gz.uboot
283 01:00:45.803021 output: Image Name:
284 01:00:45.803466 output: Created: Thu Oct 31 01:00:45 2024
285 01:00:45.803677 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:00:45.803880 output: Data Size: 24149409 Bytes = 23583.41 KiB = 23.03 MiB
287 01:00:45.804229 output: Load Address: 00000000
288 01:00:45.804674 output: Entry Point: 00000000
289 01:00:45.805113 output:
290 01:00:45.806267 rename /var/lib/lava/dispatcher/tmp/915236/extract-overlay-ramdisk-6kc0erlm/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
291 01:00:45.807100 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:00:45.807710 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 01:00:45.808352 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 01:00:45.808869 No LXC device requested
295 01:00:45.809431 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:00:45.810006 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 01:00:45.810556 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:00:45.811012 Checking files for TFTP limit of 4294967296 bytes.
299 01:00:45.814038 end: 1 tftp-deploy (duration 00:01:19) [common]
300 01:00:45.814729 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:00:45.815314 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:00:45.815865 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:00:45.816502 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:00:45.817104 Using kernel file from prepare-kernel: 915236/tftp-deploy-mpmlpkd0/kernel/uImage
305 01:00:45.817807 substitutions:
306 01:00:45.818263 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:00:45.818709 - {DTB_ADDR}: 0x01070000
308 01:00:45.819153 - {DTB}: 915236/tftp-deploy-mpmlpkd0/dtb/meson-g12b-a311d-libretech-cc.dtb
309 01:00:45.819598 - {INITRD}: 915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
310 01:00:45.820072 - {KERNEL_ADDR}: 0x01080000
311 01:00:45.820517 - {KERNEL}: 915236/tftp-deploy-mpmlpkd0/kernel/uImage
312 01:00:45.820957 - {LAVA_MAC}: None
313 01:00:45.821435 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/915236/extract-nfsrootfs-6d9b2yan
314 01:00:45.821877 - {NFS_SERVER_IP}: 192.168.6.2
315 01:00:45.822306 - {PRESEED_CONFIG}: None
316 01:00:45.822737 - {PRESEED_LOCAL}: None
317 01:00:45.823171 - {RAMDISK_ADDR}: 0x08000000
318 01:00:45.823599 - {RAMDISK}: 915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
319 01:00:45.824061 - {ROOT_PART}: None
320 01:00:45.824501 - {ROOT}: None
321 01:00:45.824930 - {SERVER_IP}: 192.168.6.2
322 01:00:45.825357 - {TEE_ADDR}: 0x83000000
323 01:00:45.825784 - {TEE}: None
324 01:00:45.826211 Parsed boot commands:
325 01:00:45.826626 - setenv autoload no
326 01:00:45.827050 - setenv initrd_high 0xffffffff
327 01:00:45.827477 - setenv fdt_high 0xffffffff
328 01:00:45.827903 - dhcp
329 01:00:45.828361 - setenv serverip 192.168.6.2
330 01:00:45.828793 - tftpboot 0x01080000 915236/tftp-deploy-mpmlpkd0/kernel/uImage
331 01:00:45.829222 - tftpboot 0x08000000 915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
332 01:00:45.829654 - tftpboot 0x01070000 915236/tftp-deploy-mpmlpkd0/dtb/meson-g12b-a311d-libretech-cc.dtb
333 01:00:45.830082 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/915236/extract-nfsrootfs-6d9b2yan,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:00:45.830523 - bootm 0x01080000 0x08000000 0x01070000
335 01:00:45.831089 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:00:45.832771 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:00:45.833242 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 01:00:45.850763 Setting prompt string to ['lava-test: # ']
340 01:00:45.852507 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:00:45.853206 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:00:45.853823 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:00:45.854405 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:00:45.855674 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 01:00:45.897528 >> OK - accepted request
346 01:00:45.899740 Returned 0 in 0 seconds
347 01:00:46.000996 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:00:46.002751 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:00:46.003344 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:00:46.003885 Setting prompt string to ['Hit any key to stop autoboot']
352 01:00:46.004449 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:00:46.006142 Trying 192.168.56.21...
354 01:00:46.006663 Connected to conserv1.
355 01:00:46.007120 Escape character is '^]'.
356 01:00:46.007575
357 01:00:46.008061 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 01:00:46.008528
359 01:00:57.380549 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 01:00:57.380974 bl2_stage_init 0x01
361 01:00:57.381203 bl2_stage_init 0x81
362 01:00:57.386028 hw id: 0x0000 - pwm id 0x01
363 01:00:57.386312 bl2_stage_init 0xc1
364 01:00:57.386539 bl2_stage_init 0x02
365 01:00:57.386748
366 01:00:57.391520 L0:00000000
367 01:00:57.391821 L1:20000703
368 01:00:57.392115 L2:00008067
369 01:00:57.392341 L3:14000000
370 01:00:57.394691 B2:00402000
371 01:00:57.394963 B1:e0f83180
372 01:00:57.395185
373 01:00:57.395393 TE: 58124
374 01:00:57.395597
375 01:00:57.405864 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 01:00:57.406180
377 01:00:57.406396 Board ID = 1
378 01:00:57.406603 Set A53 clk to 24M
379 01:00:57.406808 Set A73 clk to 24M
380 01:00:57.411301 Set clk81 to 24M
381 01:00:57.411572 A53 clk: 1200 MHz
382 01:00:57.411782 A73 clk: 1200 MHz
383 01:00:57.417001 CLK81: 166.6M
384 01:00:57.417275 smccc: 00012a91
385 01:00:57.422643 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 01:00:57.422909 board id: 1
387 01:00:57.431114 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:00:57.441719 fw parse done
389 01:00:57.447622 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:00:57.490227 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:00:57.501166 PIEI prepare done
392 01:00:57.501436 fastboot data load
393 01:00:57.501642 fastboot data verify
394 01:00:57.506738 verify result: 266
395 01:00:57.512480 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 01:00:57.512764 LPDDR4 probe
397 01:00:57.512972 ddr clk to 1584MHz
398 01:00:57.520352 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:00:57.557617
400 01:00:57.558065 dmc_version 0001
401 01:00:57.564333 Check phy result
402 01:00:57.570162 INFO : End of CA training
403 01:00:57.570449 INFO : End of initialization
404 01:00:57.575787 INFO : Training has run successfully!
405 01:00:57.576087 Check phy result
406 01:00:57.581377 INFO : End of initialization
407 01:00:57.581775 INFO : End of read enable training
408 01:00:57.584663 INFO : End of fine write leveling
409 01:00:57.590247 INFO : End of Write leveling coarse delay
410 01:00:57.595801 INFO : Training has run successfully!
411 01:00:57.596093 Check phy result
412 01:00:57.596312 INFO : End of initialization
413 01:00:57.601533 INFO : End of read dq deskew training
414 01:00:57.607034 INFO : End of MPR read delay center optimization
415 01:00:57.607446 INFO : End of write delay center optimization
416 01:00:57.612611 INFO : End of read delay center optimization
417 01:00:57.618248 INFO : End of max read latency training
418 01:00:57.618527 INFO : Training has run successfully!
419 01:00:57.623854 1D training succeed
420 01:00:57.629786 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:00:57.677455 Check phy result
422 01:00:57.677808 INFO : End of initialization
423 01:00:57.699155 INFO : End of 2D read delay Voltage center optimization
424 01:00:57.718667 INFO : End of 2D read delay Voltage center optimization
425 01:00:57.770729 INFO : End of 2D write delay Voltage center optimization
426 01:00:57.820074 INFO : End of 2D write delay Voltage center optimization
427 01:00:57.825685 INFO : Training has run successfully!
428 01:00:57.825971
429 01:00:57.826190 channel==0
430 01:00:57.831165 RxClkDly_Margin_A0==88 ps 9
431 01:00:57.831600 TxDqDly_Margin_A0==98 ps 10
432 01:00:57.836767 RxClkDly_Margin_A1==88 ps 9
433 01:00:57.837193 TxDqDly_Margin_A1==98 ps 10
434 01:00:57.837530 TrainedVREFDQ_A0==74
435 01:00:57.842368 TrainedVREFDQ_A1==74
436 01:00:57.842650 VrefDac_Margin_A0==25
437 01:00:57.842861 DeviceVref_Margin_A0==40
438 01:00:57.847929 VrefDac_Margin_A1==25
439 01:00:57.848352 DeviceVref_Margin_A1==40
440 01:00:57.848666
441 01:00:57.848972
442 01:00:57.853680 channel==1
443 01:00:57.854090 RxClkDly_Margin_A0==78 ps 8
444 01:00:57.854329 TxDqDly_Margin_A0==88 ps 9
445 01:00:57.859178 RxClkDly_Margin_A1==88 ps 9
446 01:00:57.859454 TxDqDly_Margin_A1==88 ps 9
447 01:00:57.864751 TrainedVREFDQ_A0==76
448 01:00:57.865150 TrainedVREFDQ_A1==77
449 01:00:57.865473 VrefDac_Margin_A0==23
450 01:00:57.870294 DeviceVref_Margin_A0==38
451 01:00:57.870576 VrefDac_Margin_A1==24
452 01:00:57.875997 DeviceVref_Margin_A1==37
453 01:00:57.876415
454 01:00:57.876745 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:00:57.876971
456 01:00:57.909453 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000018 00000017 00000019 00000019 00000019 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
457 01:00:57.909826 2D training succeed
458 01:00:57.915013 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:00:57.920619 auto size-- 65535DDR cs0 size: 2048MB
460 01:00:57.921036 DDR cs1 size: 2048MB
461 01:00:57.926217 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:00:57.926499 cs0 DataBus test pass
463 01:00:57.931816 cs1 DataBus test pass
464 01:00:57.932295 cs0 AddrBus test pass
465 01:00:57.932631 cs1 AddrBus test pass
466 01:00:57.932865
467 01:00:57.937521 100bdlr_step_size ps== 420
468 01:00:57.937806 result report
469 01:00:57.943012 boot times 0Enable ddr reg access
470 01:00:57.948227 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:00:57.961675 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 01:00:58.534702 0.0;M3 CHK:0;cm4_sp_mode 0
473 01:00:58.535131 MVN_1=0x00000000
474 01:00:58.540210 MVN_2=0x00000000
475 01:00:58.545968 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 01:00:58.546376 OPS=0x10
477 01:00:58.546609 ring efuse init
478 01:00:58.546812 chipver efuse init
479 01:00:58.554202 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 01:00:58.554623 [0.018961 Inits done]
481 01:00:58.554992 secure task start!
482 01:00:58.561737 high task start!
483 01:00:58.562152 low task start!
484 01:00:58.562387 run into bl31
485 01:00:58.568526 NOTICE: BL31: v1.3(release):4fc40b1
486 01:00:58.576185 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 01:00:58.576467 NOTICE: BL31: G12A normal boot!
488 01:00:58.601543 NOTICE: BL31: BL33 decompress pass
489 01:00:58.607239 ERROR: Error initializing runtime service opteed_fast
490 01:00:59.840191
491 01:00:59.840615
492 01:00:59.848511 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 01:00:59.848800
494 01:00:59.849024 Model: Libre Computer AML-A311D-CC Alta
495 01:01:00.057000 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 01:01:00.080348 DRAM: 2 GiB (effective 3.8 GiB)
497 01:01:00.223381 Core: 408 devices, 31 uclasses, devicetree: separate
498 01:01:00.229216 WDT: Not starting watchdog@f0d0
499 01:01:00.261447 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 01:01:00.273894 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 01:01:00.278879 ** Bad device specification mmc 0 **
502 01:01:00.289212 Card did not respond to voltage select! : -110
503 01:01:00.296872 ** Bad device specification mmc 0 **
504 01:01:00.297159 Couldn't find partition mmc 0
505 01:01:00.305229 Card did not respond to voltage select! : -110
506 01:01:00.310737 ** Bad device specification mmc 0 **
507 01:01:00.311152 Couldn't find partition mmc 0
508 01:01:00.315842 Error: could not access storage.
509 01:01:01.629795 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 01:01:01.630242 bl2_stage_init 0x01
511 01:01:01.630486 bl2_stage_init 0x81
512 01:01:01.635329 hw id: 0x0000 - pwm id 0x01
513 01:01:01.636091 bl2_stage_init 0xc1
514 01:01:01.636733 bl2_stage_init 0x02
515 01:01:01.637186
516 01:01:01.640845 L0:00000000
517 01:01:01.641324 L1:20000703
518 01:01:01.641740 L2:00008067
519 01:01:01.642147 L3:14000000
520 01:01:01.643773 B2:00402000
521 01:01:01.644250 B1:e0f83180
522 01:01:01.644663
523 01:01:01.645068 TE: 58159
524 01:01:01.645467
525 01:01:01.655038 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 01:01:01.655497
527 01:01:01.655912 Board ID = 1
528 01:01:01.656352 Set A53 clk to 24M
529 01:01:01.656756 Set A73 clk to 24M
530 01:01:01.660613 Set clk81 to 24M
531 01:01:01.661291 A53 clk: 1200 MHz
532 01:01:01.661867 A73 clk: 1200 MHz
533 01:01:01.666418 CLK81: 166.6M
534 01:01:01.667032 smccc: 00012ab5
535 01:01:01.671808 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 01:01:01.672457 board id: 1
537 01:01:01.680398 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 01:01:01.691046 fw parse done
539 01:01:01.696974 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 01:01:01.739629 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 01:01:01.750517 PIEI prepare done
542 01:01:01.751154 fastboot data load
543 01:01:01.751720 fastboot data verify
544 01:01:01.756151 verify result: 266
545 01:01:01.761746 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 01:01:01.762319 LPDDR4 probe
547 01:01:01.762752 ddr clk to 1584MHz
548 01:01:01.769648 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 01:01:01.805902
550 01:01:01.806394 dmc_version 0001
551 01:01:01.813566 Check phy result
552 01:01:01.819439 INFO : End of CA training
553 01:01:01.819897 INFO : End of initialization
554 01:01:01.825039 INFO : Training has run successfully!
555 01:01:01.825496 Check phy result
556 01:01:01.830658 INFO : End of initialization
557 01:01:01.831108 INFO : End of read enable training
558 01:01:01.834072 INFO : End of fine write leveling
559 01:01:01.839489 INFO : End of Write leveling coarse delay
560 01:01:01.845080 INFO : Training has run successfully!
561 01:01:01.845545 Check phy result
562 01:01:01.845954 INFO : End of initialization
563 01:01:01.850653 INFO : End of read dq deskew training
564 01:01:01.856287 INFO : End of MPR read delay center optimization
565 01:01:01.856740 INFO : End of write delay center optimization
566 01:01:01.861917 INFO : End of read delay center optimization
567 01:01:01.867497 INFO : End of max read latency training
568 01:01:01.867960 INFO : Training has run successfully!
569 01:01:01.873104 1D training succeed
570 01:01:01.879120 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 01:01:01.926675 Check phy result
572 01:01:01.927158 INFO : End of initialization
573 01:01:01.948379 INFO : End of 2D read delay Voltage center optimization
574 01:01:01.968645 INFO : End of 2D read delay Voltage center optimization
575 01:01:02.020201 INFO : End of 2D write delay Voltage center optimization
576 01:01:02.070048 INFO : End of 2D write delay Voltage center optimization
577 01:01:02.075531 INFO : Training has run successfully!
578 01:01:02.076033
579 01:01:02.076465 channel==0
580 01:01:02.081135 RxClkDly_Margin_A0==88 ps 9
581 01:01:02.081585 TxDqDly_Margin_A0==98 ps 10
582 01:01:02.086734 RxClkDly_Margin_A1==88 ps 9
583 01:01:02.087189 TxDqDly_Margin_A1==98 ps 10
584 01:01:02.087603 TrainedVREFDQ_A0==74
585 01:01:02.092356 TrainedVREFDQ_A1==74
586 01:01:02.092820 VrefDac_Margin_A0==25
587 01:01:02.093224 DeviceVref_Margin_A0==40
588 01:01:02.097946 VrefDac_Margin_A1==25
589 01:01:02.098402 DeviceVref_Margin_A1==40
590 01:01:02.098811
591 01:01:02.099218
592 01:01:02.103528 channel==1
593 01:01:02.104008 RxClkDly_Margin_A0==98 ps 10
594 01:01:02.104432 TxDqDly_Margin_A0==88 ps 9
595 01:01:02.109221 RxClkDly_Margin_A1==88 ps 9
596 01:01:02.109675 TxDqDly_Margin_A1==98 ps 10
597 01:01:02.114724 TrainedVREFDQ_A0==76
598 01:01:02.115195 TrainedVREFDQ_A1==78
599 01:01:02.115608 VrefDac_Margin_A0==22
600 01:01:02.120360 DeviceVref_Margin_A0==38
601 01:01:02.120808 VrefDac_Margin_A1==24
602 01:01:02.126112 DeviceVref_Margin_A1==36
603 01:01:02.126557
604 01:01:02.126970 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 01:01:02.127374
606 01:01:02.159511 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 01:01:02.160106 2D training succeed
608 01:01:02.165153 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 01:01:02.170708 auto size-- 65535DDR cs0 size: 2048MB
610 01:01:02.171176 DDR cs1 size: 2048MB
611 01:01:02.176342 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 01:01:02.176806 cs0 DataBus test pass
613 01:01:02.181919 cs1 DataBus test pass
614 01:01:02.182388 cs0 AddrBus test pass
615 01:01:02.182800 cs1 AddrBus test pass
616 01:01:02.183209
617 01:01:02.187500 100bdlr_step_size ps== 420
618 01:01:02.187973 result report
619 01:01:02.193129 boot times 0Enable ddr reg access
620 01:01:02.198524 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 01:01:02.211975 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 01:01:02.785739 0.0;M3 CHK:0;cm4_sp_mode 0
623 01:01:02.786172 MVN_1=0x00000000
624 01:01:02.791271 MVN_2=0x00000000
625 01:01:02.796973 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 01:01:02.797452 OPS=0x10
627 01:01:02.797862 ring efuse init
628 01:01:02.798261 chipver efuse init
629 01:01:02.802547 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 01:01:02.808172 [0.018961 Inits done]
631 01:01:02.808624 secure task start!
632 01:01:02.809020 high task start!
633 01:01:02.812746 low task start!
634 01:01:02.813185 run into bl31
635 01:01:02.819420 NOTICE: BL31: v1.3(release):4fc40b1
636 01:01:02.827253 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 01:01:02.827700 NOTICE: BL31: G12A normal boot!
638 01:01:02.852572 NOTICE: BL31: BL33 decompress pass
639 01:01:02.858247 ERROR: Error initializing runtime service opteed_fast
640 01:01:04.091505
641 01:01:04.092111
642 01:01:04.099788 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 01:01:04.100286
644 01:01:04.100709 Model: Libre Computer AML-A311D-CC Alta
645 01:01:04.308200 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 01:01:04.331658 DRAM: 2 GiB (effective 3.8 GiB)
647 01:01:04.474609 Core: 408 devices, 31 uclasses, devicetree: separate
648 01:01:04.480370 WDT: Not starting watchdog@f0d0
649 01:01:04.512672 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 01:01:04.525089 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 01:01:04.530083 ** Bad device specification mmc 0 **
652 01:01:04.540532 Card did not respond to voltage select! : -110
653 01:01:04.548142 ** Bad device specification mmc 0 **
654 01:01:04.548598 Couldn't find partition mmc 0
655 01:01:04.556536 Card did not respond to voltage select! : -110
656 01:01:04.561794 ** Bad device specification mmc 0 **
657 01:01:04.562245 Couldn't find partition mmc 0
658 01:01:04.567021 Error: could not access storage.
659 01:01:04.909566 Net: eth0: ethernet@ff3f0000
660 01:01:04.910084 starting USB...
661 01:01:05.161289 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 01:01:05.161794 Starting the controller
663 01:01:05.168245 USB XHCI 1.10
664 01:01:06.880137 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
665 01:01:06.880837 bl2_stage_init 0x81
666 01:01:06.885591 hw id: 0x0000 - pwm id 0x01
667 01:01:06.886223 bl2_stage_init 0xc1
668 01:01:06.886664 bl2_stage_init 0x02
669 01:01:06.887087
670 01:01:06.891111 L0:00000000
671 01:01:06.891631 L1:20000703
672 01:01:06.892137 L2:00008067
673 01:01:06.892532 L3:14000000
674 01:01:06.892889 B2:00402000
675 01:01:06.897427 B1:e0f83180
676 01:01:06.898035
677 01:01:06.898476 TE: 58150
678 01:01:06.898896
679 01:01:06.902846 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
680 01:01:06.903366
681 01:01:06.903797 Board ID = 1
682 01:01:06.907891 Set A53 clk to 24M
683 01:01:06.908407 Set A73 clk to 24M
684 01:01:06.908829 Set clk81 to 24M
685 01:01:06.913471 A53 clk: 1200 MHz
686 01:01:06.913958 A73 clk: 1200 MHz
687 01:01:06.914372 CLK81: 166.6M
688 01:01:06.914780 smccc: 00012aac
689 01:01:06.919787 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
690 01:01:06.924806 board id: 1
691 01:01:06.930808 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
692 01:01:06.941109 fw parse done
693 01:01:06.946927 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
694 01:01:06.989638 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
695 01:01:07.000626 PIEI prepare done
696 01:01:07.001237 fastboot data load
697 01:01:07.001669 fastboot data verify
698 01:01:07.006214 verify result: 266
699 01:01:07.011804 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
700 01:01:07.012341 LPDDR4 probe
701 01:01:07.012763 ddr clk to 1584MHz
702 01:01:07.019754 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
703 01:01:07.057064
704 01:01:07.057533 dmc_version 0001
705 01:01:07.063696 Check phy result
706 01:01:07.069618 INFO : End of CA training
707 01:01:07.070054 INFO : End of initialization
708 01:01:07.075184 INFO : Training has run successfully!
709 01:01:07.075630 Check phy result
710 01:01:07.080880 INFO : End of initialization
711 01:01:07.081326 INFO : End of read enable training
712 01:01:07.086369 INFO : End of fine write leveling
713 01:01:07.092006 INFO : End of Write leveling coarse delay
714 01:01:07.092450 INFO : Training has run successfully!
715 01:01:07.092861 Check phy result
716 01:01:07.097609 INFO : End of initialization
717 01:01:07.098050 INFO : End of read dq deskew training
718 01:01:07.103171 INFO : End of MPR read delay center optimization
719 01:01:07.108863 INFO : End of write delay center optimization
720 01:01:07.114388 INFO : End of read delay center optimization
721 01:01:07.114826 INFO : End of max read latency training
722 01:01:07.120025 INFO : Training has run successfully!
723 01:01:07.120478 1D training succeed
724 01:01:07.129198 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
725 01:01:07.176717 Check phy result
726 01:01:07.177188 INFO : End of initialization
727 01:01:07.198452 INFO : End of 2D read delay Voltage center optimization
728 01:01:07.218670 INFO : End of 2D read delay Voltage center optimization
729 01:01:07.270812 INFO : End of 2D write delay Voltage center optimization
730 01:01:07.320144 INFO : End of 2D write delay Voltage center optimization
731 01:01:07.325707 INFO : Training has run successfully!
732 01:01:07.326143
733 01:01:07.326554 channel==0
734 01:01:07.331362 RxClkDly_Margin_A0==88 ps 9
735 01:01:07.331798 TxDqDly_Margin_A0==98 ps 10
736 01:01:07.336975 RxClkDly_Margin_A1==88 ps 9
737 01:01:07.337418 TxDqDly_Margin_A1==98 ps 10
738 01:01:07.337829 TrainedVREFDQ_A0==74
739 01:01:07.342541 TrainedVREFDQ_A1==74
740 01:01:07.342978 VrefDac_Margin_A0==25
741 01:01:07.343384 DeviceVref_Margin_A0==40
742 01:01:07.348096 VrefDac_Margin_A1==25
743 01:01:07.348537 DeviceVref_Margin_A1==40
744 01:01:07.348939
745 01:01:07.349343
746 01:01:07.353680 channel==1
747 01:01:07.354126 RxClkDly_Margin_A0==98 ps 10
748 01:01:07.354533 TxDqDly_Margin_A0==98 ps 10
749 01:01:07.359313 RxClkDly_Margin_A1==98 ps 10
750 01:01:07.359772 TxDqDly_Margin_A1==88 ps 9
751 01:01:07.365003 TrainedVREFDQ_A0==77
752 01:01:07.365458 TrainedVREFDQ_A1==77
753 01:01:07.365869 VrefDac_Margin_A0==22
754 01:01:07.370370 DeviceVref_Margin_A0==37
755 01:01:07.370803 VrefDac_Margin_A1==22
756 01:01:07.376005 DeviceVref_Margin_A1==37
757 01:01:07.376445
758 01:01:07.376852 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
759 01:01:07.381599
760 01:01:07.409602 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
761 01:01:07.410074 2D training succeed
762 01:01:07.415209 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
763 01:01:07.420850 auto size-- 65535DDR cs0 size: 2048MB
764 01:01:07.421284 DDR cs1 size: 2048MB
765 01:01:07.426442 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
766 01:01:07.426881 cs0 DataBus test pass
767 01:01:07.432030 cs1 DataBus test pass
768 01:01:07.432472 cs0 AddrBus test pass
769 01:01:07.432879 cs1 AddrBus test pass
770 01:01:07.433274
771 01:01:07.437585 100bdlr_step_size ps== 420
772 01:01:07.438029 result report
773 01:01:07.443211 boot times 0Enable ddr reg access
774 01:01:07.448696 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
775 01:01:07.462148 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
776 01:01:08.035808 0.0;M3 CHK:0;cm4_sp_mode 0
777 01:01:08.036421 MVN_1=0x00000000
778 01:01:08.041267 MVN_2=0x00000000
779 01:01:08.047065 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
780 01:01:08.047567 OPS=0x10
781 01:01:08.047970 ring efuse init
782 01:01:08.048408 chipver efuse init
783 01:01:08.052638 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
784 01:01:08.058242 [0.018960 Inits done]
785 01:01:08.058671 secure task start!
786 01:01:08.059059 high task start!
787 01:01:08.062910 low task start!
788 01:01:08.063334 run into bl31
789 01:01:08.069474 NOTICE: BL31: v1.3(release):4fc40b1
790 01:01:08.077259 NOTICE: BL31: Built : 15:58:17, May 22 2019
791 01:01:08.077689 NOTICE: BL31: G12A normal boot!
792 01:01:08.102623 NOTICE: BL31: BL33 decompress pass
793 01:01:08.108292 ERROR: Error initializing runtime service opteed_fast
794 01:01:09.341207
795 01:01:09.341793
796 01:01:09.349610 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
797 01:01:09.350064
798 01:01:09.350481 Model: Libre Computer AML-A311D-CC Alta
799 01:01:09.557986 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
800 01:01:09.581405 DRAM: 2 GiB (effective 3.8 GiB)
801 01:01:09.724404 Core: 408 devices, 31 uclasses, devicetree: separate
802 01:01:09.730283 WDT: Not starting watchdog@f0d0
803 01:01:09.762508 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
804 01:01:09.775075 Loading Environment from FAT... Card did not respond to voltage select! : -110
805 01:01:09.779943 ** Bad device specification mmc 0 **
806 01:01:09.790288 Card did not respond to voltage select! : -110
807 01:01:09.797962 ** Bad device specification mmc 0 **
808 01:01:09.798402 Couldn't find partition mmc 0
809 01:01:09.806284 Card did not respond to voltage select! : -110
810 01:01:09.811811 ** Bad device specification mmc 0 **
811 01:01:09.812279 Couldn't find partition mmc 0
812 01:01:09.816900 Error: could not access storage.
813 01:01:10.159353 Net: eth0: ethernet@ff3f0000
814 01:01:10.159843 starting USB...
815 01:01:10.411232 Bus usb@ff500000: Register 3000140 NbrPorts 3
816 01:01:10.411703 Starting the controller
817 01:01:10.418119 USB XHCI 1.10
818 01:01:12.581397 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
819 01:01:12.582039 bl2_stage_init 0x01
820 01:01:12.582475 bl2_stage_init 0x81
821 01:01:12.586948 hw id: 0x0000 - pwm id 0x01
822 01:01:12.587406 bl2_stage_init 0xc1
823 01:01:12.587826 bl2_stage_init 0x02
824 01:01:12.588300
825 01:01:12.592416 L0:00000000
826 01:01:12.592876 L1:20000703
827 01:01:12.593284 L2:00008067
828 01:01:12.593683 L3:14000000
829 01:01:12.595385 B2:00402000
830 01:01:12.595829 B1:e0f83180
831 01:01:12.596272
832 01:01:12.596683 TE: 58124
833 01:01:12.597088
834 01:01:12.606581 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 01:01:12.607050
836 01:01:12.607464 Board ID = 1
837 01:01:12.607865 Set A53 clk to 24M
838 01:01:12.608307 Set A73 clk to 24M
839 01:01:12.612111 Set clk81 to 24M
840 01:01:12.612566 A53 clk: 1200 MHz
841 01:01:12.612976 A73 clk: 1200 MHz
842 01:01:12.617719 CLK81: 166.6M
843 01:01:12.618178 smccc: 00012a92
844 01:01:12.623427 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 01:01:12.623880 board id: 1
846 01:01:12.631953 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 01:01:12.642654 fw parse done
848 01:01:12.648495 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 01:01:12.691067 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 01:01:12.702002 PIEI prepare done
851 01:01:12.702449 fastboot data load
852 01:01:12.702861 fastboot data verify
853 01:01:12.707702 verify result: 266
854 01:01:12.713318 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 01:01:12.713783 LPDDR4 probe
856 01:01:12.714196 ddr clk to 1584MHz
857 01:01:12.721235 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 01:01:12.758542
859 01:01:12.759030 dmc_version 0001
860 01:01:12.765181 Check phy result
861 01:01:12.771058 INFO : End of CA training
862 01:01:12.771523 INFO : End of initialization
863 01:01:12.776678 INFO : Training has run successfully!
864 01:01:12.777137 Check phy result
865 01:01:12.782296 INFO : End of initialization
866 01:01:12.782755 INFO : End of read enable training
867 01:01:12.787875 INFO : End of fine write leveling
868 01:01:12.793429 INFO : End of Write leveling coarse delay
869 01:01:12.793896 INFO : Training has run successfully!
870 01:01:12.794312 Check phy result
871 01:01:12.799120 INFO : End of initialization
872 01:01:12.799580 INFO : End of read dq deskew training
873 01:01:12.804678 INFO : End of MPR read delay center optimization
874 01:01:12.810298 INFO : End of write delay center optimization
875 01:01:12.815843 INFO : End of read delay center optimization
876 01:01:12.816346 INFO : End of max read latency training
877 01:01:12.821421 INFO : Training has run successfully!
878 01:01:12.821878 1D training succeed
879 01:01:12.830745 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 01:01:12.878294 Check phy result
881 01:01:12.878768 INFO : End of initialization
882 01:01:12.900079 INFO : End of 2D read delay Voltage center optimization
883 01:01:12.920299 INFO : End of 2D read delay Voltage center optimization
884 01:01:12.972310 INFO : End of 2D write delay Voltage center optimization
885 01:01:13.021735 INFO : End of 2D write delay Voltage center optimization
886 01:01:13.027242 INFO : Training has run successfully!
887 01:01:13.027702
888 01:01:13.028160 channel==0
889 01:01:13.032802 RxClkDly_Margin_A0==88 ps 9
890 01:01:13.033263 TxDqDly_Margin_A0==98 ps 10
891 01:01:13.036221 RxClkDly_Margin_A1==88 ps 9
892 01:01:13.036686 TxDqDly_Margin_A1==98 ps 10
893 01:01:13.041802 TrainedVREFDQ_A0==74
894 01:01:13.042291 TrainedVREFDQ_A1==74
895 01:01:13.042710 VrefDac_Margin_A0==25
896 01:01:13.047320 DeviceVref_Margin_A0==40
897 01:01:13.047788 VrefDac_Margin_A1==25
898 01:01:13.053016 DeviceVref_Margin_A1==40
899 01:01:13.053469
900 01:01:13.053866
901 01:01:13.054257 channel==1
902 01:01:13.054639 RxClkDly_Margin_A0==98 ps 10
903 01:01:13.056355 TxDqDly_Margin_A0==98 ps 10
904 01:01:13.061880 RxClkDly_Margin_A1==98 ps 10
905 01:01:13.062321 TxDqDly_Margin_A1==98 ps 10
906 01:01:13.067564 TrainedVREFDQ_A0==77
907 01:01:13.068037 TrainedVREFDQ_A1==77
908 01:01:13.068436 VrefDac_Margin_A0==22
909 01:01:13.073107 DeviceVref_Margin_A0==37
910 01:01:13.073552 VrefDac_Margin_A1==22
911 01:01:13.073937 DeviceVref_Margin_A1==37
912 01:01:13.074317
913 01:01:13.078742 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 01:01:13.079192
915 01:01:13.112194 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 00000019 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
916 01:01:13.112699 2D training succeed
917 01:01:13.117777 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 01:01:13.123434 auto size-- 65535DDR cs0 size: 2048MB
919 01:01:13.123883 DDR cs1 size: 2048MB
920 01:01:13.128954 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 01:01:13.129402 cs0 DataBus test pass
922 01:01:13.129795 cs1 DataBus test pass
923 01:01:13.134720 cs0 AddrBus test pass
924 01:01:13.135158 cs1 AddrBus test pass
925 01:01:13.135548
926 01:01:13.140182 100bdlr_step_size ps== 420
927 01:01:13.140642 result report
928 01:01:13.141038 boot times 0Enable ddr reg access
929 01:01:13.150198 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 01:01:13.163708 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 01:01:13.737365 0.0;M3 CHK:0;cm4_sp_mode 0
932 01:01:13.737966 MVN_1=0x00000000
933 01:01:13.742848 MVN_2=0x00000000
934 01:01:13.748665 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 01:01:13.749114 OPS=0x10
936 01:01:13.749526 ring efuse init
937 01:01:13.749926 chipver efuse init
938 01:01:13.754227 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 01:01:13.759794 [0.018961 Inits done]
940 01:01:13.760282 secure task start!
941 01:01:13.760696 high task start!
942 01:01:13.764383 low task start!
943 01:01:13.764831 run into bl31
944 01:01:13.771045 NOTICE: BL31: v1.3(release):4fc40b1
945 01:01:13.778838 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 01:01:13.779288 NOTICE: BL31: G12A normal boot!
947 01:01:13.804217 NOTICE: BL31: BL33 decompress pass
948 01:01:13.809927 ERROR: Error initializing runtime service opteed_fast
949 01:01:15.042725
950 01:01:15.043268
951 01:01:15.051151 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 01:01:15.051622
953 01:01:15.052067 Model: Libre Computer AML-A311D-CC Alta
954 01:01:15.259527 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 01:01:15.282968 DRAM: 2 GiB (effective 3.8 GiB)
956 01:01:15.425974 Core: 408 devices, 31 uclasses, devicetree: separate
957 01:01:15.430851 WDT: Not starting watchdog@f0d0
958 01:01:15.464091 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 01:01:15.476527 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 01:01:15.481516 ** Bad device specification mmc 0 **
961 01:01:15.491905 Card did not respond to voltage select! : -110
962 01:01:15.499478 ** Bad device specification mmc 0 **
963 01:01:15.499961 Couldn't find partition mmc 0
964 01:01:15.507910 Card did not respond to voltage select! : -110
965 01:01:15.513353 ** Bad device specification mmc 0 **
966 01:01:15.513809 Couldn't find partition mmc 0
967 01:01:15.518407 Error: could not access storage.
968 01:01:15.862039 Net: eth0: ethernet@ff3f0000
969 01:01:15.862645 starting USB...
970 01:01:16.113743 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 01:01:16.114320 Starting the controller
972 01:01:16.120728 USB XHCI 1.10
973 01:01:17.674754 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 01:01:17.683038 scanning usb for storage devices... 0 Storage Device(s) found
976 01:01:17.734619 Hit any key to stop autoboot: 1
977 01:01:17.735447 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
978 01:01:17.736154 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 01:01:17.736660 Setting prompt string to ['=>']
980 01:01:17.737147 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 01:01:17.750455 0
982 01:01:17.751332 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 01:01:17.751833 Sending with 10 millisecond of delay
985 01:01:18.886453 => setenv autoload no
986 01:01:18.897263 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 01:01:18.902186 setenv autoload no
988 01:01:18.902900 Sending with 10 millisecond of delay
990 01:01:20.700004 => setenv initrd_high 0xffffffff
991 01:01:20.710838 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 01:01:20.711727 setenv initrd_high 0xffffffff
993 01:01:20.712502 Sending with 10 millisecond of delay
995 01:01:22.330076 => setenv fdt_high 0xffffffff
996 01:01:22.340664 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
997 01:01:22.341182 setenv fdt_high 0xffffffff
998 01:01:22.341654 Sending with 10 millisecond of delay
1000 01:01:22.633946 => dhcp
1001 01:01:22.644823 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1002 01:01:22.645828 dhcp
1003 01:01:22.646278 Speed: 1000, full duplex
1004 01:01:22.646690 BOOTP broadcast 1
1005 01:01:22.657842 DHCP client bound to address 192.168.6.27 (13 ms)
1006 01:01:22.658493 Sending with 10 millisecond of delay
1008 01:01:24.334553 => setenv serverip 192.168.6.2
1009 01:01:24.345385 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1010 01:01:24.346280 setenv serverip 192.168.6.2
1011 01:01:24.346989 Sending with 10 millisecond of delay
1013 01:01:28.069579 => tftpboot 0x01080000 915236/tftp-deploy-mpmlpkd0/kernel/uImage
1014 01:01:28.080363 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 01:01:28.081186 tftpboot 0x01080000 915236/tftp-deploy-mpmlpkd0/kernel/uImage
1016 01:01:28.081632 Speed: 1000, full duplex
1017 01:01:28.082045 Using ethernet@ff3f0000 device
1018 01:01:28.083438 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 01:01:28.088973 Filename '915236/tftp-deploy-mpmlpkd0/kernel/uImage'.
1020 01:01:28.092534 Load address: 0x1080000
1021 01:01:30.411824 Loading: *################################################## 36.1 MiB
1022 01:01:30.412485 15.6 MiB/s
1023 01:01:30.412919 done
1024 01:01:30.416090 Bytes transferred = 37878336 (241fa40 hex)
1025 01:01:30.416879 Sending with 10 millisecond of delay
1027 01:01:35.102620 => tftpboot 0x08000000 915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
1028 01:01:35.113391 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 01:01:35.114174 tftpboot 0x08000000 915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot
1030 01:01:35.114612 Speed: 1000, full duplex
1031 01:01:35.115025 Using ethernet@ff3f0000 device
1032 01:01:35.116534 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 01:01:35.124761 Filename '915236/tftp-deploy-mpmlpkd0/ramdisk/ramdisk.cpio.gz.uboot'.
1034 01:01:35.125210 Load address: 0x8000000
1035 01:01:41.860826 Loading: *#####T ############################################ UDP wrong checksum 00000005 0000d582
1036 01:01:46.861728 T UDP wrong checksum 00000005 0000d582
1037 01:01:48.339349 UDP wrong checksum 000000ff 0000d1f3
1038 01:01:48.380636 UDP wrong checksum 000000ff 00006de6
1039 01:01:56.863696 T T UDP wrong checksum 00000005 0000d582
1040 01:02:16.868599 T T T T UDP wrong checksum 00000005 0000d582
1041 01:02:22.736303 T UDP wrong checksum 000000ff 00000b03
1042 01:02:22.791432 UDP wrong checksum 000000ff 0000a1f5
1043 01:02:30.433566 T UDP wrong checksum 000000ff 00005d16
1044 01:02:30.459501 UDP wrong checksum 000000ff 0000f208
1045 01:02:31.872852
1046 01:02:31.873256 Retry count exceeded; starting again
1048 01:02:31.874150 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1051 01:02:31.875137 end: 2.4 uboot-commands (duration 00:01:46) [common]
1053 01:02:31.875852 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1055 01:02:31.876502 end: 2 uboot-action (duration 00:01:46) [common]
1057 01:02:31.877510 Cleaning after the job
1058 01:02:31.877827 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/ramdisk
1059 01:02:31.878986 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/kernel
1060 01:02:31.901898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/dtb
1061 01:02:31.902898 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/nfsrootfs
1062 01:02:32.069675 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915236/tftp-deploy-mpmlpkd0/modules
1063 01:02:32.089146 start: 4.1 power-off (timeout 00:00:30) [common]
1064 01:02:32.089779 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1065 01:02:32.122943 >> OK - accepted request
1066 01:02:32.125061 Returned 0 in 0 seconds
1067 01:02:32.225781 end: 4.1 power-off (duration 00:00:00) [common]
1069 01:02:32.226679 start: 4.2 read-feedback (timeout 00:10:00) [common]
1070 01:02:32.227321 Listened to connection for namespace 'common' for up to 1s
1071 01:02:33.228239 Finalising connection for namespace 'common'
1072 01:02:33.228699 Disconnecting from shell: Finalise
1073 01:02:33.228991 =>
1074 01:02:33.329658 end: 4.2 read-feedback (duration 00:00:01) [common]
1075 01:02:33.330051 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/915236
1076 01:02:36.292263 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/915236
1077 01:02:36.292904 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.