Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:53:26.921060 lava-dispatcher, installed at version: 2024.01
2 00:53:26.921929 start: 0 validate
3 00:53:26.922468 Start time: 2024-10-31 00:53:26.922433+00:00 (UTC)
4 00:53:26.923099 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:53:26.923663 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:53:26.969713 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:53:26.970345 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 00:53:27.001369 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:53:27.002016 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:53:27.035195 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:53:27.035883 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:53:27.069529 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:53:27.070096 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc5-63-g0fc810ae3ae11%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 00:53:27.112107 validate duration: 0.19
16 00:53:27.113057 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:53:27.113408 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:53:27.114084 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:53:27.114888 Not decompressing ramdisk as can be used compressed.
20 00:53:27.115377 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:53:27.115645 saving as /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/ramdisk/initrd.cpio.gz
22 00:53:27.115968 total size: 5628169 (5 MB)
23 00:53:27.154550 progress 0 % (0 MB)
24 00:53:27.159136 progress 5 % (0 MB)
25 00:53:27.163532 progress 10 % (0 MB)
26 00:53:27.167629 progress 15 % (0 MB)
27 00:53:27.171964 progress 20 % (1 MB)
28 00:53:27.175877 progress 25 % (1 MB)
29 00:53:27.180237 progress 30 % (1 MB)
30 00:53:27.184470 progress 35 % (1 MB)
31 00:53:27.188467 progress 40 % (2 MB)
32 00:53:27.192844 progress 45 % (2 MB)
33 00:53:27.196717 progress 50 % (2 MB)
34 00:53:27.200803 progress 55 % (2 MB)
35 00:53:27.204868 progress 60 % (3 MB)
36 00:53:27.208587 progress 65 % (3 MB)
37 00:53:27.212816 progress 70 % (3 MB)
38 00:53:27.216773 progress 75 % (4 MB)
39 00:53:27.220953 progress 80 % (4 MB)
40 00:53:27.224958 progress 85 % (4 MB)
41 00:53:27.229166 progress 90 % (4 MB)
42 00:53:27.233026 progress 95 % (5 MB)
43 00:53:27.236526 progress 100 % (5 MB)
44 00:53:27.237288 5 MB downloaded in 0.12 s (44.23 MB/s)
45 00:53:27.237872 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:53:27.238871 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:53:27.239189 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:53:27.239466 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:53:27.239973 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kernel/Image
51 00:53:27.240267 saving as /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/kernel/Image
52 00:53:27.240486 total size: 37878272 (36 MB)
53 00:53:27.240706 No compression specified
54 00:53:27.278884 progress 0 % (0 MB)
55 00:53:27.303208 progress 5 % (1 MB)
56 00:53:27.327540 progress 10 % (3 MB)
57 00:53:27.351662 progress 15 % (5 MB)
58 00:53:27.376578 progress 20 % (7 MB)
59 00:53:27.401240 progress 25 % (9 MB)
60 00:53:27.425860 progress 30 % (10 MB)
61 00:53:27.450371 progress 35 % (12 MB)
62 00:53:27.474823 progress 40 % (14 MB)
63 00:53:27.498560 progress 45 % (16 MB)
64 00:53:27.521897 progress 50 % (18 MB)
65 00:53:27.545525 progress 55 % (19 MB)
66 00:53:27.569176 progress 60 % (21 MB)
67 00:53:27.593316 progress 65 % (23 MB)
68 00:53:27.616933 progress 70 % (25 MB)
69 00:53:27.640637 progress 75 % (27 MB)
70 00:53:27.665686 progress 80 % (28 MB)
71 00:53:27.690916 progress 85 % (30 MB)
72 00:53:27.715120 progress 90 % (32 MB)
73 00:53:27.738902 progress 95 % (34 MB)
74 00:53:27.761424 progress 100 % (36 MB)
75 00:53:27.762230 36 MB downloaded in 0.52 s (69.24 MB/s)
76 00:53:27.762732 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:53:27.763724 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:53:27.764063 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:53:27.764352 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:53:27.765260 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:53:27.765619 saving as /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:53:27.765878 total size: 53209 (0 MB)
84 00:53:27.766106 No compression specified
85 00:53:27.807051 progress 61 % (0 MB)
86 00:53:27.808081 progress 100 % (0 MB)
87 00:53:27.808753 0 MB downloaded in 0.04 s (1.18 MB/s)
88 00:53:27.809328 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:53:27.810745 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:53:27.811093 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:53:27.811407 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:53:27.812079 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:53:27.812399 saving as /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/nfsrootfs/full.rootfs.tar
95 00:53:27.812644 total size: 120894716 (115 MB)
96 00:53:27.812876 Using unxz to decompress xz
97 00:53:27.853593 progress 0 % (0 MB)
98 00:53:28.671857 progress 5 % (5 MB)
99 00:53:29.505173 progress 10 % (11 MB)
100 00:53:30.293223 progress 15 % (17 MB)
101 00:53:31.028411 progress 20 % (23 MB)
102 00:53:31.621527 progress 25 % (28 MB)
103 00:53:32.442908 progress 30 % (34 MB)
104 00:53:33.231043 progress 35 % (40 MB)
105 00:53:33.573617 progress 40 % (46 MB)
106 00:53:33.945684 progress 45 % (51 MB)
107 00:53:34.673711 progress 50 % (57 MB)
108 00:53:35.563654 progress 55 % (63 MB)
109 00:53:36.352649 progress 60 % (69 MB)
110 00:53:37.114767 progress 65 % (74 MB)
111 00:53:37.894123 progress 70 % (80 MB)
112 00:53:38.719099 progress 75 % (86 MB)
113 00:53:39.502546 progress 80 % (92 MB)
114 00:53:40.266051 progress 85 % (98 MB)
115 00:53:41.120272 progress 90 % (103 MB)
116 00:53:41.892845 progress 95 % (109 MB)
117 00:53:42.728469 progress 100 % (115 MB)
118 00:53:42.740957 115 MB downloaded in 14.93 s (7.72 MB/s)
119 00:53:42.741949 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:53:42.743727 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:53:42.744357 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:53:42.744934 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:53:42.745809 downloading http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/modules.tar.xz
125 00:53:42.746362 saving as /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/modules/modules.tar
126 00:53:42.746850 total size: 11755844 (11 MB)
127 00:53:42.747350 Using unxz to decompress xz
128 00:53:42.793799 progress 0 % (0 MB)
129 00:53:42.861986 progress 5 % (0 MB)
130 00:53:42.941590 progress 10 % (1 MB)
131 00:53:43.022820 progress 15 % (1 MB)
132 00:53:43.103894 progress 20 % (2 MB)
133 00:53:43.181621 progress 25 % (2 MB)
134 00:53:43.262764 progress 30 % (3 MB)
135 00:53:43.339839 progress 35 % (3 MB)
136 00:53:43.421588 progress 40 % (4 MB)
137 00:53:43.507531 progress 45 % (5 MB)
138 00:53:43.589476 progress 50 % (5 MB)
139 00:53:43.673461 progress 55 % (6 MB)
140 00:53:43.756106 progress 60 % (6 MB)
141 00:53:43.840252 progress 65 % (7 MB)
142 00:53:43.923147 progress 70 % (7 MB)
143 00:53:44.005230 progress 75 % (8 MB)
144 00:53:44.089328 progress 80 % (9 MB)
145 00:53:44.165614 progress 85 % (9 MB)
146 00:53:44.239579 progress 90 % (10 MB)
147 00:53:44.338041 progress 95 % (10 MB)
148 00:53:44.434539 progress 100 % (11 MB)
149 00:53:44.448066 11 MB downloaded in 1.70 s (6.59 MB/s)
150 00:53:44.448930 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:53:44.450518 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:53:44.451031 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 00:53:44.451549 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 00:54:01.388101 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/915265/extract-nfsrootfs-l2ahkfvk
156 00:54:01.388712 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:54:01.389000 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:54:01.389618 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2
159 00:54:01.390051 makedir: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin
160 00:54:01.390378 makedir: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/tests
161 00:54:01.390691 makedir: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/results
162 00:54:01.391026 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-add-keys
163 00:54:01.391606 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-add-sources
164 00:54:01.392190 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-background-process-start
165 00:54:01.392721 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-background-process-stop
166 00:54:01.393246 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-common-functions
167 00:54:01.393763 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-echo-ipv4
168 00:54:01.394260 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-install-packages
169 00:54:01.394740 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-installed-packages
170 00:54:01.395210 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-os-build
171 00:54:01.395681 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-probe-channel
172 00:54:01.396216 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-probe-ip
173 00:54:01.396800 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-target-ip
174 00:54:01.397354 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-target-mac
175 00:54:01.397881 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-target-storage
176 00:54:01.398456 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-case
177 00:54:01.398952 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-event
178 00:54:01.399427 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-feedback
179 00:54:01.399898 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-raise
180 00:54:01.400417 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-reference
181 00:54:01.400889 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-runner
182 00:54:01.401376 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-set
183 00:54:01.401876 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-test-shell
184 00:54:01.402381 Updating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-add-keys (debian)
185 00:54:01.402911 Updating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-add-sources (debian)
186 00:54:01.403431 Updating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-install-packages (debian)
187 00:54:01.403936 Updating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-installed-packages (debian)
188 00:54:01.404465 Updating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/bin/lava-os-build (debian)
189 00:54:01.404897 Creating /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/environment
190 00:54:01.405286 LAVA metadata
191 00:54:01.405547 - LAVA_JOB_ID=915265
192 00:54:01.405761 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:54:01.406117 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:54:01.407064 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:54:01.407371 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:54:01.407577 skipped lava-vland-overlay
197 00:54:01.407816 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:54:01.408095 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:54:01.408314 skipped lava-multinode-overlay
200 00:54:01.408555 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:54:01.408804 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:54:01.409049 Loading test definitions
203 00:54:01.409325 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:54:01.409540 Using /lava-915265 at stage 0
205 00:54:01.410665 uuid=915265_1.6.2.4.1 testdef=None
206 00:54:01.410970 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:54:01.411231 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:54:01.412993 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:54:01.413778 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:54:01.415671 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:54:01.416521 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:54:01.418386 runner path: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/0/tests/0_timesync-off test_uuid 915265_1.6.2.4.1
215 00:54:01.418940 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:54:01.419820 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:54:01.420071 Using /lava-915265 at stage 0
219 00:54:01.420432 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:54:01.420724 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/0/tests/1_kselftest-rtc'
221 00:54:10.023421 Running '/usr/bin/git checkout kernelci.org
222 00:54:10.049256 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 00:54:10.051172 uuid=915265_1.6.2.4.5 testdef=None
224 00:54:10.051695 end: 1.6.2.4.5 git-repo-action (duration 00:00:09) [common]
226 00:54:10.053845 start: 1.6.2.4.6 test-overlay (timeout 00:09:17) [common]
227 00:54:10.061030 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:54:10.063143 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:17) [common]
230 00:54:10.072918 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:54:10.075082 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:17) [common]
233 00:54:10.084441 runner path: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/0/tests/1_kselftest-rtc test_uuid 915265_1.6.2.4.5
234 00:54:10.085171 BOARD='meson-sm1-s905d3-libretech-cc'
235 00:54:10.085706 BRANCH='mainline'
236 00:54:10.086210 SKIPFILE='/dev/null'
237 00:54:10.086705 SKIP_INSTALL='True'
238 00:54:10.087205 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc5-63-g0fc810ae3ae11/arm64/defconfig/clang-15/kselftest.tar.xz'
239 00:54:10.087717 TST_CASENAME=''
240 00:54:10.088283 TST_CMDFILES='rtc'
241 00:54:10.089600 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:54:10.091607 Creating lava-test-runner.conf files
244 00:54:10.092166 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/915265/lava-overlay-rmb76yt2/lava-915265/0 for stage 0
245 00:54:10.092995 - 0_timesync-off
246 00:54:10.093589 - 1_kselftest-rtc
247 00:54:10.094395 end: 1.6.2.4 test-definition (duration 00:00:09) [common]
248 00:54:10.095096 start: 1.6.2.5 compress-overlay (timeout 00:09:17) [common]
249 00:54:34.470706 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 00:54:34.471139 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:53) [common]
251 00:54:34.471427 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:54:34.471734 end: 1.6.2 lava-overlay (duration 00:00:33) [common]
253 00:54:34.472051 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:53) [common]
254 00:54:35.103730 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:54:35.104235 start: 1.6.4 extract-modules (timeout 00:08:52) [common]
256 00:54:35.104508 extracting modules file /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915265/extract-nfsrootfs-l2ahkfvk
257 00:54:36.720871 extracting modules file /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/modules/modules.tar to /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk
258 00:54:38.182929 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:54:38.183405 start: 1.6.5 apply-overlay-tftp (timeout 00:08:49) [common]
260 00:54:38.183700 [common] Applying overlay to NFS
261 00:54:38.183931 [common] Applying overlay /var/lib/lava/dispatcher/tmp/915265/compress-overlay-10g4j_3s/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/915265/extract-nfsrootfs-l2ahkfvk
262 00:54:40.930565 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:54:40.931054 start: 1.6.6 prepare-kernel (timeout 00:08:46) [common]
264 00:54:40.931360 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:46) [common]
265 00:54:40.931622 Converting downloaded kernel to a uImage
266 00:54:40.931956 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/kernel/Image /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/kernel/uImage
267 00:54:41.317950 output: Image Name:
268 00:54:41.318393 output: Created: Thu Oct 31 00:54:40 2024
269 00:54:41.318775 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:54:41.319006 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 00:54:41.319221 output: Load Address: 01080000
272 00:54:41.319446 output: Entry Point: 01080000
273 00:54:41.319661 output:
274 00:54:41.320042 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:54:41.320345 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:54:41.320631 start: 1.6.7 configure-preseed-file (timeout 00:08:46) [common]
277 00:54:41.320899 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:54:41.321302 start: 1.6.8 compress-ramdisk (timeout 00:08:46) [common]
279 00:54:41.321583 Building ramdisk /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk
280 00:54:43.782369 >> 173421 blocks
281 00:54:51.425491 Adding RAMdisk u-boot header.
282 00:54:51.426155 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk.cpio.gz.uboot
283 00:54:51.679270 output: Image Name:
284 00:54:51.679686 output: Created: Thu Oct 31 00:54:51 2024
285 00:54:51.680244 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:54:51.680670 output: Data Size: 24150343 Bytes = 23584.32 KiB = 23.03 MiB
287 00:54:51.681146 output: Load Address: 00000000
288 00:54:51.681629 output: Entry Point: 00000000
289 00:54:51.682113 output:
290 00:54:51.683215 rename /var/lib/lava/dispatcher/tmp/915265/extract-overlay-ramdisk-qwsrcuzm/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
291 00:54:51.684063 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:54:51.684742 end: 1.6 prepare-tftp-overlay (duration 00:01:07) [common]
293 00:54:51.685393 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:35) [common]
294 00:54:51.685900 No LXC device requested
295 00:54:51.686479 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:54:51.687112 start: 1.8 deploy-device-env (timeout 00:08:35) [common]
297 00:54:51.687696 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:54:51.688191 Checking files for TFTP limit of 4294967296 bytes.
299 00:54:51.690827 end: 1 tftp-deploy (duration 00:01:25) [common]
300 00:54:51.691387 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:54:51.691912 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:54:51.692448 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:54:51.692957 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:54:51.693453 Using kernel file from prepare-kernel: 915265/tftp-deploy-8q2umm2k/kernel/uImage
305 00:54:51.694144 substitutions:
306 00:54:51.694559 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:54:51.694960 - {DTB_ADDR}: 0x01070000
308 00:54:51.695353 - {DTB}: 915265/tftp-deploy-8q2umm2k/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 00:54:51.695823 - {INITRD}: 915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
310 00:54:51.696317 - {KERNEL_ADDR}: 0x01080000
311 00:54:51.696721 - {KERNEL}: 915265/tftp-deploy-8q2umm2k/kernel/uImage
312 00:54:51.697110 - {LAVA_MAC}: None
313 00:54:51.697584 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/915265/extract-nfsrootfs-l2ahkfvk
314 00:54:51.698027 - {NFS_SERVER_IP}: 192.168.6.2
315 00:54:51.698493 - {PRESEED_CONFIG}: None
316 00:54:51.698960 - {PRESEED_LOCAL}: None
317 00:54:51.699355 - {RAMDISK_ADDR}: 0x08000000
318 00:54:51.699739 - {RAMDISK}: 915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
319 00:54:51.700157 - {ROOT_PART}: None
320 00:54:51.700553 - {ROOT}: None
321 00:54:51.700938 - {SERVER_IP}: 192.168.6.2
322 00:54:51.701322 - {TEE_ADDR}: 0x83000000
323 00:54:51.701704 - {TEE}: None
324 00:54:51.702088 Parsed boot commands:
325 00:54:51.702457 - setenv autoload no
326 00:54:51.702837 - setenv initrd_high 0xffffffff
327 00:54:51.703289 - setenv fdt_high 0xffffffff
328 00:54:51.703672 - dhcp
329 00:54:51.704078 - setenv serverip 192.168.6.2
330 00:54:51.704467 - tftpboot 0x01080000 915265/tftp-deploy-8q2umm2k/kernel/uImage
331 00:54:51.704919 - tftpboot 0x08000000 915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
332 00:54:51.705314 - tftpboot 0x01070000 915265/tftp-deploy-8q2umm2k/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 00:54:51.705770 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/915265/extract-nfsrootfs-l2ahkfvk,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:54:51.706173 - bootm 0x01080000 0x08000000 0x01070000
335 00:54:51.706726 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:54:51.708586 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:54:51.709028 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 00:54:51.722958 Setting prompt string to ['lava-test: # ']
340 00:54:51.725116 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:54:51.726121 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:54:51.726795 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:54:51.727494 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:54:51.728945 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 00:54:51.765589 >> OK - accepted request
346 00:54:51.767728 Returned 0 in 0 seconds
347 00:54:51.868963 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:54:51.870939 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:54:51.871509 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:54:51.872272 Setting prompt string to ['Hit any key to stop autoboot']
352 00:54:51.872932 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:54:51.874891 Trying 192.168.56.21...
354 00:54:51.875475 Connected to conserv1.
355 00:54:51.875953 Escape character is '^]'.
356 00:54:51.876497
357 00:54:51.876983 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
358 00:54:51.877500
359 00:54:58.781987 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
360 00:54:58.782570 bl2_stage_init 0x01
361 00:54:58.783127 bl2_stage_init 0x81
362 00:54:58.787499 hw id: 0x0000 - pwm id 0x01
363 00:54:58.788059 bl2_stage_init 0xc1
364 00:54:58.793066 bl2_stage_init 0x02
365 00:54:58.793588
366 00:54:58.794109 L0:00000000
367 00:54:58.794602 L1:00000703
368 00:54:58.795066 L2:00008067
369 00:54:58.795526 L3:15000000
370 00:54:58.798437 S1:00000000
371 00:54:58.798952 B2:20282000
372 00:54:58.799415 B1:a0f83180
373 00:54:58.799855
374 00:54:58.800341 TE: 68880
375 00:54:58.800784
376 00:54:58.804024 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 00:54:58.804513
378 00:54:58.809689 Board ID = 1
379 00:54:58.810165 Set cpu clk to 24M
380 00:54:58.810606 Set clk81 to 24M
381 00:54:58.815220 Use GP1_pll as DSU clk.
382 00:54:58.815697 DSU clk: 1200 Mhz
383 00:54:58.816173 CPU clk: 1200 MHz
384 00:54:58.820796 Set clk81 to 166.6M
385 00:54:58.826378 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 00:54:58.826852 board id: 1
387 00:54:58.833799 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:54:58.844423 fw parse done
389 00:54:58.850398 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:54:58.893011 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:54:58.903972 PIEI prepare done
392 00:54:58.904484 fastboot data load
393 00:54:58.904931 fastboot data verify
394 00:54:58.909674 verify result: 266
395 00:54:58.915274 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 00:54:58.915770 LPDDR4 probe
397 00:54:58.916254 ddr clk to 1584MHz
398 00:54:58.923222 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:54:58.960459
400 00:54:58.961019 dmc_version 0001
401 00:54:58.967205 Check phy result
402 00:54:58.973051 INFO : End of CA training
403 00:54:58.973574 INFO : End of initialization
404 00:54:58.978683 INFO : Training has run successfully!
405 00:54:58.979200 Check phy result
406 00:54:58.984270 INFO : End of initialization
407 00:54:58.984783 INFO : End of read enable training
408 00:54:58.987593 INFO : End of fine write leveling
409 00:54:58.993157 INFO : End of Write leveling coarse delay
410 00:54:58.998785 INFO : Training has run successfully!
411 00:54:58.999298 Check phy result
412 00:54:58.999801 INFO : End of initialization
413 00:54:59.004321 INFO : End of read dq deskew training
414 00:54:59.007688 INFO : End of MPR read delay center optimization
415 00:54:59.013276 INFO : End of write delay center optimization
416 00:54:59.018901 INFO : End of read delay center optimization
417 00:54:59.019418 INFO : End of max read latency training
418 00:54:59.024480 INFO : Training has run successfully!
419 00:54:59.024981 1D training succeed
420 00:54:59.032619 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:54:59.080263 Check phy result
422 00:54:59.080832 INFO : End of initialization
423 00:54:59.102586 INFO : End of 2D read delay Voltage center optimization
424 00:54:59.121823 INFO : End of 2D read delay Voltage center optimization
425 00:54:59.173601 INFO : End of 2D write delay Voltage center optimization
426 00:54:59.222892 INFO : End of 2D write delay Voltage center optimization
427 00:54:59.228437 INFO : Training has run successfully!
428 00:54:59.228971
429 00:54:59.229428 channel==0
430 00:54:59.234120 RxClkDly_Margin_A0==88 ps 9
431 00:54:59.234613 TxDqDly_Margin_A0==98 ps 10
432 00:54:59.239603 RxClkDly_Margin_A1==78 ps 8
433 00:54:59.240174 TxDqDly_Margin_A1==98 ps 10
434 00:54:59.240632 TrainedVREFDQ_A0==74
435 00:54:59.245236 TrainedVREFDQ_A1==74
436 00:54:59.245742 VrefDac_Margin_A0==25
437 00:54:59.246191 DeviceVref_Margin_A0==40
438 00:54:59.250786 VrefDac_Margin_A1==23
439 00:54:59.251281 DeviceVref_Margin_A1==40
440 00:54:59.251725
441 00:54:59.252213
442 00:54:59.256422 channel==1
443 00:54:59.256915 RxClkDly_Margin_A0==88 ps 9
444 00:54:59.257360 TxDqDly_Margin_A0==98 ps 10
445 00:54:59.262073 RxClkDly_Margin_A1==78 ps 8
446 00:54:59.262568 TxDqDly_Margin_A1==78 ps 8
447 00:54:59.265651 TrainedVREFDQ_A0==78
448 00:54:59.268566 TrainedVREFDQ_A1==75
449 00:54:59.269056 VrefDac_Margin_A0==22
450 00:54:59.274240 DeviceVref_Margin_A0==36
451 00:54:59.274728 VrefDac_Margin_A1==22
452 00:54:59.275175 DeviceVref_Margin_A1==38
453 00:54:59.275613
454 00:54:59.279771 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:54:59.280297
456 00:54:59.311759 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 00:54:59.312384 2D training succeed
458 00:54:59.317345 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:54:59.322816 auto size-- 65535DDR cs0 size: 2048MB
460 00:54:59.323282 DDR cs1 size: 2048MB
461 00:54:59.328436 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:54:59.328902 cs0 DataBus test pass
463 00:54:59.334015 cs1 DataBus test pass
464 00:54:59.334473 cs0 AddrBus test pass
465 00:54:59.334916 cs1 AddrBus test pass
466 00:54:59.335354
467 00:54:59.339604 100bdlr_step_size ps== 478
468 00:54:59.340116 result report
469 00:54:59.345216 boot times 0Enable ddr reg access
470 00:54:59.351087 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:54:59.364943 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 00:55:00.021592 bl2z: ptr: 05129330, size: 00001e40
473 00:55:00.028759 0.0;M3 CHK:0;cm4_sp_mode 0
474 00:55:00.029248 MVN_1=0x00000000
475 00:55:00.029691 MVN_2=0x00000000
476 00:55:00.040244 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 00:55:00.040720 OPS=0x04
478 00:55:00.041168 ring efuse init
479 00:55:00.045931 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 00:55:00.046479 [0.017319 Inits done]
481 00:55:00.046926 secure task start!
482 00:55:00.053141 high task start!
483 00:55:00.053617 low task start!
484 00:55:00.054059 run into bl31
485 00:55:00.061708 NOTICE: BL31: v1.3(release):4fc40b1
486 00:55:00.069536 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 00:55:00.070007 NOTICE: BL31: G12A normal boot!
488 00:55:00.085061 NOTICE: BL31: BL33 decompress pass
489 00:55:00.090753 ERROR: Error initializing runtime service opteed_fast
490 00:55:01.335711 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 00:55:01.336396 bl2_stage_init 0x01
492 00:55:01.336856 bl2_stage_init 0x81
493 00:55:01.341293 hw id: 0x0000 - pwm id 0x01
494 00:55:01.341777 bl2_stage_init 0xc1
495 00:55:01.342221 bl2_stage_init 0x02
496 00:55:01.342656
497 00:55:01.346877 L0:00000000
498 00:55:01.347352 L1:00000703
499 00:55:01.347792 L2:00008067
500 00:55:01.348273 L3:15000000
501 00:55:01.348718 S1:00000000
502 00:55:01.352494 B2:20282000
503 00:55:01.352960 B1:a0f83180
504 00:55:01.353401
505 00:55:01.353839 TE: 71577
506 00:55:01.354274
507 00:55:01.358115 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 00:55:01.358593
509 00:55:01.363661 Board ID = 1
510 00:55:01.364211 Set cpu clk to 24M
511 00:55:01.364664 Set clk81 to 24M
512 00:55:01.369282 Use GP1_pll as DSU clk.
513 00:55:01.369756 DSU clk: 1200 Mhz
514 00:55:01.370199 CPU clk: 1200 MHz
515 00:55:01.370636 Set clk81 to 166.6M
516 00:55:01.380453 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 00:55:01.380927 board id: 1
518 00:55:01.386890 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 00:55:01.397793 fw parse done
520 00:55:01.403749 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 00:55:01.446887 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 00:55:01.457978 PIEI prepare done
523 00:55:01.458444 fastboot data load
524 00:55:01.458886 fastboot data verify
525 00:55:01.463577 verify result: 266
526 00:55:01.469280 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 00:55:01.469755 LPDDR4 probe
528 00:55:01.470198 ddr clk to 1584MHz
529 00:55:02.834628 Load ddrfw from SPI, src: 0x SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
530 00:55:02.835322 bl2_stage_init 0x01
531 00:55:02.835790 bl2_stage_init 0x81
532 00:55:02.840196 hw id: 0x0000 - pwm id 0x01
533 00:55:02.840704 bl2_stage_init 0xc1
534 00:55:02.845883 bl2_stage_init 0x02
535 00:55:02.846421
536 00:55:02.846851 L0:00000000
537 00:55:02.847273 L1:00000703
538 00:55:02.847694 L2:00008067
539 00:55:02.848157 L3:15000000
540 00:55:02.851341 S1:00000000
541 00:55:02.851796 B2:20282000
542 00:55:02.852250 B1:a0f83180
543 00:55:02.852672
544 00:55:02.853095 TE: 70224
545 00:55:02.853514
546 00:55:02.856934 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
547 00:55:02.857395
548 00:55:02.862502 Board ID = 1
549 00:55:02.862963 Set cpu clk to 24M
550 00:55:02.863388 Set clk81 to 24M
551 00:55:02.868106 Use GP1_pll as DSU clk.
552 00:55:02.868569 DSU clk: 1200 Mhz
553 00:55:02.868989 CPU clk: 1200 MHz
554 00:55:02.873713 Set clk81 to 166.6M
555 00:55:02.879316 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
556 00:55:02.879769 board id: 1
557 00:55:02.886528 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
558 00:55:02.897449 fw parse done
559 00:55:02.903405 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
560 00:55:02.946533 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
561 00:55:02.957598 PIEI prepare done
562 00:55:02.958094 fastboot data load
563 00:55:02.958526 fastboot data verify
564 00:55:02.963231 verify result: 266
565 00:55:02.968808 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
566 00:55:02.969266 LPDDR4 probe
567 00:55:02.969688 ddr clk to 1584MHz
568 00:55:02.976824 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
569 00:55:03.014559
570 00:55:03.015039 dmc_version 0001
571 00:55:03.021627 Check phy result
572 00:55:03.027549 INFO : End of CA training
573 00:55:03.028034 INFO : End of initialization
574 00:55:03.033179 INFO : Training has run successfully!
575 00:55:03.033645 Check phy result
576 00:55:03.038742 INFO : End of initialization
577 00:55:03.039213 INFO : End of read enable training
578 00:55:03.044377 INFO : End of fine write leveling
579 00:55:03.049956 INFO : End of Write leveling coarse delay
580 00:55:03.050427 INFO : Training has run successfully!
581 00:55:03.050867 Check phy result
582 00:55:03.055555 INFO : End of initialization
583 00:55:03.056052 INFO : End of read dq deskew training
584 00:55:03.061163 INFO : End of MPR read delay center optimization
585 00:55:03.066765 INFO : End of write delay center optimization
586 00:55:03.072350 INFO : End of read delay center optimization
587 00:55:03.072850 INFO : End of max read latency training
588 00:55:03.077967 INFO : Training has run successfully!
589 00:55:03.078432 1D training succeed
590 00:55:03.087128 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
591 00:55:03.135460 Check phy result
592 00:55:03.135956 INFO : End of initialization
593 00:55:03.162809 INFO : End of 2D read delay Voltage center optimization
594 00:55:03.186976 INFO : End of 2D read delay Voltage center optimization
595 00:55:03.243647 INFO : End of 2D write delay Voltage center optimization
596 00:55:03.297647 INFO : End of 2D write delay Voltage center optimization
597 00:55:03.303226 INFO : Training has run successfully!
598 00:55:03.303696
599 00:55:03.304186 channel==0
600 00:55:03.308835 RxClkDly_Margin_A0==78 ps 8
601 00:55:03.309305 TxDqDly_Margin_A0==98 ps 10
602 00:55:03.314520 RxClkDly_Margin_A1==88 ps 9
603 00:55:03.314983 TxDqDly_Margin_A1==88 ps 9
604 00:55:03.315425 TrainedVREFDQ_A0==76
605 00:55:03.320066 TrainedVREFDQ_A1==74
606 00:55:03.320544 VrefDac_Margin_A0==25
607 00:55:03.320985 DeviceVref_Margin_A0==38
608 00:55:03.325644 VrefDac_Margin_A1==23
609 00:55:03.326106 DeviceVref_Margin_A1==40
610 00:55:03.326546
611 00:55:03.326982
612 00:55:03.327412 channel==1
613 00:55:03.331249 RxClkDly_Margin_A0==78 ps 8
614 00:55:03.331720 TxDqDly_Margin_A0==98 ps 10
615 00:55:03.336817 RxClkDly_Margin_A1==78 ps 8
616 00:55:03.337322 TxDqDly_Margin_A1==88 ps 9
617 00:55:03.342521 TrainedVREFDQ_A0==78
618 00:55:03.342991 TrainedVREFDQ_A1==75
619 00:55:03.343438 VrefDac_Margin_A0==22
620 00:55:03.348163 DeviceVref_Margin_A0==36
621 00:55:03.348671 VrefDac_Margin_A1==22
622 00:55:03.353647 DeviceVref_Margin_A1==39
623 00:55:03.354124
624 00:55:03.354568 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
625 00:55:03.355009
626 00:55:03.387219 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
627 00:55:03.387793 2D training succeed
628 00:55:03.392826 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
629 00:55:03.398502 auto size-- 65535DDR cs0 size: 2048MB
630 00:55:03.398968 DDR cs1 size: 2048MB
631 00:55:03.404026 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
632 00:55:03.404500 cs0 DataBus test pass
633 00:55:03.409645 cs1 DataBus test pass
634 00:55:03.410111 cs0 AddrBus test pass
635 00:55:03.410547 cs1 AddrBus test pass
636 00:55:03.410983
637 00:55:03.415226 100bdlr_step_size ps== 471
638 00:55:03.415702 result report
639 00:55:03.420831 boot times 0Enable ddr reg access
640 00:55:03.426003 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
641 00:55:03.439870 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
642 00:55:04.099680 bl2z: ptr: 05129330, size: 00001e40
643 00:55:04.108600 0.0;M3 CHK:0;cm4_sp_mode 0
644 00:55:04.109087 MVN_1=0x00000000
645 00:55:04.109529 MVN_2=0x00000000
646 00:55:04.119848 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
647 00:55:04.120351 OPS=0x04
648 00:55:04.120798 ring efuse init
649 00:55:04.125494 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
650 00:55:04.125972 [0.017354 Inits done]
651 00:55:04.126412 secure task start!
652 00:55:04.133486 high task start!
653 00:55:04.133954 low task start!
654 00:55:04.134391 run into bl31
655 00:55:04.142109 NOTICE: BL31: v1.3(release):4fc40b1
656 00:55:04.149911 NOTICE: BL31: Built : 15:57:33, May 22 2019
657 00:55:04.150381 NOTICE: BL31: G12A normal boot!
658 00:55:04.165630 NOTICE: BL31: BL33 decompress pass
659 00:55:04.172225 ERROR: Error initializing runtime service opteed_fast
660 00:55:05.384965 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
661 00:55:05.385566 bl2_stage_init 0x01
662 00:55:05.386016 bl2_stage_init 0x81
663 00:55:05.390507 hw id: 0x0000 - pwm id 0x01
664 00:55:05.390977 bl2_stage_init 0xc1
665 00:55:05.396162 bl2_stage_init 0x02
666 00:55:05.396664
667 00:55:05.397113 L0:00000000
668 00:55:05.397547 L1:00000703
669 00:55:05.397976 L2:00008067
670 00:55:05.398404 L3:15000000
671 00:55:05.401742 S1:00000000
672 00:55:05.402205 B2:20282000
673 00:55:05.402642 B1:a0f83180
674 00:55:05.403073
675 00:55:05.403505 TE: 71613
676 00:55:05.403939
677 00:55:05.407251 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
678 00:55:05.407730
679 00:55:05.412954 Board ID = 1
680 00:55:05.413425 Set cpu clk to 24M
681 00:55:05.413865 Set clk81 to 24M
682 00:55:05.418479 Use GP1_pll as DSU clk.
683 00:55:05.418946 DSU clk: 1200 Mhz
684 00:55:05.419386 CPU clk: 1200 MHz
685 00:55:05.424134 Set clk81 to 166.6M
686 00:55:05.429748 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
687 00:55:05.430220 board id: 1
688 00:55:05.437085 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
689 00:55:05.447671 fw parse done
690 00:55:05.453633 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
691 00:55:05.496762 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
692 00:55:05.507866 PIEI prepare done
693 00:55:05.508385 fastboot data load
694 00:55:05.508835 fastboot data verify
695 00:55:05.513445 verify result: 266
696 00:55:05.519061 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
697 00:55:05.519529 LPDDR4 probe
698 00:55:05.519977 ddr clk to 1584MHz
699 00:55:05.527031 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
700 00:55:05.564777
701 00:55:05.565251 dmc_version 0001
702 00:55:05.571899 Check phy result
703 00:55:05.577849 INFO : End of CA training
704 00:55:05.578312 INFO : End of initialization
705 00:55:05.583370 INFO : Training has run successfully!
706 00:55:05.583834 Check phy result
707 00:55:05.588982 INFO : End of initialization
708 00:55:05.589449 INFO : End of read enable training
709 00:55:05.594587 INFO : End of fine write leveling
710 00:55:05.600215 INFO : End of Write leveling coarse delay
711 00:55:05.600681 INFO : Training has run successfully!
712 00:55:05.601122 Check phy result
713 00:55:05.605851 INFO : End of initialization
714 00:55:05.606312 INFO : End of read dq deskew training
715 00:55:05.611384 INFO : End of MPR read delay center optimization
716 00:55:05.616977 INFO : End of write delay center optimization
717 00:55:05.622590 INFO : End of read delay center optimization
718 00:55:05.623052 INFO : End of max read latency training
719 00:55:05.628211 INFO : Training has run successfully!
720 00:55:05.628670 1D training succeed
721 00:55:05.637359 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
722 00:55:05.685603 Check phy result
723 00:55:05.686068 INFO : End of initialization
724 00:55:05.713010 INFO : End of 2D read delay Voltage center optimization
725 00:55:05.737200 INFO : End of 2D read delay Voltage center optimization
726 00:55:05.793936 INFO : End of 2D write delay Voltage center optimization
727 00:55:05.847894 INFO : End of 2D write delay Voltage center optimization
728 00:55:05.853454 INFO : Training has run successfully!
729 00:55:05.853914
730 00:55:05.854352 channel==0
731 00:55:05.859054 RxClkDly_Margin_A0==78 ps 8
732 00:55:05.859515 TxDqDly_Margin_A0==98 ps 10
733 00:55:05.864660 RxClkDly_Margin_A1==88 ps 9
734 00:55:05.865126 TxDqDly_Margin_A1==98 ps 10
735 00:55:05.865573 TrainedVREFDQ_A0==75
736 00:55:05.870258 TrainedVREFDQ_A1==74
737 00:55:05.870721 VrefDac_Margin_A0==23
738 00:55:05.871156 DeviceVref_Margin_A0==39
739 00:55:05.875871 VrefDac_Margin_A1==23
740 00:55:05.876358 DeviceVref_Margin_A1==40
741 00:55:05.876792
742 00:55:05.877229
743 00:55:05.881458 channel==1
744 00:55:05.881919 RxClkDly_Margin_A0==78 ps 8
745 00:55:05.882356 TxDqDly_Margin_A0==78 ps 8
746 00:55:05.887024 RxClkDly_Margin_A1==78 ps 8
747 00:55:05.887484 TxDqDly_Margin_A1==88 ps 9
748 00:55:05.892652 TrainedVREFDQ_A0==75
749 00:55:05.893184 TrainedVREFDQ_A1==75
750 00:55:05.893641 VrefDac_Margin_A0==22
751 00:55:05.898261 DeviceVref_Margin_A0==38
752 00:55:05.898723 VrefDac_Margin_A1==22
753 00:55:05.903872 DeviceVref_Margin_A1==38
754 00:55:05.904401
755 00:55:05.904846 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
756 00:55:05.905281
757 00:55:05.937459 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000062
758 00:55:05.937971 2D training succeed
759 00:55:05.943024 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
760 00:55:05.948659 auto size-- 65535DDR cs0 size: 2048MB
761 00:55:05.949130 DDR cs1 size: 2048MB
762 00:55:05.954258 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
763 00:55:05.954730 cs0 DataBus test pass
764 00:55:05.959886 cs1 DataBus test pass
765 00:55:05.960399 cs0 AddrBus test pass
766 00:55:05.960846 cs1 AddrBus test pass
767 00:55:05.961281
768 00:55:05.965447 100bdlr_step_size ps== 478
769 00:55:05.965924 result report
770 00:55:05.971052 boot times 0Enable ddr reg access
771 00:55:05.976230 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
772 00:55:05.990097 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
773 00:55:06.650617 bl2z: ptr: 05129330, size: 00001e40
774 00:55:06.659461 0.0;M3 CHK:0;cm4_sp_mode 0
775 00:55:06.660086 MVN_1=0x00000000
776 00:55:06.660398 MVN_2=0x00000000
777 00:55:06.671023 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
778 00:55:06.671635 OPS=0x04
779 00:55:06.671943 ring efuse init
780 00:55:06.673782 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
781 00:55:06.679415 [0.017354 Inits done]
782 00:55:06.680006 secure task start!
783 00:55:06.680296 high task start!
784 00:55:06.680522 low task start!
785 00:55:06.683726 run into bl31
786 00:55:06.692382 NOTICE: BL31: v1.3(release):4fc40b1
787 00:55:06.700161 NOTICE: BL31: Built : 15:57:33, May 22 2019
788 00:55:06.700730 NOTICE: BL31: G12A normal boot!
789 00:55:06.715855 NOTICE: BL31: BL33 decompress pass
790 00:55:06.721471 ERROR: Error initializing runtime service opteed_fast
791 00:55:07.516955
792 00:55:07.517638
793 00:55:07.522399 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
794 00:55:07.523038
795 00:55:07.525861 Model: Libre Computer AML-S905D3-CC Solitude
796 00:55:07.672761 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
797 00:55:07.688606 DRAM: 2 GiB (effective 3.8 GiB)
798 00:55:07.789799 Core: 406 devices, 33 uclasses, devicetree: separate
799 00:55:07.795009 WDT: Not starting watchdog@f0d0
800 00:55:07.820194 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
801 00:55:07.832386 Loading Environment from FAT... Card did not respond to voltage select! : -110
802 00:55:07.837201 ** Bad device specification mmc 0 **
803 00:55:07.847329 Card did not respond to voltage select! : -110
804 00:55:07.855180 ** Bad device specification mmc 0 **
805 00:55:07.855821 Couldn't find partition mmc 0
806 00:55:07.863325 Card did not respond to voltage select! : -110
807 00:55:07.868856 ** Bad device specification mmc 0 **
808 00:55:07.869415 Couldn't find partition mmc 0
809 00:55:07.873891 Error: could not access storage.
810 00:55:08.171373 Net: eth0: ethernet@ff3f0000
811 00:55:08.172127 starting USB...
812 00:55:08.416168 Bus usb@ff500000: Register 3000140 NbrPorts 3
813 00:55:08.416847 Starting the controller
814 00:55:08.422955 USB XHCI 1.10
815 00:55:09.976953 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
816 00:55:09.985235 scanning usb for storage devices... 0 Storage Device(s) found
818 00:55:10.036278 Hit any key to stop autoboot: 1
819 00:55:10.036997 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
820 00:55:10.037458 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
821 00:55:10.037755 Setting prompt string to ['=>']
822 00:55:10.038021 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
823 00:55:10.051296 0
824 00:55:10.051969 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
826 00:55:10.152835 => setenv autoload no
827 00:55:10.153750 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
828 00:55:10.157784 setenv autoload no
830 00:55:10.258890 => setenv initrd_high 0xffffffff
831 00:55:10.259657 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
832 00:55:10.264205 setenv initrd_high 0xffffffff
834 00:55:10.365847 => setenv fdt_high 0xffffffff
835 00:55:10.366719 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
836 00:55:10.371963 setenv fdt_high 0xffffffff
838 00:55:10.473704 => dhcp
839 00:55:10.474550 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
840 00:55:10.478911 dhcp
841 00:55:10.935233 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
842 00:55:10.935880 Speed: 1000, full duplex
843 00:55:10.936401 BOOTP broadcast 1
844 00:55:11.183630 BOOTP broadcast 2
845 00:55:11.199502 DHCP client bound to address 192.168.6.21 (263 ms)
847 00:55:11.300746 => setenv serverip 192.168.6.2
848 00:55:11.301291 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
849 00:55:11.306148 setenv serverip 192.168.6.2
851 00:55:11.407444 => tftpboot 0x01080000 915265/tftp-deploy-8q2umm2k/kernel/uImage
852 00:55:11.408137 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
853 00:55:11.414854 tftpboot 0x01080000 915265/tftp-deploy-8q2umm2k/kernel/uImage
854 00:55:11.415184 Speed: 1000, full duplex
855 00:55:11.415402 Using ethernet@ff3f0000 device
856 00:55:11.420272 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
857 00:55:11.425864 Filename '915265/tftp-deploy-8q2umm2k/kernel/uImage'.
858 00:55:11.429878 Load address: 0x1080000
859 00:55:13.908658 Loading: *################################################## 36.1 MiB
860 00:55:13.909269 14.6 MiB/s
861 00:55:13.909693 done
862 00:55:13.913303 Bytes transferred = 37878336 (241fa40 hex)
864 00:55:14.014988 => tftpboot 0x08000000 915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
865 00:55:14.015827 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
866 00:55:14.022643 tftpboot 0x08000000 915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot
867 00:55:14.023198 Speed: 1000, full duplex
868 00:55:14.023639 Using ethernet@ff3f0000 device
869 00:55:14.028257 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
870 00:55:14.037994 Filename '915265/tftp-deploy-8q2umm2k/ramdisk/ramdisk.cpio.gz.uboot'.
871 00:55:14.038592 Load address: 0x8000000
872 00:55:15.549763 Loading: *################################################# UDP wrong checksum 00000005 000043ec
873 00:55:20.550793 T UDP wrong checksum 00000005 000043ec
874 00:55:24.912515 UDP wrong checksum 000000ff 000089a9
875 00:55:24.970382 UDP wrong checksum 000000ff 0000159c
876 00:55:30.551609 T T UDP wrong checksum 00000005 000043ec
877 00:55:50.556513 T T T T UDP wrong checksum 00000005 000043ec
878 00:55:51.394961 UDP wrong checksum 000000ff 000069b3
879 00:55:51.403763 UDP wrong checksum 000000ff 0000fda5
880 00:56:10.561342 T T T
881 00:56:10.561751 Retry count exceeded; starting again
883 00:56:10.565076 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
886 00:56:10.566914 end: 2.4 uboot-commands (duration 00:01:19) [common]
888 00:56:10.568332 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
890 00:56:10.569367 end: 2 uboot-action (duration 00:01:19) [common]
892 00:56:10.570903 Cleaning after the job
893 00:56:10.571509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/ramdisk
894 00:56:10.572915 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/kernel
895 00:56:10.611686 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/dtb
896 00:56:10.612560 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/nfsrootfs
897 00:56:10.830680 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/915265/tftp-deploy-8q2umm2k/modules
898 00:56:10.866499 start: 4.1 power-off (timeout 00:00:30) [common]
899 00:56:10.867616 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
900 00:56:10.923668 >> OK - accepted request
901 00:56:10.925764 Returned 0 in 0 seconds
902 00:56:11.026799 end: 4.1 power-off (duration 00:00:00) [common]
904 00:56:11.028098 start: 4.2 read-feedback (timeout 00:10:00) [common]
905 00:56:11.029095 Listened to connection for namespace 'common' for up to 1s
906 00:56:12.029004 Finalising connection for namespace 'common'
907 00:56:12.029591 Disconnecting from shell: Finalise
908 00:56:12.029979 =>
909 00:56:12.130728 end: 4.2 read-feedback (duration 00:00:01) [common]
910 00:56:12.131222 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/915265
911 00:56:15.680437 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/915265
912 00:56:15.681068 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.