Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:41:04.224776 lava-dispatcher, installed at version: 2024.01
2 01:41:04.225747 start: 0 validate
3 01:41:04.226333 Start time: 2024-11-07 01:41:04.226295+00:00 (UTC)
4 01:41:04.227001 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:41:04.227668 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:41:04.274386 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:41:04.275006 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 01:41:04.305488 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:41:04.306104 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:41:04.339289 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:41:04.339804 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:41:04.368759 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:41:04.369258 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 01:41:04.411294 validate duration: 0.19
16 01:41:04.412261 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:41:04.412637 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:41:04.412981 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:41:04.413592 Not decompressing ramdisk as can be used compressed.
20 01:41:04.414058 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 01:41:04.414347 saving as /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/ramdisk/initrd.cpio.gz
22 01:41:04.414633 total size: 5628169 (5 MB)
23 01:41:04.456859 progress 0 % (0 MB)
24 01:41:04.465719 progress 5 % (0 MB)
25 01:41:04.473276 progress 10 % (0 MB)
26 01:41:04.477354 progress 15 % (0 MB)
27 01:41:04.481656 progress 20 % (1 MB)
28 01:41:04.485658 progress 25 % (1 MB)
29 01:41:04.490291 progress 30 % (1 MB)
30 01:41:04.494805 progress 35 % (1 MB)
31 01:41:04.498774 progress 40 % (2 MB)
32 01:41:04.503085 progress 45 % (2 MB)
33 01:41:04.507034 progress 50 % (2 MB)
34 01:41:04.511477 progress 55 % (2 MB)
35 01:41:04.516336 progress 60 % (3 MB)
36 01:41:04.521118 progress 65 % (3 MB)
37 01:41:04.526571 progress 70 % (3 MB)
38 01:41:04.531564 progress 75 % (4 MB)
39 01:41:04.537104 progress 80 % (4 MB)
40 01:41:04.543437 progress 85 % (4 MB)
41 01:41:04.548028 progress 90 % (4 MB)
42 01:41:04.551918 progress 95 % (5 MB)
43 01:41:04.555375 progress 100 % (5 MB)
44 01:41:04.556350 5 MB downloaded in 0.14 s (37.89 MB/s)
45 01:41:04.557505 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:41:04.559440 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:41:04.560119 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:41:04.560458 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:41:04.560974 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/kernel/Image
51 01:41:04.561259 saving as /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/kernel/Image
52 01:41:04.561475 total size: 37878272 (36 MB)
53 01:41:04.561688 No compression specified
54 01:41:04.594158 progress 0 % (0 MB)
55 01:41:04.619101 progress 5 % (1 MB)
56 01:41:04.643634 progress 10 % (3 MB)
57 01:41:04.667568 progress 15 % (5 MB)
58 01:41:04.691414 progress 20 % (7 MB)
59 01:41:04.715215 progress 25 % (9 MB)
60 01:41:04.739237 progress 30 % (10 MB)
61 01:41:04.763479 progress 35 % (12 MB)
62 01:41:04.787431 progress 40 % (14 MB)
63 01:41:04.811876 progress 45 % (16 MB)
64 01:41:04.835396 progress 50 % (18 MB)
65 01:41:04.859774 progress 55 % (19 MB)
66 01:41:04.883647 progress 60 % (21 MB)
67 01:41:04.907527 progress 65 % (23 MB)
68 01:41:04.931460 progress 70 % (25 MB)
69 01:41:04.955052 progress 75 % (27 MB)
70 01:41:04.979259 progress 80 % (28 MB)
71 01:41:05.003190 progress 85 % (30 MB)
72 01:41:05.027158 progress 90 % (32 MB)
73 01:41:05.050936 progress 95 % (34 MB)
74 01:41:05.074204 progress 100 % (36 MB)
75 01:41:05.074996 36 MB downloaded in 0.51 s (70.35 MB/s)
76 01:41:05.075490 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:41:05.076350 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:41:05.076633 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:41:05.076899 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:41:05.077382 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:41:05.077668 saving as /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:41:05.077880 total size: 54703 (0 MB)
84 01:41:05.078090 No compression specified
85 01:41:05.119296 progress 59 % (0 MB)
86 01:41:05.120196 progress 100 % (0 MB)
87 01:41:05.120782 0 MB downloaded in 0.04 s (1.22 MB/s)
88 01:41:05.121314 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:41:05.122149 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:41:05.122417 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:41:05.122683 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:41:05.123135 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 01:41:05.123391 saving as /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/nfsrootfs/full.rootfs.tar
95 01:41:05.123599 total size: 120894716 (115 MB)
96 01:41:05.123809 Using unxz to decompress xz
97 01:41:05.167171 progress 0 % (0 MB)
98 01:41:05.963863 progress 5 % (5 MB)
99 01:41:06.815855 progress 10 % (11 MB)
100 01:41:07.614359 progress 15 % (17 MB)
101 01:41:08.360577 progress 20 % (23 MB)
102 01:41:08.957028 progress 25 % (28 MB)
103 01:41:09.790651 progress 30 % (34 MB)
104 01:41:10.586991 progress 35 % (40 MB)
105 01:41:10.949767 progress 40 % (46 MB)
106 01:41:11.324767 progress 45 % (51 MB)
107 01:41:12.048990 progress 50 % (57 MB)
108 01:41:12.934065 progress 55 % (63 MB)
109 01:41:13.716137 progress 60 % (69 MB)
110 01:41:14.478236 progress 65 % (74 MB)
111 01:41:15.259598 progress 70 % (80 MB)
112 01:41:16.094409 progress 75 % (86 MB)
113 01:41:16.887421 progress 80 % (92 MB)
114 01:41:17.648978 progress 85 % (98 MB)
115 01:41:18.493657 progress 90 % (103 MB)
116 01:41:19.268818 progress 95 % (109 MB)
117 01:41:20.097222 progress 100 % (115 MB)
118 01:41:20.109683 115 MB downloaded in 14.99 s (7.69 MB/s)
119 01:41:20.110601 end: 1.4.1 http-download (duration 00:00:15) [common]
121 01:41:20.112414 end: 1.4 download-retry (duration 00:00:15) [common]
122 01:41:20.112980 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:41:20.113539 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:41:20.114366 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/modules.tar.xz
125 01:41:20.114624 saving as /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/modules/modules.tar
126 01:41:20.114830 total size: 11769360 (11 MB)
127 01:41:20.115039 Using unxz to decompress xz
128 01:41:20.157055 progress 0 % (0 MB)
129 01:41:20.223976 progress 5 % (0 MB)
130 01:41:20.298294 progress 10 % (1 MB)
131 01:41:20.393368 progress 15 % (1 MB)
132 01:41:20.489506 progress 20 % (2 MB)
133 01:41:20.568962 progress 25 % (2 MB)
134 01:41:20.646352 progress 30 % (3 MB)
135 01:41:20.729289 progress 35 % (3 MB)
136 01:41:20.808789 progress 40 % (4 MB)
137 01:41:20.884471 progress 45 % (5 MB)
138 01:41:20.969119 progress 50 % (5 MB)
139 01:41:21.050908 progress 55 % (6 MB)
140 01:41:21.136512 progress 60 % (6 MB)
141 01:41:21.218160 progress 65 % (7 MB)
142 01:41:21.300095 progress 70 % (7 MB)
143 01:41:21.383089 progress 75 % (8 MB)
144 01:41:21.467832 progress 80 % (9 MB)
145 01:41:21.549212 progress 85 % (9 MB)
146 01:41:21.633991 progress 90 % (10 MB)
147 01:41:21.713951 progress 95 % (10 MB)
148 01:41:21.791165 progress 100 % (11 MB)
149 01:41:21.801787 11 MB downloaded in 1.69 s (6.65 MB/s)
150 01:41:21.802380 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:41:21.803224 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:41:21.803494 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 01:41:21.803760 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 01:41:38.679791 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949459/extract-nfsrootfs-fucafs6d
156 01:41:38.680420 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 01:41:38.680706 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 01:41:38.681323 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag
159 01:41:38.681763 makedir: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin
160 01:41:38.682094 makedir: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/tests
161 01:41:38.682410 makedir: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/results
162 01:41:38.682749 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-add-keys
163 01:41:38.683334 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-add-sources
164 01:41:38.683861 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-background-process-start
165 01:41:38.684435 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-background-process-stop
166 01:41:38.684993 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-common-functions
167 01:41:38.685494 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-echo-ipv4
168 01:41:38.685985 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-install-packages
169 01:41:38.686562 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-installed-packages
170 01:41:38.687063 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-os-build
171 01:41:38.687551 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-probe-channel
172 01:41:38.688100 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-probe-ip
173 01:41:38.688648 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-target-ip
174 01:41:38.689145 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-target-mac
175 01:41:38.689630 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-target-storage
176 01:41:38.690124 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-case
177 01:41:38.690640 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-event
178 01:41:38.691121 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-feedback
179 01:41:38.691595 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-raise
180 01:41:38.692159 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-reference
181 01:41:38.692684 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-runner
182 01:41:38.693182 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-set
183 01:41:38.693666 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-test-shell
184 01:41:38.694156 Updating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-add-keys (debian)
185 01:41:38.694695 Updating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-add-sources (debian)
186 01:41:38.695209 Updating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-install-packages (debian)
187 01:41:38.695711 Updating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-installed-packages (debian)
188 01:41:38.696255 Updating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/bin/lava-os-build (debian)
189 01:41:38.696726 Creating /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/environment
190 01:41:38.697112 LAVA metadata
191 01:41:38.697375 - LAVA_JOB_ID=949459
192 01:41:38.697588 - LAVA_DISPATCHER_IP=192.168.6.2
193 01:41:38.697961 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 01:41:38.698940 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 01:41:38.699259 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 01:41:38.699468 skipped lava-vland-overlay
197 01:41:38.699707 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 01:41:38.699961 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 01:41:38.700211 skipped lava-multinode-overlay
200 01:41:38.700456 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 01:41:38.700706 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 01:41:38.700957 Loading test definitions
203 01:41:38.701235 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 01:41:38.701455 Using /lava-949459 at stage 0
205 01:41:38.702601 uuid=949459_1.6.2.4.1 testdef=None
206 01:41:38.702917 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 01:41:38.703178 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 01:41:38.704827 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 01:41:38.705620 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 01:41:38.707583 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 01:41:38.708478 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 01:41:38.710365 runner path: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/0/tests/0_timesync-off test_uuid 949459_1.6.2.4.1
215 01:41:38.710936 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 01:41:38.711748 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 01:41:38.711972 Using /lava-949459 at stage 0
219 01:41:38.712371 Fetching tests from https://github.com/kernelci/test-definitions.git
220 01:41:38.712668 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/0/tests/1_kselftest-alsa'
221 01:41:42.154639 Running '/usr/bin/git checkout kernelci.org
222 01:41:42.350424 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/0/tests/1_kselftest-alsa/automated/linux/kselftest/kselftest.yaml
223 01:41:42.351903 uuid=949459_1.6.2.4.5 testdef=None
224 01:41:42.352283 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 01:41:42.353030 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 01:41:42.355916 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 01:41:42.356792 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 01:41:42.360576 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 01:41:42.361445 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 01:41:42.365124 runner path: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/0/tests/1_kselftest-alsa test_uuid 949459_1.6.2.4.5
234 01:41:42.365423 BOARD='meson-g12b-a311d-libretech-cc'
235 01:41:42.365631 BRANCH='mainline'
236 01:41:42.365830 SKIPFILE='/dev/null'
237 01:41:42.366029 SKIP_INSTALL='True'
238 01:41:42.366225 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/kselftest.tar.xz'
239 01:41:42.366424 TST_CASENAME=''
240 01:41:42.366620 TST_CMDFILES='alsa'
241 01:41:42.367185 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 01:41:42.367976 Creating lava-test-runner.conf files
244 01:41:42.368206 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949459/lava-overlay-4bi0q0ag/lava-949459/0 for stage 0
245 01:41:42.368565 - 0_timesync-off
246 01:41:42.368807 - 1_kselftest-alsa
247 01:41:42.369140 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 01:41:42.369420 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 01:42:05.822132 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 01:42:05.822578 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 01:42:05.822844 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 01:42:05.823115 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 01:42:05.823378 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 01:42:06.436787 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 01:42:06.437264 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 01:42:06.437517 extracting modules file /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949459/extract-nfsrootfs-fucafs6d
257 01:42:07.801926 extracting modules file /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk
258 01:42:09.225267 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 01:42:09.225737 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 01:42:09.226016 [common] Applying overlay to NFS
261 01:42:09.226231 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949459/compress-overlay-vjiunmhu/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949459/extract-nfsrootfs-fucafs6d
262 01:42:11.966536 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 01:42:11.966983 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 01:42:11.967258 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 01:42:11.967490 Converting downloaded kernel to a uImage
266 01:42:11.967800 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/kernel/Image /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/kernel/uImage
267 01:42:12.376009 output: Image Name:
268 01:42:12.376430 output: Created: Thu Nov 7 01:42:11 2024
269 01:42:12.376643 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 01:42:12.376850 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 01:42:12.377054 output: Load Address: 01080000
272 01:42:12.377258 output: Entry Point: 01080000
273 01:42:12.377458 output:
274 01:42:12.377790 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 01:42:12.378058 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 01:42:12.378326 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 01:42:12.378581 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 01:42:12.378842 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 01:42:12.379098 Building ramdisk /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk
280 01:42:14.612307 >> 173435 blocks
281 01:42:22.293259 Adding RAMdisk u-boot header.
282 01:42:22.293713 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk.cpio.gz.uboot
283 01:42:22.560514 output: Image Name:
284 01:42:22.560943 output: Created: Thu Nov 7 01:42:22 2024
285 01:42:22.561155 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 01:42:22.561360 output: Data Size: 24147275 Bytes = 23581.32 KiB = 23.03 MiB
287 01:42:22.561563 output: Load Address: 00000000
288 01:42:22.561762 output: Entry Point: 00000000
289 01:42:22.561961 output:
290 01:42:22.562560 rename /var/lib/lava/dispatcher/tmp/949459/extract-overlay-ramdisk-8ezn8mwn/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
291 01:42:22.562983 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 01:42:22.563270 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 01:42:22.563544 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 01:42:22.563786 No LXC device requested
295 01:42:22.564190 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 01:42:22.564777 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 01:42:22.565350 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 01:42:22.565807 Checking files for TFTP limit of 4294967296 bytes.
299 01:42:22.568799 end: 1 tftp-deploy (duration 00:01:18) [common]
300 01:42:22.569448 start: 2 uboot-action (timeout 00:05:00) [common]
301 01:42:22.570030 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 01:42:22.570577 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 01:42:22.571129 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 01:42:22.571709 Using kernel file from prepare-kernel: 949459/tftp-deploy-yxxdxzjc/kernel/uImage
305 01:42:22.572439 substitutions:
306 01:42:22.572901 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 01:42:22.573345 - {DTB_ADDR}: 0x01070000
308 01:42:22.573785 - {DTB}: 949459/tftp-deploy-yxxdxzjc/dtb/meson-g12b-a311d-libretech-cc.dtb
309 01:42:22.574230 - {INITRD}: 949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
310 01:42:22.574668 - {KERNEL_ADDR}: 0x01080000
311 01:42:22.575100 - {KERNEL}: 949459/tftp-deploy-yxxdxzjc/kernel/uImage
312 01:42:22.575533 - {LAVA_MAC}: None
313 01:42:22.576067 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949459/extract-nfsrootfs-fucafs6d
314 01:42:22.576517 - {NFS_SERVER_IP}: 192.168.6.2
315 01:42:22.576952 - {PRESEED_CONFIG}: None
316 01:42:22.577384 - {PRESEED_LOCAL}: None
317 01:42:22.577817 - {RAMDISK_ADDR}: 0x08000000
318 01:42:22.578244 - {RAMDISK}: 949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
319 01:42:22.578670 - {ROOT_PART}: None
320 01:42:22.579097 - {ROOT}: None
321 01:42:22.579523 - {SERVER_IP}: 192.168.6.2
322 01:42:22.579947 - {TEE_ADDR}: 0x83000000
323 01:42:22.580405 - {TEE}: None
324 01:42:22.580834 Parsed boot commands:
325 01:42:22.581251 - setenv autoload no
326 01:42:22.581672 - setenv initrd_high 0xffffffff
327 01:42:22.582091 - setenv fdt_high 0xffffffff
328 01:42:22.582510 - dhcp
329 01:42:22.582929 - setenv serverip 192.168.6.2
330 01:42:22.583360 - tftpboot 0x01080000 949459/tftp-deploy-yxxdxzjc/kernel/uImage
331 01:42:22.583791 - tftpboot 0x08000000 949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
332 01:42:22.584249 - tftpboot 0x01070000 949459/tftp-deploy-yxxdxzjc/dtb/meson-g12b-a311d-libretech-cc.dtb
333 01:42:22.584676 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949459/extract-nfsrootfs-fucafs6d,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 01:42:22.585115 - bootm 0x01080000 0x08000000 0x01070000
335 01:42:22.585659 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 01:42:22.587290 start: 2.3 connect-device (timeout 00:05:00) [common]
338 01:42:22.587746 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 01:42:22.603305 Setting prompt string to ['lava-test: # ']
340 01:42:22.604963 end: 2.3 connect-device (duration 00:00:00) [common]
341 01:42:22.605637 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 01:42:22.606257 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 01:42:22.606833 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 01:42:22.608091 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 01:42:22.646014 >> OK - accepted request
346 01:42:22.647847 Returned 0 in 0 seconds
347 01:42:22.749121 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 01:42:22.750917 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 01:42:22.751524 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 01:42:22.752132 Setting prompt string to ['Hit any key to stop autoboot']
352 01:42:22.752626 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 01:42:22.754314 Trying 192.168.56.21...
354 01:42:22.754829 Connected to conserv1.
355 01:42:22.755286 Escape character is '^]'.
356 01:42:22.755727
357 01:42:22.756235 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 01:42:22.756702
359 01:42:34.320779 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 01:42:34.321164 bl2_stage_init 0x01
361 01:42:34.321383 bl2_stage_init 0x81
362 01:42:34.326351 hw id: 0x0000 - pwm id 0x01
363 01:42:34.326640 bl2_stage_init 0xc1
364 01:42:34.326858 bl2_stage_init 0x02
365 01:42:34.327065
366 01:42:34.331915 L0:00000000
367 01:42:34.332242 L1:20000703
368 01:42:34.332462 L2:00008067
369 01:42:34.332669 L3:14000000
370 01:42:34.337436 B2:00402000
371 01:42:34.337694 B1:e0f83180
372 01:42:34.337907
373 01:42:34.338106 TE: 58124
374 01:42:34.338305
375 01:42:34.343326 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 01:42:34.343562
377 01:42:34.343766 Board ID = 1
378 01:42:34.348723 Set A53 clk to 24M
379 01:42:34.348960 Set A73 clk to 24M
380 01:42:34.349161 Set clk81 to 24M
381 01:42:34.354424 A53 clk: 1200 MHz
382 01:42:34.354669 A73 clk: 1200 MHz
383 01:42:34.354873 CLK81: 166.6M
384 01:42:34.355211 smccc: 00012a92
385 01:42:34.359951 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 01:42:34.365527 board id: 1
387 01:42:34.371581 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 01:42:34.382009 fw parse done
389 01:42:34.387931 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 01:42:34.430588 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 01:42:34.441442 PIEI prepare done
392 01:42:34.441750 fastboot data load
393 01:42:34.441952 fastboot data verify
394 01:42:34.447043 verify result: 266
395 01:42:34.452755 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 01:42:34.453014 LPDDR4 probe
397 01:42:34.453217 ddr clk to 1584MHz
398 01:42:34.460629 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 01:42:34.497949
400 01:42:34.498286 dmc_version 0001
401 01:42:34.504729 Check phy result
402 01:42:34.510493 INFO : End of CA training
403 01:42:34.510743 INFO : End of initialization
404 01:42:34.516126 INFO : Training has run successfully!
405 01:42:34.516369 Check phy result
406 01:42:34.521718 INFO : End of initialization
407 01:42:34.521982 INFO : End of read enable training
408 01:42:34.527257 INFO : End of fine write leveling
409 01:42:34.532948 INFO : End of Write leveling coarse delay
410 01:42:34.533210 INFO : Training has run successfully!
411 01:42:34.533414 Check phy result
412 01:42:34.538533 INFO : End of initialization
413 01:42:34.538787 INFO : End of read dq deskew training
414 01:42:34.544142 INFO : End of MPR read delay center optimization
415 01:42:34.549696 INFO : End of write delay center optimization
416 01:42:34.555223 INFO : End of read delay center optimization
417 01:42:34.555485 INFO : End of max read latency training
418 01:42:34.560915 INFO : Training has run successfully!
419 01:42:34.561169 1D training succeed
420 01:42:34.570124 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 01:42:34.617661 Check phy result
422 01:42:34.617990 INFO : End of initialization
423 01:42:34.639467 INFO : End of 2D read delay Voltage center optimization
424 01:42:34.659645 INFO : End of 2D read delay Voltage center optimization
425 01:42:34.710857 INFO : End of 2D write delay Voltage center optimization
426 01:42:34.761087 INFO : End of 2D write delay Voltage center optimization
427 01:42:34.767100 INFO : Training has run successfully!
428 01:42:34.767350
429 01:42:34.767557 channel==0
430 01:42:34.772323 RxClkDly_Margin_A0==88 ps 9
431 01:42:34.772579 TxDqDly_Margin_A0==98 ps 10
432 01:42:34.777861 RxClkDly_Margin_A1==88 ps 9
433 01:42:34.778093 TxDqDly_Margin_A1==88 ps 9
434 01:42:34.778294 TrainedVREFDQ_A0==74
435 01:42:34.783605 TrainedVREFDQ_A1==74
436 01:42:34.783859 VrefDac_Margin_A0==25
437 01:42:34.784089 DeviceVref_Margin_A0==40
438 01:42:34.789111 VrefDac_Margin_A1==25
439 01:42:34.789354 DeviceVref_Margin_A1==40
440 01:42:34.789557
441 01:42:34.789758
442 01:42:34.789957 channel==1
443 01:42:34.794689 RxClkDly_Margin_A0==88 ps 9
444 01:42:34.794957 TxDqDly_Margin_A0==98 ps 10
445 01:42:34.800353 RxClkDly_Margin_A1==88 ps 9
446 01:42:34.800627 TxDqDly_Margin_A1==88 ps 9
447 01:42:34.806128 TrainedVREFDQ_A0==77
448 01:42:34.806367 TrainedVREFDQ_A1==77
449 01:42:34.806569 VrefDac_Margin_A0==22
450 01:42:34.811486 DeviceVref_Margin_A0==37
451 01:42:34.811724 VrefDac_Margin_A1==24
452 01:42:34.817029 DeviceVref_Margin_A1==37
453 01:42:34.817291
454 01:42:34.817503 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 01:42:34.817708
456 01:42:34.850595 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000017 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 01:42:34.850950 2D training succeed
458 01:42:34.856271 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 01:42:34.861811 auto size-- 65535DDR cs0 size: 2048MB
460 01:42:34.862075 DDR cs1 size: 2048MB
461 01:42:34.867428 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 01:42:34.867697 cs0 DataBus test pass
463 01:42:34.872996 cs1 DataBus test pass
464 01:42:34.873239 cs0 AddrBus test pass
465 01:42:34.873446 cs1 AddrBus test pass
466 01:42:34.873645
467 01:42:34.878620 100bdlr_step_size ps== 420
468 01:42:34.878897 result report
469 01:42:34.884257 boot times 0Enable ddr reg access
470 01:42:34.888695 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 01:42:34.902895 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 01:42:35.476502 0.0;M3 CHK:0;cm4_sp_mode 0
473 01:42:35.476925 MVN_1=0x00000000
474 01:42:35.481970 MVN_2=0x00000000
475 01:42:35.487767 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 01:42:35.488097 OPS=0x10
477 01:42:35.488314 ring efuse init
478 01:42:35.488514 chipver efuse init
479 01:42:35.493663 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 01:42:35.498946 [0.018960 Inits done]
481 01:42:35.499220 secure task start!
482 01:42:35.499423 high task start!
483 01:42:35.503526 low task start!
484 01:42:35.503917 run into bl31
485 01:42:35.510168 NOTICE: BL31: v1.3(release):4fc40b1
486 01:42:35.517956 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 01:42:35.518359 NOTICE: BL31: G12A normal boot!
488 01:42:35.543966 NOTICE: BL31: BL33 decompress pass
489 01:42:35.549620 ERROR: Error initializing runtime service opteed_fast
490 01:42:36.782717
491 01:42:36.783413
492 01:42:36.790904 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 01:42:36.791415
494 01:42:36.791877 Model: Libre Computer AML-A311D-CC Alta
495 01:42:36.999453 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 01:42:37.022800 DRAM: 2 GiB (effective 3.8 GiB)
497 01:42:37.165809 Core: 408 devices, 31 uclasses, devicetree: separate
498 01:42:37.171672 WDT: Not starting watchdog@f0d0
499 01:42:37.203890 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 01:42:37.216390 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 01:42:37.221247 ** Bad device specification mmc 0 **
502 01:42:37.231640 Card did not respond to voltage select! : -110
503 01:42:37.239339 ** Bad device specification mmc 0 **
504 01:42:37.239971 Couldn't find partition mmc 0
505 01:42:37.247710 Card did not respond to voltage select! : -110
506 01:42:37.253210 ** Bad device specification mmc 0 **
507 01:42:37.253821 Couldn't find partition mmc 0
508 01:42:37.267931 Error: could not access storage.
509 01:42:38.521101 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 01:42:38.521542 bl2_stage_init 0x01
511 01:42:38.521763 bl2_stage_init 0x81
512 01:42:38.526652 hw id: 0x0000 - pwm id 0x01
513 01:42:38.527005 bl2_stage_init 0xc1
514 01:42:38.527222 bl2_stage_init 0x02
515 01:42:38.527427
516 01:42:38.532254 L0:00000000
517 01:42:38.532829 L1:20000703
518 01:42:38.533322 L2:00008067
519 01:42:38.533782 L3:14000000
520 01:42:38.537845 B2:00402000
521 01:42:38.538434 B1:e0f83180
522 01:42:38.538946
523 01:42:38.539432 TE: 58167
524 01:42:38.539891
525 01:42:38.543423 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 01:42:38.543933
527 01:42:38.544428 Board ID = 1
528 01:42:38.549019 Set A53 clk to 24M
529 01:42:38.549532 Set A73 clk to 24M
530 01:42:38.549988 Set clk81 to 24M
531 01:42:38.554622 A53 clk: 1200 MHz
532 01:42:38.555116 A73 clk: 1200 MHz
533 01:42:38.555567 CLK81: 166.6M
534 01:42:38.556072 smccc: 00012abe
535 01:42:38.560257 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 01:42:38.565815 board id: 1
537 01:42:38.570933 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 01:42:38.582409 fw parse done
539 01:42:38.588602 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 01:42:38.630011 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 01:42:38.641819 PIEI prepare done
542 01:42:38.642345 fastboot data load
543 01:42:38.642846 fastboot data verify
544 01:42:38.647521 verify result: 266
545 01:42:38.653106 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 01:42:38.653618 LPDDR4 probe
547 01:42:38.654076 ddr clk to 1584MHz
548 01:42:38.661083 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 01:42:38.698339
550 01:42:38.698934 dmc_version 0001
551 01:42:38.704982 Check phy result
552 01:42:38.710878 INFO : End of CA training
553 01:42:38.711369 INFO : End of initialization
554 01:42:38.716455 INFO : Training has run successfully!
555 01:42:38.716945 Check phy result
556 01:42:38.722054 INFO : End of initialization
557 01:42:38.722544 INFO : End of read enable training
558 01:42:38.727686 INFO : End of fine write leveling
559 01:42:38.733260 INFO : End of Write leveling coarse delay
560 01:42:38.733692 INFO : Training has run successfully!
561 01:42:38.733917 Check phy result
562 01:42:38.738884 INFO : End of initialization
563 01:42:38.739378 INFO : End of read dq deskew training
564 01:42:38.744441 INFO : End of MPR read delay center optimization
565 01:42:38.750070 INFO : End of write delay center optimization
566 01:42:38.755676 INFO : End of read delay center optimization
567 01:42:38.756228 INFO : End of max read latency training
568 01:42:38.761269 INFO : Training has run successfully!
569 01:42:38.761757 1D training succeed
570 01:42:38.770457 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 01:42:38.818020 Check phy result
572 01:42:38.818595 INFO : End of initialization
573 01:42:38.840696 INFO : End of 2D read delay Voltage center optimization
574 01:42:38.860932 INFO : End of 2D read delay Voltage center optimization
575 01:42:38.912981 INFO : End of 2D write delay Voltage center optimization
576 01:42:38.962328 INFO : End of 2D write delay Voltage center optimization
577 01:42:38.967826 INFO : Training has run successfully!
578 01:42:38.968203
579 01:42:38.968446 channel==0
580 01:42:38.973648 RxClkDly_Margin_A0==88 ps 9
581 01:42:38.973975 TxDqDly_Margin_A0==98 ps 10
582 01:42:38.979028 RxClkDly_Margin_A1==88 ps 9
583 01:42:38.979365 TxDqDly_Margin_A1==98 ps 10
584 01:42:38.979602 TrainedVREFDQ_A0==74
585 01:42:38.984737 TrainedVREFDQ_A1==75
586 01:42:38.985283 VrefDac_Margin_A0==24
587 01:42:38.985692 DeviceVref_Margin_A0==40
588 01:42:38.990247 VrefDac_Margin_A1==25
589 01:42:38.990697 DeviceVref_Margin_A1==39
590 01:42:38.991093
591 01:42:38.991493
592 01:42:38.995891 channel==1
593 01:42:38.996358 RxClkDly_Margin_A0==98 ps 10
594 01:42:38.996757 TxDqDly_Margin_A0==98 ps 10
595 01:42:39.001446 RxClkDly_Margin_A1==88 ps 9
596 01:42:39.001886 TxDqDly_Margin_A1==88 ps 9
597 01:42:39.007017 TrainedVREFDQ_A0==77
598 01:42:39.007452 TrainedVREFDQ_A1==77
599 01:42:39.007847 VrefDac_Margin_A0==22
600 01:42:39.012651 DeviceVref_Margin_A0==37
601 01:42:39.013090 VrefDac_Margin_A1==24
602 01:42:39.018310 DeviceVref_Margin_A1==37
603 01:42:39.018741
604 01:42:39.019135 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 01:42:39.019526
606 01:42:39.051886 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
607 01:42:39.052420 2D training succeed
608 01:42:39.057500 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 01:42:39.063028 auto size-- 65535DDR cs0 size: 2048MB
610 01:42:39.063473 DDR cs1 size: 2048MB
611 01:42:39.068758 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 01:42:39.069196 cs0 DataBus test pass
613 01:42:39.074262 cs1 DataBus test pass
614 01:42:39.074702 cs0 AddrBus test pass
615 01:42:39.075095 cs1 AddrBus test pass
616 01:42:39.075486
617 01:42:39.079897 100bdlr_step_size ps== 420
618 01:42:39.080391 result report
619 01:42:39.085511 boot times 0Enable ddr reg access
620 01:42:39.090873 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 01:42:39.103821 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 01:42:39.677998 0.0;M3 CHK:0;cm4_sp_mode 0
623 01:42:39.678626 MVN_1=0x00000000
624 01:42:39.683512 MVN_2=0x00000000
625 01:42:39.689267 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 01:42:39.689824 OPS=0x10
627 01:42:39.690291 ring efuse init
628 01:42:39.690700 chipver efuse init
629 01:42:39.697473 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 01:42:39.698031 [0.018961 Inits done]
631 01:42:39.705052 secure task start!
632 01:42:39.705530 high task start!
633 01:42:39.705925 low task start!
634 01:42:39.706310 run into bl31
635 01:42:39.711646 NOTICE: BL31: v1.3(release):4fc40b1
636 01:42:39.719008 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 01:42:39.719457 NOTICE: BL31: G12A normal boot!
638 01:42:39.744954 NOTICE: BL31: BL33 decompress pass
639 01:42:39.750538 ERROR: Error initializing runtime service opteed_fast
640 01:42:40.983548
641 01:42:40.984209
642 01:42:40.991940 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 01:42:40.992538
644 01:42:40.992966 Model: Libre Computer AML-A311D-CC Alta
645 01:42:41.200457 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 01:42:41.223740 DRAM: 2 GiB (effective 3.8 GiB)
647 01:42:41.366891 Core: 408 devices, 31 uclasses, devicetree: separate
648 01:42:41.372880 WDT: Not starting watchdog@f0d0
649 01:42:41.404818 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 01:42:41.417461 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 01:42:41.421635 ** Bad device specification mmc 0 **
652 01:42:41.432617 Card did not respond to voltage select! : -110
653 01:42:41.440478 ** Bad device specification mmc 0 **
654 01:42:41.441048 Couldn't find partition mmc 0
655 01:42:41.448693 Card did not respond to voltage select! : -110
656 01:42:41.454204 ** Bad device specification mmc 0 **
657 01:42:41.454752 Couldn't find partition mmc 0
658 01:42:41.459289 Error: could not access storage.
659 01:42:41.802847 Net: eth0: ethernet@ff3f0000
660 01:42:41.803455 starting USB...
661 01:42:42.054585 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 01:42:42.055193 Starting the controller
663 01:42:42.061727 USB XHCI 1.10
664 01:42:43.771438 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 01:42:43.772089 bl2_stage_init 0x01
666 01:42:43.772529 bl2_stage_init 0x81
667 01:42:43.776995 hw id: 0x0000 - pwm id 0x01
668 01:42:43.777473 bl2_stage_init 0xc1
669 01:42:43.777886 bl2_stage_init 0x02
670 01:42:43.778287
671 01:42:43.782737 L0:00000000
672 01:42:43.783208 L1:20000703
673 01:42:43.783622 L2:00008067
674 01:42:43.784065 L3:14000000
675 01:42:43.785649 B2:00402000
676 01:42:43.786120 B1:e0f83180
677 01:42:43.786534
678 01:42:43.786938 TE: 58159
679 01:42:43.787338
680 01:42:43.796847 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 01:42:43.797331
682 01:42:43.797744 Board ID = 1
683 01:42:43.798139 Set A53 clk to 24M
684 01:42:43.798533 Set A73 clk to 24M
685 01:42:43.802470 Set clk81 to 24M
686 01:42:43.802934 A53 clk: 1200 MHz
687 01:42:43.803338 A73 clk: 1200 MHz
688 01:42:43.805779 CLK81: 166.6M
689 01:42:43.806237 smccc: 00012ab5
690 01:42:43.811401 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 01:42:43.816943 board id: 1
692 01:42:43.822092 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 01:42:43.832838 fw parse done
694 01:42:43.838710 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 01:42:43.881381 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 01:42:43.892308 PIEI prepare done
697 01:42:43.892791 fastboot data load
698 01:42:43.893207 fastboot data verify
699 01:42:43.897910 verify result: 266
700 01:42:43.903526 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 01:42:43.904035 LPDDR4 probe
702 01:42:43.904455 ddr clk to 1584MHz
703 01:42:43.911535 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 01:42:43.948766
705 01:42:43.949316 dmc_version 0001
706 01:42:43.955521 Check phy result
707 01:42:43.961333 INFO : End of CA training
708 01:42:43.961805 INFO : End of initialization
709 01:42:43.966971 INFO : Training has run successfully!
710 01:42:43.967444 Check phy result
711 01:42:43.972561 INFO : End of initialization
712 01:42:43.973035 INFO : End of read enable training
713 01:42:43.978145 INFO : End of fine write leveling
714 01:42:43.983737 INFO : End of Write leveling coarse delay
715 01:42:43.984255 INFO : Training has run successfully!
716 01:42:43.984676 Check phy result
717 01:42:43.989318 INFO : End of initialization
718 01:42:43.989804 INFO : End of read dq deskew training
719 01:42:43.995023 INFO : End of MPR read delay center optimization
720 01:42:44.000622 INFO : End of write delay center optimization
721 01:42:44.006227 INFO : End of read delay center optimization
722 01:42:44.006759 INFO : End of max read latency training
723 01:42:44.011799 INFO : Training has run successfully!
724 01:42:44.012364 1D training succeed
725 01:42:44.020956 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 01:42:44.068557 Check phy result
727 01:42:44.069092 INFO : End of initialization
728 01:42:44.090124 INFO : End of 2D read delay Voltage center optimization
729 01:42:44.110189 INFO : End of 2D read delay Voltage center optimization
730 01:42:44.162142 INFO : End of 2D write delay Voltage center optimization
731 01:42:44.211442 INFO : End of 2D write delay Voltage center optimization
732 01:42:44.216981 INFO : Training has run successfully!
733 01:42:44.217452
734 01:42:44.217866 channel==0
735 01:42:44.222534 RxClkDly_Margin_A0==88 ps 9
736 01:42:44.223008 TxDqDly_Margin_A0==98 ps 10
737 01:42:44.228118 RxClkDly_Margin_A1==88 ps 9
738 01:42:44.228599 TxDqDly_Margin_A1==88 ps 9
739 01:42:44.229012 TrainedVREFDQ_A0==74
740 01:42:44.233788 TrainedVREFDQ_A1==74
741 01:42:44.234253 VrefDac_Margin_A0==25
742 01:42:44.234659 DeviceVref_Margin_A0==40
743 01:42:44.239284 VrefDac_Margin_A1==25
744 01:42:44.239744 DeviceVref_Margin_A1==40
745 01:42:44.240201
746 01:42:44.240610
747 01:42:44.241009 channel==1
748 01:42:44.244928 RxClkDly_Margin_A0==98 ps 10
749 01:42:44.245389 TxDqDly_Margin_A0==98 ps 10
750 01:42:44.250585 RxClkDly_Margin_A1==98 ps 10
751 01:42:44.251051 TxDqDly_Margin_A1==88 ps 9
752 01:42:44.256205 TrainedVREFDQ_A0==77
753 01:42:44.256677 TrainedVREFDQ_A1==77
754 01:42:44.257085 VrefDac_Margin_A0==22
755 01:42:44.261702 DeviceVref_Margin_A0==37
756 01:42:44.262165 VrefDac_Margin_A1==22
757 01:42:44.267274 DeviceVref_Margin_A1==37
758 01:42:44.267737
759 01:42:44.268195 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 01:42:44.268596
761 01:42:44.300843 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000017 00000018 00000017 0000001a 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 01:42:44.301402 2D training succeed
763 01:42:44.306537 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 01:42:44.312105 auto size-- 65535DDR cs0 size: 2048MB
765 01:42:44.312578 DDR cs1 size: 2048MB
766 01:42:44.317723 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 01:42:44.318186 cs0 DataBus test pass
768 01:42:44.323374 cs1 DataBus test pass
769 01:42:44.323856 cs0 AddrBus test pass
770 01:42:44.324301 cs1 AddrBus test pass
771 01:42:44.324703
772 01:42:44.328903 100bdlr_step_size ps== 420
773 01:42:44.329377 result report
774 01:42:44.334523 boot times 0Enable ddr reg access
775 01:42:44.339884 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 01:42:44.353261 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 01:42:44.925258 0.0;M3 CHK:0;cm4_sp_mode 0
778 01:42:44.926097 MVN_1=0x00000000
779 01:42:44.930906 MVN_2=0x00000000
780 01:42:44.936515 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 01:42:44.937137 OPS=0x10
782 01:42:44.937667 ring efuse init
783 01:42:44.938178 chipver efuse init
784 01:42:44.942124 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 01:42:44.947714 [0.018961 Inits done]
786 01:42:44.948343 secure task start!
787 01:42:44.948833 high task start!
788 01:42:44.952373 low task start!
789 01:42:44.952906 run into bl31
790 01:42:44.958911 NOTICE: BL31: v1.3(release):4fc40b1
791 01:42:44.966851 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 01:42:44.967448 NOTICE: BL31: G12A normal boot!
793 01:42:44.992744 NOTICE: BL31: BL33 decompress pass
794 01:42:44.998348 ERROR: Error initializing runtime service opteed_fast
795 01:42:46.231139
796 01:42:46.232017
797 01:42:46.239657 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 01:42:46.240318
799 01:42:46.240932 Model: Libre Computer AML-A311D-CC Alta
800 01:42:46.448159 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 01:42:46.471464 DRAM: 2 GiB (effective 3.8 GiB)
802 01:42:46.614453 Core: 408 devices, 31 uclasses, devicetree: separate
803 01:42:46.620287 WDT: Not starting watchdog@f0d0
804 01:42:46.652495 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 01:42:46.664898 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 01:42:46.670035 ** Bad device specification mmc 0 **
807 01:42:46.680261 Card did not respond to voltage select! : -110
808 01:42:46.687913 ** Bad device specification mmc 0 **
809 01:42:46.688411 Couldn't find partition mmc 0
810 01:42:46.696280 Card did not respond to voltage select! : -110
811 01:42:46.701780 ** Bad device specification mmc 0 **
812 01:42:46.702242 Couldn't find partition mmc 0
813 01:42:46.706859 Error: could not access storage.
814 01:42:47.049324 Net: eth0: ethernet@ff3f0000
815 01:42:47.049916 starting USB...
816 01:42:47.301034 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 01:42:47.301403 Starting the controller
818 01:42:47.308052 USB XHCI 1.10
819 01:42:49.471280 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 01:42:49.471678 bl2_stage_init 0x01
821 01:42:49.471903 bl2_stage_init 0x81
822 01:42:49.476858 hw id: 0x0000 - pwm id 0x01
823 01:42:49.477154 bl2_stage_init 0xc1
824 01:42:49.477372 bl2_stage_init 0x02
825 01:42:49.477591
826 01:42:49.482362 L0:00000000
827 01:42:49.482643 L1:20000703
828 01:42:49.482856 L2:00008067
829 01:42:49.483072 L3:14000000
830 01:42:49.485574 B2:00402000
831 01:42:49.485854 B1:e0f83180
832 01:42:49.486068
833 01:42:49.486285 TE: 58124
834 01:42:49.486497
835 01:42:49.496702 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 01:42:49.496996
837 01:42:49.497213 Board ID = 1
838 01:42:49.497433 Set A53 clk to 24M
839 01:42:49.497639 Set A73 clk to 24M
840 01:42:49.502408 Set clk81 to 24M
841 01:42:49.502705 A53 clk: 1200 MHz
842 01:42:49.502919 A73 clk: 1200 MHz
843 01:42:49.507942 CLK81: 166.6M
844 01:42:49.508388 smccc: 00012a92
845 01:42:49.513613 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 01:42:49.514086 board id: 1
847 01:42:49.521906 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 01:42:49.532559 fw parse done
849 01:42:49.538524 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 01:42:49.581153 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 01:42:49.592110 PIEI prepare done
852 01:42:49.592469 fastboot data load
853 01:42:49.592709 fastboot data verify
854 01:42:49.597599 verify result: 266
855 01:42:49.603190 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 01:42:49.603525 LPDDR4 probe
857 01:42:49.603764 ddr clk to 1584MHz
858 01:42:49.611183 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 01:42:49.648445
860 01:42:49.648807 dmc_version 0001
861 01:42:49.654975 Check phy result
862 01:42:49.660970 INFO : End of CA training
863 01:42:49.661434 INFO : End of initialization
864 01:42:49.666625 INFO : Training has run successfully!
865 01:42:49.666971 Check phy result
866 01:42:49.672188 INFO : End of initialization
867 01:42:49.672523 INFO : End of read enable training
868 01:42:49.675520 INFO : End of fine write leveling
869 01:42:49.681106 INFO : End of Write leveling coarse delay
870 01:42:49.686635 INFO : Training has run successfully!
871 01:42:49.686966 Check phy result
872 01:42:49.687199 INFO : End of initialization
873 01:42:49.692407 INFO : End of read dq deskew training
874 01:42:49.697866 INFO : End of MPR read delay center optimization
875 01:42:49.698340 INFO : End of write delay center optimization
876 01:42:49.703582 INFO : End of read delay center optimization
877 01:42:49.709074 INFO : End of max read latency training
878 01:42:49.709627 INFO : Training has run successfully!
879 01:42:49.714609 1D training succeed
880 01:42:49.720624 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 01:42:49.768311 Check phy result
882 01:42:49.768943 INFO : End of initialization
883 01:42:49.790002 INFO : End of 2D read delay Voltage center optimization
884 01:42:49.810245 INFO : End of 2D read delay Voltage center optimization
885 01:42:49.862413 INFO : End of 2D write delay Voltage center optimization
886 01:42:49.911801 INFO : End of 2D write delay Voltage center optimization
887 01:42:49.917188 INFO : Training has run successfully!
888 01:42:49.917714
889 01:42:49.918182 channel==0
890 01:42:49.922767 RxClkDly_Margin_A0==88 ps 9
891 01:42:49.923264 TxDqDly_Margin_A0==98 ps 10
892 01:42:49.928387 RxClkDly_Margin_A1==88 ps 9
893 01:42:49.928956 TxDqDly_Margin_A1==88 ps 9
894 01:42:49.929458 TrainedVREFDQ_A0==74
895 01:42:49.934024 TrainedVREFDQ_A1==74
896 01:42:49.934583 VrefDac_Margin_A0==25
897 01:42:49.935056 DeviceVref_Margin_A0==40
898 01:42:49.939631 VrefDac_Margin_A1==25
899 01:42:49.940219 DeviceVref_Margin_A1==40
900 01:42:49.940659
901 01:42:49.941090
902 01:42:49.941517 channel==1
903 01:42:49.945128 RxClkDly_Margin_A0==98 ps 10
904 01:42:49.945615 TxDqDly_Margin_A0==98 ps 10
905 01:42:49.950807 RxClkDly_Margin_A1==98 ps 10
906 01:42:49.951280 TxDqDly_Margin_A1==88 ps 9
907 01:42:49.956550 TrainedVREFDQ_A0==77
908 01:42:49.957080 TrainedVREFDQ_A1==77
909 01:42:49.957513 VrefDac_Margin_A0==22
910 01:42:49.962041 DeviceVref_Margin_A0==37
911 01:42:49.962571 VrefDac_Margin_A1==22
912 01:42:49.967552 DeviceVref_Margin_A1==37
913 01:42:49.968124
914 01:42:49.968568 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 01:42:49.969001
916 01:42:50.001122 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 01:42:50.001655 2D training succeed
918 01:42:50.006666 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 01:42:50.012297 auto size-- 65535DDR cs0 size: 2048MB
920 01:42:50.012769 DDR cs1 size: 2048MB
921 01:42:50.017878 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 01:42:50.018366 cs0 DataBus test pass
923 01:42:50.023472 cs1 DataBus test pass
924 01:42:50.023948 cs0 AddrBus test pass
925 01:42:50.024433 cs1 AddrBus test pass
926 01:42:50.024861
927 01:42:50.029089 100bdlr_step_size ps== 420
928 01:42:50.029584 result report
929 01:42:50.034659 boot times 0Enable ddr reg access
930 01:42:50.040011 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 01:42:50.053516 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 01:42:50.627229 0.0;M3 CHK:0;cm4_sp_mode 0
933 01:42:50.627878 MVN_1=0x00000000
934 01:42:50.632686 MVN_2=0x00000000
935 01:42:50.638418 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 01:42:50.638914 OPS=0x10
937 01:42:50.639373 ring efuse init
938 01:42:50.639819 chipver efuse init
939 01:42:50.644021 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 01:42:50.649686 [0.018961 Inits done]
941 01:42:50.650218 secure task start!
942 01:42:50.650686 high task start!
943 01:42:50.653395 low task start!
944 01:42:50.653888 run into bl31
945 01:42:50.660895 NOTICE: BL31: v1.3(release):4fc40b1
946 01:42:50.667760 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 01:42:50.668303 NOTICE: BL31: G12A normal boot!
948 01:42:50.694595 NOTICE: BL31: BL33 decompress pass
949 01:42:50.700075 ERROR: Error initializing runtime service opteed_fast
950 01:42:51.933259
951 01:42:51.933962
952 01:42:51.941519 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 01:42:51.942070
954 01:42:51.942557 Model: Libre Computer AML-A311D-CC Alta
955 01:42:52.149298 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 01:42:52.173341 DRAM: 2 GiB (effective 3.8 GiB)
957 01:42:52.316354 Core: 408 devices, 31 uclasses, devicetree: separate
958 01:42:52.321508 WDT: Not starting watchdog@f0d0
959 01:42:52.354566 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 01:42:52.366910 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 01:42:52.370886 ** Bad device specification mmc 0 **
962 01:42:52.382297 Card did not respond to voltage select! : -110
963 01:42:52.389687 ** Bad device specification mmc 0 **
964 01:42:52.390272 Couldn't find partition mmc 0
965 01:42:52.398223 Card did not respond to voltage select! : -110
966 01:42:52.403818 ** Bad device specification mmc 0 **
967 01:42:52.404421 Couldn't find partition mmc 0
968 01:42:52.408337 Error: could not access storage.
969 01:42:52.750917 Net: eth0: ethernet@ff3f0000
970 01:42:52.751506 starting USB...
971 01:42:53.003035 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 01:42:53.003640 Starting the controller
973 01:42:53.009699 USB XHCI 1.10
974 01:42:54.564015 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 01:42:54.571790 scanning usb for storage devices... 0 Storage Device(s) found
977 01:42:54.623396 Hit any key to stop autoboot: 1
978 01:42:54.624562 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 01:42:54.625188 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 01:42:54.625659 Setting prompt string to ['=>']
981 01:42:54.626150 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 01:42:54.628925 0
983 01:42:54.629799 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 01:42:54.630295 Sending with 10 millisecond of delay
986 01:42:55.765136 => setenv autoload no
987 01:42:55.775957 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 01:42:55.780853 setenv autoload no
989 01:42:55.781576 Sending with 10 millisecond of delay
991 01:42:57.579256 => setenv initrd_high 0xffffffff
992 01:42:57.590084 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 01:42:57.591046 setenv initrd_high 0xffffffff
994 01:42:57.591774 Sending with 10 millisecond of delay
996 01:42:59.208280 => setenv fdt_high 0xffffffff
997 01:42:59.219047 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 01:42:59.219964 setenv fdt_high 0xffffffff
999 01:42:59.220743 Sending with 10 millisecond of delay
1001 01:42:59.512633 => dhcp
1002 01:42:59.523383 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 01:42:59.524251 dhcp
1004 01:42:59.524694 Speed: 1000, full duplex
1005 01:42:59.525106 BOOTP broadcast 1
1006 01:42:59.678768 DHCP client bound to address 192.168.6.27 (155 ms)
1007 01:42:59.679555 Sending with 10 millisecond of delay
1009 01:43:01.356281 => setenv serverip 192.168.6.2
1010 01:43:01.366906 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 01:43:01.367796 setenv serverip 192.168.6.2
1012 01:43:01.368507 Sending with 10 millisecond of delay
1014 01:43:05.092220 => tftpboot 0x01080000 949459/tftp-deploy-yxxdxzjc/kernel/uImage
1015 01:43:05.102989 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
1016 01:43:05.103785 tftpboot 0x01080000 949459/tftp-deploy-yxxdxzjc/kernel/uImage
1017 01:43:05.104280 Speed: 1000, full duplex
1018 01:43:05.104698 Using ethernet@ff3f0000 device
1019 01:43:05.105561 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 01:43:05.111196 Filename '949459/tftp-deploy-yxxdxzjc/kernel/uImage'.
1021 01:43:05.115125 Load address: 0x1080000
1022 01:43:07.552054 Loading: *################################################## 36.1 MiB
1023 01:43:07.552726 14.8 MiB/s
1024 01:43:07.553209 done
1025 01:43:07.556405 Bytes transferred = 37878336 (241fa40 hex)
1026 01:43:07.557293 Sending with 10 millisecond of delay
1028 01:43:12.245750 => tftpboot 0x08000000 949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
1029 01:43:12.256595 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:10)
1030 01:43:12.257531 tftpboot 0x08000000 949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot
1031 01:43:12.258023 Speed: 1000, full duplex
1032 01:43:12.258487 Using ethernet@ff3f0000 device
1033 01:43:12.259343 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 01:43:12.271002 Filename '949459/tftp-deploy-yxxdxzjc/ramdisk/ramdisk.cpio.gz.uboot'.
1035 01:43:12.271603 Load address: 0x8000000
1036 01:43:18.812701 Loading: *#T ################################################ UDP wrong checksum 00000005 0000f0f0
1037 01:43:23.813081 T UDP wrong checksum 00000005 0000f0f0
1038 01:43:28.891533 T UDP wrong checksum 000000ff 00007543
1039 01:43:28.929587 UDP wrong checksum 000000ff 00001036
1040 01:43:33.815261 T UDP wrong checksum 00000005 0000f0f0
1041 01:43:40.222913 T UDP wrong checksum 000000ff 0000b802
1042 01:43:40.232513 UDP wrong checksum 000000ff 00004ef5
1043 01:43:42.829024 UDP wrong checksum 000000ff 0000f71d
1044 01:43:53.816535 T T UDP wrong checksum 00000005 0000f0f0
1045 01:44:08.823123 T T T
1046 01:44:08.823720 Retry count exceeded; starting again
1048 01:44:08.825216 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1051 01:44:08.827147 end: 2.4 uboot-commands (duration 00:01:46) [common]
1053 01:44:08.828585 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1055 01:44:08.829632 end: 2 uboot-action (duration 00:01:46) [common]
1057 01:44:08.831128 Cleaning after the job
1058 01:44:08.831663 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/ramdisk
1059 01:44:08.833349 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/kernel
1060 01:44:08.856596 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/dtb
1061 01:44:08.857781 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/nfsrootfs
1062 01:44:09.023930 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949459/tftp-deploy-yxxdxzjc/modules
1063 01:44:09.044855 start: 4.1 power-off (timeout 00:00:30) [common]
1064 01:44:09.045548 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1065 01:44:09.076777 >> OK - accepted request
1066 01:44:09.078750 Returned 0 in 0 seconds
1067 01:44:09.179553 end: 4.1 power-off (duration 00:00:00) [common]
1069 01:44:09.180533 start: 4.2 read-feedback (timeout 00:10:00) [common]
1070 01:44:09.181169 Listened to connection for namespace 'common' for up to 1s
1071 01:44:10.182092 Finalising connection for namespace 'common'
1072 01:44:10.182545 Disconnecting from shell: Finalise
1073 01:44:10.182843 =>
1074 01:44:10.283507 end: 4.2 read-feedback (duration 00:00:01) [common]
1075 01:44:10.283848 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949459
1076 01:44:13.229129 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949459
1077 01:44:13.229756 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.