Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:58:24.822269 lava-dispatcher, installed at version: 2024.01
2 01:58:24.823168 start: 0 validate
3 01:58:24.823698 Start time: 2024-11-07 01:58:24.823668+00:00 (UTC)
4 01:58:24.824334 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:58:24.824939 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:58:24.870466 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:58:24.871068 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 01:58:24.912258 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:58:24.912939 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:58:24.943822 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:58:24.944376 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:58:24.982240 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:58:24.982769 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 01:58:25.036016 validate duration: 0.21
16 01:58:25.037585 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:58:25.038216 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:58:25.038961 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:58:25.040178 Not decompressing ramdisk as can be used compressed.
20 01:58:25.041105 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:58:25.041706 saving as /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/ramdisk/initrd.cpio.gz
22 01:58:25.042355 total size: 5628140 (5 MB)
23 01:58:25.086085 progress 0 % (0 MB)
24 01:58:25.093991 progress 5 % (0 MB)
25 01:58:25.102064 progress 10 % (0 MB)
26 01:58:25.109257 progress 15 % (0 MB)
27 01:58:25.114656 progress 20 % (1 MB)
28 01:58:25.118380 progress 25 % (1 MB)
29 01:58:25.122534 progress 30 % (1 MB)
30 01:58:25.126675 progress 35 % (1 MB)
31 01:58:25.130379 progress 40 % (2 MB)
32 01:58:25.134512 progress 45 % (2 MB)
33 01:58:25.138224 progress 50 % (2 MB)
34 01:58:25.142325 progress 55 % (2 MB)
35 01:58:25.146475 progress 60 % (3 MB)
36 01:58:25.150167 progress 65 % (3 MB)
37 01:58:25.154248 progress 70 % (3 MB)
38 01:58:25.157926 progress 75 % (4 MB)
39 01:58:25.162048 progress 80 % (4 MB)
40 01:58:25.165615 progress 85 % (4 MB)
41 01:58:25.169328 progress 90 % (4 MB)
42 01:58:25.172968 progress 95 % (5 MB)
43 01:58:25.176394 progress 100 % (5 MB)
44 01:58:25.177081 5 MB downloaded in 0.13 s (39.84 MB/s)
45 01:58:25.177654 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:58:25.178585 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:58:25.178898 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:58:25.179170 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:58:25.179680 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/kernel/Image
51 01:58:25.179934 saving as /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/kernel/Image
52 01:58:25.180178 total size: 37878272 (36 MB)
53 01:58:25.180399 No compression specified
54 01:58:25.221145 progress 0 % (0 MB)
55 01:58:25.245281 progress 5 % (1 MB)
56 01:58:25.269598 progress 10 % (3 MB)
57 01:58:25.293716 progress 15 % (5 MB)
58 01:58:25.318179 progress 20 % (7 MB)
59 01:58:25.341729 progress 25 % (9 MB)
60 01:58:25.367920 progress 30 % (10 MB)
61 01:58:25.391922 progress 35 % (12 MB)
62 01:58:25.416379 progress 40 % (14 MB)
63 01:58:25.440541 progress 45 % (16 MB)
64 01:58:25.464083 progress 50 % (18 MB)
65 01:58:25.488944 progress 55 % (19 MB)
66 01:58:25.513213 progress 60 % (21 MB)
67 01:58:25.537269 progress 65 % (23 MB)
68 01:58:25.561344 progress 70 % (25 MB)
69 01:58:25.585236 progress 75 % (27 MB)
70 01:58:25.609100 progress 80 % (28 MB)
71 01:58:25.632956 progress 85 % (30 MB)
72 01:58:25.656966 progress 90 % (32 MB)
73 01:58:25.680847 progress 95 % (34 MB)
74 01:58:25.703455 progress 100 % (36 MB)
75 01:58:25.704291 36 MB downloaded in 0.52 s (68.93 MB/s)
76 01:58:25.704795 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:58:25.705616 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:58:25.705891 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:58:25.706157 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:58:25.706636 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:58:25.706912 saving as /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:58:25.707119 total size: 54703 (0 MB)
84 01:58:25.707326 No compression specified
85 01:58:25.741689 progress 59 % (0 MB)
86 01:58:25.742566 progress 100 % (0 MB)
87 01:58:25.743116 0 MB downloaded in 0.04 s (1.45 MB/s)
88 01:58:25.743609 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:58:25.744476 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:58:25.744744 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:58:25.745005 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:58:25.745466 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:58:25.745708 saving as /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/nfsrootfs/full.rootfs.tar
95 01:58:25.745911 total size: 474398908 (452 MB)
96 01:58:25.746123 Using unxz to decompress xz
97 01:58:25.779683 progress 0 % (0 MB)
98 01:58:26.918971 progress 5 % (22 MB)
99 01:58:28.402666 progress 10 % (45 MB)
100 01:58:28.874040 progress 15 % (67 MB)
101 01:58:29.686987 progress 20 % (90 MB)
102 01:58:30.240557 progress 25 % (113 MB)
103 01:58:30.601187 progress 30 % (135 MB)
104 01:58:31.251790 progress 35 % (158 MB)
105 01:58:32.091671 progress 40 % (181 MB)
106 01:58:32.839072 progress 45 % (203 MB)
107 01:58:33.444274 progress 50 % (226 MB)
108 01:58:34.116570 progress 55 % (248 MB)
109 01:58:35.388425 progress 60 % (271 MB)
110 01:58:36.863130 progress 65 % (294 MB)
111 01:58:38.485556 progress 70 % (316 MB)
112 01:58:41.604880 progress 75 % (339 MB)
113 01:58:44.054369 progress 80 % (361 MB)
114 01:58:47.027917 progress 85 % (384 MB)
115 01:58:50.240424 progress 90 % (407 MB)
116 01:58:53.881273 progress 95 % (429 MB)
117 01:58:57.328197 progress 100 % (452 MB)
118 01:58:57.342340 452 MB downloaded in 31.60 s (14.32 MB/s)
119 01:58:57.343131 end: 1.4.1 http-download (duration 00:00:32) [common]
121 01:58:57.344271 end: 1.4 download-retry (duration 00:00:32) [common]
122 01:58:57.344842 start: 1.5 download-retry (timeout 00:09:28) [common]
123 01:58:57.345382 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 01:58:57.346225 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-15/modules.tar.xz
125 01:58:57.346722 saving as /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/modules/modules.tar
126 01:58:57.347138 total size: 11769360 (11 MB)
127 01:58:57.347571 Using unxz to decompress xz
128 01:58:57.405602 progress 0 % (0 MB)
129 01:58:57.488252 progress 5 % (0 MB)
130 01:58:57.588414 progress 10 % (1 MB)
131 01:58:57.683057 progress 15 % (1 MB)
132 01:58:57.779814 progress 20 % (2 MB)
133 01:58:57.859520 progress 25 % (2 MB)
134 01:58:57.937036 progress 30 % (3 MB)
135 01:58:58.018030 progress 35 % (3 MB)
136 01:58:58.098539 progress 40 % (4 MB)
137 01:58:58.175378 progress 45 % (5 MB)
138 01:58:58.261596 progress 50 % (5 MB)
139 01:58:58.345046 progress 55 % (6 MB)
140 01:58:58.431087 progress 60 % (6 MB)
141 01:58:58.513351 progress 65 % (7 MB)
142 01:58:58.596696 progress 70 % (7 MB)
143 01:58:58.680419 progress 75 % (8 MB)
144 01:58:58.765000 progress 80 % (9 MB)
145 01:58:58.846037 progress 85 % (9 MB)
146 01:58:58.929939 progress 90 % (10 MB)
147 01:58:59.009669 progress 95 % (10 MB)
148 01:58:59.087846 progress 100 % (11 MB)
149 01:58:59.098636 11 MB downloaded in 1.75 s (6.41 MB/s)
150 01:58:59.099348 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:58:59.100872 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:58:59.101580 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 01:58:59.102259 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 01:59:14.751655 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949526/extract-nfsrootfs-phovetyh
156 01:59:14.752278 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 01:59:14.752568 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 01:59:14.753176 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc
159 01:59:14.753605 makedir: /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin
160 01:59:14.753924 makedir: /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/tests
161 01:59:14.754235 makedir: /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/results
162 01:59:14.754560 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-add-keys
163 01:59:14.755079 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-add-sources
164 01:59:14.755607 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-background-process-start
165 01:59:14.756157 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-background-process-stop
166 01:59:14.756690 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-common-functions
167 01:59:14.757191 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-echo-ipv4
168 01:59:14.757670 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-install-packages
169 01:59:14.758158 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-installed-packages
170 01:59:14.758648 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-os-build
171 01:59:14.759145 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-probe-channel
172 01:59:14.759617 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-probe-ip
173 01:59:14.760115 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-target-ip
174 01:59:14.760594 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-target-mac
175 01:59:14.761062 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-target-storage
176 01:59:14.761565 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-case
177 01:59:14.762056 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-event
178 01:59:14.762524 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-feedback
179 01:59:14.762989 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-raise
180 01:59:14.763454 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-reference
181 01:59:14.763998 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-runner
182 01:59:14.764513 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-set
183 01:59:14.764987 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-test-shell
184 01:59:14.765488 Updating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-install-packages (oe)
185 01:59:14.766053 Updating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/bin/lava-installed-packages (oe)
186 01:59:14.766494 Creating /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/environment
187 01:59:14.766856 LAVA metadata
188 01:59:14.767111 - LAVA_JOB_ID=949526
189 01:59:14.767324 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:59:14.767679 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 01:59:14.768642 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:59:14.768950 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 01:59:14.769156 skipped lava-vland-overlay
194 01:59:14.769395 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:59:14.769646 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 01:59:14.769861 skipped lava-multinode-overlay
197 01:59:14.770099 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:59:14.770347 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 01:59:14.770590 Loading test definitions
200 01:59:14.770865 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 01:59:14.771082 Using /lava-949526 at stage 0
202 01:59:14.772228 uuid=949526_1.6.2.4.1 testdef=None
203 01:59:14.772527 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:59:14.772786 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 01:59:14.774518 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:59:14.775295 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 01:59:14.777468 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:59:14.778296 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 01:59:14.780356 runner path: /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/0/tests/0_v4l2-decoder-conformance-h264 test_uuid 949526_1.6.2.4.1
212 01:59:14.780931 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:59:14.781680 Creating lava-test-runner.conf files
215 01:59:14.781878 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949526/lava-overlay-impzlbyc/lava-949526/0 for stage 0
216 01:59:14.782206 - 0_v4l2-decoder-conformance-h264
217 01:59:14.782541 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:59:14.782810 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 01:59:14.804116 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:59:14.804490 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 01:59:14.804747 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:59:14.805006 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:59:14.805264 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 01:59:15.485277 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:59:15.485725 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 01:59:15.485992 extracting modules file /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949526/extract-nfsrootfs-phovetyh
227 01:59:17.156482 extracting modules file /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk
228 01:59:18.879255 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:59:18.880014 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 01:59:18.880511 [common] Applying overlay to NFS
231 01:59:18.880896 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949526/compress-overlay-fpccnzdl/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949526/extract-nfsrootfs-phovetyh
232 01:59:18.925480 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:59:18.926126 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 01:59:18.926590 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 01:59:18.926970 Converting downloaded kernel to a uImage
236 01:59:18.927515 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/kernel/Image /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/kernel/uImage
237 01:59:19.370141 output: Image Name:
238 01:59:19.370585 output: Created: Thu Nov 7 01:59:18 2024
239 01:59:19.370801 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:59:19.371009 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
241 01:59:19.371238 output: Load Address: 01080000
242 01:59:19.371454 output: Entry Point: 01080000
243 01:59:19.371673 output:
244 01:59:19.372082 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:59:19.372434 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:59:19.372755 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 01:59:19.373061 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:59:19.373369 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 01:59:19.373667 Building ramdisk /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk
250 01:59:22.018257 >> 173435 blocks
251 01:59:29.704804 Adding RAMdisk u-boot header.
252 01:59:29.705460 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk.cpio.gz.uboot
253 01:59:30.004071 output: Image Name:
254 01:59:30.004695 output: Created: Thu Nov 7 01:59:29 2024
255 01:59:30.005113 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:59:30.005519 output: Data Size: 24146961 Bytes = 23581.02 KiB = 23.03 MiB
257 01:59:30.005918 output: Load Address: 00000000
258 01:59:30.006310 output: Entry Point: 00000000
259 01:59:30.006699 output:
260 01:59:30.007623 rename /var/lib/lava/dispatcher/tmp/949526/extract-overlay-ramdisk-7iuzzp6j/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
261 01:59:30.008368 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 01:59:30.008912 end: 1.6 prepare-tftp-overlay (duration 00:00:31) [common]
263 01:59:30.009433 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:55) [common]
264 01:59:30.009878 No LXC device requested
265 01:59:30.010368 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:59:30.010874 start: 1.8 deploy-device-env (timeout 00:08:55) [common]
267 01:59:30.011363 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:59:30.011774 Checking files for TFTP limit of 4294967296 bytes.
269 01:59:30.014445 end: 1 tftp-deploy (duration 00:01:05) [common]
270 01:59:30.015015 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:59:30.015536 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:59:30.016058 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:59:30.016569 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:59:30.017091 Using kernel file from prepare-kernel: 949526/tftp-deploy-wc_gqs6q/kernel/uImage
275 01:59:30.017736 substitutions:
276 01:59:30.018154 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:59:30.018555 - {DTB_ADDR}: 0x01070000
278 01:59:30.018949 - {DTB}: 949526/tftp-deploy-wc_gqs6q/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:59:30.019340 - {INITRD}: 949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
280 01:59:30.019733 - {KERNEL_ADDR}: 0x01080000
281 01:59:30.020151 - {KERNEL}: 949526/tftp-deploy-wc_gqs6q/kernel/uImage
282 01:59:30.020547 - {LAVA_MAC}: None
283 01:59:30.020975 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949526/extract-nfsrootfs-phovetyh
284 01:59:30.021371 - {NFS_SERVER_IP}: 192.168.6.2
285 01:59:30.021756 - {PRESEED_CONFIG}: None
286 01:59:30.022143 - {PRESEED_LOCAL}: None
287 01:59:30.022528 - {RAMDISK_ADDR}: 0x08000000
288 01:59:30.022906 - {RAMDISK}: 949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
289 01:59:30.023290 - {ROOT_PART}: None
290 01:59:30.023672 - {ROOT}: None
291 01:59:30.024080 - {SERVER_IP}: 192.168.6.2
292 01:59:30.024467 - {TEE_ADDR}: 0x83000000
293 01:59:30.024850 - {TEE}: None
294 01:59:30.025232 Parsed boot commands:
295 01:59:30.025605 - setenv autoload no
296 01:59:30.025987 - setenv initrd_high 0xffffffff
297 01:59:30.026370 - setenv fdt_high 0xffffffff
298 01:59:30.026751 - dhcp
299 01:59:30.027134 - setenv serverip 192.168.6.2
300 01:59:30.027514 - tftpboot 0x01080000 949526/tftp-deploy-wc_gqs6q/kernel/uImage
301 01:59:30.027898 - tftpboot 0x08000000 949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
302 01:59:30.028339 - tftpboot 0x01070000 949526/tftp-deploy-wc_gqs6q/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:59:30.028725 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949526/extract-nfsrootfs-phovetyh,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:59:30.029122 - bootm 0x01080000 0x08000000 0x01070000
305 01:59:30.029625 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:59:30.031106 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:59:30.031524 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:59:30.046842 Setting prompt string to ['lava-test: # ']
310 01:59:30.048362 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:59:30.048977 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:59:30.049532 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:59:30.050093 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:59:30.051286 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:59:30.089759 >> OK - accepted request
316 01:59:30.092209 Returned 0 in 0 seconds
317 01:59:30.193337 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:59:30.194963 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:59:30.195520 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:59:30.196079 Setting prompt string to ['Hit any key to stop autoboot']
322 01:59:30.196552 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:59:30.198157 Trying 192.168.56.21...
324 01:59:30.198660 Connected to conserv1.
325 01:59:30.199078 Escape character is '^]'.
326 01:59:30.199504
327 01:59:30.199927 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:59:30.200401
329 01:59:41.748503 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:59:41.749137 bl2_stage_init 0x01
331 01:59:41.749558 bl2_stage_init 0x81
332 01:59:41.753995 hw id: 0x0000 - pwm id 0x01
333 01:59:41.754506 bl2_stage_init 0xc1
334 01:59:41.754907 bl2_stage_init 0x02
335 01:59:41.755300
336 01:59:41.759667 L0:00000000
337 01:59:41.760137 L1:20000703
338 01:59:41.760538 L2:00008067
339 01:59:41.760927 L3:14000000
340 01:59:41.762452 B2:00402000
341 01:59:41.762872 B1:e0f83180
342 01:59:41.763262
343 01:59:41.763654 TE: 58124
344 01:59:41.764077
345 01:59:41.773667 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:59:41.774102
347 01:59:41.774498 Board ID = 1
348 01:59:41.774885 Set A53 clk to 24M
349 01:59:41.775272 Set A73 clk to 24M
350 01:59:41.779134 Set clk81 to 24M
351 01:59:41.779555 A53 clk: 1200 MHz
352 01:59:41.779943 A73 clk: 1200 MHz
353 01:59:41.784722 CLK81: 166.6M
354 01:59:41.785142 smccc: 00012a92
355 01:59:41.790428 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:59:41.790846 board id: 1
357 01:59:41.795950 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:59:41.809781 fw parse done
359 01:59:41.815744 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:59:41.858313 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:59:41.869181 PIEI prepare done
362 01:59:41.869600 fastboot data load
363 01:59:41.869995 fastboot data verify
364 01:59:41.874861 verify result: 266
365 01:59:41.880513 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:59:41.880940 LPDDR4 probe
367 01:59:41.881334 ddr clk to 1584MHz
368 01:59:41.888397 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:59:41.925641
370 01:59:41.926081 dmc_version 0001
371 01:59:41.932438 Check phy result
372 01:59:41.938208 INFO : End of CA training
373 01:59:41.938635 INFO : End of initialization
374 01:59:41.943820 INFO : Training has run successfully!
375 01:59:41.944280 Check phy result
376 01:59:41.949416 INFO : End of initialization
377 01:59:41.949839 INFO : End of read enable training
378 01:59:41.952752 INFO : End of fine write leveling
379 01:59:41.958348 INFO : End of Write leveling coarse delay
380 01:59:41.963942 INFO : Training has run successfully!
381 01:59:41.964394 Check phy result
382 01:59:41.964798 INFO : End of initialization
383 01:59:41.969554 INFO : End of read dq deskew training
384 01:59:41.975123 INFO : End of MPR read delay center optimization
385 01:59:41.975552 INFO : End of write delay center optimization
386 01:59:41.980749 INFO : End of read delay center optimization
387 01:59:41.986369 INFO : End of max read latency training
388 01:59:41.986807 INFO : Training has run successfully!
389 01:59:41.991935 1D training succeed
390 01:59:41.997832 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:59:42.045390 Check phy result
392 01:59:42.045857 INFO : End of initialization
393 01:59:42.067950 INFO : End of 2D read delay Voltage center optimization
394 01:59:42.088221 INFO : End of 2D read delay Voltage center optimization
395 01:59:42.140269 INFO : End of 2D write delay Voltage center optimization
396 01:59:42.189616 INFO : End of 2D write delay Voltage center optimization
397 01:59:42.195186 INFO : Training has run successfully!
398 01:59:42.195601
399 01:59:42.196130 channel==0
400 01:59:42.200827 RxClkDly_Margin_A0==88 ps 9
401 01:59:42.201263 TxDqDly_Margin_A0==98 ps 10
402 01:59:42.206424 RxClkDly_Margin_A1==88 ps 9
403 01:59:42.206843 TxDqDly_Margin_A1==98 ps 10
404 01:59:42.207239 TrainedVREFDQ_A0==74
405 01:59:42.212039 TrainedVREFDQ_A1==74
406 01:59:42.212465 VrefDac_Margin_A0==24
407 01:59:42.212859 DeviceVref_Margin_A0==40
408 01:59:42.217619 VrefDac_Margin_A1==24
409 01:59:42.218036 DeviceVref_Margin_A1==40
410 01:59:42.218429
411 01:59:42.218821
412 01:59:42.223213 channel==1
413 01:59:42.223630 RxClkDly_Margin_A0==98 ps 10
414 01:59:42.224049 TxDqDly_Margin_A0==98 ps 10
415 01:59:42.228815 RxClkDly_Margin_A1==88 ps 9
416 01:59:42.229235 TxDqDly_Margin_A1==88 ps 9
417 01:59:42.234401 TrainedVREFDQ_A0==77
418 01:59:42.234825 TrainedVREFDQ_A1==77
419 01:59:42.235222 VrefDac_Margin_A0==22
420 01:59:42.240053 DeviceVref_Margin_A0==37
421 01:59:42.240471 VrefDac_Margin_A1==24
422 01:59:42.245620 DeviceVref_Margin_A1==37
423 01:59:42.246034
424 01:59:42.246428 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:59:42.246819
426 01:59:42.279223 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
427 01:59:42.279723 2D training succeed
428 01:59:42.284865 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:59:42.290436 auto size-- 65535DDR cs0 size: 2048MB
430 01:59:42.290859 DDR cs1 size: 2048MB
431 01:59:42.296047 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:59:42.296482 cs0 DataBus test pass
433 01:59:42.301601 cs1 DataBus test pass
434 01:59:42.302023 cs0 AddrBus test pass
435 01:59:42.302417 cs1 AddrBus test pass
436 01:59:42.302801
437 01:59:42.307209 100bdlr_step_size ps== 420
438 01:59:42.307641 result report
439 01:59:42.312865 boot times 0Enable ddr reg access
440 01:59:42.318152 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:59:42.331669 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:59:42.905379 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:59:42.905997 MVN_1=0x00000000
444 01:59:42.910850 MVN_2=0x00000000
445 01:59:42.916576 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:59:42.917063 OPS=0x10
447 01:59:42.917486 ring efuse init
448 01:59:42.917904 chipver efuse init
449 01:59:42.922094 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:59:42.927894 [0.018961 Inits done]
451 01:59:42.928474 secure task start!
452 01:59:42.928895 high task start!
453 01:59:42.932393 low task start!
454 01:59:42.932943 run into bl31
455 01:59:42.938979 NOTICE: BL31: v1.3(release):4fc40b1
456 01:59:42.946737 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:59:42.947231 NOTICE: BL31: G12A normal boot!
458 01:59:42.972166 NOTICE: BL31: BL33 decompress pass
459 01:59:42.977921 ERROR: Error initializing runtime service opteed_fast
460 01:59:44.219142
461 01:59:44.219770
462 01:59:44.220591 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:59:44.221056
464 01:59:44.221480 Model: Libre Computer AML-A311D-CC Alta
465 01:59:44.427914 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:59:44.451104 DRAM: 2 GiB (effective 3.8 GiB)
467 01:59:44.594113 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:59:44.599111 WDT: Not starting watchdog@f0d0
469 01:59:44.632308 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:59:44.644613 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:59:44.649575 ** Bad device specification mmc 0 **
472 01:59:44.659929 Card did not respond to voltage select! : -110
473 01:59:44.667598 ** Bad device specification mmc 0 **
474 01:59:44.668082 Couldn't find partition mmc 0
475 01:59:44.675924 Card did not respond to voltage select! : -110
476 01:59:44.681446 ** Bad device specification mmc 0 **
477 01:59:44.681908 Couldn't find partition mmc 0
478 01:59:44.686416 Error: could not access storage.
479 01:59:45.949002 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:59:45.949615 bl2_stage_init 0x01
481 01:59:45.950051 bl2_stage_init 0x81
482 01:59:45.954645 hw id: 0x0000 - pwm id 0x01
483 01:59:45.955101 bl2_stage_init 0xc1
484 01:59:45.955518 bl2_stage_init 0x02
485 01:59:45.955924
486 01:59:45.960143 L0:00000000
487 01:59:45.960594 L1:20000703
488 01:59:45.961008 L2:00008067
489 01:59:45.961412 L3:14000000
490 01:59:45.965751 B2:00402000
491 01:59:45.966188 B1:e0f83180
492 01:59:45.966593
493 01:59:45.967217 TE: 58167
494 01:59:45.967676
495 01:59:45.971354 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:59:45.971798
497 01:59:45.972252 Board ID = 1
498 01:59:45.976947 Set A53 clk to 24M
499 01:59:45.977406 Set A73 clk to 24M
500 01:59:45.977819 Set clk81 to 24M
501 01:59:45.982509 A53 clk: 1200 MHz
502 01:59:45.982952 A73 clk: 1200 MHz
503 01:59:45.983366 CLK81: 166.6M
504 01:59:45.983772 smccc: 00012abe
505 01:59:45.988325 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:59:45.993812 board id: 1
507 01:59:45.999717 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:59:46.010368 fw parse done
509 01:59:46.016256 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:59:46.058872 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:59:46.069729 PIEI prepare done
512 01:59:46.070195 fastboot data load
513 01:59:46.070611 fastboot data verify
514 01:59:46.075356 verify result: 266
515 01:59:46.080949 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:59:46.081395 LPDDR4 probe
517 01:59:46.081801 ddr clk to 1584MHz
518 01:59:46.088925 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:59:46.126240
520 01:59:46.126772 dmc_version 0001
521 01:59:46.132856 Check phy result
522 01:59:46.138716 INFO : End of CA training
523 01:59:46.139157 INFO : End of initialization
524 01:59:46.144360 INFO : Training has run successfully!
525 01:59:46.144804 Check phy result
526 01:59:46.149927 INFO : End of initialization
527 01:59:46.150370 INFO : End of read enable training
528 01:59:46.155575 INFO : End of fine write leveling
529 01:59:46.161117 INFO : End of Write leveling coarse delay
530 01:59:46.161581 INFO : Training has run successfully!
531 01:59:46.161991 Check phy result
532 01:59:46.166720 INFO : End of initialization
533 01:59:46.167191 INFO : End of read dq deskew training
534 01:59:46.172330 INFO : End of MPR read delay center optimization
535 01:59:46.177934 INFO : End of write delay center optimization
536 01:59:46.183532 INFO : End of read delay center optimization
537 01:59:46.183971 INFO : End of max read latency training
538 01:59:46.189101 INFO : Training has run successfully!
539 01:59:46.189545 1D training succeed
540 01:59:46.198431 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:59:46.246044 Check phy result
542 01:59:46.246392 INFO : End of initialization
543 01:59:46.267483 INFO : End of 2D read delay Voltage center optimization
544 01:59:46.287788 INFO : End of 2D read delay Voltage center optimization
545 01:59:46.339626 INFO : End of 2D write delay Voltage center optimization
546 01:59:46.388844 INFO : End of 2D write delay Voltage center optimization
547 01:59:46.394441 INFO : Training has run successfully!
548 01:59:46.394900
549 01:59:46.395333 channel==0
550 01:59:46.400076 RxClkDly_Margin_A0==88 ps 9
551 01:59:46.400534 TxDqDly_Margin_A0==98 ps 10
552 01:59:46.403352 RxClkDly_Margin_A1==88 ps 9
553 01:59:46.403789 TxDqDly_Margin_A1==98 ps 10
554 01:59:46.408918 TrainedVREFDQ_A0==74
555 01:59:46.409359 TrainedVREFDQ_A1==74
556 01:59:46.409770 VrefDac_Margin_A0==25
557 01:59:46.414517 DeviceVref_Margin_A0==40
558 01:59:46.415115 VrefDac_Margin_A1==25
559 01:59:46.420313 DeviceVref_Margin_A1==40
560 01:59:46.420864
561 01:59:46.421339
562 01:59:46.421796 channel==1
563 01:59:46.422287 RxClkDly_Margin_A0==98 ps 10
564 01:59:46.425836 TxDqDly_Margin_A0==98 ps 10
565 01:59:46.426407 RxClkDly_Margin_A1==98 ps 10
566 01:59:46.431423 TxDqDly_Margin_A1==88 ps 9
567 01:59:46.432008 TrainedVREFDQ_A0==77
568 01:59:46.432496 TrainedVREFDQ_A1==77
569 01:59:46.437069 VrefDac_Margin_A0==22
570 01:59:46.437622 DeviceVref_Margin_A0==37
571 01:59:46.442605 VrefDac_Margin_A1==22
572 01:59:46.443142 DeviceVref_Margin_A1==37
573 01:59:46.443613
574 01:59:46.448243 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:59:46.448790
576 01:59:46.476083 soc_vref_reg_value 0x 00000019 0000001a 00000018 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
577 01:59:46.481710 2D training succeed
578 01:59:46.487280 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:59:46.487832 auto size-- 65535DDR cs0 size: 2048MB
580 01:59:46.492934 DDR cs1 size: 2048MB
581 01:59:46.493493 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:59:46.498388 cs0 DataBus test pass
583 01:59:46.498745 cs1 DataBus test pass
584 01:59:46.499011 cs0 AddrBus test pass
585 01:59:46.504044 cs1 AddrBus test pass
586 01:59:46.504410
587 01:59:46.504695 100bdlr_step_size ps== 420
588 01:59:46.504962 result report
589 01:59:46.509583 boot times 0Enable ddr reg access
590 01:59:46.517363 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:59:46.530763 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:59:47.102745 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:59:47.103391 MVN_1=0x00000000
594 01:59:47.108387 MVN_2=0x00000000
595 01:59:47.114112 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:59:47.114447 OPS=0x10
597 01:59:47.114717 ring efuse init
598 01:59:47.114963 chipver efuse init
599 01:59:47.119641 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:59:47.125226 [0.018960 Inits done]
601 01:59:47.125561 secure task start!
602 01:59:47.125812 high task start!
603 01:59:47.129780 low task start!
604 01:59:47.130100 run into bl31
605 01:59:47.136522 NOTICE: BL31: v1.3(release):4fc40b1
606 01:59:47.144272 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:59:47.144632 NOTICE: BL31: G12A normal boot!
608 01:59:47.170152 NOTICE: BL31: BL33 decompress pass
609 01:59:47.175789 ERROR: Error initializing runtime service opteed_fast
610 01:59:48.408720
611 01:59:48.409166
612 01:59:48.417007 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:59:48.417376
614 01:59:48.417650 Model: Libre Computer AML-A311D-CC Alta
615 01:59:48.625620 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:59:48.648837 DRAM: 2 GiB (effective 3.8 GiB)
617 01:59:48.791902 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:59:48.797726 WDT: Not starting watchdog@f0d0
619 01:59:48.830005 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:59:48.842457 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:59:48.847486 ** Bad device specification mmc 0 **
622 01:59:48.857744 Card did not respond to voltage select! : -110
623 01:59:48.865509 ** Bad device specification mmc 0 **
624 01:59:48.866030 Couldn't find partition mmc 0
625 01:59:48.873741 Card did not respond to voltage select! : -110
626 01:59:48.879268 ** Bad device specification mmc 0 **
627 01:59:48.879780 Couldn't find partition mmc 0
628 01:59:48.884338 Error: could not access storage.
629 01:59:49.226836 Net: eth0: ethernet@ff3f0000
630 01:59:49.227495 starting USB...
631 01:59:49.478728 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:59:49.479193 Starting the controller
633 01:59:49.485592 USB XHCI 1.10
634 01:59:51.197631 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
635 01:59:51.198028 bl2_stage_init 0x01
636 01:59:51.198252 bl2_stage_init 0x81
637 01:59:51.203184 hw id: 0x0000 - pwm id 0x01
638 01:59:51.203477 bl2_stage_init 0xc1
639 01:59:51.203697 bl2_stage_init 0x02
640 01:59:51.203910
641 01:59:51.208774 L0:00000000
642 01:59:51.209056 L1:20000703
643 01:59:51.209272 L2:00008067
644 01:59:51.209481 L3:14000000
645 01:59:51.214349 B2:00402000
646 01:59:51.214631 B1:e0f83180
647 01:59:51.214844
648 01:59:51.215061 TE: 58124
649 01:59:51.215271
650 01:59:51.219974 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
651 01:59:51.220278
652 01:59:51.220485 Board ID = 1
653 01:59:51.225574 Set A53 clk to 24M
654 01:59:51.225857 Set A73 clk to 24M
655 01:59:51.226077 Set clk81 to 24M
656 01:59:51.231148 A53 clk: 1200 MHz
657 01:59:51.231428 A73 clk: 1200 MHz
658 01:59:51.231646 CLK81: 166.6M
659 01:59:51.231864 smccc: 00012a91
660 01:59:51.236784 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
661 01:59:51.242372 board id: 1
662 01:59:51.248233 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
663 01:59:51.258997 fw parse done
664 01:59:51.264877 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
665 01:59:51.307510 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
666 01:59:51.318422 PIEI prepare done
667 01:59:51.318719 fastboot data load
668 01:59:51.318938 fastboot data verify
669 01:59:51.324066 verify result: 266
670 01:59:51.329712 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
671 01:59:51.330000 LPDDR4 probe
672 01:59:51.330224 ddr clk to 1584MHz
673 01:59:51.337654 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
674 01:59:51.374968
675 01:59:51.375311 dmc_version 0001
676 01:59:51.381643 Check phy result
677 01:59:51.387492 INFO : End of CA training
678 01:59:51.387805 INFO : End of initialization
679 01:59:51.393054 INFO : Training has run successfully!
680 01:59:51.393346 Check phy result
681 01:59:51.398613 INFO : End of initialization
682 01:59:51.398902 INFO : End of read enable training
683 01:59:51.402133 INFO : End of fine write leveling
684 01:59:51.407666 INFO : End of Write leveling coarse delay
685 01:59:51.413378 INFO : Training has run successfully!
686 01:59:51.413690 Check phy result
687 01:59:51.413907 INFO : End of initialization
688 01:59:51.418939 INFO : End of read dq deskew training
689 01:59:51.424524 INFO : End of MPR read delay center optimization
690 01:59:51.424804 INFO : End of write delay center optimization
691 01:59:51.430069 INFO : End of read delay center optimization
692 01:59:51.435711 INFO : End of max read latency training
693 01:59:51.436026 INFO : Training has run successfully!
694 01:59:51.441329 1D training succeed
695 01:59:51.447210 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
696 01:59:51.494954 Check phy result
697 01:59:51.495285 INFO : End of initialization
698 01:59:51.516605 INFO : End of 2D read delay Voltage center optimization
699 01:59:51.536828 INFO : End of 2D read delay Voltage center optimization
700 01:59:51.588941 INFO : End of 2D write delay Voltage center optimization
701 01:59:51.638281 INFO : End of 2D write delay Voltage center optimization
702 01:59:51.643617 INFO : Training has run successfully!
703 01:59:51.643913
704 01:59:51.644469 channel==0
705 01:59:51.649254 RxClkDly_Margin_A0==88 ps 9
706 01:59:51.649753 TxDqDly_Margin_A0==98 ps 10
707 01:59:51.652588 RxClkDly_Margin_A1==88 ps 9
708 01:59:51.653072 TxDqDly_Margin_A1==98 ps 10
709 01:59:51.658120 TrainedVREFDQ_A0==74
710 01:59:51.658603 TrainedVREFDQ_A1==74
711 01:59:51.659050 VrefDac_Margin_A0==25
712 01:59:51.663725 DeviceVref_Margin_A0==40
713 01:59:51.664243 VrefDac_Margin_A1==25
714 01:59:51.669371 DeviceVref_Margin_A1==40
715 01:59:51.669852
716 01:59:51.670294
717 01:59:51.670728 channel==1
718 01:59:51.671161 RxClkDly_Margin_A0==98 ps 10
719 01:59:51.674889 TxDqDly_Margin_A0==88 ps 9
720 01:59:51.675373 RxClkDly_Margin_A1==88 ps 9
721 01:59:51.680704 TxDqDly_Margin_A1==108 ps 11
722 01:59:51.681274 TrainedVREFDQ_A0==76
723 01:59:51.681737 TrainedVREFDQ_A1==78
724 01:59:51.686167 VrefDac_Margin_A0==22
725 01:59:51.686682 DeviceVref_Margin_A0==38
726 01:59:51.691744 VrefDac_Margin_A1==24
727 01:59:51.692315 DeviceVref_Margin_A1==36
728 01:59:51.692777
729 01:59:51.697259 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
730 01:59:51.697752
731 01:59:51.725267 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
732 01:59:51.730916 2D training succeed
733 01:59:51.736536 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
734 01:59:51.737032 auto size-- 65535DDR cs0 size: 2048MB
735 01:59:51.742140 DDR cs1 size: 2048MB
736 01:59:51.742625 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
737 01:59:51.747692 cs0 DataBus test pass
738 01:59:51.748232 cs1 DataBus test pass
739 01:59:51.748675 cs0 AddrBus test pass
740 01:59:51.753292 cs1 AddrBus test pass
741 01:59:51.753783
742 01:59:51.754227 100bdlr_step_size ps== 420
743 01:59:51.754675 result report
744 01:59:51.758929 boot times 0Enable ddr reg access
745 01:59:51.766656 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
746 01:59:51.780182 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
747 01:59:52.354058 0.0;M3 CHK:0;cm4_sp_mode 0
748 01:59:52.354766 MVN_1=0x00000000
749 01:59:52.359414 MVN_2=0x00000000
750 01:59:52.365309 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
751 01:59:52.365937 OPS=0x10
752 01:59:52.366390 ring efuse init
753 01:59:52.366827 chipver efuse init
754 01:59:52.373468 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
755 01:59:52.374011 [0.018961 Inits done]
756 01:59:52.381036 secure task start!
757 01:59:52.381546 high task start!
758 01:59:52.381984 low task start!
759 01:59:52.382415 run into bl31
760 01:59:52.387598 NOTICE: BL31: v1.3(release):4fc40b1
761 01:59:52.395336 NOTICE: BL31: Built : 15:58:17, May 22 2019
762 01:59:52.395849 NOTICE: BL31: G12A normal boot!
763 01:59:52.420711 NOTICE: BL31: BL33 decompress pass
764 01:59:52.426428 ERROR: Error initializing runtime service opteed_fast
765 01:59:53.659352
766 01:59:53.660083
767 01:59:53.667946 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
768 01:59:53.668552
769 01:59:53.669025 Model: Libre Computer AML-A311D-CC Alta
770 01:59:53.876261 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
771 01:59:53.899607 DRAM: 2 GiB (effective 3.8 GiB)
772 01:59:54.042615 Core: 408 devices, 31 uclasses, devicetree: separate
773 01:59:54.048401 WDT: Not starting watchdog@f0d0
774 01:59:54.080587 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
775 01:59:54.093163 Loading Environment from FAT... Card did not respond to voltage select! : -110
776 01:59:54.098356 ** Bad device specification mmc 0 **
777 01:59:54.108547 Card did not respond to voltage select! : -110
778 01:59:54.116234 ** Bad device specification mmc 0 **
779 01:59:54.116768 Couldn't find partition mmc 0
780 01:59:54.124612 Card did not respond to voltage select! : -110
781 01:59:54.129980 ** Bad device specification mmc 0 **
782 01:59:54.130513 Couldn't find partition mmc 0
783 01:59:54.135098 Error: could not access storage.
784 01:59:54.478675 Net: eth0: ethernet@ff3f0000
785 01:59:54.479322 starting USB...
786 01:59:54.730444 Bus usb@ff500000: Register 3000140 NbrPorts 3
787 01:59:54.731111 Starting the controller
788 01:59:54.737448 USB XHCI 1.10
789 01:59:56.898128 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
790 01:59:56.898802 bl2_stage_init 0x01
791 01:59:56.899285 bl2_stage_init 0x81
792 01:59:56.903353 hw id: 0x0000 - pwm id 0x01
793 01:59:56.903860 bl2_stage_init 0xc1
794 01:59:56.904363 bl2_stage_init 0x02
795 01:59:56.904817
796 01:59:56.909021 L0:00000000
797 01:59:56.909521 L1:20000703
798 01:59:56.909977 L2:00008067
799 01:59:56.910425 L3:14000000
800 01:59:56.911759 B2:00402000
801 01:59:56.912278 B1:e0f83180
802 01:59:56.912732
803 01:59:56.913181 TE: 58159
804 01:59:56.913623
805 01:59:56.922847 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
806 01:59:56.923354
807 01:59:56.923809 Board ID = 1
808 01:59:56.924295 Set A53 clk to 24M
809 01:59:56.924741 Set A73 clk to 24M
810 01:59:56.928461 Set clk81 to 24M
811 01:59:56.928948 A53 clk: 1200 MHz
812 01:59:56.929399 A73 clk: 1200 MHz
813 01:59:56.932017 CLK81: 166.6M
814 01:59:56.932505 smccc: 00012ab5
815 01:59:56.937617 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
816 01:59:56.943193 board id: 1
817 01:59:56.948362 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
818 01:59:56.958960 fw parse done
819 01:59:56.964961 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
820 01:59:57.007600 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
821 01:59:57.018460 PIEI prepare done
822 01:59:57.018964 fastboot data load
823 01:59:57.019427 fastboot data verify
824 01:59:57.024082 verify result: 266
825 01:59:57.029621 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
826 01:59:57.030129 LPDDR4 probe
827 01:59:57.030585 ddr clk to 1584MHz
828 01:59:57.037741 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
829 01:59:57.075119
830 01:59:57.075749 dmc_version 0001
831 01:59:57.081620 Check phy result
832 01:59:57.087439 INFO : End of CA training
833 01:59:57.087934 INFO : End of initialization
834 01:59:57.093054 INFO : Training has run successfully!
835 01:59:57.093553 Check phy result
836 01:59:57.098647 INFO : End of initialization
837 01:59:57.099136 INFO : End of read enable training
838 01:59:57.104247 INFO : End of fine write leveling
839 01:59:57.109869 INFO : End of Write leveling coarse delay
840 01:59:57.110356 INFO : Training has run successfully!
841 01:59:57.110809 Check phy result
842 01:59:57.115405 INFO : End of initialization
843 01:59:57.115887 INFO : End of read dq deskew training
844 01:59:57.121073 INFO : End of MPR read delay center optimization
845 01:59:57.126620 INFO : End of write delay center optimization
846 01:59:57.132229 INFO : End of read delay center optimization
847 01:59:57.132758 INFO : End of max read latency training
848 01:59:57.137842 INFO : Training has run successfully!
849 01:59:57.138327 1D training succeed
850 01:59:57.147046 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
851 01:59:57.194658 Check phy result
852 01:59:57.195301 INFO : End of initialization
853 01:59:57.216263 INFO : End of 2D read delay Voltage center optimization
854 01:59:57.236586 INFO : End of 2D read delay Voltage center optimization
855 01:59:57.288470 INFO : End of 2D write delay Voltage center optimization
856 01:59:57.337648 INFO : End of 2D write delay Voltage center optimization
857 01:59:57.343212 INFO : Training has run successfully!
858 01:59:57.343827
859 01:59:57.344357 channel==0
860 01:59:57.348689 RxClkDly_Margin_A0==88 ps 9
861 01:59:57.349257 TxDqDly_Margin_A0==98 ps 10
862 01:59:57.354396 RxClkDly_Margin_A1==88 ps 9
863 01:59:57.354909 TxDqDly_Margin_A1==98 ps 10
864 01:59:57.355395 TrainedVREFDQ_A0==74
865 01:59:57.360092 TrainedVREFDQ_A1==74
866 01:59:57.360630 VrefDac_Margin_A0==25
867 01:59:57.361086 DeviceVref_Margin_A0==40
868 01:59:57.365618 VrefDac_Margin_A1==25
869 01:59:57.366138 DeviceVref_Margin_A1==40
870 01:59:57.366569
871 01:59:57.366998
872 01:59:57.371163 channel==1
873 01:59:57.371632 RxClkDly_Margin_A0==98 ps 10
874 01:59:57.372109 TxDqDly_Margin_A0==98 ps 10
875 01:59:57.376741 RxClkDly_Margin_A1==88 ps 9
876 01:59:57.377212 TxDqDly_Margin_A1==88 ps 9
877 01:59:57.382414 TrainedVREFDQ_A0==77
878 01:59:57.382886 TrainedVREFDQ_A1==77
879 01:59:57.383323 VrefDac_Margin_A0==22
880 01:59:57.388073 DeviceVref_Margin_A0==37
881 01:59:57.388539 VrefDac_Margin_A1==24
882 01:59:57.393527 DeviceVref_Margin_A1==37
883 01:59:57.393991
884 01:59:57.394426 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
885 01:59:57.394855
886 01:59:57.427180 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 0000001a 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
887 01:59:57.427701 2D training succeed
888 01:59:57.432745 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
889 01:59:57.438194 auto size-- 65535DDR cs0 size: 2048MB
890 01:59:57.438660 DDR cs1 size: 2048MB
891 01:59:57.443942 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
892 01:59:57.444525 cs0 DataBus test pass
893 01:59:57.449486 cs1 DataBus test pass
894 01:59:57.450064 cs0 AddrBus test pass
895 01:59:57.450512 cs1 AddrBus test pass
896 01:59:57.450948
897 01:59:57.455161 100bdlr_step_size ps== 420
898 01:59:57.455707 result report
899 01:59:57.460740 boot times 0Enable ddr reg access
900 01:59:57.466092 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
901 01:59:57.479503 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
902 01:59:58.051456 0.0;M3 CHK:0;cm4_sp_mode 0
903 01:59:58.051897 MVN_1=0x00000000
904 01:59:58.057037 MVN_2=0x00000000
905 01:59:58.062757 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
906 01:59:58.063157 OPS=0x10
907 01:59:58.063432 ring efuse init
908 01:59:58.063687 chipver efuse init
909 01:59:58.068352 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
910 01:59:58.074002 [0.018961 Inits done]
911 01:59:58.074390 secure task start!
912 01:59:58.074667 high task start!
913 01:59:58.078541 low task start!
914 01:59:58.079080 run into bl31
915 01:59:58.085197 NOTICE: BL31: v1.3(release):4fc40b1
916 01:59:58.093095 NOTICE: BL31: Built : 15:58:17, May 22 2019
917 01:59:58.093501 NOTICE: BL31: G12A normal boot!
918 01:59:58.119082 NOTICE: BL31: BL33 decompress pass
919 01:59:58.124718 ERROR: Error initializing runtime service opteed_fast
920 01:59:59.357346
921 01:59:59.357783
922 01:59:59.365798 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
923 01:59:59.366279
924 01:59:59.366668 Model: Libre Computer AML-A311D-CC Alta
925 01:59:59.574473 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
926 01:59:59.597755 DRAM: 2 GiB (effective 3.8 GiB)
927 01:59:59.740750 Core: 408 devices, 31 uclasses, devicetree: separate
928 01:59:59.746622 WDT: Not starting watchdog@f0d0
929 01:59:59.778874 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
930 01:59:59.791329 Loading Environment from FAT... Card did not respond to voltage select! : -110
931 01:59:59.796371 ** Bad device specification mmc 0 **
932 01:59:59.806626 Card did not respond to voltage select! : -110
933 01:59:59.813352 ** Bad device specification mmc 0 **
934 01:59:59.813900 Couldn't find partition mmc 0
935 01:59:59.822595 Card did not respond to voltage select! : -110
936 01:59:59.828261 ** Bad device specification mmc 0 **
937 01:59:59.828799 Couldn't find partition mmc 0
938 01:59:59.833138 Error: could not access storage.
939 02:00:00.175602 Net: eth0: ethernet@ff3f0000
940 02:00:00.176303 starting USB...
941 02:00:00.427512 Bus usb@ff500000: Register 3000140 NbrPorts 3
942 02:00:00.428231 Starting the controller
943 02:00:00.434414 USB XHCI 1.10
944 02:00:01.988717 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
945 02:00:01.996998 scanning usb for storage devices... 0 Storage Device(s) found
947 02:00:02.048640 Hit any key to stop autoboot: 1
948 02:00:02.049542 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
949 02:00:02.050219 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
950 02:00:02.050816 Setting prompt string to ['=>']
951 02:00:02.051390 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
952 02:00:02.064536 0
953 02:00:02.065563 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
954 02:00:02.066135 Sending with 10 millisecond of delay
956 02:00:03.202123 => setenv autoload no
957 02:00:03.212842 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
958 02:00:03.215537 setenv autoload no
959 02:00:03.216052 Sending with 10 millisecond of delay
961 02:00:05.013131 => setenv initrd_high 0xffffffff
962 02:00:05.023961 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
963 02:00:05.025089 setenv initrd_high 0xffffffff
964 02:00:05.025884 Sending with 10 millisecond of delay
966 02:00:06.643134 => setenv fdt_high 0xffffffff
967 02:00:06.653991 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
968 02:00:06.654920 setenv fdt_high 0xffffffff
969 02:00:06.655708 Sending with 10 millisecond of delay
971 02:00:06.947801 => dhcp
972 02:00:06.958637 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
973 02:00:06.959301 dhcp
974 02:00:06.959786 Speed: 1000, full duplex
975 02:00:06.960289 BOOTP broadcast 1
976 02:00:06.966839 DHCP client bound to address 192.168.6.27 (8 ms)
977 02:00:06.967620 Sending with 10 millisecond of delay
979 02:00:08.647282 => setenv serverip 192.168.6.2
980 02:00:08.658107 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
981 02:00:08.659039 setenv serverip 192.168.6.2
982 02:00:08.659729 Sending with 10 millisecond of delay
984 02:00:12.385801 => tftpboot 0x01080000 949526/tftp-deploy-wc_gqs6q/kernel/uImage
985 02:00:12.396595 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
986 02:00:12.397413 tftpboot 0x01080000 949526/tftp-deploy-wc_gqs6q/kernel/uImage
987 02:00:12.397879 Speed: 1000, full duplex
988 02:00:12.398293 Using ethernet@ff3f0000 device
989 02:00:12.399277 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
990 02:00:12.404885 Filename '949526/tftp-deploy-wc_gqs6q/kernel/uImage'.
991 02:00:12.408844 Load address: 0x1080000
992 02:00:14.786701 Loading: *################################################## 36.1 MiB
993 02:00:14.787331 15.2 MiB/s
994 02:00:14.787767 done
995 02:00:14.790996 Bytes transferred = 37878336 (241fa40 hex)
996 02:00:14.791802 Sending with 10 millisecond of delay
998 02:00:19.482475 => tftpboot 0x08000000 949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
999 02:00:19.493304 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1000 02:00:19.494209 tftpboot 0x08000000 949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot
1001 02:00:19.494705 Speed: 1000, full duplex
1002 02:00:19.495166 Using ethernet@ff3f0000 device
1003 02:00:19.496399 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1004 02:00:19.508076 Filename '949526/tftp-deploy-wc_gqs6q/ramdisk/ramdisk.cpio.gz.uboot'.
1005 02:00:19.508656 Load address: 0x8000000
1006 02:00:20.583306 Loading: *### UDP wrong checksum 000000ff 0000fc56
1007 02:00:20.596379 UDP wrong checksum 000000ff 00008549
1008 02:00:26.170109 T ############################################## UDP wrong checksum 00000005 00004721
1009 02:00:31.167624 T UDP wrong checksum 00000005 00004721
1010 02:00:41.170818 T T UDP wrong checksum 00000005 00004721
1011 02:01:01.174783 T T T T UDP wrong checksum 00000005 00004721
1012 02:01:16.178902 T T
1013 02:01:16.179582 Retry count exceeded; starting again
1015 02:01:16.181204 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1018 02:01:16.183241 end: 2.4 uboot-commands (duration 00:01:46) [common]
1020 02:01:16.184856 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1022 02:01:16.186038 end: 2 uboot-action (duration 00:01:46) [common]
1024 02:01:16.187704 Cleaning after the job
1025 02:01:16.188339 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/ramdisk
1026 02:01:16.189724 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/kernel
1027 02:01:16.218652 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/dtb
1028 02:01:16.220107 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/nfsrootfs
1029 02:01:16.382245 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949526/tftp-deploy-wc_gqs6q/modules
1030 02:01:16.404636 start: 4.1 power-off (timeout 00:00:30) [common]
1031 02:01:16.405320 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1032 02:01:16.439388 >> OK - accepted request
1033 02:01:16.441672 Returned 0 in 0 seconds
1034 02:01:16.542758 end: 4.1 power-off (duration 00:00:00) [common]
1036 02:01:16.543804 start: 4.2 read-feedback (timeout 00:10:00) [common]
1037 02:01:16.544521 Listened to connection for namespace 'common' for up to 1s
1038 02:01:17.545490 Finalising connection for namespace 'common'
1039 02:01:17.546004 Disconnecting from shell: Finalise
1040 02:01:17.546307 =>
1041 02:01:17.647016 end: 4.2 read-feedback (duration 00:00:01) [common]
1042 02:01:17.647521 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949526
1043 02:01:20.579151 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949526
1044 02:01:20.579745 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.