Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:02:57.946571 lava-dispatcher, installed at version: 2024.01
2 23:02:57.947427 start: 0 validate
3 23:02:57.947915 Start time: 2024-11-06 23:02:57.947884+00:00 (UTC)
4 23:02:57.948510 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:02:57.949063 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:02:57.989103 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:02:57.989666 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 23:02:58.019041 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:02:58.019675 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:02:58.050395 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:02:58.051154 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:02:58.085154 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:02:58.085644 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 23:02:58.122337 validate duration: 0.17
16 23:02:58.123211 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:02:58.123562 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:02:58.123879 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:02:58.124548 Not decompressing ramdisk as can be used compressed.
20 23:02:58.125035 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 23:02:58.125325 saving as /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/ramdisk/initrd.cpio.gz
22 23:02:58.125619 total size: 5628182 (5 MB)
23 23:02:58.163087 progress 0 % (0 MB)
24 23:02:58.171004 progress 5 % (0 MB)
25 23:02:58.179140 progress 10 % (0 MB)
26 23:02:58.186260 progress 15 % (0 MB)
27 23:02:58.191231 progress 20 % (1 MB)
28 23:02:58.194933 progress 25 % (1 MB)
29 23:02:58.199110 progress 30 % (1 MB)
30 23:02:58.203195 progress 35 % (1 MB)
31 23:02:58.206885 progress 40 % (2 MB)
32 23:02:58.210947 progress 45 % (2 MB)
33 23:02:58.214575 progress 50 % (2 MB)
34 23:02:58.218719 progress 55 % (2 MB)
35 23:02:58.222824 progress 60 % (3 MB)
36 23:02:58.226468 progress 65 % (3 MB)
37 23:02:58.230602 progress 70 % (3 MB)
38 23:02:58.234257 progress 75 % (4 MB)
39 23:02:58.238305 progress 80 % (4 MB)
40 23:02:58.241884 progress 85 % (4 MB)
41 23:02:58.245885 progress 90 % (4 MB)
42 23:02:58.249879 progress 95 % (5 MB)
43 23:02:58.253207 progress 100 % (5 MB)
44 23:02:58.253846 5 MB downloaded in 0.13 s (41.87 MB/s)
45 23:02:58.254391 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:02:58.255282 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:02:58.255573 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:02:58.255843 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:02:58.256353 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/kernel/Image
51 23:02:58.256601 saving as /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/kernel/Image
52 23:02:58.256810 total size: 37880320 (36 MB)
53 23:02:58.257022 No compression specified
54 23:02:58.295850 progress 0 % (0 MB)
55 23:02:58.319088 progress 5 % (1 MB)
56 23:02:58.342393 progress 10 % (3 MB)
57 23:02:58.365655 progress 15 % (5 MB)
58 23:02:58.388919 progress 20 % (7 MB)
59 23:02:58.412108 progress 25 % (9 MB)
60 23:02:58.435103 progress 30 % (10 MB)
61 23:02:58.458200 progress 35 % (12 MB)
62 23:02:58.481348 progress 40 % (14 MB)
63 23:02:58.504633 progress 45 % (16 MB)
64 23:02:58.527851 progress 50 % (18 MB)
65 23:02:58.550899 progress 55 % (19 MB)
66 23:02:58.574087 progress 60 % (21 MB)
67 23:02:58.597452 progress 65 % (23 MB)
68 23:02:58.620545 progress 70 % (25 MB)
69 23:02:58.643904 progress 75 % (27 MB)
70 23:02:58.666606 progress 80 % (28 MB)
71 23:02:58.689719 progress 85 % (30 MB)
72 23:02:58.712835 progress 90 % (32 MB)
73 23:02:58.736249 progress 95 % (34 MB)
74 23:02:58.758863 progress 100 % (36 MB)
75 23:02:58.759357 36 MB downloaded in 0.50 s (71.89 MB/s)
76 23:02:58.759860 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:02:58.760747 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:02:58.761049 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:02:58.761333 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:02:58.761815 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:02:58.762072 saving as /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:02:58.762293 total size: 53209 (0 MB)
84 23:02:58.762515 No compression specified
85 23:02:58.801263 progress 61 % (0 MB)
86 23:02:58.802126 progress 100 % (0 MB)
87 23:02:58.802704 0 MB downloaded in 0.04 s (1.26 MB/s)
88 23:02:58.803180 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:02:58.804056 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:02:58.804348 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:02:58.804628 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:02:58.805097 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 23:02:58.805350 saving as /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/nfsrootfs/full.rootfs.tar
95 23:02:58.805564 total size: 107552908 (102 MB)
96 23:02:58.805785 Using unxz to decompress xz
97 23:02:58.841068 progress 0 % (0 MB)
98 23:02:59.478672 progress 5 % (5 MB)
99 23:03:00.207168 progress 10 % (10 MB)
100 23:03:00.929386 progress 15 % (15 MB)
101 23:03:01.676836 progress 20 % (20 MB)
102 23:03:02.250368 progress 25 % (25 MB)
103 23:03:02.965205 progress 30 % (30 MB)
104 23:03:03.763188 progress 35 % (35 MB)
105 23:03:04.123262 progress 40 % (41 MB)
106 23:03:04.550360 progress 45 % (46 MB)
107 23:03:05.236900 progress 50 % (51 MB)
108 23:03:05.916325 progress 55 % (56 MB)
109 23:03:06.669109 progress 60 % (61 MB)
110 23:03:07.417074 progress 65 % (66 MB)
111 23:03:08.139243 progress 70 % (71 MB)
112 23:03:08.894352 progress 75 % (76 MB)
113 23:03:09.562716 progress 80 % (82 MB)
114 23:03:10.262253 progress 85 % (87 MB)
115 23:03:10.982831 progress 90 % (92 MB)
116 23:03:11.689350 progress 95 % (97 MB)
117 23:03:12.426391 progress 100 % (102 MB)
118 23:03:12.438113 102 MB downloaded in 13.63 s (7.52 MB/s)
119 23:03:12.438803 end: 1.4.1 http-download (duration 00:00:14) [common]
121 23:03:12.440530 end: 1.4 download-retry (duration 00:00:14) [common]
122 23:03:12.441072 start: 1.5 download-retry (timeout 00:09:46) [common]
123 23:03:12.441601 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 23:03:12.442489 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/modules.tar.xz
125 23:03:12.442964 saving as /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/modules/modules.tar
126 23:03:12.443382 total size: 11768476 (11 MB)
127 23:03:12.443808 Using unxz to decompress xz
128 23:03:12.487012 progress 0 % (0 MB)
129 23:03:12.554750 progress 5 % (0 MB)
130 23:03:12.631082 progress 10 % (1 MB)
131 23:03:12.726728 progress 15 % (1 MB)
132 23:03:12.823108 progress 20 % (2 MB)
133 23:03:12.902833 progress 25 % (2 MB)
134 23:03:12.979820 progress 30 % (3 MB)
135 23:03:13.058887 progress 35 % (3 MB)
136 23:03:13.138280 progress 40 % (4 MB)
137 23:03:13.213793 progress 45 % (5 MB)
138 23:03:13.298069 progress 50 % (5 MB)
139 23:03:13.379081 progress 55 % (6 MB)
140 23:03:13.463644 progress 60 % (6 MB)
141 23:03:13.544172 progress 65 % (7 MB)
142 23:03:13.625166 progress 70 % (7 MB)
143 23:03:13.708384 progress 75 % (8 MB)
144 23:03:13.791295 progress 80 % (9 MB)
145 23:03:13.871130 progress 85 % (9 MB)
146 23:03:13.954134 progress 90 % (10 MB)
147 23:03:14.032238 progress 95 % (10 MB)
148 23:03:14.108989 progress 100 % (11 MB)
149 23:03:14.119439 11 MB downloaded in 1.68 s (6.70 MB/s)
150 23:03:14.120396 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:03:14.122175 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:03:14.122750 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 23:03:14.123321 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 23:03:23.708703 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949427/extract-nfsrootfs-kicn_5uh
156 23:03:23.709317 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 23:03:23.709611 start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
158 23:03:23.710315 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp
159 23:03:23.710776 makedir: /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin
160 23:03:23.711116 makedir: /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/tests
161 23:03:23.711442 makedir: /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/results
162 23:03:23.711789 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-add-keys
163 23:03:23.712357 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-add-sources
164 23:03:23.712873 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-background-process-start
165 23:03:23.713376 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-background-process-stop
166 23:03:23.713899 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-common-functions
167 23:03:23.714404 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-echo-ipv4
168 23:03:23.714894 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-install-packages
169 23:03:23.715391 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-installed-packages
170 23:03:23.715877 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-os-build
171 23:03:23.716401 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-probe-channel
172 23:03:23.716897 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-probe-ip
173 23:03:23.717403 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-target-ip
174 23:03:23.717963 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-target-mac
175 23:03:23.718461 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-target-storage
176 23:03:23.718952 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-case
177 23:03:23.719445 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-event
178 23:03:23.719929 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-feedback
179 23:03:23.720454 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-raise
180 23:03:23.720941 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-reference
181 23:03:23.721446 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-runner
182 23:03:23.721985 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-set
183 23:03:23.722479 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-test-shell
184 23:03:23.722999 Updating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-install-packages (oe)
185 23:03:23.723571 Updating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/bin/lava-installed-packages (oe)
186 23:03:23.724044 Creating /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/environment
187 23:03:23.724444 LAVA metadata
188 23:03:23.724708 - LAVA_JOB_ID=949427
189 23:03:23.724929 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:03:23.725286 start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
191 23:03:23.726232 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:03:23.726553 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
193 23:03:23.726767 skipped lava-vland-overlay
194 23:03:23.727014 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:03:23.727272 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
196 23:03:23.727495 skipped lava-multinode-overlay
197 23:03:23.727740 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:03:23.728015 start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
199 23:03:23.728276 Loading test definitions
200 23:03:23.728559 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
201 23:03:23.728785 Using /lava-949427 at stage 0
202 23:03:23.729976 uuid=949427_1.6.2.4.1 testdef=None
203 23:03:23.730296 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:03:23.730565 start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
205 23:03:23.732422 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:03:23.733228 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
208 23:03:23.735475 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:03:23.736347 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
211 23:03:23.738514 runner path: /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/0/tests/0_dmesg test_uuid 949427_1.6.2.4.1
212 23:03:23.739068 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:03:23.739838 Creating lava-test-runner.conf files
215 23:03:23.740065 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949427/lava-overlay-st2u78wp/lava-949427/0 for stage 0
216 23:03:23.740408 - 0_dmesg
217 23:03:23.740754 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:03:23.741034 start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
219 23:03:23.762411 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:03:23.762761 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
221 23:03:23.763026 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:03:23.763292 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:03:23.763561 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
224 23:03:24.377181 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:03:24.377658 start: 1.6.4 extract-modules (timeout 00:09:34) [common]
226 23:03:24.377908 extracting modules file /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949427/extract-nfsrootfs-kicn_5uh
227 23:03:25.740686 extracting modules file /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk
228 23:03:27.132702 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:03:27.133176 start: 1.6.5 apply-overlay-tftp (timeout 00:09:31) [common]
230 23:03:27.133463 [common] Applying overlay to NFS
231 23:03:27.133679 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949427/compress-overlay-y_u90wqm/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949427/extract-nfsrootfs-kicn_5uh
232 23:03:27.162857 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:03:27.163224 start: 1.6.6 prepare-kernel (timeout 00:09:31) [common]
234 23:03:27.163498 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:31) [common]
235 23:03:27.163728 Converting downloaded kernel to a uImage
236 23:03:27.164054 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/kernel/Image /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/kernel/uImage
237 23:03:27.545187 output: Image Name:
238 23:03:27.545576 output: Created: Wed Nov 6 23:03:27 2024
239 23:03:27.545790 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:03:27.545997 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
241 23:03:27.546202 output: Load Address: 01080000
242 23:03:27.546405 output: Entry Point: 01080000
243 23:03:27.546605 output:
244 23:03:27.546940 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:03:27.547208 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:03:27.547475 start: 1.6.7 configure-preseed-file (timeout 00:09:31) [common]
247 23:03:27.547731 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:03:27.548025 start: 1.6.8 compress-ramdisk (timeout 00:09:31) [common]
249 23:03:27.548318 Building ramdisk /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk
250 23:03:29.755021 >> 173443 blocks
251 23:03:37.659325 Adding RAMdisk u-boot header.
252 23:03:37.659787 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk.cpio.gz.uboot
253 23:03:37.923456 output: Image Name:
254 23:03:37.923882 output: Created: Wed Nov 6 23:03:37 2024
255 23:03:37.924332 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:03:37.924799 output: Data Size: 24150609 Bytes = 23584.58 KiB = 23.03 MiB
257 23:03:37.925268 output: Load Address: 00000000
258 23:03:37.925712 output: Entry Point: 00000000
259 23:03:37.926152 output:
260 23:03:37.927307 rename /var/lib/lava/dispatcher/tmp/949427/extract-overlay-ramdisk-9qhozhxw/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
261 23:03:37.928121 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 23:03:37.928728 end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
263 23:03:37.929365 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
264 23:03:37.929871 No LXC device requested
265 23:03:37.930427 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:03:37.930992 start: 1.8 deploy-device-env (timeout 00:09:20) [common]
267 23:03:37.931544 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:03:37.932031 Checking files for TFTP limit of 4294967296 bytes.
269 23:03:37.934942 end: 1 tftp-deploy (duration 00:00:40) [common]
270 23:03:37.935560 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:03:37.936177 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:03:37.936736 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:03:37.937290 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:03:37.937867 Using kernel file from prepare-kernel: 949427/tftp-deploy-9qqbkz79/kernel/uImage
275 23:03:37.938555 substitutions:
276 23:03:37.939009 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:03:37.939460 - {DTB_ADDR}: 0x01070000
278 23:03:37.939903 - {DTB}: 949427/tftp-deploy-9qqbkz79/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:03:37.940385 - {INITRD}: 949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
280 23:03:37.940830 - {KERNEL_ADDR}: 0x01080000
281 23:03:37.941269 - {KERNEL}: 949427/tftp-deploy-9qqbkz79/kernel/uImage
282 23:03:37.941706 - {LAVA_MAC}: None
283 23:03:37.942185 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949427/extract-nfsrootfs-kicn_5uh
284 23:03:37.942631 - {NFS_SERVER_IP}: 192.168.6.2
285 23:03:37.943068 - {PRESEED_CONFIG}: None
286 23:03:37.943505 - {PRESEED_LOCAL}: None
287 23:03:37.943939 - {RAMDISK_ADDR}: 0x08000000
288 23:03:37.944426 - {RAMDISK}: 949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
289 23:03:37.944865 - {ROOT_PART}: None
290 23:03:37.945302 - {ROOT}: None
291 23:03:37.945741 - {SERVER_IP}: 192.168.6.2
292 23:03:37.946174 - {TEE_ADDR}: 0x83000000
293 23:03:37.946605 - {TEE}: None
294 23:03:37.947038 Parsed boot commands:
295 23:03:37.947457 - setenv autoload no
296 23:03:37.947886 - setenv initrd_high 0xffffffff
297 23:03:37.948355 - setenv fdt_high 0xffffffff
298 23:03:37.948788 - dhcp
299 23:03:37.949215 - setenv serverip 192.168.6.2
300 23:03:37.949647 - tftpboot 0x01080000 949427/tftp-deploy-9qqbkz79/kernel/uImage
301 23:03:37.950079 - tftpboot 0x08000000 949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
302 23:03:37.950513 - tftpboot 0x01070000 949427/tftp-deploy-9qqbkz79/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:03:37.950943 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949427/extract-nfsrootfs-kicn_5uh,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:03:37.951389 - bootm 0x01080000 0x08000000 0x01070000
305 23:03:37.951938 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:03:37.953605 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:03:37.954068 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:03:37.970768 Setting prompt string to ['lava-test: # ']
310 23:03:37.972403 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:03:37.973067 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:03:37.973671 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:03:37.974270 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:03:37.975494 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:03:38.012741 >> OK - accepted request
316 23:03:38.015005 Returned 0 in 0 seconds
317 23:03:38.116184 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:03:38.117896 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:03:38.118509 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:03:38.119074 Setting prompt string to ['Hit any key to stop autoboot']
322 23:03:38.119582 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:03:38.121264 Trying 192.168.56.21...
324 23:03:38.121769 Connected to conserv1.
325 23:03:38.122225 Escape character is '^]'.
326 23:03:38.122680
327 23:03:38.123144 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 23:03:38.123603
329 23:03:46.552935 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:03:46.553613 bl2_stage_init 0x01
331 23:03:46.554087 bl2_stage_init 0x81
332 23:03:46.558606 hw id: 0x0000 - pwm id 0x01
333 23:03:46.559093 bl2_stage_init 0xc1
334 23:03:46.563068 bl2_stage_init 0x02
335 23:03:46.563553
336 23:03:46.564102 L0:00000000
337 23:03:46.564570 L1:00000703
338 23:03:46.565017 L2:00008067
339 23:03:46.568800 L3:15000000
340 23:03:46.569297 S1:00000000
341 23:03:46.569773 B2:20282000
342 23:03:46.570216 B1:a0f83180
343 23:03:46.570653
344 23:03:46.571098 TE: 70250
345 23:03:46.571539
346 23:03:46.579716 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:03:46.580236
348 23:03:46.580692 Board ID = 1
349 23:03:46.581134 Set cpu clk to 24M
350 23:03:46.581574 Set clk81 to 24M
351 23:03:46.583245 Use GP1_pll as DSU clk.
352 23:03:46.588722 DSU clk: 1200 Mhz
353 23:03:46.589197 CPU clk: 1200 MHz
354 23:03:46.589640 Set clk81 to 166.6M
355 23:03:46.594334 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:03:46.599922 board id: 1
357 23:03:46.603881 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:03:46.615515 fw parse done
359 23:03:46.621497 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:03:46.664160 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:03:46.675139 PIEI prepare done
362 23:03:46.675608 fastboot data load
363 23:03:46.676108 fastboot data verify
364 23:03:46.680733 verify result: 266
365 23:03:46.686269 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:03:46.686736 LPDDR4 probe
367 23:03:46.687182 ddr clk to 1584MHz
368 23:03:46.694313 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:03:46.731504
370 23:03:46.731973 dmc_version 0001
371 23:03:46.738265 Check phy result
372 23:03:46.744100 INFO : End of CA training
373 23:03:46.744566 INFO : End of initialization
374 23:03:46.749746 INFO : Training has run successfully!
375 23:03:46.750211 Check phy result
376 23:03:46.755311 INFO : End of initialization
377 23:03:46.755775 INFO : End of read enable training
378 23:03:46.760884 INFO : End of fine write leveling
379 23:03:46.766486 INFO : End of Write leveling coarse delay
380 23:03:46.766952 INFO : Training has run successfully!
381 23:03:46.767399 Check phy result
382 23:03:46.772096 INFO : End of initialization
383 23:03:46.772562 INFO : End of read dq deskew training
384 23:03:46.777725 INFO : End of MPR read delay center optimization
385 23:03:46.783330 INFO : End of write delay center optimization
386 23:03:46.788910 INFO : End of read delay center optimization
387 23:03:46.789393 INFO : End of max read latency training
388 23:03:46.794499 INFO : Training has run successfully!
389 23:03:46.794965 1D training succeed
390 23:03:46.803819 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:03:46.851279 Check phy result
392 23:03:46.851757 INFO : End of initialization
393 23:03:46.873629 INFO : End of 2D read delay Voltage center optimization
394 23:03:46.892903 INFO : End of 2D read delay Voltage center optimization
395 23:03:46.944681 INFO : End of 2D write delay Voltage center optimization
396 23:03:46.993812 INFO : End of 2D write delay Voltage center optimization
397 23:03:46.999467 INFO : Training has run successfully!
398 23:03:46.999931
399 23:03:47.000613 channel==0
400 23:03:47.004959 RxClkDly_Margin_A0==78 ps 8
401 23:03:47.005407 TxDqDly_Margin_A0==88 ps 9
402 23:03:47.010621 RxClkDly_Margin_A1==88 ps 9
403 23:03:47.011076 TxDqDly_Margin_A1==98 ps 10
404 23:03:47.011495 TrainedVREFDQ_A0==74
405 23:03:47.016264 TrainedVREFDQ_A1==74
406 23:03:47.016707 VrefDac_Margin_A0==23
407 23:03:47.017113 DeviceVref_Margin_A0==40
408 23:03:47.021805 VrefDac_Margin_A1==22
409 23:03:47.022236 DeviceVref_Margin_A1==40
410 23:03:47.022640
411 23:03:47.023040
412 23:03:47.023438 channel==1
413 23:03:47.027435 RxClkDly_Margin_A0==78 ps 8
414 23:03:47.027870 TxDqDly_Margin_A0==88 ps 9
415 23:03:47.034075 RxClkDly_Margin_A1==78 ps 8
416 23:03:47.036979 TxDqDly_Margin_A1==88 ps 9
417 23:03:47.037408 TrainedVREFDQ_A0==77
418 23:03:47.037813 TrainedVREFDQ_A1==76
419 23:03:47.042658 VrefDac_Margin_A0==22
420 23:03:47.043088 DeviceVref_Margin_A0==37
421 23:03:47.043492 VrefDac_Margin_A1==22
422 23:03:47.048286 DeviceVref_Margin_A1==38
423 23:03:47.048711
424 23:03:47.053822 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:03:47.054249
426 23:03:47.082236 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000019 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 23:03:47.082759 2D training succeed
428 23:03:47.087832 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:03:47.093266 auto size-- 65535DDR cs0 size: 2048MB
430 23:03:47.093693 DDR cs1 size: 2048MB
431 23:03:47.098867 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:03:47.099293 cs0 DataBus test pass
433 23:03:47.104487 cs1 DataBus test pass
434 23:03:47.104921 cs0 AddrBus test pass
435 23:03:47.110106 cs1 AddrBus test pass
436 23:03:47.110529
437 23:03:47.110932 100bdlr_step_size ps== 471
438 23:03:47.111338 result report
439 23:03:47.115735 boot times 0Enable ddr reg access
440 23:03:47.121973 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:03:47.135805 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:03:47.790223 bl2z: ptr: 05129330, size: 00001e40
443 23:03:47.797504 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:03:47.797955 MVN_1=0x00000000
445 23:03:47.798367 MVN_2=0x00000000
446 23:03:47.808989 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:03:47.809437 OPS=0x04
448 23:03:47.809851 ring efuse init
449 23:03:47.811923 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:03:47.818133 [0.017310 Inits done]
451 23:03:47.818597 secure task start!
452 23:03:47.819009 high task start!
453 23:03:47.819416 low task start!
454 23:03:47.822417 run into bl31
455 23:03:47.830992 NOTICE: BL31: v1.3(release):4fc40b1
456 23:03:47.838829 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:03:47.839287 NOTICE: BL31: G12A normal boot!
458 23:03:47.854251 NOTICE: BL31: BL33 decompress pass
459 23:03:47.859968 ERROR: Error initializing runtime service opteed_fast
460 23:03:50.602435 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:03:50.603017 bl2_stage_init 0x01
462 23:03:50.603462 bl2_stage_init 0x81
463 23:03:50.608167 hw id: 0x0000 - pwm id 0x01
464 23:03:50.608683 bl2_stage_init 0xc1
465 23:03:50.609107 bl2_stage_init 0x02
466 23:03:50.609515
467 23:03:50.613698 L0:00000000
468 23:03:50.614212 L1:00000703
469 23:03:50.614607 L2:00008067
470 23:03:50.614991 L3:15000000
471 23:03:50.615374 S1:00000000
472 23:03:50.619193 B2:20282000
473 23:03:50.619632 B1:a0f83180
474 23:03:50.620047
475 23:03:50.620437 TE: 70469
476 23:03:50.620822
477 23:03:50.624812 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:03:50.625239
479 23:03:50.630399 Board ID = 1
480 23:03:50.630821 Set cpu clk to 24M
481 23:03:50.631207 Set clk81 to 24M
482 23:03:50.636148 Use GP1_pll as DSU clk.
483 23:03:50.636572 DSU clk: 1200 Mhz
484 23:03:50.636960 CPU clk: 1200 MHz
485 23:03:50.637341 Set clk81 to 166.6M
486 23:03:50.647221 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:03:50.647643 board id: 1
488 23:03:50.653600 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:03:50.664289 fw parse done
490 23:03:50.670263 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:03:50.712946 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:03:50.723901 PIEI prepare done
493 23:03:50.724362 fastboot data load
494 23:03:50.724757 fastboot data verify
495 23:03:50.729494 verify result: 266
496 23:03:50.735011 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:03:50.735428 LPDDR4 probe
498 23:03:50.735813 ddr clk to 1584MHz
499 23:03:50.743054 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 23:03:50.780305
501 23:03:50.780723 dmc_version 0001
502 23:03:50.786973 Check phy result
503 23:03:50.792890 INFO : End of CA training
504 23:03:50.793311 INFO : End of initialization
505 23:03:50.798504 INFO : Training has run successfully!
506 23:03:50.798930 Check phy result
507 23:03:50.804104 INFO : End of initialization
508 23:03:50.804547 INFO : End of read enable training
509 23:03:50.809737 INFO : End of fine write leveling
510 23:03:50.815294 INFO : End of Write leveling coarse delay
511 23:03:50.815733 INFO : Training has run successfully!
512 23:03:50.816190 Check phy result
513 23:03:50.820859 INFO : End of initialization
514 23:03:50.821300 INFO : End of read dq deskew training
515 23:03:50.826491 INFO : End of MPR read delay center optimization
516 23:03:50.832067 INFO : End of write delay center optimization
517 23:03:50.837744 INFO : End of read delay center optimization
518 23:03:50.838181 INFO : End of max read latency training
519 23:03:50.843296 INFO : Training has run successfully!
520 23:03:50.843729 1D training succeed
521 23:03:50.852498 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 23:03:50.900051 Check phy result
523 23:03:50.900500 INFO : End of initialization
524 23:03:50.922384 INFO : End of 2D read delay Voltage center optimization
525 23:03:50.941584 INFO : End of 2D read delay Voltage center optimization
526 23:03:50.993485 INFO : End of 2D write delay Voltage center optimization
527 23:03:51.042648 INFO : End of 2D write delay Voltage center optimization
528 23:03:51.048274 INFO : Training has run successfully!
529 23:03:51.048713
530 23:03:51.049126 channel==0
531 23:03:51.053817 RxClkDly_Margin_A0==78 ps 8
532 23:03:51.054252 TxDqDly_Margin_A0==98 ps 10
533 23:03:51.059416 RxClkDly_Margin_A1==88 ps 9
534 23:03:51.059861 TxDqDly_Margin_A1==88 ps 9
535 23:03:51.060330 TrainedVREFDQ_A0==75
536 23:03:51.065032 TrainedVREFDQ_A1==74
537 23:03:51.065486 VrefDac_Margin_A0==23
538 23:03:51.065896 DeviceVref_Margin_A0==39
539 23:03:51.070610 VrefDac_Margin_A1==22
540 23:03:51.071044 DeviceVref_Margin_A1==40
541 23:03:51.071452
542 23:03:51.071858
543 23:03:51.072298 channel==1
544 23:03:51.076276 RxClkDly_Margin_A0==88 ps 9
545 23:03:51.076716 TxDqDly_Margin_A0==98 ps 10
546 23:03:51.081782 RxClkDly_Margin_A1==88 ps 9
547 23:03:51.082223 TxDqDly_Margin_A1==88 ps 9
548 23:03:51.087396 TrainedVREFDQ_A0==78
549 23:03:51.087858 TrainedVREFDQ_A1==75
550 23:03:51.088305 VrefDac_Margin_A0==22
551 23:03:51.093031 DeviceVref_Margin_A0==36
552 23:03:51.093472 VrefDac_Margin_A1==22
553 23:03:51.098607 DeviceVref_Margin_A1==39
554 23:03:51.099044
555 23:03:51.099456 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 23:03:51.099861
557 23:03:51.132285 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
558 23:03:51.132759 2D training succeed
559 23:03:51.137829 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 23:03:51.143420 auto size-- 65535DDR cs0 size: 2048MB
561 23:03:51.143854 DDR cs1 size: 2048MB
562 23:03:51.149023 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 23:03:51.149462 cs0 DataBus test pass
564 23:03:51.154615 cs1 DataBus test pass
565 23:03:51.155055 cs0 AddrBus test pass
566 23:03:51.155464 cs1 AddrBus test pass
567 23:03:51.155867
568 23:03:51.160287 100bdlr_step_size ps== 478
569 23:03:51.160734 result report
570 23:03:51.165786 boot times 0Enable ddr reg access
571 23:03:51.170984 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 23:03:51.183930 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 23:03:51.838976 bl2z: ptr: 05129330, size: 00001e40
574 23:03:51.846884 0.0;M3 CHK:0;cm4_sp_mode 0
575 23:03:51.847357 MVN_1=0x00000000
576 23:03:51.847768 MVN_2=0x00000000
577 23:03:51.858384 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 23:03:51.858835 OPS=0x04
579 23:03:51.859247 ring efuse init
580 23:03:51.863967 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 23:03:51.864446 [0.017310 Inits done]
582 23:03:51.864859 secure task start!
583 23:03:51.872069 high task start!
584 23:03:51.872517 low task start!
585 23:03:51.872924 run into bl31
586 23:03:51.880650 NOTICE: BL31: v1.3(release):4fc40b1
587 23:03:51.888466 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 23:03:51.888926 NOTICE: BL31: G12A normal boot!
589 23:03:51.904057 NOTICE: BL31: BL33 decompress pass
590 23:03:51.909739 ERROR: Error initializing runtime service opteed_fast
591 23:03:53.302606 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 23:03:53.303252 bl2_stage_init 0x01
593 23:03:53.303732 bl2_stage_init 0x81
594 23:03:53.308231 hw id: 0x0000 - pwm id 0x01
595 23:03:53.308778 bl2_stage_init 0xc1
596 23:03:53.313821 bl2_stage_init 0x02
597 23:03:53.314368
598 23:03:53.314841 L0:00000000
599 23:03:53.315301 L1:00000703
600 23:03:53.315751 L2:00008067
601 23:03:53.316248 L3:15000000
602 23:03:53.319341 S1:00000000
603 23:03:53.319884 B2:20282000
604 23:03:53.320394 B1:a0f83180
605 23:03:53.320849
606 23:03:53.321295 TE: 70868
607 23:03:53.321744
608 23:03:53.325013 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 23:03:53.325565
610 23:03:53.330637 Board ID = 1
611 23:03:53.331180 Set cpu clk to 24M
612 23:03:53.331643 Set clk81 to 24M
613 23:03:53.336267 Use GP1_pll as DSU clk.
614 23:03:53.336827 DSU clk: 1200 Mhz
615 23:03:53.337290 CPU clk: 1200 MHz
616 23:03:53.341881 Set clk81 to 166.6M
617 23:03:53.347510 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 23:03:53.348088 board id: 1
619 23:03:53.354565 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 23:03:53.365478 fw parse done
621 23:03:53.371219 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 23:03:53.414325 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 23:03:53.425486 PIEI prepare done
624 23:03:53.426030 fastboot data load
625 23:03:53.426504 fastboot data verify
626 23:03:53.431134 verify result: 266
627 23:03:53.436723 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 23:03:53.437253 LPDDR4 probe
629 23:03:53.437720 ddr clk to 1584MHz
630 23:03:53.444807 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 23:03:53.482422
632 23:03:53.482952 dmc_version 0001
633 23:03:53.489424 Check phy result
634 23:03:53.495437 INFO : End of CA training
635 23:03:53.495963 INFO : End of initialization
636 23:03:53.501068 INFO : Training has run successfully!
637 23:03:53.501617 Check phy result
638 23:03:53.506716 INFO : End of initialization
639 23:03:53.507240 INFO : End of read enable training
640 23:03:53.512290 INFO : End of fine write leveling
641 23:03:53.517862 INFO : End of Write leveling coarse delay
642 23:03:53.518377 INFO : Training has run successfully!
643 23:03:53.518832 Check phy result
644 23:03:53.523416 INFO : End of initialization
645 23:03:53.523931 INFO : End of read dq deskew training
646 23:03:53.529018 INFO : End of MPR read delay center optimization
647 23:03:53.534693 INFO : End of write delay center optimization
648 23:03:53.540265 INFO : End of read delay center optimization
649 23:03:53.540779 INFO : End of max read latency training
650 23:03:53.545857 INFO : Training has run successfully!
651 23:03:53.546388 1D training succeed
652 23:03:53.555001 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 23:03:53.603336 Check phy result
654 23:03:53.603852 INFO : End of initialization
655 23:03:53.630823 INFO : End of 2D read delay Voltage center optimization
656 23:03:53.654889 INFO : End of 2D read delay Voltage center optimization
657 23:03:53.711541 INFO : End of 2D write delay Voltage center optimization
658 23:03:53.765560 INFO : End of 2D write delay Voltage center optimization
659 23:03:53.771174 INFO : Training has run successfully!
660 23:03:53.771689
661 23:03:53.772187 channel==0
662 23:03:53.776776 RxClkDly_Margin_A0==69 ps 7
663 23:03:53.777291 TxDqDly_Margin_A0==98 ps 10
664 23:03:53.782396 RxClkDly_Margin_A1==88 ps 9
665 23:03:53.782902 TxDqDly_Margin_A1==88 ps 9
666 23:03:53.783363 TrainedVREFDQ_A0==74
667 23:03:53.787939 TrainedVREFDQ_A1==74
668 23:03:53.788486 VrefDac_Margin_A0==24
669 23:03:53.788939 DeviceVref_Margin_A0==40
670 23:03:53.793523 VrefDac_Margin_A1==22
671 23:03:53.794032 DeviceVref_Margin_A1==40
672 23:03:53.794490
673 23:03:53.794937
674 23:03:53.795377 channel==1
675 23:03:53.799134 RxClkDly_Margin_A0==78 ps 8
676 23:03:53.799643 TxDqDly_Margin_A0==98 ps 10
677 23:03:53.804733 RxClkDly_Margin_A1==78 ps 8
678 23:03:53.805245 TxDqDly_Margin_A1==88 ps 9
679 23:03:53.810340 TrainedVREFDQ_A0==78
680 23:03:53.810857 TrainedVREFDQ_A1==75
681 23:03:53.811314 VrefDac_Margin_A0==22
682 23:03:53.815931 DeviceVref_Margin_A0==36
683 23:03:53.816469 VrefDac_Margin_A1==22
684 23:03:53.821509 DeviceVref_Margin_A1==39
685 23:03:53.822023
686 23:03:53.822483 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 23:03:53.822927
688 23:03:54.146504 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000016 00000017 00000017 00000018 00000018 00000019 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 23:03:54.146941 2D training succeed
690 23:03:54.147204 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 23:03:54.147441 auto size-- 65535DDR cs0 size: 2048MB
692 23:03:54.147663 DDR cs1 size: 2048MB
693 23:03:54.147890 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 23:03:54.148169 cs0 DataBus test pass
695 23:03:54.148394 cs1 DataBus test pass
696 23:03:54.148614 cs0 AddrBus test pass
697 23:03:54.148849 cs1 AddrBus test pass
698 23:03:54.149072
699 23:03:54.149305 100bdlr_step_size ps== 485
700 23:03:54.149963 result report
701 23:03:54.150208 boot times 0Enable ddr reg access
702 23:03:54.150433 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 23:03:54.151073 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 23:03:54.752099 bl2z: ptr: 05129330, size: 00001e40
705 23:03:54.752780 0.0;M3 CHK:0;cm4_sp_mode 0
706 23:03:54.753273 MVN_1=0x00000000
707 23:03:54.753737 MVN_2=0x00000000
708 23:03:54.754188 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 23:03:54.754905 OPS=0x04
710 23:03:54.755400 ring efuse init
711 23:03:54.755854 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 23:03:54.756360 [0.017354 Inits done]
713 23:03:54.756813 secure task start!
714 23:03:54.757260 high task start!
715 23:03:54.757700 low task start!
716 23:03:54.758138 run into bl31
717 23:03:54.758575 NOTICE: BL31: v1.3(release):4fc40b1
718 23:03:54.759016 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 23:03:54.759464 NOTICE: BL31: G12A normal boot!
720 23:03:54.759908 NOTICE: BL31: BL33 decompress pass
721 23:03:54.760772 ERROR: Error initializing runtime service opteed_fast
722 23:03:55.433043
723 23:03:55.433711
724 23:03:55.438424 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 23:03:55.438956
726 23:03:55.441886 Model: Libre Computer AML-S905D3-CC Solitude
727 23:03:55.588954 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 23:03:55.604307 DRAM: 2 GiB (effective 3.8 GiB)
729 23:03:55.705299 Core: 406 devices, 33 uclasses, devicetree: separate
730 23:03:55.711157 WDT: Not starting watchdog@f0d0
731 23:03:55.736204 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 23:03:55.748443 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 23:03:55.753484 ** Bad device specification mmc 0 **
734 23:03:55.763489 Card did not respond to voltage select! : -110
735 23:03:55.771151 ** Bad device specification mmc 0 **
736 23:03:55.771671 Couldn't find partition mmc 0
737 23:03:55.779482 Card did not respond to voltage select! : -110
738 23:03:55.785002 ** Bad device specification mmc 0 **
739 23:03:55.785506 Couldn't find partition mmc 0
740 23:03:55.790045 Error: could not access storage.
741 23:03:56.086439 Net: eth0: ethernet@ff3f0000
742 23:03:56.087129 starting USB...
743 23:03:56.331090 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 23:03:56.331704 Starting the controller
745 23:03:56.338113 USB XHCI 1.10
746 23:03:57.892234 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 23:03:57.900524 scanning usb for storage devices... 0 Storage Device(s) found
749 23:03:57.952099 Hit any key to stop autoboot: 1
750 23:03:57.952918 end: 2.4.2 bootloader-interrupt (duration 00:00:20) [common]
751 23:03:57.953598 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 23:03:57.954131 Setting prompt string to ['=>']
753 23:03:57.954656 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 23:03:57.966613 0
755 23:03:57.967585 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 23:03:58.068956 => setenv autoload no
758 23:03:58.069936 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 23:03:58.075470 setenv autoload no
761 23:03:58.177127 => setenv initrd_high 0xffffffff
762 23:03:58.178252 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 23:03:58.182551 setenv initrd_high 0xffffffff
765 23:03:58.284218 => setenv fdt_high 0xffffffff
766 23:03:58.284964 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 23:03:58.289067 setenv fdt_high 0xffffffff
769 23:03:58.390119 => dhcp
770 23:03:58.391007 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 23:03:58.395458 dhcp
772 23:03:58.950749 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
773 23:03:58.951391 Speed: 1000, full duplex
774 23:03:58.951859 BOOTP broadcast 1
775 23:03:59.198951 BOOTP broadcast 2
776 23:03:59.211533 DHCP client bound to address 192.168.6.21 (260 ms)
778 23:03:59.313205 => setenv serverip 192.168.6.2
779 23:03:59.314158 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 23:03:59.318578 setenv serverip 192.168.6.2
782 23:03:59.420117 => tftpboot 0x01080000 949427/tftp-deploy-9qqbkz79/kernel/uImage
783 23:03:59.421047 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 23:03:59.427702 tftpboot 0x01080000 949427/tftp-deploy-9qqbkz79/kernel/uImage
785 23:03:59.428275 Speed: 1000, full duplex
786 23:03:59.428737 Using ethernet@ff3f0000 device
787 23:03:59.433149 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 23:03:59.438670 Filename '949427/tftp-deploy-9qqbkz79/kernel/uImage'.
789 23:03:59.442462 Load address: 0x1080000
790 23:04:01.727157 Loading: *################################################## 36.1 MiB
791 23:04:01.727776 15.8 MiB/s
792 23:04:01.728237 done
793 23:04:01.731610 Bytes transferred = 37880384 (2420240 hex)
795 23:04:01.833153 => tftpboot 0x08000000 949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
796 23:04:01.833939 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 23:04:01.840820 tftpboot 0x08000000 949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot
798 23:04:01.841329 Speed: 1000, full duplex
799 23:04:01.841727 Using ethernet@ff3f0000 device
800 23:04:01.846185 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 23:04:01.856015 Filename '949427/tftp-deploy-9qqbkz79/ramdisk/ramdisk.cpio.gz.uboot'.
802 23:04:01.856576 Load address: 0x8000000
803 23:04:02.091264 Loading: *####### UDP wrong checksum 000000ff 00008667
804 23:04:02.115254 # UDP wrong checksum 000000ff 00001c5a
805 23:04:03.364087 ######################################### UDP wrong checksum 00000005 00004464
806 23:04:08.364836 T UDP wrong checksum 00000005 00004464
807 23:04:18.367019 T T UDP wrong checksum 00000005 00004464
808 23:04:38.370994 T T T T UDP wrong checksum 00000005 00004464
809 23:04:58.375683 T T T
810 23:04:58.376160 Retry count exceeded; starting again
812 23:04:58.379145 end: 2.4.3 bootloader-commands (duration 00:01:00) [common]
815 23:04:58.380122 end: 2.4 uboot-commands (duration 00:01:20) [common]
817 23:04:58.380820 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
819 23:04:58.381372 end: 2 uboot-action (duration 00:01:20) [common]
821 23:04:58.382191 Cleaning after the job
822 23:04:58.382499 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/ramdisk
823 23:04:58.383323 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/kernel
824 23:04:58.413586 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/dtb
825 23:04:58.414421 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/nfsrootfs
826 23:04:58.570452 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949427/tftp-deploy-9qqbkz79/modules
827 23:04:58.591835 start: 4.1 power-off (timeout 00:00:30) [common]
828 23:04:58.592544 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
829 23:04:58.626213 >> OK - accepted request
830 23:04:58.628522 Returned 0 in 0 seconds
831 23:04:58.729230 end: 4.1 power-off (duration 00:00:00) [common]
833 23:04:58.730175 start: 4.2 read-feedback (timeout 00:10:00) [common]
834 23:04:58.730800 Listened to connection for namespace 'common' for up to 1s
835 23:04:59.730787 Finalising connection for namespace 'common'
836 23:04:59.731212 Disconnecting from shell: Finalise
837 23:04:59.731504 =>
838 23:04:59.832245 end: 4.2 read-feedback (duration 00:00:01) [common]
839 23:04:59.832856 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949427
840 23:05:01.542863 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949427
841 23:05:01.543481 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.