Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:14:20.695262 lava-dispatcher, installed at version: 2024.01
2 00:14:20.696120 start: 0 validate
3 00:14:20.696633 Start time: 2024-11-07 00:14:20.696602+00:00 (UTC)
4 00:14:20.697198 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:14:20.697771 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:14:20.738693 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:14:20.739288 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 00:14:20.773710 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:14:20.774332 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 00:14:20.807830 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:14:20.808418 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:14:20.842678 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:14:20.843254 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 00:14:20.883289 validate duration: 0.19
16 00:14:20.884374 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:14:20.884778 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:14:20.885428 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:14:20.886134 Not decompressing ramdisk as can be used compressed.
20 00:14:20.886679 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 00:14:20.887012 saving as /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/ramdisk/initrd.cpio.gz
22 00:14:20.887330 total size: 5628169 (5 MB)
23 00:14:20.932587 progress 0 % (0 MB)
24 00:14:20.936900 progress 5 % (0 MB)
25 00:14:20.941713 progress 10 % (0 MB)
26 00:14:20.945673 progress 15 % (0 MB)
27 00:14:20.950161 progress 20 % (1 MB)
28 00:14:20.954035 progress 25 % (1 MB)
29 00:14:20.958369 progress 30 % (1 MB)
30 00:14:20.962827 progress 35 % (1 MB)
31 00:14:20.966736 progress 40 % (2 MB)
32 00:14:20.970964 progress 45 % (2 MB)
33 00:14:20.974757 progress 50 % (2 MB)
34 00:14:20.979159 progress 55 % (2 MB)
35 00:14:20.983653 progress 60 % (3 MB)
36 00:14:20.987808 progress 65 % (3 MB)
37 00:14:20.992171 progress 70 % (3 MB)
38 00:14:20.996131 progress 75 % (4 MB)
39 00:14:21.000427 progress 80 % (4 MB)
40 00:14:21.004474 progress 85 % (4 MB)
41 00:14:21.009735 progress 90 % (4 MB)
42 00:14:21.015376 progress 95 % (5 MB)
43 00:14:21.019129 progress 100 % (5 MB)
44 00:14:21.019863 5 MB downloaded in 0.13 s (40.51 MB/s)
45 00:14:21.020475 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:14:21.021567 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:14:21.021942 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:14:21.022262 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:14:21.022837 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/kernel/Image
51 00:14:21.023103 saving as /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/kernel/Image
52 00:14:21.023383 total size: 37880320 (36 MB)
53 00:14:21.023634 No compression specified
54 00:14:21.068775 progress 0 % (0 MB)
55 00:14:21.093123 progress 5 % (1 MB)
56 00:14:21.118001 progress 10 % (3 MB)
57 00:14:21.142694 progress 15 % (5 MB)
58 00:14:21.166927 progress 20 % (7 MB)
59 00:14:21.191255 progress 25 % (9 MB)
60 00:14:21.215398 progress 30 % (10 MB)
61 00:14:21.240125 progress 35 % (12 MB)
62 00:14:21.264066 progress 40 % (14 MB)
63 00:14:21.288635 progress 45 % (16 MB)
64 00:14:21.312936 progress 50 % (18 MB)
65 00:14:21.337044 progress 55 % (19 MB)
66 00:14:21.361698 progress 60 % (21 MB)
67 00:14:21.386384 progress 65 % (23 MB)
68 00:14:21.411283 progress 70 % (25 MB)
69 00:14:21.436981 progress 75 % (27 MB)
70 00:14:21.460714 progress 80 % (28 MB)
71 00:14:21.485182 progress 85 % (30 MB)
72 00:14:21.510055 progress 90 % (32 MB)
73 00:14:21.534330 progress 95 % (34 MB)
74 00:14:21.558402 progress 100 % (36 MB)
75 00:14:21.558882 36 MB downloaded in 0.54 s (67.46 MB/s)
76 00:14:21.559342 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:14:21.560176 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:14:21.560452 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:14:21.560717 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:14:21.561193 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 00:14:21.561472 saving as /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/dtb/meson-g12b-a311d-libretech-cc.dtb
83 00:14:21.561680 total size: 54703 (0 MB)
84 00:14:21.561898 No compression specified
85 00:14:21.604515 progress 59 % (0 MB)
86 00:14:21.605476 progress 100 % (0 MB)
87 00:14:21.606098 0 MB downloaded in 0.04 s (1.17 MB/s)
88 00:14:21.606591 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:14:21.607527 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:14:21.607836 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:14:21.608198 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:14:21.608788 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 00:14:21.609076 saving as /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/nfsrootfs/full.rootfs.tar
95 00:14:21.609316 total size: 120894716 (115 MB)
96 00:14:21.609584 Using unxz to decompress xz
97 00:14:21.652806 progress 0 % (0 MB)
98 00:14:22.495480 progress 5 % (5 MB)
99 00:14:23.362225 progress 10 % (11 MB)
100 00:14:24.157329 progress 15 % (17 MB)
101 00:14:24.896544 progress 20 % (23 MB)
102 00:14:25.487567 progress 25 % (28 MB)
103 00:14:26.315400 progress 30 % (34 MB)
104 00:14:27.111285 progress 35 % (40 MB)
105 00:14:27.486727 progress 40 % (46 MB)
106 00:14:27.864104 progress 45 % (51 MB)
107 00:14:28.601280 progress 50 % (57 MB)
108 00:14:29.502877 progress 55 % (63 MB)
109 00:14:30.295355 progress 60 % (69 MB)
110 00:14:31.052885 progress 65 % (74 MB)
111 00:14:31.863439 progress 70 % (80 MB)
112 00:14:32.700673 progress 75 % (86 MB)
113 00:14:33.492198 progress 80 % (92 MB)
114 00:14:34.256183 progress 85 % (98 MB)
115 00:14:35.122648 progress 90 % (103 MB)
116 00:14:35.944518 progress 95 % (109 MB)
117 00:14:36.780900 progress 100 % (115 MB)
118 00:14:36.794161 115 MB downloaded in 15.18 s (7.59 MB/s)
119 00:14:36.795393 end: 1.4.1 http-download (duration 00:00:15) [common]
121 00:14:36.797552 end: 1.4 download-retry (duration 00:00:15) [common]
122 00:14:36.798225 start: 1.5 download-retry (timeout 00:09:44) [common]
123 00:14:36.798882 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 00:14:36.799888 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/modules.tar.xz
125 00:14:36.800620 saving as /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/modules/modules.tar
126 00:14:36.801152 total size: 11768476 (11 MB)
127 00:14:36.801695 Using unxz to decompress xz
128 00:14:36.852394 progress 0 % (0 MB)
129 00:14:36.922610 progress 5 % (0 MB)
130 00:14:37.001447 progress 10 % (1 MB)
131 00:14:37.099929 progress 15 % (1 MB)
132 00:14:37.202782 progress 20 % (2 MB)
133 00:14:37.282297 progress 25 % (2 MB)
134 00:14:37.360117 progress 30 % (3 MB)
135 00:14:37.440153 progress 35 % (3 MB)
136 00:14:37.520795 progress 40 % (4 MB)
137 00:14:37.597458 progress 45 % (5 MB)
138 00:14:37.684835 progress 50 % (5 MB)
139 00:14:37.768514 progress 55 % (6 MB)
140 00:14:37.854201 progress 60 % (6 MB)
141 00:14:37.936040 progress 65 % (7 MB)
142 00:14:38.018418 progress 70 % (7 MB)
143 00:14:38.102739 progress 75 % (8 MB)
144 00:14:38.186631 progress 80 % (9 MB)
145 00:14:38.267313 progress 85 % (9 MB)
146 00:14:38.351097 progress 90 % (10 MB)
147 00:14:38.430560 progress 95 % (10 MB)
148 00:14:38.510996 progress 100 % (11 MB)
149 00:14:38.523250 11 MB downloaded in 1.72 s (6.52 MB/s)
150 00:14:38.524035 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:14:38.525697 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:14:38.526232 start: 1.6 prepare-tftp-overlay (timeout 00:09:42) [common]
154 00:14:38.526759 start: 1.6.1 extract-nfsrootfs (timeout 00:09:42) [common]
155 00:14:55.295729 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949379/extract-nfsrootfs-rud_m2fb
156 00:14:55.296366 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 00:14:55.296693 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 00:14:55.297407 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_
159 00:14:55.297901 makedir: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin
160 00:14:55.298314 makedir: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/tests
161 00:14:55.298704 makedir: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/results
162 00:14:55.299063 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-add-keys
163 00:14:55.299598 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-add-sources
164 00:14:55.300176 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-background-process-start
165 00:14:55.300705 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-background-process-stop
166 00:14:55.301249 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-common-functions
167 00:14:55.301770 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-echo-ipv4
168 00:14:55.302258 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-install-packages
169 00:14:55.302740 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-installed-packages
170 00:14:55.303213 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-os-build
171 00:14:55.303691 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-probe-channel
172 00:14:55.304200 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-probe-ip
173 00:14:55.304693 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-target-ip
174 00:14:55.305198 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-target-mac
175 00:14:55.305675 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-target-storage
176 00:14:55.306174 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-case
177 00:14:55.306666 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-event
178 00:14:55.307150 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-feedback
179 00:14:55.307628 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-raise
180 00:14:55.308140 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-reference
181 00:14:55.308647 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-runner
182 00:14:55.309156 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-set
183 00:14:55.309690 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-test-shell
184 00:14:55.310196 Updating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-add-keys (debian)
185 00:14:55.310732 Updating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-add-sources (debian)
186 00:14:55.311242 Updating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-install-packages (debian)
187 00:14:55.311761 Updating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-installed-packages (debian)
188 00:14:55.312281 Updating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/bin/lava-os-build (debian)
189 00:14:55.312720 Creating /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/environment
190 00:14:55.313109 LAVA metadata
191 00:14:55.313368 - LAVA_JOB_ID=949379
192 00:14:55.313583 - LAVA_DISPATCHER_IP=192.168.6.2
193 00:14:55.313955 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 00:14:55.314907 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 00:14:55.315221 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 00:14:55.315429 skipped lava-vland-overlay
197 00:14:55.315667 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 00:14:55.315920 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 00:14:55.316161 skipped lava-multinode-overlay
200 00:14:55.316404 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 00:14:55.316654 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 00:14:55.316900 Loading test definitions
203 00:14:55.317177 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 00:14:55.317396 Using /lava-949379 at stage 0
205 00:14:55.318520 uuid=949379_1.6.2.4.1 testdef=None
206 00:14:55.318831 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 00:14:55.319093 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 00:14:55.320694 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 00:14:55.321482 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 00:14:55.323463 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 00:14:55.324305 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 00:14:55.326154 runner path: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/0/tests/0_timesync-off test_uuid 949379_1.6.2.4.1
215 00:14:55.326763 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 00:14:55.327574 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 00:14:55.327796 Using /lava-949379 at stage 0
219 00:14:55.328215 Fetching tests from https://github.com/kernelci/test-definitions.git
220 00:14:55.328513 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/0/tests/1_kselftest-rtc'
221 00:14:59.024769 Running '/usr/bin/git checkout kernelci.org
222 00:14:59.054361 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 00:14:59.057005 uuid=949379_1.6.2.4.5 testdef=None
224 00:14:59.057716 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 00:14:59.059251 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 00:14:59.065312 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 00:14:59.066921 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 00:14:59.076380 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 00:14:59.078211 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 00:14:59.086153 runner path: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/0/tests/1_kselftest-rtc test_uuid 949379_1.6.2.4.5
234 00:14:59.086758 BOARD='meson-g12b-a311d-libretech-cc'
235 00:14:59.087165 BRANCH='mainline'
236 00:14:59.087556 SKIPFILE='/dev/null'
237 00:14:59.087949 SKIP_INSTALL='True'
238 00:14:59.088382 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/kselftest.tar.xz'
239 00:14:59.088784 TST_CASENAME=''
240 00:14:59.089175 TST_CMDFILES='rtc'
241 00:14:59.090476 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 00:14:59.092100 Creating lava-test-runner.conf files
244 00:14:59.092514 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949379/lava-overlay-sme74_e_/lava-949379/0 for stage 0
245 00:14:59.093206 - 0_timesync-off
246 00:14:59.093686 - 1_kselftest-rtc
247 00:14:59.094360 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 00:14:59.094916 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 00:15:22.464214 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 00:15:22.464661 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 00:15:22.464927 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 00:15:22.465195 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 00:15:22.465459 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 00:15:23.164364 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 00:15:23.164955 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 00:15:23.165350 extracting modules file /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949379/extract-nfsrootfs-rud_m2fb
257 00:15:24.587124 extracting modules file /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk
258 00:15:26.056323 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 00:15:26.056805 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 00:15:26.057085 [common] Applying overlay to NFS
261 00:15:26.057302 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949379/compress-overlay-f18rpc17/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949379/extract-nfsrootfs-rud_m2fb
262 00:15:28.959476 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 00:15:28.959945 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 00:15:28.960255 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 00:15:28.960488 Converting downloaded kernel to a uImage
266 00:15:28.960801 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/kernel/Image /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/kernel/uImage
267 00:15:29.357872 output: Image Name:
268 00:15:29.358291 output: Created: Thu Nov 7 00:15:28 2024
269 00:15:29.358503 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 00:15:29.358711 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
271 00:15:29.358917 output: Load Address: 01080000
272 00:15:29.359120 output: Entry Point: 01080000
273 00:15:29.359320 output:
274 00:15:29.359653 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 00:15:29.359922 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 00:15:29.360240 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 00:15:29.360501 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 00:15:29.360763 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 00:15:29.361031 Building ramdisk /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk
280 00:15:31.750472 >> 173443 blocks
281 00:15:39.425034 Adding RAMdisk u-boot header.
282 00:15:39.425757 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk.cpio.gz.uboot
283 00:15:39.678414 output: Image Name:
284 00:15:39.678823 output: Created: Thu Nov 7 00:15:39 2024
285 00:15:39.679035 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 00:15:39.679239 output: Data Size: 24150641 Bytes = 23584.61 KiB = 23.03 MiB
287 00:15:39.679443 output: Load Address: 00000000
288 00:15:39.679643 output: Entry Point: 00000000
289 00:15:39.679844 output:
290 00:15:39.680908 rename /var/lib/lava/dispatcher/tmp/949379/extract-overlay-ramdisk-uqf5e1cu/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
291 00:15:39.681626 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 00:15:39.682164 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 00:15:39.682686 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 00:15:39.683137 No LXC device requested
295 00:15:39.683632 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 00:15:39.684174 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 00:15:39.684671 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 00:15:39.685082 Checking files for TFTP limit of 4294967296 bytes.
299 00:15:39.687703 end: 1 tftp-deploy (duration 00:01:19) [common]
300 00:15:39.688301 start: 2 uboot-action (timeout 00:05:00) [common]
301 00:15:39.688829 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 00:15:39.689320 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 00:15:39.689829 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 00:15:39.690353 Using kernel file from prepare-kernel: 949379/tftp-deploy-rr0e3jc4/kernel/uImage
305 00:15:39.690977 substitutions:
306 00:15:39.691381 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 00:15:39.691782 - {DTB_ADDR}: 0x01070000
308 00:15:39.692219 - {DTB}: 949379/tftp-deploy-rr0e3jc4/dtb/meson-g12b-a311d-libretech-cc.dtb
309 00:15:39.692626 - {INITRD}: 949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
310 00:15:39.693024 - {KERNEL_ADDR}: 0x01080000
311 00:15:39.693419 - {KERNEL}: 949379/tftp-deploy-rr0e3jc4/kernel/uImage
312 00:15:39.693813 - {LAVA_MAC}: None
313 00:15:39.694241 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949379/extract-nfsrootfs-rud_m2fb
314 00:15:39.694638 - {NFS_SERVER_IP}: 192.168.6.2
315 00:15:39.695028 - {PRESEED_CONFIG}: None
316 00:15:39.695417 - {PRESEED_LOCAL}: None
317 00:15:39.695812 - {RAMDISK_ADDR}: 0x08000000
318 00:15:39.696237 - {RAMDISK}: 949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
319 00:15:39.696628 - {ROOT_PART}: None
320 00:15:39.697017 - {ROOT}: None
321 00:15:39.697404 - {SERVER_IP}: 192.168.6.2
322 00:15:39.697788 - {TEE_ADDR}: 0x83000000
323 00:15:39.698174 - {TEE}: None
324 00:15:39.698559 Parsed boot commands:
325 00:15:39.698934 - setenv autoload no
326 00:15:39.699320 - setenv initrd_high 0xffffffff
327 00:15:39.699703 - setenv fdt_high 0xffffffff
328 00:15:39.700114 - dhcp
329 00:15:39.700500 - setenv serverip 192.168.6.2
330 00:15:39.700887 - tftpboot 0x01080000 949379/tftp-deploy-rr0e3jc4/kernel/uImage
331 00:15:39.701279 - tftpboot 0x08000000 949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
332 00:15:39.701671 - tftpboot 0x01070000 949379/tftp-deploy-rr0e3jc4/dtb/meson-g12b-a311d-libretech-cc.dtb
333 00:15:39.702060 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949379/extract-nfsrootfs-rud_m2fb,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 00:15:39.702460 - bootm 0x01080000 0x08000000 0x01070000
335 00:15:39.702953 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 00:15:39.704471 start: 2.3 connect-device (timeout 00:05:00) [common]
338 00:15:39.704892 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 00:15:39.720012 Setting prompt string to ['lava-test: # ']
340 00:15:39.721524 end: 2.3 connect-device (duration 00:00:00) [common]
341 00:15:39.722127 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 00:15:39.722706 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 00:15:39.723265 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 00:15:39.724490 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 00:15:39.761973 >> OK - accepted request
346 00:15:39.764229 Returned 0 in 0 seconds
347 00:15:39.865269 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 00:15:39.866794 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 00:15:39.867339 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 00:15:39.867838 Setting prompt string to ['Hit any key to stop autoboot']
352 00:15:39.868328 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 00:15:39.869860 Trying 192.168.56.21...
354 00:15:39.870324 Connected to conserv1.
355 00:15:39.870737 Escape character is '^]'.
356 00:15:39.871137
357 00:15:39.871542 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 00:15:39.871958
359 00:15:51.484285 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 00:15:51.484717 bl2_stage_init 0x01
361 00:15:51.484948 bl2_stage_init 0x81
362 00:15:51.489767 hw id: 0x0000 - pwm id 0x01
363 00:15:51.490078 bl2_stage_init 0xc1
364 00:15:51.490300 bl2_stage_init 0x02
365 00:15:51.490512
366 00:15:51.495303 L0:00000000
367 00:15:51.495593 L1:20000703
368 00:15:51.495813 L2:00008067
369 00:15:51.496087 L3:14000000
370 00:15:51.500980 B2:00402000
371 00:15:51.501259 B1:e0f83180
372 00:15:51.501476
373 00:15:51.501680 TE: 58167
374 00:15:51.501882
375 00:15:51.506662 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 00:15:51.506938
377 00:15:51.507146 Board ID = 1
378 00:15:51.512318 Set A53 clk to 24M
379 00:15:51.512584 Set A73 clk to 24M
380 00:15:51.512784 Set clk81 to 24M
381 00:15:51.517751 A53 clk: 1200 MHz
382 00:15:51.518012 A73 clk: 1200 MHz
383 00:15:51.518211 CLK81: 166.6M
384 00:15:51.518406 smccc: 00012abd
385 00:15:51.523396 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 00:15:51.528936 board id: 1
387 00:15:51.534718 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 00:15:51.545388 fw parse done
389 00:15:51.551327 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 00:15:51.593922 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 00:15:51.604821 PIEI prepare done
392 00:15:51.605088 fastboot data load
393 00:15:51.605292 fastboot data verify
394 00:15:51.610492 verify result: 266
395 00:15:51.616164 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 00:15:51.616440 LPDDR4 probe
397 00:15:51.616647 ddr clk to 1584MHz
398 00:15:51.624150 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 00:15:51.661339
400 00:15:51.661667 dmc_version 0001
401 00:15:51.668043 Check phy result
402 00:15:51.673936 INFO : End of CA training
403 00:15:51.674188 INFO : End of initialization
404 00:15:51.679547 INFO : Training has run successfully!
405 00:15:51.679794 Check phy result
406 00:15:51.685182 INFO : End of initialization
407 00:15:51.685444 INFO : End of read enable training
408 00:15:51.688364 INFO : End of fine write leveling
409 00:15:51.693906 INFO : End of Write leveling coarse delay
410 00:15:51.699544 INFO : Training has run successfully!
411 00:15:51.699808 Check phy result
412 00:15:51.700039 INFO : End of initialization
413 00:15:51.705244 INFO : End of read dq deskew training
414 00:15:51.710729 INFO : End of MPR read delay center optimization
415 00:15:51.711012 INFO : End of write delay center optimization
416 00:15:51.716297 INFO : End of read delay center optimization
417 00:15:51.721943 INFO : End of max read latency training
418 00:15:51.722207 INFO : Training has run successfully!
419 00:15:51.727482 1D training succeed
420 00:15:51.733526 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 00:15:51.781151 Check phy result
422 00:15:51.781531 INFO : End of initialization
423 00:15:51.801993 INFO : End of 2D read delay Voltage center optimization
424 00:15:51.823108 INFO : End of 2D read delay Voltage center optimization
425 00:15:51.875244 INFO : End of 2D write delay Voltage center optimization
426 00:15:51.924483 INFO : End of 2D write delay Voltage center optimization
427 00:15:51.929962 INFO : Training has run successfully!
428 00:15:51.930209
429 00:15:51.930417 channel==0
430 00:15:51.935637 RxClkDly_Margin_A0==88 ps 9
431 00:15:51.935890 TxDqDly_Margin_A0==98 ps 10
432 00:15:51.938982 RxClkDly_Margin_A1==88 ps 9
433 00:15:51.939226 TxDqDly_Margin_A1==98 ps 10
434 00:15:51.944551 TrainedVREFDQ_A0==74
435 00:15:51.944791 TrainedVREFDQ_A1==74
436 00:15:51.949960 VrefDac_Margin_A0==24
437 00:15:51.950196 DeviceVref_Margin_A0==40
438 00:15:51.950399 VrefDac_Margin_A1==25
439 00:15:51.955599 DeviceVref_Margin_A1==40
440 00:15:51.955844
441 00:15:51.956072
442 00:15:51.956276 channel==1
443 00:15:51.956473 RxClkDly_Margin_A0==98 ps 10
444 00:15:51.961227 TxDqDly_Margin_A0==98 ps 10
445 00:15:51.961487 RxClkDly_Margin_A1==88 ps 9
446 00:15:51.967043 TxDqDly_Margin_A1==88 ps 9
447 00:15:51.967336 TrainedVREFDQ_A0==77
448 00:15:51.967564 TrainedVREFDQ_A1==77
449 00:15:51.972576 VrefDac_Margin_A0==22
450 00:15:51.972869 DeviceVref_Margin_A0==37
451 00:15:51.977374 VrefDac_Margin_A1==24
452 00:15:51.977652 DeviceVref_Margin_A1==37
453 00:15:51.980618
454 00:15:51.980889 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 00:15:51.981096
456 00:15:52.014288 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000018 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
457 00:15:52.014677 2D training succeed
458 00:15:52.020003 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 00:15:52.025500 auto size-- 65535DDR cs0 size: 2048MB
460 00:15:52.025775 DDR cs1 size: 2048MB
461 00:15:52.030994 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 00:15:52.031268 cs0 DataBus test pass
463 00:15:52.036601 cs1 DataBus test pass
464 00:15:52.036875 cs0 AddrBus test pass
465 00:15:52.037104 cs1 AddrBus test pass
466 00:15:52.037312
467 00:15:52.042184 100bdlr_step_size ps== 420
468 00:15:52.042459 result report
469 00:15:52.047843 boot times 0Enable ddr reg access
470 00:15:52.052954 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 00:15:52.066498 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 00:15:52.640122 0.0;M3 CHK:0;cm4_sp_mode 0
473 00:15:52.640530 MVN_1=0x00000000
474 00:15:52.645474 MVN_2=0x00000000
475 00:15:52.651324 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 00:15:52.651594 OPS=0x10
477 00:15:52.651805 ring efuse init
478 00:15:52.652030 chipver efuse init
479 00:15:52.659573 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 00:15:52.659865 [0.018961 Inits done]
481 00:15:52.667121 secure task start!
482 00:15:52.667388 high task start!
483 00:15:52.667600 low task start!
484 00:15:52.667804 run into bl31
485 00:15:52.673744 NOTICE: BL31: v1.3(release):4fc40b1
486 00:15:52.681570 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 00:15:52.681864 NOTICE: BL31: G12A normal boot!
488 00:15:52.707010 NOTICE: BL31: BL33 decompress pass
489 00:15:52.712609 ERROR: Error initializing runtime service opteed_fast
490 00:15:53.945560
491 00:15:53.945978
492 00:15:53.953965 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 00:15:53.954263
494 00:15:53.954469 Model: Libre Computer AML-A311D-CC Alta
495 00:15:54.162426 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 00:15:54.185753 DRAM: 2 GiB (effective 3.8 GiB)
497 00:15:54.328760 Core: 408 devices, 31 uclasses, devicetree: separate
498 00:15:54.334526 WDT: Not starting watchdog@f0d0
499 00:15:54.366855 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 00:15:54.379428 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 00:15:54.384277 ** Bad device specification mmc 0 **
502 00:15:54.394621 Card did not respond to voltage select! : -110
503 00:15:54.402227 ** Bad device specification mmc 0 **
504 00:15:54.402524 Couldn't find partition mmc 0
505 00:15:54.410560 Card did not respond to voltage select! : -110
506 00:15:54.416172 ** Bad device specification mmc 0 **
507 00:15:54.416612 Couldn't find partition mmc 0
508 00:15:54.421275 Error: could not access storage.
509 00:15:55.684293 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 00:15:55.684681 bl2_stage_init 0x01
511 00:15:55.684897 bl2_stage_init 0x81
512 00:15:55.689839 hw id: 0x0000 - pwm id 0x01
513 00:15:55.690242 bl2_stage_init 0xc1
514 00:15:55.690570 bl2_stage_init 0x02
515 00:15:55.690905
516 00:15:55.695573 L0:00000000
517 00:15:55.695861 L1:20000703
518 00:15:55.696122 L2:00008067
519 00:15:55.696333 L3:14000000
520 00:15:55.698336 B2:00402000
521 00:15:55.698738 B1:e0f83180
522 00:15:55.699050
523 00:15:55.699363 TE: 58159
524 00:15:55.699668
525 00:15:55.709562 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 00:15:55.709870
527 00:15:55.710085 Board ID = 1
528 00:15:55.710301 Set A53 clk to 24M
529 00:15:55.710505 Set A73 clk to 24M
530 00:15:55.715032 Set clk81 to 24M
531 00:15:55.715441 A53 clk: 1200 MHz
532 00:15:55.715806 A73 clk: 1200 MHz
533 00:15:55.720639 CLK81: 166.6M
534 00:15:55.721044 smccc: 00012ab5
535 00:15:55.726335 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 00:15:55.726624 board id: 1
537 00:15:55.731834 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 00:15:55.745580 fw parse done
539 00:15:55.751648 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 00:15:55.794208 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 00:15:55.805133 PIEI prepare done
542 00:15:55.805577 fastboot data load
543 00:15:55.805986 fastboot data verify
544 00:15:55.810776 verify result: 266
545 00:15:55.816450 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 00:15:55.816880 LPDDR4 probe
547 00:15:55.817280 ddr clk to 1584MHz
548 00:15:55.824327 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 00:15:55.861586
550 00:15:55.862023 dmc_version 0001
551 00:15:55.868269 Check phy result
552 00:15:55.874130 INFO : End of CA training
553 00:15:55.874554 INFO : End of initialization
554 00:15:55.879722 INFO : Training has run successfully!
555 00:15:55.880193 Check phy result
556 00:15:55.885321 INFO : End of initialization
557 00:15:55.885748 INFO : End of read enable training
558 00:15:55.888662 INFO : End of fine write leveling
559 00:15:55.894226 INFO : End of Write leveling coarse delay
560 00:15:55.899846 INFO : Training has run successfully!
561 00:15:55.900298 Check phy result
562 00:15:55.900701 INFO : End of initialization
563 00:15:55.905454 INFO : End of read dq deskew training
564 00:15:55.911069 INFO : End of MPR read delay center optimization
565 00:15:55.911498 INFO : End of write delay center optimization
566 00:15:55.916658 INFO : End of read delay center optimization
567 00:15:55.922232 INFO : End of max read latency training
568 00:15:55.922654 INFO : Training has run successfully!
569 00:15:55.927839 1D training succeed
570 00:15:55.933737 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 00:15:55.981344 Check phy result
572 00:15:55.981786 INFO : End of initialization
573 00:15:56.002970 INFO : End of 2D read delay Voltage center optimization
574 00:15:56.022216 INFO : End of 2D read delay Voltage center optimization
575 00:15:56.074137 INFO : End of 2D write delay Voltage center optimization
576 00:15:56.123433 INFO : End of 2D write delay Voltage center optimization
577 00:15:56.128998 INFO : Training has run successfully!
578 00:15:56.129473
579 00:15:56.129889 channel==0
580 00:15:56.134568 RxClkDly_Margin_A0==88 ps 9
581 00:15:56.135031 TxDqDly_Margin_A0==98 ps 10
582 00:15:56.140247 RxClkDly_Margin_A1==88 ps 9
583 00:15:56.140727 TxDqDly_Margin_A1==88 ps 9
584 00:15:56.141141 TrainedVREFDQ_A0==74
585 00:15:56.145854 TrainedVREFDQ_A1==74
586 00:15:56.146343 VrefDac_Margin_A0==25
587 00:15:56.146758 DeviceVref_Margin_A0==40
588 00:15:56.151375 VrefDac_Margin_A1==25
589 00:15:56.151845 DeviceVref_Margin_A1==40
590 00:15:56.152300
591 00:15:56.152711
592 00:15:56.153115 channel==1
593 00:15:56.156955 RxClkDly_Margin_A0==78 ps 8
594 00:15:56.157285 TxDqDly_Margin_A0==98 ps 10
595 00:15:56.162524 RxClkDly_Margin_A1==88 ps 9
596 00:15:56.162992 TxDqDly_Margin_A1==88 ps 9
597 00:15:56.168184 TrainedVREFDQ_A0==77
598 00:15:56.168750 TrainedVREFDQ_A1==77
599 00:15:56.169183 VrefDac_Margin_A0==23
600 00:15:56.173858 DeviceVref_Margin_A0==37
601 00:15:56.174330 VrefDac_Margin_A1==24
602 00:15:56.179367 DeviceVref_Margin_A1==37
603 00:15:56.179828
604 00:15:56.180275 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 00:15:56.180682
606 00:15:56.212929 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000019 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 00:15:56.213473 2D training succeed
608 00:15:56.218539 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 00:15:56.224175 auto size-- 65535DDR cs0 size: 2048MB
610 00:15:56.224663 DDR cs1 size: 2048MB
611 00:15:56.229718 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 00:15:56.230186 cs0 DataBus test pass
613 00:15:56.235422 cs1 DataBus test pass
614 00:15:56.235918 cs0 AddrBus test pass
615 00:15:56.236366 cs1 AddrBus test pass
616 00:15:56.236771
617 00:15:56.240993 100bdlr_step_size ps== 420
618 00:15:56.241583 result report
619 00:15:56.246580 boot times 0Enable ddr reg access
620 00:15:56.251845 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 00:15:56.265220 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 00:15:56.837284 0.0;M3 CHK:0;cm4_sp_mode 0
623 00:15:56.837879 MVN_1=0x00000000
624 00:15:56.842834 MVN_2=0x00000000
625 00:15:56.848501 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 00:15:56.849115 OPS=0x10
627 00:15:56.849590 ring efuse init
628 00:15:56.850009 chipver efuse init
629 00:15:56.854082 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 00:15:56.859803 [0.018961 Inits done]
631 00:15:56.860242 secure task start!
632 00:15:56.860470 high task start!
633 00:15:56.864237 low task start!
634 00:15:56.864640 run into bl31
635 00:15:56.870976 NOTICE: BL31: v1.3(release):4fc40b1
636 00:15:56.878720 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 00:15:56.879110 NOTICE: BL31: G12A normal boot!
638 00:15:56.904101 NOTICE: BL31: BL33 decompress pass
639 00:15:56.909858 ERROR: Error initializing runtime service opteed_fast
640 00:15:58.142778
641 00:15:58.143179
642 00:15:58.154566 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 00:15:58.154850
644 00:15:58.155060 Model: Libre Computer AML-A311D-CC Alta
645 00:15:58.359654 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 00:15:58.383113 DRAM: 2 GiB (effective 3.8 GiB)
647 00:15:58.525949 Core: 408 devices, 31 uclasses, devicetree: separate
648 00:15:58.531873 WDT: Not starting watchdog@f0d0
649 00:15:58.564246 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 00:15:58.576516 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 00:15:58.581602 ** Bad device specification mmc 0 **
652 00:15:58.591887 Card did not respond to voltage select! : -110
653 00:15:58.599501 ** Bad device specification mmc 0 **
654 00:15:58.600033 Couldn't find partition mmc 0
655 00:15:58.607900 Card did not respond to voltage select! : -110
656 00:15:58.613358 ** Bad device specification mmc 0 **
657 00:15:58.613858 Couldn't find partition mmc 0
658 00:15:58.618400 Error: could not access storage.
659 00:15:58.961023 Net: eth0: ethernet@ff3f0000
660 00:15:58.961555 starting USB...
661 00:15:59.212752 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 00:15:59.213327 Starting the controller
663 00:15:59.219759 USB XHCI 1.10
664 00:16:00.936128 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 00:16:00.936557 bl2_stage_init 0x01
666 00:16:00.936816 bl2_stage_init 0x81
667 00:16:00.941715 hw id: 0x0000 - pwm id 0x01
668 00:16:00.942219 bl2_stage_init 0xc1
669 00:16:00.942624 bl2_stage_init 0x02
670 00:16:00.943099
671 00:16:00.947276 L0:00000000
672 00:16:00.947624 L1:20000703
673 00:16:00.947874 L2:00008067
674 00:16:00.948157 L3:14000000
675 00:16:00.950125 B2:00402000
676 00:16:00.950578 B1:e0f83180
677 00:16:00.950972
678 00:16:00.951359 TE: 58124
679 00:16:00.951748
680 00:16:00.961233 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 00:16:00.961722
682 00:16:00.962124 Board ID = 1
683 00:16:00.962406 Set A53 clk to 24M
684 00:16:00.962649 Set A73 clk to 24M
685 00:16:00.967137 Set clk81 to 24M
686 00:16:00.967617 A53 clk: 1200 MHz
687 00:16:00.968047 A73 clk: 1200 MHz
688 00:16:00.972757 CLK81: 166.6M
689 00:16:00.973277 smccc: 00012a92
690 00:16:00.978184 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 00:16:00.978684 board id: 1
692 00:16:00.983773 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 00:16:00.997498 fw parse done
694 00:16:01.003363 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 00:16:01.045941 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 00:16:01.056924 PIEI prepare done
697 00:16:01.057438 fastboot data load
698 00:16:01.057861 fastboot data verify
699 00:16:01.062585 verify result: 266
700 00:16:01.068170 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 00:16:01.068690 LPDDR4 probe
702 00:16:01.069106 ddr clk to 1584MHz
703 00:16:01.076183 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 00:16:01.113406
705 00:16:01.113931 dmc_version 0001
706 00:16:01.120136 Check phy result
707 00:16:01.126003 INFO : End of CA training
708 00:16:01.126498 INFO : End of initialization
709 00:16:01.131628 INFO : Training has run successfully!
710 00:16:01.132176 Check phy result
711 00:16:01.137159 INFO : End of initialization
712 00:16:01.137673 INFO : End of read enable training
713 00:16:01.142835 INFO : End of fine write leveling
714 00:16:01.148371 INFO : End of Write leveling coarse delay
715 00:16:01.148858 INFO : Training has run successfully!
716 00:16:01.149268 Check phy result
717 00:16:01.153970 INFO : End of initialization
718 00:16:01.154455 INFO : End of read dq deskew training
719 00:16:01.159636 INFO : End of MPR read delay center optimization
720 00:16:01.165148 INFO : End of write delay center optimization
721 00:16:01.170768 INFO : End of read delay center optimization
722 00:16:01.171256 INFO : End of max read latency training
723 00:16:01.176400 INFO : Training has run successfully!
724 00:16:01.176893 1D training succeed
725 00:16:01.185558 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 00:16:01.233096 Check phy result
727 00:16:01.233614 INFO : End of initialization
728 00:16:01.255546 INFO : End of 2D read delay Voltage center optimization
729 00:16:01.275750 INFO : End of 2D read delay Voltage center optimization
730 00:16:01.327661 INFO : End of 2D write delay Voltage center optimization
731 00:16:01.376877 INFO : End of 2D write delay Voltage center optimization
732 00:16:01.382508 INFO : Training has run successfully!
733 00:16:01.383032
734 00:16:01.383456 channel==0
735 00:16:01.388050 RxClkDly_Margin_A0==88 ps 9
736 00:16:01.388556 TxDqDly_Margin_A0==98 ps 10
737 00:16:01.393720 RxClkDly_Margin_A1==88 ps 9
738 00:16:01.394209 TxDqDly_Margin_A1==98 ps 10
739 00:16:01.394622 TrainedVREFDQ_A0==74
740 00:16:01.399257 TrainedVREFDQ_A1==74
741 00:16:01.399774 VrefDac_Margin_A0==25
742 00:16:01.400217 DeviceVref_Margin_A0==40
743 00:16:01.404806 VrefDac_Margin_A1==24
744 00:16:01.405280 DeviceVref_Margin_A1==40
745 00:16:01.405694
746 00:16:01.406095
747 00:16:01.410440 channel==1
748 00:16:01.410944 RxClkDly_Margin_A0==98 ps 10
749 00:16:01.411357 TxDqDly_Margin_A0==98 ps 10
750 00:16:01.416048 RxClkDly_Margin_A1==98 ps 10
751 00:16:01.416543 TxDqDly_Margin_A1==88 ps 9
752 00:16:01.421695 TrainedVREFDQ_A0==77
753 00:16:01.422192 TrainedVREFDQ_A1==77
754 00:16:01.422609 VrefDac_Margin_A0==22
755 00:16:01.427196 DeviceVref_Margin_A0==37
756 00:16:01.427674 VrefDac_Margin_A1==22
757 00:16:01.432753 DeviceVref_Margin_A1==37
758 00:16:01.433246
759 00:16:01.433661 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 00:16:01.438399
761 00:16:01.466309 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000018 00000018 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
762 00:16:01.466916 2D training succeed
763 00:16:01.471947 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 00:16:01.477638 auto size-- 65535DDR cs0 size: 2048MB
765 00:16:01.478131 DDR cs1 size: 2048MB
766 00:16:01.483157 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 00:16:01.483651 cs0 DataBus test pass
768 00:16:01.488746 cs1 DataBus test pass
769 00:16:01.489240 cs0 AddrBus test pass
770 00:16:01.489647 cs1 AddrBus test pass
771 00:16:01.490045
772 00:16:01.494416 100bdlr_step_size ps== 420
773 00:16:01.494915 result report
774 00:16:01.499941 boot times 0Enable ddr reg access
775 00:16:01.505453 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 00:16:01.518836 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 00:16:02.090866 0.0;M3 CHK:0;cm4_sp_mode 0
778 00:16:02.091504 MVN_1=0x00000000
779 00:16:02.096477 MVN_2=0x00000000
780 00:16:02.102108 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 00:16:02.102662 OPS=0x10
782 00:16:02.103067 ring efuse init
783 00:16:02.103456 chipver efuse init
784 00:16:02.107635 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 00:16:02.113281 [0.018961 Inits done]
786 00:16:02.113786 secure task start!
787 00:16:02.114181 high task start!
788 00:16:02.117853 low task start!
789 00:16:02.118320 run into bl31
790 00:16:02.124466 NOTICE: BL31: v1.3(release):4fc40b1
791 00:16:02.132319 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 00:16:02.132830 NOTICE: BL31: G12A normal boot!
793 00:16:02.157717 NOTICE: BL31: BL33 decompress pass
794 00:16:02.163356 ERROR: Error initializing runtime service opteed_fast
795 00:16:03.396284
796 00:16:03.396907
797 00:16:03.404660 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 00:16:03.405156
799 00:16:03.405595 Model: Libre Computer AML-A311D-CC Alta
800 00:16:03.613242 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 00:16:03.636554 DRAM: 2 GiB (effective 3.8 GiB)
802 00:16:03.779424 Core: 408 devices, 31 uclasses, devicetree: separate
803 00:16:03.785363 WDT: Not starting watchdog@f0d0
804 00:16:03.817723 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 00:16:03.830046 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 00:16:03.835111 ** Bad device specification mmc 0 **
807 00:16:03.845371 Card did not respond to voltage select! : -110
808 00:16:03.853017 ** Bad device specification mmc 0 **
809 00:16:03.853492 Couldn't find partition mmc 0
810 00:16:03.861259 Card did not respond to voltage select! : -110
811 00:16:03.866899 ** Bad device specification mmc 0 **
812 00:16:03.867366 Couldn't find partition mmc 0
813 00:16:03.872043 Error: could not access storage.
814 00:16:04.215397 Net: eth0: ethernet@ff3f0000
815 00:16:04.215966 starting USB...
816 00:16:04.467297 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 00:16:04.467844 Starting the controller
818 00:16:04.474407 USB XHCI 1.10
819 00:16:06.634873 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 00:16:06.635594 bl2_stage_init 0x01
821 00:16:06.636113 bl2_stage_init 0x81
822 00:16:06.640453 hw id: 0x0000 - pwm id 0x01
823 00:16:06.641050 bl2_stage_init 0xc1
824 00:16:06.641489 bl2_stage_init 0x02
825 00:16:06.641915
826 00:16:06.645972 L0:00000000
827 00:16:06.646552 L1:20000703
828 00:16:06.646990 L2:00008067
829 00:16:06.647434 L3:14000000
830 00:16:06.651601 B2:00402000
831 00:16:06.652165 B1:e0f83180
832 00:16:06.652634
833 00:16:06.653059 TE: 58159
834 00:16:06.653475
835 00:16:06.657152 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 00:16:06.657722
837 00:16:06.658293 Board ID = 1
838 00:16:06.662709 Set A53 clk to 24M
839 00:16:06.663210 Set A73 clk to 24M
840 00:16:06.663618 Set clk81 to 24M
841 00:16:06.668443 A53 clk: 1200 MHz
842 00:16:06.668959 A73 clk: 1200 MHz
843 00:16:06.669373 CLK81: 166.6M
844 00:16:06.669772 smccc: 00012ab5
845 00:16:06.673926 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 00:16:06.679550 board id: 1
847 00:16:06.685495 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 00:16:06.696203 fw parse done
849 00:16:06.702083 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 00:16:06.744545 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 00:16:06.755439 PIEI prepare done
852 00:16:06.755928 fastboot data load
853 00:16:06.756395 fastboot data verify
854 00:16:06.761162 verify result: 266
855 00:16:06.766744 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 00:16:06.767217 LPDDR4 probe
857 00:16:06.767627 ddr clk to 1584MHz
858 00:16:06.774740 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 00:16:06.811969
860 00:16:06.812509 dmc_version 0001
861 00:16:06.818644 Check phy result
862 00:16:06.824508 INFO : End of CA training
863 00:16:06.824983 INFO : End of initialization
864 00:16:06.830099 INFO : Training has run successfully!
865 00:16:06.830571 Check phy result
866 00:16:06.835700 INFO : End of initialization
867 00:16:06.836202 INFO : End of read enable training
868 00:16:06.839051 INFO : End of fine write leveling
869 00:16:06.844544 INFO : End of Write leveling coarse delay
870 00:16:06.850206 INFO : Training has run successfully!
871 00:16:06.850676 Check phy result
872 00:16:06.851084 INFO : End of initialization
873 00:16:06.855813 INFO : End of read dq deskew training
874 00:16:06.861419 INFO : End of MPR read delay center optimization
875 00:16:06.861893 INFO : End of write delay center optimization
876 00:16:06.867034 INFO : End of read delay center optimization
877 00:16:06.872569 INFO : End of max read latency training
878 00:16:06.873045 INFO : Training has run successfully!
879 00:16:06.878175 1D training succeed
880 00:16:06.884204 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 00:16:06.931736 Check phy result
882 00:16:06.932290 INFO : End of initialization
883 00:16:06.954249 INFO : End of 2D read delay Voltage center optimization
884 00:16:06.974507 INFO : End of 2D read delay Voltage center optimization
885 00:16:07.026612 INFO : End of 2D write delay Voltage center optimization
886 00:16:07.076119 INFO : End of 2D write delay Voltage center optimization
887 00:16:07.081664 INFO : Training has run successfully!
888 00:16:07.082217
889 00:16:07.082562 channel==0
890 00:16:07.087372 RxClkDly_Margin_A0==88 ps 9
891 00:16:07.087758 TxDqDly_Margin_A0==98 ps 10
892 00:16:07.090522 RxClkDly_Margin_A1==88 ps 9
893 00:16:07.090896 TxDqDly_Margin_A1==98 ps 10
894 00:16:07.096208 TrainedVREFDQ_A0==74
895 00:16:07.096604 TrainedVREFDQ_A1==74
896 00:16:07.096823 VrefDac_Margin_A0==24
897 00:16:07.101638 DeviceVref_Margin_A0==40
898 00:16:07.102037 VrefDac_Margin_A1==24
899 00:16:07.107191 DeviceVref_Margin_A1==40
900 00:16:07.107563
901 00:16:07.107771
902 00:16:07.107971 channel==1
903 00:16:07.108199 RxClkDly_Margin_A0==88 ps 9
904 00:16:07.110754 TxDqDly_Margin_A0==88 ps 9
905 00:16:07.116474 RxClkDly_Margin_A1==88 ps 9
906 00:16:07.116838 TxDqDly_Margin_A1==108 ps 11
907 00:16:07.117042 TrainedVREFDQ_A0==76
908 00:16:07.121858 TrainedVREFDQ_A1==78
909 00:16:07.122214 VrefDac_Margin_A0==22
910 00:16:07.127530 DeviceVref_Margin_A0==38
911 00:16:07.127907 VrefDac_Margin_A1==24
912 00:16:07.128162 DeviceVref_Margin_A1==36
913 00:16:07.128391
914 00:16:07.136547 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 00:16:07.136950
916 00:16:07.163141 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 00:16:07.168265 2D training succeed
918 00:16:07.171535 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 00:16:07.176870 auto size-- 65535DDR cs0 size: 2048MB
920 00:16:07.177194 DDR cs1 size: 2048MB
921 00:16:07.182486 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 00:16:07.183068 cs0 DataBus test pass
923 00:16:07.188052 cs1 DataBus test pass
924 00:16:07.188387 cs0 AddrBus test pass
925 00:16:07.188596 cs1 AddrBus test pass
926 00:16:07.188795
927 00:16:07.193707 100bdlr_step_size ps== 420
928 00:16:07.194278 result report
929 00:16:07.199252 boot times 0Enable ddr reg access
930 00:16:07.204474 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 00:16:07.217857 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 00:16:07.791353 0.0;M3 CHK:0;cm4_sp_mode 0
933 00:16:07.791788 MVN_1=0x00000000
934 00:16:07.796837 MVN_2=0x00000000
935 00:16:07.802646 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 00:16:07.802966 OPS=0x10
937 00:16:07.803190 ring efuse init
938 00:16:07.803402 chipver efuse init
939 00:16:07.808391 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 00:16:07.814011 [0.018960 Inits done]
941 00:16:07.814843 secure task start!
942 00:16:07.816347 high task start!
943 00:16:07.818590 low task start!
944 00:16:07.819435 run into bl31
945 00:16:07.825208 NOTICE: BL31: v1.3(release):4fc40b1
946 00:16:07.833091 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 00:16:07.833661 NOTICE: BL31: G12A normal boot!
948 00:16:07.858506 NOTICE: BL31: BL33 decompress pass
949 00:16:07.864135 ERROR: Error initializing runtime service opteed_fast
950 00:16:09.096842
951 00:16:09.097276
952 00:16:09.105388 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 00:16:09.105919
954 00:16:09.106342 Model: Libre Computer AML-A311D-CC Alta
955 00:16:09.313756 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 00:16:09.337156 DRAM: 2 GiB (effective 3.8 GiB)
957 00:16:09.480204 Core: 408 devices, 31 uclasses, devicetree: separate
958 00:16:09.486021 WDT: Not starting watchdog@f0d0
959 00:16:09.518326 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 00:16:09.530761 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 00:16:09.535724 ** Bad device specification mmc 0 **
962 00:16:09.546048 Card did not respond to voltage select! : -110
963 00:16:09.553732 ** Bad device specification mmc 0 **
964 00:16:09.554286 Couldn't find partition mmc 0
965 00:16:09.562053 Card did not respond to voltage select! : -110
966 00:16:09.567622 ** Bad device specification mmc 0 **
967 00:16:09.568139 Couldn't find partition mmc 0
968 00:16:09.572708 Error: could not access storage.
969 00:16:09.915019 Net: eth0: ethernet@ff3f0000
970 00:16:09.915631 starting USB...
971 00:16:10.166895 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 00:16:10.167363 Starting the controller
973 00:16:10.173874 USB XHCI 1.10
974 00:16:11.727699 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 00:16:11.736014 scanning usb for storage devices... 0 Storage Device(s) found
977 00:16:11.787161 Hit any key to stop autoboot: 1
978 00:16:11.788012 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 00:16:11.788387 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 00:16:11.788649 Setting prompt string to ['=>']
981 00:16:11.788910 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 00:16:11.793393 0
983 00:16:11.794034 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 00:16:11.794334 Sending with 10 millisecond of delay
986 00:16:12.938998 => setenv autoload no
987 00:16:12.950733 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 00:16:12.955707 setenv autoload no
989 00:16:12.956478 Sending with 10 millisecond of delay
991 00:16:14.756960 => setenv initrd_high 0xffffffff
992 00:16:14.767577 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 00:16:14.768242 setenv initrd_high 0xffffffff
994 00:16:14.768724 Sending with 10 millisecond of delay
996 00:16:16.384923 => setenv fdt_high 0xffffffff
997 00:16:16.395745 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 00:16:16.396675 setenv fdt_high 0xffffffff
999 00:16:16.397386 Sending with 10 millisecond of delay
1001 00:16:16.689208 => dhcp
1002 00:16:16.700022 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 00:16:16.700887 dhcp
1004 00:16:16.701327 Speed: 1000, full duplex
1005 00:16:16.701736 BOOTP broadcast 1
1006 00:16:16.710525 DHCP client bound to address 192.168.6.27 (10 ms)
1007 00:16:16.711263 Sending with 10 millisecond of delay
1009 00:16:18.390073 => setenv serverip 192.168.6.2
1010 00:16:18.400909 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 00:16:18.401910 setenv serverip 192.168.6.2
1012 00:16:18.402610 Sending with 10 millisecond of delay
1014 00:16:22.132830 => tftpboot 0x01080000 949379/tftp-deploy-rr0e3jc4/kernel/uImage
1015 00:16:22.143616 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 00:16:22.144487 tftpboot 0x01080000 949379/tftp-deploy-rr0e3jc4/kernel/uImage
1017 00:16:22.144934 Speed: 1000, full duplex
1018 00:16:22.145344 Using ethernet@ff3f0000 device
1019 00:16:22.146558 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 00:16:22.152052 Filename '949379/tftp-deploy-rr0e3jc4/kernel/uImage'.
1021 00:16:22.156187 Load address: 0x1080000
1022 00:16:24.459114 Loading: *################################################## 36.1 MiB
1023 00:16:24.459733 15.7 MiB/s
1024 00:16:24.460191 done
1025 00:16:24.463761 Bytes transferred = 37880384 (2420240 hex)
1026 00:16:24.464496 Sending with 10 millisecond of delay
1028 00:16:29.151831 => tftpboot 0x08000000 949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
1029 00:16:29.162646 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1030 00:16:29.163479 tftpboot 0x08000000 949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot
1031 00:16:29.163924 Speed: 1000, full duplex
1032 00:16:29.164377 Using ethernet@ff3f0000 device
1033 00:16:29.166005 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 00:16:29.177367 Filename '949379/tftp-deploy-rr0e3jc4/ramdisk/ramdisk.cpio.gz.uboot'.
1035 00:16:29.177853 Load address: 0x8000000
1036 00:16:35.687071 Loading: *######T ########################################### UDP wrong checksum 00000005 0000246d
1037 00:16:40.687665 T UDP wrong checksum 00000005 0000246d
1038 00:16:50.690901 T T UDP wrong checksum 00000005 0000246d
1039 00:16:50.820208 UDP wrong checksum 000000ff 000021f6
1040 00:16:50.831557 UDP wrong checksum 000000ff 0000b6e8
1041 00:17:00.833120 T T UDP wrong checksum 000000ff 00001d30
1042 00:17:00.872082 UDP wrong checksum 000000ff 0000b722
1043 00:17:10.694895 T T UDP wrong checksum 00000005 0000246d
1044 00:17:19.200426 T UDP wrong checksum 000000ff 00004295
1045 00:17:19.272883 UDP wrong checksum 000000ff 0000dd87
1046 00:17:25.698989 T
1047 00:17:25.699397 Retry count exceeded; starting again
1049 00:17:25.700345 end: 2.4.3 bootloader-commands (duration 00:01:14) [common]
1052 00:17:25.701351 end: 2.4 uboot-commands (duration 00:01:46) [common]
1054 00:17:25.702103 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1056 00:17:25.702679 end: 2 uboot-action (duration 00:01:46) [common]
1058 00:17:25.703535 Cleaning after the job
1059 00:17:25.703878 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/ramdisk
1060 00:17:25.704724 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/kernel
1061 00:17:25.726615 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/dtb
1062 00:17:25.727668 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/nfsrootfs
1063 00:17:25.905292 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949379/tftp-deploy-rr0e3jc4/modules
1064 00:17:25.926679 start: 4.1 power-off (timeout 00:00:30) [common]
1065 00:17:25.927345 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1066 00:17:25.962111 >> OK - accepted request
1067 00:17:25.964334 Returned 0 in 0 seconds
1068 00:17:26.065106 end: 4.1 power-off (duration 00:00:00) [common]
1070 00:17:26.066130 start: 4.2 read-feedback (timeout 00:10:00) [common]
1071 00:17:26.066788 Listened to connection for namespace 'common' for up to 1s
1072 00:17:27.067720 Finalising connection for namespace 'common'
1073 00:17:27.068201 Disconnecting from shell: Finalise
1074 00:17:27.068491 =>
1075 00:17:27.169134 end: 4.2 read-feedback (duration 00:00:01) [common]
1076 00:17:27.169518 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949379
1077 00:17:30.442401 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949379
1078 00:17:30.443138 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.