Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:39:23.869020 lava-dispatcher, installed at version: 2024.01
2 01:39:23.869859 start: 0 validate
3 01:39:23.870361 Start time: 2024-11-07 01:39:23.870328+00:00 (UTC)
4 01:39:23.870935 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:39:23.871490 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:39:23.921239 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:39:23.921861 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 01:39:23.956720 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:39:23.957362 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:39:23.990729 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:39:23.991244 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:39:24.028140 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:39:24.028669 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 01:39:24.063420 validate duration: 0.19
16 01:39:24.064331 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:39:24.064686 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:39:24.064997 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:39:24.065619 Not decompressing ramdisk as can be used compressed.
20 01:39:24.066171 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 01:39:24.066478 saving as /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/ramdisk/initrd.cpio.gz
22 01:39:24.066771 total size: 5628140 (5 MB)
23 01:39:24.099850 progress 0 % (0 MB)
24 01:39:24.104524 progress 5 % (0 MB)
25 01:39:24.108869 progress 10 % (0 MB)
26 01:39:24.113234 progress 15 % (0 MB)
27 01:39:24.117677 progress 20 % (1 MB)
28 01:39:24.121628 progress 25 % (1 MB)
29 01:39:24.126078 progress 30 % (1 MB)
30 01:39:24.130620 progress 35 % (1 MB)
31 01:39:24.134652 progress 40 % (2 MB)
32 01:39:24.138989 progress 45 % (2 MB)
33 01:39:24.143227 progress 50 % (2 MB)
34 01:39:24.147944 progress 55 % (2 MB)
35 01:39:24.152800 progress 60 % (3 MB)
36 01:39:24.157036 progress 65 % (3 MB)
37 01:39:24.161576 progress 70 % (3 MB)
38 01:39:24.165703 progress 75 % (4 MB)
39 01:39:24.170339 progress 80 % (4 MB)
40 01:39:24.174621 progress 85 % (4 MB)
41 01:39:24.179099 progress 90 % (4 MB)
42 01:39:24.183521 progress 95 % (5 MB)
43 01:39:24.187031 progress 100 % (5 MB)
44 01:39:24.187739 5 MB downloaded in 0.12 s (44.38 MB/s)
45 01:39:24.188362 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:39:24.189336 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:39:24.189671 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:39:24.189959 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:39:24.190454 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/kernel/Image
51 01:39:24.190747 saving as /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/kernel/Image
52 01:39:24.190970 total size: 37880320 (36 MB)
53 01:39:24.191190 No compression specified
54 01:39:24.223399 progress 0 % (0 MB)
55 01:39:24.249850 progress 5 % (1 MB)
56 01:39:24.276787 progress 10 % (3 MB)
57 01:39:24.305042 progress 15 % (5 MB)
58 01:39:24.331689 progress 20 % (7 MB)
59 01:39:24.361521 progress 25 % (9 MB)
60 01:39:24.387727 progress 30 % (10 MB)
61 01:39:24.413503 progress 35 % (12 MB)
62 01:39:24.440457 progress 40 % (14 MB)
63 01:39:24.466168 progress 45 % (16 MB)
64 01:39:24.491325 progress 50 % (18 MB)
65 01:39:24.516027 progress 55 % (19 MB)
66 01:39:24.541325 progress 60 % (21 MB)
67 01:39:24.566929 progress 65 % (23 MB)
68 01:39:24.593226 progress 70 % (25 MB)
69 01:39:24.619227 progress 75 % (27 MB)
70 01:39:24.645065 progress 80 % (28 MB)
71 01:39:24.669930 progress 85 % (30 MB)
72 01:39:24.694563 progress 90 % (32 MB)
73 01:39:24.720066 progress 95 % (34 MB)
74 01:39:24.745390 progress 100 % (36 MB)
75 01:39:24.745973 36 MB downloaded in 0.55 s (65.09 MB/s)
76 01:39:24.746475 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:39:24.747368 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:39:24.747686 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:39:24.748088 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:39:24.748577 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:39:24.748878 saving as /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:39:24.749133 total size: 53209 (0 MB)
84 01:39:24.749363 No compression specified
85 01:39:24.790357 progress 61 % (0 MB)
86 01:39:24.791214 progress 100 % (0 MB)
87 01:39:24.791753 0 MB downloaded in 0.04 s (1.19 MB/s)
88 01:39:24.792269 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:39:24.793087 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:39:24.793348 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:39:24.793612 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:39:24.794072 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 01:39:24.794312 saving as /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/nfsrootfs/full.rootfs.tar
95 01:39:24.794515 total size: 474398908 (452 MB)
96 01:39:24.794725 Using unxz to decompress xz
97 01:39:24.830941 progress 0 % (0 MB)
98 01:39:25.968951 progress 5 % (22 MB)
99 01:39:27.456391 progress 10 % (45 MB)
100 01:39:27.919713 progress 15 % (67 MB)
101 01:39:28.743257 progress 20 % (90 MB)
102 01:39:29.263421 progress 25 % (113 MB)
103 01:39:29.630235 progress 30 % (135 MB)
104 01:39:30.270821 progress 35 % (158 MB)
105 01:39:31.236410 progress 40 % (181 MB)
106 01:39:32.011521 progress 45 % (203 MB)
107 01:39:32.599731 progress 50 % (226 MB)
108 01:39:33.298904 progress 55 % (248 MB)
109 01:39:34.505312 progress 60 % (271 MB)
110 01:39:35.927201 progress 65 % (294 MB)
111 01:39:37.593813 progress 70 % (316 MB)
112 01:39:40.929863 progress 75 % (339 MB)
113 01:39:43.599028 progress 80 % (361 MB)
114 01:39:46.786561 progress 85 % (384 MB)
115 01:39:50.248574 progress 90 % (407 MB)
116 01:39:53.449961 progress 95 % (429 MB)
117 01:39:56.651695 progress 100 % (452 MB)
118 01:39:56.665654 452 MB downloaded in 31.87 s (14.20 MB/s)
119 01:39:56.666597 end: 1.4.1 http-download (duration 00:00:32) [common]
121 01:39:56.668408 end: 1.4 download-retry (duration 00:00:32) [common]
122 01:39:56.668980 start: 1.5 download-retry (timeout 00:09:27) [common]
123 01:39:56.669539 start: 1.5.1 http-download (timeout 00:09:27) [common]
124 01:39:56.670396 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/modules.tar.xz
125 01:39:56.670891 saving as /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/modules/modules.tar
126 01:39:56.671333 total size: 11768476 (11 MB)
127 01:39:56.671788 Using unxz to decompress xz
128 01:39:56.718808 progress 0 % (0 MB)
129 01:39:56.786366 progress 5 % (0 MB)
130 01:39:56.862869 progress 10 % (1 MB)
131 01:39:56.957885 progress 15 % (1 MB)
132 01:39:57.053760 progress 20 % (2 MB)
133 01:39:57.132895 progress 25 % (2 MB)
134 01:39:57.210053 progress 30 % (3 MB)
135 01:39:57.290935 progress 35 % (3 MB)
136 01:39:57.372720 progress 40 % (4 MB)
137 01:39:57.449846 progress 45 % (5 MB)
138 01:39:57.535333 progress 50 % (5 MB)
139 01:39:57.617814 progress 55 % (6 MB)
140 01:39:57.703074 progress 60 % (6 MB)
141 01:39:57.784708 progress 65 % (7 MB)
142 01:39:57.866252 progress 70 % (7 MB)
143 01:39:57.949812 progress 75 % (8 MB)
144 01:39:58.033321 progress 80 % (9 MB)
145 01:39:58.113926 progress 85 % (9 MB)
146 01:39:58.197239 progress 90 % (10 MB)
147 01:39:58.276050 progress 95 % (10 MB)
148 01:39:58.353308 progress 100 % (11 MB)
149 01:39:58.363811 11 MB downloaded in 1.69 s (6.63 MB/s)
150 01:39:58.364569 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:39:58.365557 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:39:58.365887 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 01:39:58.366212 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 01:40:13.793549 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949414/extract-nfsrootfs-e2y0326u
156 01:40:13.794164 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 01:40:13.794449 start: 1.6.2 lava-overlay (timeout 00:09:10) [common]
158 01:40:13.795163 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t
159 01:40:13.795621 makedir: /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin
160 01:40:13.795948 makedir: /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/tests
161 01:40:13.796303 makedir: /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/results
162 01:40:13.796635 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-add-keys
163 01:40:13.797174 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-add-sources
164 01:40:13.797700 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-background-process-start
165 01:40:13.798236 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-background-process-stop
166 01:40:13.798795 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-common-functions
167 01:40:13.799308 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-echo-ipv4
168 01:40:13.799800 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-install-packages
169 01:40:13.800337 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-installed-packages
170 01:40:13.800825 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-os-build
171 01:40:13.801303 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-probe-channel
172 01:40:13.801783 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-probe-ip
173 01:40:13.802255 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-target-ip
174 01:40:13.802762 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-target-mac
175 01:40:13.803355 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-target-storage
176 01:40:13.803910 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-case
177 01:40:13.804516 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-event
178 01:40:13.805076 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-feedback
179 01:40:13.805622 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-raise
180 01:40:13.806151 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-reference
181 01:40:13.806670 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-runner
182 01:40:13.807198 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-set
183 01:40:13.807704 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-test-shell
184 01:40:13.808312 Updating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-install-packages (oe)
185 01:40:13.808895 Updating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/bin/lava-installed-packages (oe)
186 01:40:13.809395 Creating /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/environment
187 01:40:13.809805 LAVA metadata
188 01:40:13.810075 - LAVA_JOB_ID=949414
189 01:40:13.810290 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:40:13.810657 start: 1.6.2.1 ssh-authorize (timeout 00:09:10) [common]
191 01:40:13.811684 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:40:13.812039 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:10) [common]
193 01:40:13.812264 skipped lava-vland-overlay
194 01:40:13.812512 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:40:13.812772 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:10) [common]
196 01:40:13.812997 skipped lava-multinode-overlay
197 01:40:13.813263 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:40:13.813532 start: 1.6.2.4 test-definition (timeout 00:09:10) [common]
199 01:40:13.813794 Loading test definitions
200 01:40:13.814081 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:10) [common]
201 01:40:13.814305 Using /lava-949414 at stage 0
202 01:40:13.815498 uuid=949414_1.6.2.4.1 testdef=None
203 01:40:13.815816 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:40:13.816141 start: 1.6.2.4.2 test-overlay (timeout 00:09:10) [common]
205 01:40:13.818045 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:40:13.818878 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:10) [common]
208 01:40:13.821197 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:40:13.822066 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:10) [common]
211 01:40:13.824270 runner path: /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 949414_1.6.2.4.1
212 01:40:13.824891 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:40:13.825680 Creating lava-test-runner.conf files
215 01:40:13.825891 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949414/lava-overlay-alw5rc_t/lava-949414/0 for stage 0
216 01:40:13.826249 - 0_v4l2-decoder-conformance-h265
217 01:40:13.826611 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:40:13.826909 start: 1.6.2.5 compress-overlay (timeout 00:09:10) [common]
219 01:40:13.850248 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:40:13.850613 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:10) [common]
221 01:40:13.850888 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:40:13.851171 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:40:13.851442 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:10) [common]
224 01:40:14.468107 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:40:14.468584 start: 1.6.4 extract-modules (timeout 00:09:10) [common]
226 01:40:14.468836 extracting modules file /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949414/extract-nfsrootfs-e2y0326u
227 01:40:15.837228 extracting modules file /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk
228 01:40:17.249800 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:40:17.250287 start: 1.6.5 apply-overlay-tftp (timeout 00:09:07) [common]
230 01:40:17.250569 [common] Applying overlay to NFS
231 01:40:17.250787 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949414/compress-overlay-gnroelob/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949414/extract-nfsrootfs-e2y0326u
232 01:40:17.280168 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:40:17.280603 start: 1.6.6 prepare-kernel (timeout 00:09:07) [common]
234 01:40:17.280880 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:07) [common]
235 01:40:17.281111 Converting downloaded kernel to a uImage
236 01:40:17.281416 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/kernel/Image /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/kernel/uImage
237 01:40:17.748106 output: Image Name:
238 01:40:17.748539 output: Created: Thu Nov 7 01:40:17 2024
239 01:40:17.748783 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:40:17.749015 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
241 01:40:17.749239 output: Load Address: 01080000
242 01:40:17.749458 output: Entry Point: 01080000
243 01:40:17.749678 output:
244 01:40:17.750040 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 01:40:17.750347 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 01:40:17.750653 start: 1.6.7 configure-preseed-file (timeout 00:09:06) [common]
247 01:40:17.750943 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:40:17.751238 start: 1.6.8 compress-ramdisk (timeout 00:09:06) [common]
249 01:40:17.751522 Building ramdisk /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk
250 01:40:20.111732 >> 173443 blocks
251 01:40:27.773535 Adding RAMdisk u-boot header.
252 01:40:27.773960 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk.cpio.gz.uboot
253 01:40:28.086251 output: Image Name:
254 01:40:28.086678 output: Created: Thu Nov 7 01:40:27 2024
255 01:40:28.086893 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:40:28.087101 output: Data Size: 24150495 Bytes = 23584.47 KiB = 23.03 MiB
257 01:40:28.087302 output: Load Address: 00000000
258 01:40:28.087503 output: Entry Point: 00000000
259 01:40:28.087702 output:
260 01:40:28.088469 rename /var/lib/lava/dispatcher/tmp/949414/extract-overlay-ramdisk-m46h3g0y/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
261 01:40:28.089195 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 01:40:28.089740 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 01:40:28.090265 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:56) [common]
264 01:40:28.090719 No LXC device requested
265 01:40:28.091221 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:40:28.091726 start: 1.8 deploy-device-env (timeout 00:08:56) [common]
267 01:40:28.092263 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:40:28.092695 Checking files for TFTP limit of 4294967296 bytes.
269 01:40:28.095521 end: 1 tftp-deploy (duration 00:01:04) [common]
270 01:40:28.096171 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:40:28.096701 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:40:28.097198 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:40:28.097701 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:40:28.098227 Using kernel file from prepare-kernel: 949414/tftp-deploy-rbl03s21/kernel/uImage
275 01:40:28.098851 substitutions:
276 01:40:28.099254 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:40:28.099651 - {DTB_ADDR}: 0x01070000
278 01:40:28.100081 - {DTB}: 949414/tftp-deploy-rbl03s21/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:40:28.100483 - {INITRD}: 949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
280 01:40:28.100876 - {KERNEL_ADDR}: 0x01080000
281 01:40:28.101267 - {KERNEL}: 949414/tftp-deploy-rbl03s21/kernel/uImage
282 01:40:28.101660 - {LAVA_MAC}: None
283 01:40:28.102089 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949414/extract-nfsrootfs-e2y0326u
284 01:40:28.102488 - {NFS_SERVER_IP}: 192.168.6.2
285 01:40:28.102877 - {PRESEED_CONFIG}: None
286 01:40:28.103266 - {PRESEED_LOCAL}: None
287 01:40:28.103656 - {RAMDISK_ADDR}: 0x08000000
288 01:40:28.104066 - {RAMDISK}: 949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
289 01:40:28.104460 - {ROOT_PART}: None
290 01:40:28.104849 - {ROOT}: None
291 01:40:28.105234 - {SERVER_IP}: 192.168.6.2
292 01:40:28.105618 - {TEE_ADDR}: 0x83000000
293 01:40:28.106003 - {TEE}: None
294 01:40:28.106389 Parsed boot commands:
295 01:40:28.106764 - setenv autoload no
296 01:40:28.107149 - setenv initrd_high 0xffffffff
297 01:40:28.107533 - setenv fdt_high 0xffffffff
298 01:40:28.107915 - dhcp
299 01:40:28.108330 - setenv serverip 192.168.6.2
300 01:40:28.108717 - tftpboot 0x01080000 949414/tftp-deploy-rbl03s21/kernel/uImage
301 01:40:28.109104 - tftpboot 0x08000000 949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
302 01:40:28.109491 - tftpboot 0x01070000 949414/tftp-deploy-rbl03s21/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:40:28.109877 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949414/extract-nfsrootfs-e2y0326u,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:40:28.110277 - bootm 0x01080000 0x08000000 0x01070000
305 01:40:28.110784 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:40:28.112333 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:40:28.112763 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:40:28.127791 Setting prompt string to ['lava-test: # ']
310 01:40:28.129317 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:40:28.129906 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:40:28.130453 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:40:28.130995 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:40:28.131854 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:40:28.165920 >> OK - accepted request
316 01:40:28.168092 Returned 0 in 0 seconds
317 01:40:28.269330 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:40:28.271077 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:40:28.271675 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:40:28.272274 Setting prompt string to ['Hit any key to stop autoboot']
322 01:40:28.272744 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:40:28.274429 Trying 192.168.56.21...
324 01:40:28.274980 Connected to conserv1.
325 01:40:28.275437 Escape character is '^]'.
326 01:40:28.275865
327 01:40:28.276330 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:40:28.276761
329 01:40:36.578776 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:40:36.579419 bl2_stage_init 0x01
331 01:40:36.579834 bl2_stage_init 0x81
332 01:40:36.580292 hw id: 0x0000 - pwm id 0x01
333 01:40:36.580696 bl2_stage_init 0xc1
334 01:40:36.581103 bl2_stage_init 0x02
335 01:40:36.581495
336 01:40:36.581890 L0:00000000
337 01:40:36.582281 L1:00000703
338 01:40:36.582676 L2:00008067
339 01:40:36.583060 L3:15000000
340 01:40:36.583443 S1:00000000
341 01:40:36.583836 B2:20282000
342 01:40:36.584253 B1:a0f83180
343 01:40:36.584640
344 01:40:36.585027 TE: 71126
345 01:40:36.585416
346 01:40:36.586164 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:40:36.586589
348 01:40:36.586982 Board ID = 1
349 01:40:36.587371 Set cpu clk to 24M
350 01:40:36.587754 Set clk81 to 24M
351 01:40:36.588175 Use GP1_pll as DSU clk.
352 01:40:36.588563 DSU clk: 1200 Mhz
353 01:40:36.588945 CPU clk: 1200 MHz
354 01:40:36.589326 Set clk81 to 166.6M
355 01:40:36.589709 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:40:36.590097 board id: 1
357 01:40:36.590477 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:40:36.590859 fw parse done
359 01:40:36.591324 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:40:36.629953 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:40:36.640801 PIEI prepare done
362 01:40:36.641329 fastboot data load
363 01:40:36.641739 fastboot data verify
364 01:40:36.646483 verify result: 266
365 01:40:36.652086 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:40:36.652531 LPDDR4 probe
367 01:40:36.652928 ddr clk to 1584MHz
368 01:40:36.660055 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:40:36.697394
370 01:40:36.697960 dmc_version 0001
371 01:40:36.704051 Check phy result
372 01:40:36.709928 INFO : End of CA training
373 01:40:36.710363 INFO : End of initialization
374 01:40:36.715437 INFO : Training has run successfully!
375 01:40:36.715866 Check phy result
376 01:40:36.720987 INFO : End of initialization
377 01:40:36.721421 INFO : End of read enable training
378 01:40:36.724361 INFO : End of fine write leveling
379 01:40:36.729869 INFO : End of Write leveling coarse delay
380 01:40:36.736095 INFO : Training has run successfully!
381 01:40:36.736701 Check phy result
382 01:40:36.737110 INFO : End of initialization
383 01:40:36.741476 INFO : End of read dq deskew training
384 01:40:36.744588 INFO : End of MPR read delay center optimization
385 01:40:36.750170 INFO : End of write delay center optimization
386 01:40:36.756425 INFO : End of read delay center optimization
387 01:40:36.757211 INFO : End of max read latency training
388 01:40:36.761414 INFO : Training has run successfully!
389 01:40:36.762001 1D training succeed
390 01:40:36.769949 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:40:36.817340 Check phy result
392 01:40:36.817984 INFO : End of initialization
393 01:40:36.839375 INFO : End of 2D read delay Voltage center optimization
394 01:40:36.858559 INFO : End of 2D read delay Voltage center optimization
395 01:40:36.910570 INFO : End of 2D write delay Voltage center optimization
396 01:40:36.959722 INFO : End of 2D write delay Voltage center optimization
397 01:40:36.965186 INFO : Training has run successfully!
398 01:40:36.965679
399 01:40:36.966094 channel==0
400 01:40:36.970788 RxClkDly_Margin_A0==78 ps 8
401 01:40:36.971240 TxDqDly_Margin_A0==98 ps 10
402 01:40:36.976305 RxClkDly_Margin_A1==88 ps 9
403 01:40:36.976741 TxDqDly_Margin_A1==98 ps 10
404 01:40:36.977142 TrainedVREFDQ_A0==74
405 01:40:36.981969 TrainedVREFDQ_A1==75
406 01:40:36.982423 VrefDac_Margin_A0==24
407 01:40:36.982822 DeviceVref_Margin_A0==40
408 01:40:36.987569 VrefDac_Margin_A1==23
409 01:40:36.988029 DeviceVref_Margin_A1==39
410 01:40:36.988428
411 01:40:36.988821
412 01:40:36.993075 channel==1
413 01:40:36.993499 RxClkDly_Margin_A0==78 ps 8
414 01:40:36.993893 TxDqDly_Margin_A0==98 ps 10
415 01:40:36.998769 RxClkDly_Margin_A1==88 ps 9
416 01:40:36.999191 TxDqDly_Margin_A1==88 ps 9
417 01:40:37.004366 TrainedVREFDQ_A0==78
418 01:40:37.004807 TrainedVREFDQ_A1==75
419 01:40:37.005206 VrefDac_Margin_A0==22
420 01:40:37.009907 DeviceVref_Margin_A0==36
421 01:40:37.010331 VrefDac_Margin_A1==22
422 01:40:37.015506 DeviceVref_Margin_A1==38
423 01:40:37.015930
424 01:40:37.016364 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:40:37.016760
426 01:40:37.049096 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
427 01:40:37.049754 2D training succeed
428 01:40:37.054692 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:40:37.060292 auto size-- 65535DDR cs0 size: 2048MB
430 01:40:37.060754 DDR cs1 size: 2048MB
431 01:40:37.065898 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:40:37.066345 cs0 DataBus test pass
433 01:40:37.071452 cs1 DataBus test pass
434 01:40:37.071884 cs0 AddrBus test pass
435 01:40:37.072330 cs1 AddrBus test pass
436 01:40:37.072723
437 01:40:37.077094 100bdlr_step_size ps== 478
438 01:40:37.077540 result report
439 01:40:37.082703 boot times 0Enable ddr reg access
440 01:40:37.088014 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:40:37.101848 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:40:37.757009 bl2z: ptr: 05129330, size: 00001e40
443 01:40:37.764551 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:40:37.765100 MVN_1=0x00000000
445 01:40:37.765504 MVN_2=0x00000000
446 01:40:37.775855 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:40:37.776443 OPS=0x04
448 01:40:37.776881 ring efuse init
449 01:40:37.781458 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:40:37.781967 [0.017319 Inits done]
451 01:40:37.782394 secure task start!
452 01:40:37.789148 high task start!
453 01:40:37.789673 low task start!
454 01:40:37.790121 run into bl31
455 01:40:37.797651 NOTICE: BL31: v1.3(release):4fc40b1
456 01:40:37.805668 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:40:37.806186 NOTICE: BL31: G12A normal boot!
458 01:40:37.820969 NOTICE: BL31: BL33 decompress pass
459 01:40:37.826712 ERROR: Error initializing runtime service opteed_fast
460 01:40:40.564157 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:40:40.564945 bl2_stage_init 0x01
462 01:40:40.565559 bl2_stage_init 0x81
463 01:40:40.569743 hw id: 0x0000 - pwm id 0x01
464 01:40:40.570382 bl2_stage_init 0xc1
465 01:40:40.575124 bl2_stage_init 0x02
466 01:40:40.575710
467 01:40:40.576230 L0:00000000
468 01:40:40.576678 L1:00000703
469 01:40:40.577147 L2:00008067
470 01:40:40.577604 L3:15000000
471 01:40:40.580674 S1:00000000
472 01:40:40.581199 B2:20282000
473 01:40:40.581681 B1:a0f83180
474 01:40:40.582143
475 01:40:40.582582 TE: 67773
476 01:40:40.583009
477 01:40:40.586808 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:40:40.587356
479 01:40:40.591956 Board ID = 1
480 01:40:40.592507 Set cpu clk to 24M
481 01:40:40.592943 Set clk81 to 24M
482 01:40:40.595314 Use GP1_pll as DSU clk.
483 01:40:40.595841 DSU clk: 1200 Mhz
484 01:40:40.600878 CPU clk: 1200 MHz
485 01:40:40.601179 Set clk81 to 166.6M
486 01:40:40.606384 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:40:40.606666 board id: 1
488 01:40:40.616039 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:40:40.626658 fw parse done
490 01:40:40.632677 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:40:40.675226 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:40:40.686102 PIEI prepare done
493 01:40:40.686591 fastboot data load
494 01:40:40.687002 fastboot data verify
495 01:40:40.691697 verify result: 266
496 01:40:40.697284 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:40:40.697755 LPDDR4 probe
498 01:40:40.698168 ddr clk to 1584MHz
499 01:40:40.705261 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 01:40:40.742564
501 01:40:40.743051 dmc_version 0001
502 01:40:40.749210 Check phy result
503 01:40:40.755207 INFO : End of CA training
504 01:40:40.755676 INFO : End of initialization
505 01:40:40.760740 INFO : Training has run successfully!
506 01:40:40.761222 Check phy result
507 01:40:40.766490 INFO : End of initialization
508 01:40:40.766998 INFO : End of read enable training
509 01:40:40.771939 INFO : End of fine write leveling
510 01:40:40.777504 INFO : End of Write leveling coarse delay
511 01:40:40.778006 INFO : Training has run successfully!
512 01:40:40.778442 Check phy result
513 01:40:40.783170 INFO : End of initialization
514 01:40:40.783653 INFO : End of read dq deskew training
515 01:40:40.788763 INFO : End of MPR read delay center optimization
516 01:40:40.794425 INFO : End of write delay center optimization
517 01:40:40.799938 INFO : End of read delay center optimization
518 01:40:40.800507 INFO : End of max read latency training
519 01:40:40.805539 INFO : Training has run successfully!
520 01:40:40.806085 1D training succeed
521 01:40:40.814734 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 01:40:40.862479 Check phy result
523 01:40:40.863005 INFO : End of initialization
524 01:40:40.884731 INFO : End of 2D read delay Voltage center optimization
525 01:40:40.903817 INFO : End of 2D read delay Voltage center optimization
526 01:40:40.955854 INFO : End of 2D write delay Voltage center optimization
527 01:40:41.004953 INFO : End of 2D write delay Voltage center optimization
528 01:40:41.010649 INFO : Training has run successfully!
529 01:40:41.011124
530 01:40:41.011545 channel==0
531 01:40:41.016251 RxClkDly_Margin_A0==88 ps 9
532 01:40:41.016706 TxDqDly_Margin_A0==98 ps 10
533 01:40:41.021766 RxClkDly_Margin_A1==88 ps 9
534 01:40:41.022317 TxDqDly_Margin_A1==88 ps 9
535 01:40:41.022750 TrainedVREFDQ_A0==74
536 01:40:41.027254 TrainedVREFDQ_A1==74
537 01:40:41.027810 VrefDac_Margin_A0==24
538 01:40:41.028295 DeviceVref_Margin_A0==40
539 01:40:41.032913 VrefDac_Margin_A1==23
540 01:40:41.033446 DeviceVref_Margin_A1==40
541 01:40:41.033867
542 01:40:41.034279
543 01:40:41.034681 channel==1
544 01:40:41.038498 RxClkDly_Margin_A0==88 ps 9
545 01:40:41.038958 TxDqDly_Margin_A0==98 ps 10
546 01:40:41.044072 RxClkDly_Margin_A1==78 ps 8
547 01:40:41.044525 TxDqDly_Margin_A1==88 ps 9
548 01:40:41.049640 TrainedVREFDQ_A0==78
549 01:40:41.050088 TrainedVREFDQ_A1==77
550 01:40:41.050496 VrefDac_Margin_A0==22
551 01:40:41.055267 DeviceVref_Margin_A0==36
552 01:40:41.055721 VrefDac_Margin_A1==22
553 01:40:41.060920 DeviceVref_Margin_A1==37
554 01:40:41.061381
555 01:40:41.061796 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 01:40:41.062201
557 01:40:41.094511 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
558 01:40:41.095026 2D training succeed
559 01:40:41.100181 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 01:40:41.106353 auto size-- 65535DDR cs0 size: 2048MB
561 01:40:41.106827 DDR cs1 size: 2048MB
562 01:40:41.111143 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 01:40:41.111583 cs0 DataBus test pass
564 01:40:41.116820 cs1 DataBus test pass
565 01:40:41.117282 cs0 AddrBus test pass
566 01:40:41.117696 cs1 AddrBus test pass
567 01:40:41.118102
568 01:40:41.122441 100bdlr_step_size ps== 478
569 01:40:41.122898 result report
570 01:40:41.128034 boot times 0Enable ddr reg access
571 01:40:41.133158 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 01:40:41.147021 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 01:40:41.802018 bl2z: ptr: 05129330, size: 00001e40
574 01:40:41.809525 0.0;M3 CHK:0;cm4_sp_mode 0
575 01:40:41.810017 MVN_1=0x00000000
576 01:40:41.810439 MVN_2=0x00000000
577 01:40:41.820941 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 01:40:41.821399 OPS=0x04
579 01:40:41.821819 ring efuse init
580 01:40:41.826559 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 01:40:41.827014 [0.017319 Inits done]
582 01:40:41.827426 secure task start!
583 01:40:41.834122 high task start!
584 01:40:41.834579 low task start!
585 01:40:41.834994 run into bl31
586 01:40:41.842732 NOTICE: BL31: v1.3(release):4fc40b1
587 01:40:41.850527 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 01:40:41.850985 NOTICE: BL31: G12A normal boot!
589 01:40:41.866129 NOTICE: BL31: BL33 decompress pass
590 01:40:41.871810 ERROR: Error initializing runtime service opteed_fast
591 01:40:43.117572 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 01:40:43.118207 bl2_stage_init 0x01
593 01:40:43.118644 bl2_stage_init 0x81
594 01:40:43.123022 hw id: 0x0000 - pwm id 0x01
595 01:40:43.123492 bl2_stage_init 0xc1
596 01:40:43.128610 bl2_stage_init 0x02
597 01:40:43.129115
598 01:40:43.129620 L0:00000000
599 01:40:43.130093 L1:00000703
600 01:40:43.130514 L2:00008067
601 01:40:43.131149 L3:15000000
602 01:40:43.134153 S1:00000000
603 01:40:43.134492 B2:20282000
604 01:40:43.134728 B1:a0f83180
605 01:40:43.134949
606 01:40:43.135163 TE: 69689
607 01:40:43.135387
608 01:40:43.139826 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 01:40:43.140189
610 01:40:43.145398 Board ID = 1
611 01:40:43.145738 Set cpu clk to 24M
612 01:40:43.145974 Set clk81 to 24M
613 01:40:43.151019 Use GP1_pll as DSU clk.
614 01:40:43.151509 DSU clk: 1200 Mhz
615 01:40:43.151896 CPU clk: 1200 MHz
616 01:40:43.156653 Set clk81 to 166.6M
617 01:40:43.162220 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 01:40:43.162615 board id: 1
619 01:40:43.169448 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 01:40:43.180301 fw parse done
621 01:40:43.186288 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 01:40:43.229459 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 01:40:43.240611 PIEI prepare done
624 01:40:43.241164 fastboot data load
625 01:40:43.241449 fastboot data verify
626 01:40:43.246098 verify result: 266
627 01:40:43.251686 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 01:40:43.252077 LPDDR4 probe
629 01:40:43.252333 ddr clk to 1584MHz
630 01:40:43.259704 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 01:40:43.297490
632 01:40:43.298073 dmc_version 0001
633 01:40:43.304462 Check phy result
634 01:40:43.310426 INFO : End of CA training
635 01:40:43.310771 INFO : End of initialization
636 01:40:43.316068 INFO : Training has run successfully!
637 01:40:43.316532 Check phy result
638 01:40:43.321689 INFO : End of initialization
639 01:40:43.322034 INFO : End of read enable training
640 01:40:43.327215 INFO : End of fine write leveling
641 01:40:43.332822 INFO : End of Write leveling coarse delay
642 01:40:43.333301 INFO : Training has run successfully!
643 01:40:43.333573 Check phy result
644 01:40:43.338433 INFO : End of initialization
645 01:40:43.338800 INFO : End of read dq deskew training
646 01:40:43.344019 INFO : End of MPR read delay center optimization
647 01:40:43.349670 INFO : End of write delay center optimization
648 01:40:43.355202 INFO : End of read delay center optimization
649 01:40:43.355528 INFO : End of max read latency training
650 01:40:43.360831 INFO : Training has run successfully!
651 01:40:43.361177 1D training succeed
652 01:40:43.370088 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 01:40:43.418389 Check phy result
654 01:40:43.418804 INFO : End of initialization
655 01:40:43.445713 INFO : End of 2D read delay Voltage center optimization
656 01:40:43.469838 INFO : End of 2D read delay Voltage center optimization
657 01:40:43.526427 INFO : End of 2D write delay Voltage center optimization
658 01:40:43.580480 INFO : End of 2D write delay Voltage center optimization
659 01:40:43.585965 INFO : Training has run successfully!
660 01:40:43.586353
661 01:40:43.586876 channel==0
662 01:40:43.591814 RxClkDly_Margin_A0==78 ps 8
663 01:40:43.592468 TxDqDly_Margin_A0==98 ps 10
664 01:40:43.597267 RxClkDly_Margin_A1==69 ps 7
665 01:40:43.597848 TxDqDly_Margin_A1==88 ps 9
666 01:40:43.598307 TrainedVREFDQ_A0==74
667 01:40:43.602783 TrainedVREFDQ_A1==75
668 01:40:43.603433 VrefDac_Margin_A0==23
669 01:40:43.603971 DeviceVref_Margin_A0==40
670 01:40:43.608479 VrefDac_Margin_A1==22
671 01:40:43.609106 DeviceVref_Margin_A1==39
672 01:40:43.609565
673 01:40:43.610012
674 01:40:43.610453 channel==1
675 01:40:43.614026 RxClkDly_Margin_A0==78 ps 8
676 01:40:43.614586 TxDqDly_Margin_A0==98 ps 10
677 01:40:43.619631 RxClkDly_Margin_A1==78 ps 8
678 01:40:43.620681 TxDqDly_Margin_A1==88 ps 9
679 01:40:43.625236 TrainedVREFDQ_A0==78
680 01:40:43.625795 TrainedVREFDQ_A1==77
681 01:40:43.626244 VrefDac_Margin_A0==22
682 01:40:43.630850 DeviceVref_Margin_A0==36
683 01:40:43.631442 VrefDac_Margin_A1==22
684 01:40:43.636496 DeviceVref_Margin_A1==37
685 01:40:43.637135
686 01:40:43.637587 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 01:40:43.638033
688 01:40:43.669989 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 01:40:43.670697 2D training succeed
690 01:40:43.675621 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 01:40:43.681197 auto size-- 65535DDR cs0 size: 2048MB
692 01:40:43.681735 DDR cs1 size: 2048MB
693 01:40:43.686810 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 01:40:43.687356 cs0 DataBus test pass
695 01:40:43.692431 cs1 DataBus test pass
696 01:40:43.693001 cs0 AddrBus test pass
697 01:40:43.693453 cs1 AddrBus test pass
698 01:40:43.693898
699 01:40:43.698045 100bdlr_step_size ps== 478
700 01:40:43.698636 result report
701 01:40:43.703676 boot times 0Enable ddr reg access
702 01:40:43.708821 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 01:40:43.722606 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 01:40:44.380960 bl2z: ptr: 05129330, size: 00001e40
705 01:40:44.389341 0.0;M3 CHK:0;cm4_sp_mode 0
706 01:40:44.389958 MVN_1=0x00000000
707 01:40:44.390250 MVN_2=0x00000000
708 01:40:44.400928 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 01:40:44.401629 OPS=0x04
710 01:40:44.401995 ring efuse init
711 01:40:44.406387 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 01:40:44.406987 [0.017354 Inits done]
713 01:40:44.407419 secure task start!
714 01:40:44.414168 high task start!
715 01:40:44.414625 low task start!
716 01:40:44.414888 run into bl31
717 01:40:44.422843 NOTICE: BL31: v1.3(release):4fc40b1
718 01:40:44.430515 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 01:40:44.431143 NOTICE: BL31: G12A normal boot!
720 01:40:44.446190 NOTICE: BL31: BL33 decompress pass
721 01:40:44.451888 ERROR: Error initializing runtime service opteed_fast
722 01:40:45.246028
723 01:40:45.246457
724 01:40:45.251410 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 01:40:45.251734
726 01:40:45.254927 Model: Libre Computer AML-S905D3-CC Solitude
727 01:40:45.401829 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 01:40:45.417197 DRAM: 2 GiB (effective 3.8 GiB)
729 01:40:45.518442 Core: 406 devices, 33 uclasses, devicetree: separate
730 01:40:45.523974 WDT: Not starting watchdog@f0d0
731 01:40:45.549117 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 01:40:45.561346 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 01:40:45.565356 ** Bad device specification mmc 0 **
734 01:40:45.576354 Card did not respond to voltage select! : -110
735 01:40:45.583079 ** Bad device specification mmc 0 **
736 01:40:45.583523 Couldn't find partition mmc 0
737 01:40:45.592293 Card did not respond to voltage select! : -110
738 01:40:45.598234 ** Bad device specification mmc 0 **
739 01:40:45.598679 Couldn't find partition mmc 0
740 01:40:45.602891 Error: could not access storage.
741 01:40:45.899411 Net: eth0: ethernet@ff3f0000
742 01:40:45.900104 starting USB...
743 01:40:46.144347 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 01:40:46.144929 Starting the controller
745 01:40:46.151221 USB XHCI 1.10
746 01:40:47.708097 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 01:40:47.716397 scanning usb for storage devices... 0 Storage Device(s) found
749 01:40:47.768764 Hit any key to stop autoboot: 1
750 01:40:47.770044 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 01:40:47.771067 start: 2.4.3 bootloader-commands (timeout 00:04:40) [common]
752 01:40:47.771855 Setting prompt string to ['=>']
753 01:40:47.772763 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:40)
754 01:40:47.782448 0
755 01:40:47.783835 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 01:40:47.885824 => setenv autoload no
758 01:40:47.886660 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
759 01:40:47.892542 setenv autoload no
761 01:40:47.994282 => setenv initrd_high 0xffffffff
762 01:40:47.995244 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
763 01:40:47.999957 setenv initrd_high 0xffffffff
765 01:40:48.101996 => setenv fdt_high 0xffffffff
766 01:40:48.102813 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
767 01:40:48.107607 setenv fdt_high 0xffffffff
769 01:40:48.209647 => dhcp
770 01:40:48.210418 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
771 01:40:48.215048 dhcp
772 01:40:49.220484 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 01:40:49.221170 Speed: 1000, full duplex
774 01:40:49.221649 BOOTP broadcast 1
775 01:40:49.228675 DHCP client bound to address 192.168.6.21 (8 ms)
777 01:40:49.330337 => setenv serverip 192.168.6.2
778 01:40:49.331371 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
779 01:40:49.336026 setenv serverip 192.168.6.2
781 01:40:49.437639 => tftpboot 0x01080000 949414/tftp-deploy-rbl03s21/kernel/uImage
782 01:40:49.438442 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
783 01:40:49.445283 tftpboot 0x01080000 949414/tftp-deploy-rbl03s21/kernel/uImage
784 01:40:49.445839 Speed: 1000, full duplex
785 01:40:49.446301 Using ethernet@ff3f0000 device
786 01:40:49.450762 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
787 01:40:49.456331 Filename '949414/tftp-deploy-rbl03s21/kernel/uImage'.
788 01:40:49.460202 Load address: 0x1080000
789 01:40:51.793047 Loading: *################################################## 36.1 MiB
790 01:40:51.793732 15.5 MiB/s
791 01:40:51.794218 done
792 01:40:51.797608 Bytes transferred = 37880384 (2420240 hex)
794 01:40:51.899310 => tftpboot 0x08000000 949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
795 01:40:51.900174 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
796 01:40:51.907201 tftpboot 0x08000000 949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot
797 01:40:51.907728 Speed: 1000, full duplex
798 01:40:51.908208 Using ethernet@ff3f0000 device
799 01:40:51.912530 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
800 01:40:51.922371 Filename '949414/tftp-deploy-rbl03s21/ramdisk/ramdisk.cpio.gz.uboot'.
801 01:40:51.922899 Load address: 0x8000000
802 01:40:53.437419 Loading: *################################################# UDP wrong checksum 00000005 0000ea66
803 01:40:58.439350 T UDP wrong checksum 00000005 0000ea66
804 01:41:08.442195 T T UDP wrong checksum 00000005 0000ea66
805 01:41:28.444433 T T T UDP wrong checksum 00000005 0000ea66
806 01:41:48.450030 T T T T
807 01:41:48.450463 Retry count exceeded; starting again
809 01:41:48.453182 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
812 01:41:48.455459 end: 2.4 uboot-commands (duration 00:01:20) [common]
814 01:41:48.457239 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
816 01:41:48.458522 end: 2 uboot-action (duration 00:01:20) [common]
818 01:41:48.460501 Cleaning after the job
819 01:41:48.461201 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/ramdisk
820 01:41:48.462849 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/kernel
821 01:41:48.506744 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/dtb
822 01:41:48.507834 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/nfsrootfs
823 01:41:48.870610 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949414/tftp-deploy-rbl03s21/modules
824 01:41:48.893070 start: 4.1 power-off (timeout 00:00:30) [common]
825 01:41:48.893736 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
826 01:41:48.931767 >> OK - accepted request
827 01:41:48.933885 Returned 0 in 0 seconds
828 01:41:49.034633 end: 4.1 power-off (duration 00:00:00) [common]
830 01:41:49.035610 start: 4.2 read-feedback (timeout 00:10:00) [common]
831 01:41:49.036285 Listened to connection for namespace 'common' for up to 1s
832 01:41:50.036525 Finalising connection for namespace 'common'
833 01:41:50.037017 Disconnecting from shell: Finalise
834 01:41:50.037308 =>
835 01:41:50.138086 end: 4.2 read-feedback (duration 00:00:01) [common]
836 01:41:50.138724 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949414
837 01:41:52.841396 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949414
838 01:41:52.842002 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.