Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 00:13:00.612684 lava-dispatcher, installed at version: 2024.01
2 00:13:00.613483 start: 0 validate
3 00:13:00.613950 Start time: 2024-11-07 00:13:00.613920+00:00 (UTC)
4 00:13:00.614499 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 00:13:00.615040 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 00:13:00.657153 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 00:13:00.657743 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 00:13:00.688925 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 00:13:00.689590 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 00:13:00.723670 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 00:13:00.724202 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 00:13:00.756348 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 00:13:00.757019 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 00:13:00.797994 validate duration: 0.18
16 00:13:00.799038 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 00:13:00.799454 start: 1.1 download-retry (timeout 00:10:00) [common]
18 00:13:00.799830 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 00:13:00.800639 Not decompressing ramdisk as can be used compressed.
20 00:13:00.801234 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 00:13:00.801580 saving as /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/ramdisk/initrd.cpio.gz
22 00:13:00.801932 total size: 5628140 (5 MB)
23 00:13:00.840238 progress 0 % (0 MB)
24 00:13:00.844525 progress 5 % (0 MB)
25 00:13:00.848977 progress 10 % (0 MB)
26 00:13:00.852832 progress 15 % (0 MB)
27 00:13:00.857109 progress 20 % (1 MB)
28 00:13:00.860788 progress 25 % (1 MB)
29 00:13:00.864887 progress 30 % (1 MB)
30 00:13:00.868962 progress 35 % (1 MB)
31 00:13:00.872649 progress 40 % (2 MB)
32 00:13:00.876799 progress 45 % (2 MB)
33 00:13:00.880409 progress 50 % (2 MB)
34 00:13:00.884487 progress 55 % (2 MB)
35 00:13:00.888524 progress 60 % (3 MB)
36 00:13:00.892134 progress 65 % (3 MB)
37 00:13:00.896188 progress 70 % (3 MB)
38 00:13:00.899756 progress 75 % (4 MB)
39 00:13:00.903819 progress 80 % (4 MB)
40 00:13:00.907662 progress 85 % (4 MB)
41 00:13:00.911712 progress 90 % (4 MB)
42 00:13:00.915539 progress 95 % (5 MB)
43 00:13:00.918836 progress 100 % (5 MB)
44 00:13:00.919484 5 MB downloaded in 0.12 s (45.67 MB/s)
45 00:13:00.920060 end: 1.1.1 http-download (duration 00:00:00) [common]
47 00:13:00.920946 end: 1.1 download-retry (duration 00:00:00) [common]
48 00:13:00.921237 start: 1.2 download-retry (timeout 00:10:00) [common]
49 00:13:00.921505 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 00:13:00.921966 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/kernel/Image
51 00:13:00.922210 saving as /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/kernel/Image
52 00:13:00.922419 total size: 37880320 (36 MB)
53 00:13:00.922630 No compression specified
54 00:13:00.957964 progress 0 % (0 MB)
55 00:13:00.981019 progress 5 % (1 MB)
56 00:13:01.004604 progress 10 % (3 MB)
57 00:13:01.028094 progress 15 % (5 MB)
58 00:13:01.051393 progress 20 % (7 MB)
59 00:13:01.075151 progress 25 % (9 MB)
60 00:13:01.098111 progress 30 % (10 MB)
61 00:13:01.121591 progress 35 % (12 MB)
62 00:13:01.144949 progress 40 % (14 MB)
63 00:13:01.168773 progress 45 % (16 MB)
64 00:13:01.192015 progress 50 % (18 MB)
65 00:13:01.214884 progress 55 % (19 MB)
66 00:13:01.238166 progress 60 % (21 MB)
67 00:13:01.261816 progress 65 % (23 MB)
68 00:13:01.285196 progress 70 % (25 MB)
69 00:13:01.308532 progress 75 % (27 MB)
70 00:13:01.331367 progress 80 % (28 MB)
71 00:13:01.354611 progress 85 % (30 MB)
72 00:13:01.378088 progress 90 % (32 MB)
73 00:13:01.401236 progress 95 % (34 MB)
74 00:13:01.423941 progress 100 % (36 MB)
75 00:13:01.424485 36 MB downloaded in 0.50 s (71.96 MB/s)
76 00:13:01.424989 end: 1.2.1 http-download (duration 00:00:01) [common]
78 00:13:01.425832 end: 1.2 download-retry (duration 00:00:01) [common]
79 00:13:01.426130 start: 1.3 download-retry (timeout 00:09:59) [common]
80 00:13:01.426414 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 00:13:01.426904 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 00:13:01.427191 saving as /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 00:13:01.427414 total size: 53209 (0 MB)
84 00:13:01.427632 No compression specified
85 00:13:01.462517 progress 61 % (0 MB)
86 00:13:01.463374 progress 100 % (0 MB)
87 00:13:01.463951 0 MB downloaded in 0.04 s (1.39 MB/s)
88 00:13:01.464471 end: 1.3.1 http-download (duration 00:00:00) [common]
90 00:13:01.465303 end: 1.3 download-retry (duration 00:00:00) [common]
91 00:13:01.465579 start: 1.4 download-retry (timeout 00:09:59) [common]
92 00:13:01.465854 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 00:13:01.466321 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 00:13:01.466573 saving as /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/nfsrootfs/full.rootfs.tar
95 00:13:01.466785 total size: 474398908 (452 MB)
96 00:13:01.467001 Using unxz to decompress xz
97 00:13:01.504763 progress 0 % (0 MB)
98 00:13:02.599906 progress 5 % (22 MB)
99 00:13:04.103089 progress 10 % (45 MB)
100 00:13:04.562937 progress 15 % (67 MB)
101 00:13:05.430949 progress 20 % (90 MB)
102 00:13:05.957910 progress 25 % (113 MB)
103 00:13:06.300857 progress 30 % (135 MB)
104 00:13:06.906311 progress 35 % (158 MB)
105 00:13:07.827087 progress 40 % (181 MB)
106 00:13:08.677468 progress 45 % (203 MB)
107 00:13:09.306227 progress 50 % (226 MB)
108 00:13:09.952730 progress 55 % (248 MB)
109 00:13:11.166694 progress 60 % (271 MB)
110 00:13:12.562214 progress 65 % (294 MB)
111 00:13:14.168611 progress 70 % (316 MB)
112 00:13:17.253132 progress 75 % (339 MB)
113 00:13:19.679973 progress 80 % (361 MB)
114 00:13:22.545294 progress 85 % (384 MB)
115 00:13:25.693630 progress 90 % (407 MB)
116 00:13:28.889312 progress 95 % (429 MB)
117 00:13:32.061179 progress 100 % (452 MB)
118 00:13:32.074000 452 MB downloaded in 30.61 s (14.78 MB/s)
119 00:13:32.074881 end: 1.4.1 http-download (duration 00:00:31) [common]
121 00:13:32.076512 end: 1.4 download-retry (duration 00:00:31) [common]
122 00:13:32.077026 start: 1.5 download-retry (timeout 00:09:29) [common]
123 00:13:32.077532 start: 1.5.1 http-download (timeout 00:09:29) [common]
124 00:13:32.078668 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/clang-16/modules.tar.xz
125 00:13:32.079145 saving as /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/modules/modules.tar
126 00:13:32.079548 total size: 11768476 (11 MB)
127 00:13:32.079959 Using unxz to decompress xz
128 00:13:32.122691 progress 0 % (0 MB)
129 00:13:32.190385 progress 5 % (0 MB)
130 00:13:32.265875 progress 10 % (1 MB)
131 00:13:32.362738 progress 15 % (1 MB)
132 00:13:32.459573 progress 20 % (2 MB)
133 00:13:32.538758 progress 25 % (2 MB)
134 00:13:32.616024 progress 30 % (3 MB)
135 00:13:32.695705 progress 35 % (3 MB)
136 00:13:32.775692 progress 40 % (4 MB)
137 00:13:32.851839 progress 45 % (5 MB)
138 00:13:32.937964 progress 50 % (5 MB)
139 00:13:33.021265 progress 55 % (6 MB)
140 00:13:33.107651 progress 60 % (6 MB)
141 00:13:33.189924 progress 65 % (7 MB)
142 00:13:33.272755 progress 70 % (7 MB)
143 00:13:33.357701 progress 75 % (8 MB)
144 00:13:33.446888 progress 80 % (9 MB)
145 00:13:33.531488 progress 85 % (9 MB)
146 00:13:33.617419 progress 90 % (10 MB)
147 00:13:33.698977 progress 95 % (10 MB)
148 00:13:33.778509 progress 100 % (11 MB)
149 00:13:33.789504 11 MB downloaded in 1.71 s (6.56 MB/s)
150 00:13:33.790395 end: 1.5.1 http-download (duration 00:00:02) [common]
152 00:13:33.792038 end: 1.5 download-retry (duration 00:00:02) [common]
153 00:13:33.792574 start: 1.6 prepare-tftp-overlay (timeout 00:09:27) [common]
154 00:13:33.793094 start: 1.6.1 extract-nfsrootfs (timeout 00:09:27) [common]
155 00:13:49.154545 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949362/extract-nfsrootfs-m6dikej0
156 00:13:49.155147 end: 1.6.1 extract-nfsrootfs (duration 00:00:15) [common]
157 00:13:49.155434 start: 1.6.2 lava-overlay (timeout 00:09:12) [common]
158 00:13:49.156239 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5
159 00:13:49.156719 makedir: /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin
160 00:13:49.157046 makedir: /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/tests
161 00:13:49.157354 makedir: /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/results
162 00:13:49.157682 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-add-keys
163 00:13:49.158211 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-add-sources
164 00:13:49.158740 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-background-process-start
165 00:13:49.159233 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-background-process-stop
166 00:13:49.159760 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-common-functions
167 00:13:49.160294 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-echo-ipv4
168 00:13:49.160776 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-install-packages
169 00:13:49.161254 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-installed-packages
170 00:13:49.161725 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-os-build
171 00:13:49.162187 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-probe-channel
172 00:13:49.162651 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-probe-ip
173 00:13:49.163118 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-target-ip
174 00:13:49.163605 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-target-mac
175 00:13:49.164126 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-target-storage
176 00:13:49.164617 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-case
177 00:13:49.165093 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-event
178 00:13:49.165634 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-feedback
179 00:13:49.166118 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-raise
180 00:13:49.166584 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-reference
181 00:13:49.167060 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-runner
182 00:13:49.167557 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-set
183 00:13:49.168083 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-test-shell
184 00:13:49.168577 Updating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-install-packages (oe)
185 00:13:49.169184 Updating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/bin/lava-installed-packages (oe)
186 00:13:49.169668 Creating /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/environment
187 00:13:49.170037 LAVA metadata
188 00:13:49.170295 - LAVA_JOB_ID=949362
189 00:13:49.170507 - LAVA_DISPATCHER_IP=192.168.6.2
190 00:13:49.170872 start: 1.6.2.1 ssh-authorize (timeout 00:09:12) [common]
191 00:13:49.171824 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 00:13:49.172169 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:12) [common]
193 00:13:49.172382 skipped lava-vland-overlay
194 00:13:49.172625 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 00:13:49.172877 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:12) [common]
196 00:13:49.173096 skipped lava-multinode-overlay
197 00:13:49.173337 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 00:13:49.173588 start: 1.6.2.4 test-definition (timeout 00:09:12) [common]
199 00:13:49.173837 Loading test definitions
200 00:13:49.174115 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:12) [common]
201 00:13:49.174335 Using /lava-949362 at stage 0
202 00:13:49.175496 uuid=949362_1.6.2.4.1 testdef=None
203 00:13:49.175805 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 00:13:49.176093 start: 1.6.2.4.2 test-overlay (timeout 00:09:12) [common]
205 00:13:49.177843 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 00:13:49.178632 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:12) [common]
208 00:13:49.180800 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 00:13:49.181632 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:12) [common]
211 00:13:49.183666 runner path: /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/0/tests/0_v4l2-decoder-conformance-vp9 test_uuid 949362_1.6.2.4.1
212 00:13:49.184255 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 00:13:49.185016 Creating lava-test-runner.conf files
215 00:13:49.185217 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949362/lava-overlay-5z96dfv5/lava-949362/0 for stage 0
216 00:13:49.185546 - 0_v4l2-decoder-conformance-vp9
217 00:13:49.185880 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 00:13:49.186149 start: 1.6.2.5 compress-overlay (timeout 00:09:12) [common]
219 00:13:49.207672 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 00:13:49.208103 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:12) [common]
221 00:13:49.208368 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 00:13:49.208633 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 00:13:49.208891 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:12) [common]
224 00:13:49.829275 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 00:13:49.829736 start: 1.6.4 extract-modules (timeout 00:09:11) [common]
226 00:13:49.830002 extracting modules file /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949362/extract-nfsrootfs-m6dikej0
227 00:13:51.201497 extracting modules file /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk
228 00:13:52.611192 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 00:13:52.611644 start: 1.6.5 apply-overlay-tftp (timeout 00:09:08) [common]
230 00:13:52.611920 [common] Applying overlay to NFS
231 00:13:52.612163 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949362/compress-overlay-rvgs9y_w/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949362/extract-nfsrootfs-m6dikej0
232 00:13:52.641521 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 00:13:52.641942 start: 1.6.6 prepare-kernel (timeout 00:09:08) [common]
234 00:13:52.642224 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:08) [common]
235 00:13:52.642455 Converting downloaded kernel to a uImage
236 00:13:52.642776 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/kernel/Image /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/kernel/uImage
237 00:13:53.028190 output: Image Name:
238 00:13:53.028578 output: Created: Thu Nov 7 00:13:52 2024
239 00:13:53.028787 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 00:13:53.028991 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
241 00:13:53.029192 output: Load Address: 01080000
242 00:13:53.029394 output: Entry Point: 01080000
243 00:13:53.029592 output:
244 00:13:53.029923 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 00:13:53.030191 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 00:13:53.030460 start: 1.6.7 configure-preseed-file (timeout 00:09:08) [common]
247 00:13:53.030713 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 00:13:53.030971 start: 1.6.8 compress-ramdisk (timeout 00:09:08) [common]
249 00:13:53.031235 Building ramdisk /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk
250 00:13:55.369930 >> 173443 blocks
251 00:14:03.052674 Adding RAMdisk u-boot header.
252 00:14:03.053412 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk.cpio.gz.uboot
253 00:14:03.296939 output: Image Name:
254 00:14:03.297366 output: Created: Thu Nov 7 00:14:03 2024
255 00:14:03.297798 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 00:14:03.298219 output: Data Size: 24149613 Bytes = 23583.61 KiB = 23.03 MiB
257 00:14:03.298625 output: Load Address: 00000000
258 00:14:03.299028 output: Entry Point: 00000000
259 00:14:03.299426 output:
260 00:14:03.300649 rename /var/lib/lava/dispatcher/tmp/949362/extract-overlay-ramdisk-f88q817s/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
261 00:14:03.301387 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 00:14:03.301943 end: 1.6 prepare-tftp-overlay (duration 00:00:30) [common]
263 00:14:03.302481 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:57) [common]
264 00:14:03.302947 No LXC device requested
265 00:14:03.303458 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 00:14:03.304003 start: 1.8 deploy-device-env (timeout 00:08:57) [common]
267 00:14:03.304529 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 00:14:03.304950 Checking files for TFTP limit of 4294967296 bytes.
269 00:14:03.307603 end: 1 tftp-deploy (duration 00:01:03) [common]
270 00:14:03.308216 start: 2 uboot-action (timeout 00:05:00) [common]
271 00:14:03.308759 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 00:14:03.309264 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 00:14:03.309767 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 00:14:03.310295 Using kernel file from prepare-kernel: 949362/tftp-deploy-mfis0yc3/kernel/uImage
275 00:14:03.310928 substitutions:
276 00:14:03.311340 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 00:14:03.311742 - {DTB_ADDR}: 0x01070000
278 00:14:03.312183 - {DTB}: 949362/tftp-deploy-mfis0yc3/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 00:14:03.312585 - {INITRD}: 949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
280 00:14:03.312984 - {KERNEL_ADDR}: 0x01080000
281 00:14:03.313374 - {KERNEL}: 949362/tftp-deploy-mfis0yc3/kernel/uImage
282 00:14:03.313765 - {LAVA_MAC}: None
283 00:14:03.314190 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949362/extract-nfsrootfs-m6dikej0
284 00:14:03.314589 - {NFS_SERVER_IP}: 192.168.6.2
285 00:14:03.314977 - {PRESEED_CONFIG}: None
286 00:14:03.315367 - {PRESEED_LOCAL}: None
287 00:14:03.316036 - {RAMDISK_ADDR}: 0x08000000
288 00:14:03.316450 - {RAMDISK}: 949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
289 00:14:03.316849 - {ROOT_PART}: None
290 00:14:03.317242 - {ROOT}: None
291 00:14:03.317630 - {SERVER_IP}: 192.168.6.2
292 00:14:03.318021 - {TEE_ADDR}: 0x83000000
293 00:14:03.318410 - {TEE}: None
294 00:14:03.318798 Parsed boot commands:
295 00:14:03.319179 - setenv autoload no
296 00:14:03.319567 - setenv initrd_high 0xffffffff
297 00:14:03.319950 - setenv fdt_high 0xffffffff
298 00:14:03.320373 - dhcp
299 00:14:03.320764 - setenv serverip 192.168.6.2
300 00:14:03.321149 - tftpboot 0x01080000 949362/tftp-deploy-mfis0yc3/kernel/uImage
301 00:14:03.321740 - tftpboot 0x08000000 949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
302 00:14:03.322148 - tftpboot 0x01070000 949362/tftp-deploy-mfis0yc3/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 00:14:03.322542 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949362/extract-nfsrootfs-m6dikej0,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 00:14:03.322949 - bootm 0x01080000 0x08000000 0x01070000
305 00:14:03.323463 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 00:14:03.324988 start: 2.3 connect-device (timeout 00:05:00) [common]
308 00:14:03.325416 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 00:14:03.340806 Setting prompt string to ['lava-test: # ']
310 00:14:03.342320 end: 2.3 connect-device (duration 00:00:00) [common]
311 00:14:03.342941 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 00:14:03.343550 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 00:14:03.344227 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 00:14:03.345390 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 00:14:03.385274 >> OK - accepted request
316 00:14:03.387817 Returned 0 in 0 seconds
317 00:14:03.489038 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 00:14:03.490720 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 00:14:03.491289 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 00:14:03.491800 Setting prompt string to ['Hit any key to stop autoboot']
322 00:14:03.492326 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 00:14:03.493889 Trying 192.168.56.21...
324 00:14:03.494356 Connected to conserv1.
325 00:14:03.494768 Escape character is '^]'.
326 00:14:03.495176
327 00:14:03.495592 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 00:14:03.496052
329 00:14:10.970084 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 00:14:10.970465 bl2_stage_init 0x01
331 00:14:10.970699 bl2_stage_init 0x81
332 00:14:10.975579 hw id: 0x0000 - pwm id 0x01
333 00:14:10.975856 bl2_stage_init 0xc1
334 00:14:10.976323 bl2_stage_init 0x02
335 00:14:10.976817
336 00:14:10.981218 L0:00000000
337 00:14:10.981715 L1:00000703
338 00:14:10.982160 L2:00008067
339 00:14:10.982595 L3:15000000
340 00:14:10.983038 S1:00000000
341 00:14:10.986825 B2:20282000
342 00:14:10.987305 B1:a0f83180
343 00:14:10.987743
344 00:14:10.988224 TE: 69293
345 00:14:10.988662
346 00:14:10.992515 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 00:14:10.992994
348 00:14:10.997955 Board ID = 1
349 00:14:10.998427 Set cpu clk to 24M
350 00:14:10.998865 Set clk81 to 24M
351 00:14:11.003528 Use GP1_pll as DSU clk.
352 00:14:11.004026 DSU clk: 1200 Mhz
353 00:14:11.004470 CPU clk: 1200 MHz
354 00:14:11.004898 Set clk81 to 166.6M
355 00:14:11.014732 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 00:14:11.015216 board id: 1
357 00:14:11.020221 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 00:14:11.031807 fw parse done
359 00:14:11.037806 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 00:14:11.080627 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 00:14:11.091378 PIEI prepare done
362 00:14:11.091849 fastboot data load
363 00:14:11.092327 fastboot data verify
364 00:14:11.096947 verify result: 266
365 00:14:11.102554 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 00:14:11.103027 LPDDR4 probe
367 00:14:11.103460 ddr clk to 1584MHz
368 00:14:11.110631 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 00:14:11.147788
370 00:14:11.148304 dmc_version 0001
371 00:14:11.154643 Check phy result
372 00:14:11.160407 INFO : End of CA training
373 00:14:11.160880 INFO : End of initialization
374 00:14:11.165976 INFO : Training has run successfully!
375 00:14:11.166447 Check phy result
376 00:14:11.171578 INFO : End of initialization
377 00:14:11.172076 INFO : End of read enable training
378 00:14:11.177181 INFO : End of fine write leveling
379 00:14:11.182819 INFO : End of Write leveling coarse delay
380 00:14:11.183283 INFO : Training has run successfully!
381 00:14:11.183715 Check phy result
382 00:14:11.188390 INFO : End of initialization
383 00:14:11.188865 INFO : End of read dq deskew training
384 00:14:11.193966 INFO : End of MPR read delay center optimization
385 00:14:11.199677 INFO : End of write delay center optimization
386 00:14:11.205208 INFO : End of read delay center optimization
387 00:14:11.205688 INFO : End of max read latency training
388 00:14:11.210790 INFO : Training has run successfully!
389 00:14:11.211257 1D training succeed
390 00:14:11.220021 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 00:14:11.267688 Check phy result
392 00:14:11.268232 INFO : End of initialization
393 00:14:11.289009 INFO : End of 2D read delay Voltage center optimization
394 00:14:11.309051 INFO : End of 2D read delay Voltage center optimization
395 00:14:11.361040 INFO : End of 2D write delay Voltage center optimization
396 00:14:11.410141 INFO : End of 2D write delay Voltage center optimization
397 00:14:11.415790 INFO : Training has run successfully!
398 00:14:11.416300
399 00:14:11.416749 channel==0
400 00:14:11.421416 RxClkDly_Margin_A0==78 ps 8
401 00:14:11.421886 TxDqDly_Margin_A0==88 ps 9
402 00:14:11.427030 RxClkDly_Margin_A1==69 ps 7
403 00:14:11.427496 TxDqDly_Margin_A1==98 ps 10
404 00:14:11.427938 TrainedVREFDQ_A0==74
405 00:14:11.432635 TrainedVREFDQ_A1==75
406 00:14:11.433104 VrefDac_Margin_A0==23
407 00:14:11.433541 DeviceVref_Margin_A0==40
408 00:14:11.438157 VrefDac_Margin_A1==22
409 00:14:11.438621 DeviceVref_Margin_A1==39
410 00:14:11.439053
411 00:14:11.439480
412 00:14:11.439910 channel==1
413 00:14:11.443854 RxClkDly_Margin_A0==78 ps 8
414 00:14:11.444353 TxDqDly_Margin_A0==98 ps 10
415 00:14:11.449409 RxClkDly_Margin_A1==78 ps 8
416 00:14:11.449869 TxDqDly_Margin_A1==88 ps 9
417 00:14:11.455092 TrainedVREFDQ_A0==78
418 00:14:11.455626 TrainedVREFDQ_A1==75
419 00:14:11.456101 VrefDac_Margin_A0==23
420 00:14:11.460644 DeviceVref_Margin_A0==36
421 00:14:11.461203 VrefDac_Margin_A1==20
422 00:14:11.466111 DeviceVref_Margin_A1==39
423 00:14:11.466426
424 00:14:11.466668 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 00:14:11.466891
426 00:14:11.501040 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000019 00000017 00000018 00000015 00000018 00000014 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 00:14:11.501415 2D training succeed
428 00:14:11.506669 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 00:14:11.512161 auto size-- 65535DDR cs0 size: 2048MB
430 00:14:11.512450 DDR cs1 size: 2048MB
431 00:14:11.517752 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 00:14:11.518032 cs0 DataBus test pass
433 00:14:11.518258 cs1 DataBus test pass
434 00:14:11.523326 cs0 AddrBus test pass
435 00:14:11.523609 cs1 AddrBus test pass
436 00:14:11.523835
437 00:14:11.529009 100bdlr_step_size ps== 478
438 00:14:11.529526 result report
439 00:14:11.529964 boot times 0Enable ddr reg access
440 00:14:11.538388 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 00:14:11.552293 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 00:14:12.207248 bl2z: ptr: 05129330, size: 00001e40
443 00:14:12.214631 0.0;M3 CHK:0;cm4_sp_mode 0
444 00:14:12.215157 MVN_1=0x00000000
445 00:14:12.215618 MVN_2=0x00000000
446 00:14:12.226177 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 00:14:12.226679 OPS=0x04
448 00:14:12.227140 ring efuse init
449 00:14:12.231734 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 00:14:12.232271 [0.017310 Inits done]
451 00:14:12.232726 secure task start!
452 00:14:12.239424 high task start!
453 00:14:12.239911 low task start!
454 00:14:12.240401 run into bl31
455 00:14:12.248090 NOTICE: BL31: v1.3(release):4fc40b1
456 00:14:12.255845 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 00:14:12.256397 NOTICE: BL31: G12A normal boot!
458 00:14:12.271418 NOTICE: BL31: BL33 decompress pass
459 00:14:12.277108 ERROR: Error initializing runtime service opteed_fast
460 00:14:15.019711 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 00:14:15.020396 bl2_stage_init 0x01
462 00:14:15.020869 bl2_stage_init 0x81
463 00:14:15.025165 hw id: 0x0000 - pwm id 0x01
464 00:14:15.025676 bl2_stage_init 0xc1
465 00:14:15.030746 bl2_stage_init 0x02
466 00:14:15.031308
467 00:14:15.031746 L0:00000000
468 00:14:15.032218 L1:00000703
469 00:14:15.032653 L2:00008067
470 00:14:15.033075 L3:15000000
471 00:14:15.036372 S1:00000000
472 00:14:15.036838 B2:20282000
473 00:14:15.037266 B1:a0f83180
474 00:14:15.037690
475 00:14:15.038114 TE: 69922
476 00:14:15.038537
477 00:14:15.042011 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 00:14:15.042473
479 00:14:15.047571 Board ID = 1
480 00:14:15.048063 Set cpu clk to 24M
481 00:14:15.048492 Set clk81 to 24M
482 00:14:15.053176 Use GP1_pll as DSU clk.
483 00:14:15.053638 DSU clk: 1200 Mhz
484 00:14:15.054068 CPU clk: 1200 MHz
485 00:14:15.058771 Set clk81 to 166.6M
486 00:14:15.064372 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 00:14:15.064835 board id: 1
488 00:14:15.070605 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 00:14:15.082280 fw parse done
490 00:14:15.087840 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 00:14:15.130833 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 00:14:15.141914 PIEI prepare done
493 00:14:15.142391 fastboot data load
494 00:14:15.142823 fastboot data verify
495 00:14:15.147378 verify result: 266
496 00:14:15.153036 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 00:14:15.153504 LPDDR4 probe
498 00:14:15.153935 ddr clk to 1584MHz
499 00:14:15.160949 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 00:14:15.198301
501 00:14:15.198780 dmc_version 0001
502 00:14:15.205007 Check phy result
503 00:14:15.210883 INFO : End of CA training
504 00:14:15.211346 INFO : End of initialization
505 00:14:15.216519 INFO : Training has run successfully!
506 00:14:15.217116 Check phy result
507 00:14:15.222159 INFO : End of initialization
508 00:14:15.222651 INFO : End of read enable training
509 00:14:15.227721 INFO : End of fine write leveling
510 00:14:15.233283 INFO : End of Write leveling coarse delay
511 00:14:15.233772 INFO : Training has run successfully!
512 00:14:15.234222 Check phy result
513 00:14:15.238898 INFO : End of initialization
514 00:14:15.239375 INFO : End of read dq deskew training
515 00:14:15.244505 INFO : End of MPR read delay center optimization
516 00:14:15.250157 INFO : End of write delay center optimization
517 00:14:15.255689 INFO : End of read delay center optimization
518 00:14:15.256216 INFO : End of max read latency training
519 00:14:15.261291 INFO : Training has run successfully!
520 00:14:15.261783 1D training succeed
521 00:14:15.270437 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 00:14:15.318063 Check phy result
523 00:14:15.318576 INFO : End of initialization
524 00:14:15.339588 INFO : End of 2D read delay Voltage center optimization
525 00:14:15.359575 INFO : End of 2D read delay Voltage center optimization
526 00:14:15.411516 INFO : End of 2D write delay Voltage center optimization
527 00:14:15.460643 INFO : End of 2D write delay Voltage center optimization
528 00:14:15.466158 INFO : Training has run successfully!
529 00:14:15.466633
530 00:14:15.467095 channel==0
531 00:14:15.471805 RxClkDly_Margin_A0==78 ps 8
532 00:14:15.472324 TxDqDly_Margin_A0==98 ps 10
533 00:14:15.477364 RxClkDly_Margin_A1==69 ps 7
534 00:14:15.477840 TxDqDly_Margin_A1==88 ps 9
535 00:14:15.478289 TrainedVREFDQ_A0==74
536 00:14:15.482969 TrainedVREFDQ_A1==74
537 00:14:15.483461 VrefDac_Margin_A0==23
538 00:14:15.483906 DeviceVref_Margin_A0==40
539 00:14:15.488636 VrefDac_Margin_A1==23
540 00:14:15.489113 DeviceVref_Margin_A1==40
541 00:14:15.489559
542 00:14:15.490003
543 00:14:15.490445 channel==1
544 00:14:15.494133 RxClkDly_Margin_A0==78 ps 8
545 00:14:15.494606 TxDqDly_Margin_A0==98 ps 10
546 00:14:15.499769 RxClkDly_Margin_A1==78 ps 8
547 00:14:15.500279 TxDqDly_Margin_A1==88 ps 9
548 00:14:15.505433 TrainedVREFDQ_A0==78
549 00:14:15.505930 TrainedVREFDQ_A1==75
550 00:14:15.506382 VrefDac_Margin_A0==22
551 00:14:15.511003 DeviceVref_Margin_A0==36
552 00:14:15.511472 VrefDac_Margin_A1==22
553 00:14:15.516572 DeviceVref_Margin_A1==39
554 00:14:15.517042
555 00:14:15.517491 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 00:14:15.517933
557 00:14:15.550332 soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
558 00:14:15.550922 2D training succeed
559 00:14:15.555835 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 00:14:15.561384 auto size-- 65535DDR cs0 size: 2048MB
561 00:14:15.561940 DDR cs1 size: 2048MB
562 00:14:15.567011 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 00:14:15.567547 cs0 DataBus test pass
564 00:14:15.572608 cs1 DataBus test pass
565 00:14:15.573144 cs0 AddrBus test pass
566 00:14:15.573612 cs1 AddrBus test pass
567 00:14:15.574071
568 00:14:15.578219 100bdlr_step_size ps== 478
569 00:14:15.578771 result report
570 00:14:15.583834 boot times 0Enable ddr reg access
571 00:14:15.588969 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 00:14:15.602778 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 00:14:16.257214 bl2z: ptr: 05129330, size: 00001e40
574 00:14:16.264325 0.0;M3 CHK:0;cm4_sp_mode 0
575 00:14:16.264898 MVN_1=0x00000000
576 00:14:16.265363 MVN_2=0x00000000
577 00:14:16.275696 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 00:14:16.276309 OPS=0x04
579 00:14:16.276782 ring efuse init
580 00:14:16.281352 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 00:14:16.281909 [0.017320 Inits done]
582 00:14:16.282368 secure task start!
583 00:14:16.289013 high task start!
584 00:14:16.289555 low task start!
585 00:14:16.290015 run into bl31
586 00:14:16.297628 NOTICE: BL31: v1.3(release):4fc40b1
587 00:14:16.305438 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 00:14:16.305984 NOTICE: BL31: G12A normal boot!
589 00:14:16.320935 NOTICE: BL31: BL33 decompress pass
590 00:14:16.326599 ERROR: Error initializing runtime service opteed_fast
591 00:14:17.720386 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 00:14:17.721058 bl2_stage_init 0x01
593 00:14:17.721535 bl2_stage_init 0x81
594 00:14:17.725910 hw id: 0x0000 - pwm id 0x01
595 00:14:17.726718 bl2_stage_init 0xc1
596 00:14:17.730885 bl2_stage_init 0x02
597 00:14:17.731360
598 00:14:17.731903 L0:00000000
599 00:14:17.732472 L1:00000703
600 00:14:17.733004 L2:00008067
601 00:14:17.736593 L3:15000000
602 00:14:17.736997 S1:00000000
603 00:14:17.737246 B2:20282000
604 00:14:17.737492 B1:a0f83180
605 00:14:17.737986
606 00:14:17.738501 TE: 70127
607 00:14:17.739026
608 00:14:17.742212 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 00:14:17.747877
610 00:14:17.748620 Board ID = 1
611 00:14:17.749264 Set cpu clk to 24M
612 00:14:17.749873 Set clk81 to 24M
613 00:14:17.751389 Use GP1_pll as DSU clk.
614 00:14:17.752077 DSU clk: 1200 Mhz
615 00:14:17.756943 CPU clk: 1200 MHz
616 00:14:17.757581 Set clk81 to 166.6M
617 00:14:17.762566 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 00:14:17.763150 board id: 1
619 00:14:17.772309 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 00:14:17.782662 fw parse done
621 00:14:17.788671 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 00:14:17.831487 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 00:14:17.842308 PIEI prepare done
624 00:14:17.842684 fastboot data load
625 00:14:17.842962 fastboot data verify
626 00:14:17.847846 verify result: 266
627 00:14:17.853468 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 00:14:17.853806 LPDDR4 probe
629 00:14:17.854079 ddr clk to 1584MHz
630 00:14:17.861519 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 00:14:17.898810
632 00:14:17.899232 dmc_version 0001
633 00:14:17.905437 Check phy result
634 00:14:17.911312 INFO : End of CA training
635 00:14:17.911691 INFO : End of initialization
636 00:14:17.916903 INFO : Training has run successfully!
637 00:14:17.917282 Check phy result
638 00:14:17.922417 INFO : End of initialization
639 00:14:17.922791 INFO : End of read enable training
640 00:14:17.928061 INFO : End of fine write leveling
641 00:14:17.933734 INFO : End of Write leveling coarse delay
642 00:14:17.934103 INFO : Training has run successfully!
643 00:14:17.934370 Check phy result
644 00:14:17.939325 INFO : End of initialization
645 00:14:17.939700 INFO : End of read dq deskew training
646 00:14:17.944925 INFO : End of MPR read delay center optimization
647 00:14:17.950539 INFO : End of write delay center optimization
648 00:14:17.956148 INFO : End of read delay center optimization
649 00:14:17.956486 INFO : End of max read latency training
650 00:14:17.961808 INFO : Training has run successfully!
651 00:14:17.962134 1D training succeed
652 00:14:17.970897 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 00:14:18.018957 Check phy result
654 00:14:18.019359 INFO : End of initialization
655 00:14:18.041009 INFO : End of 2D read delay Voltage center optimization
656 00:14:18.060173 INFO : End of 2D read delay Voltage center optimization
657 00:14:18.112065 INFO : End of 2D write delay Voltage center optimization
658 00:14:18.161259 INFO : End of 2D write delay Voltage center optimization
659 00:14:18.166662 INFO : Training has run successfully!
660 00:14:18.167190
661 00:14:18.167738 channel==0
662 00:14:18.172241 RxClkDly_Margin_A0==78 ps 8
663 00:14:18.172805 TxDqDly_Margin_A0==88 ps 9
664 00:14:18.175562 RxClkDly_Margin_A1==88 ps 9
665 00:14:18.176088 TxDqDly_Margin_A1==98 ps 10
666 00:14:18.181213 TrainedVREFDQ_A0==74
667 00:14:18.181694 TrainedVREFDQ_A1==75
668 00:14:18.182115 VrefDac_Margin_A0==24
669 00:14:18.186792 DeviceVref_Margin_A0==40
670 00:14:18.187296 VrefDac_Margin_A1==22
671 00:14:18.192386 DeviceVref_Margin_A1==39
672 00:14:18.192906
673 00:14:18.193330
674 00:14:18.193746 channel==1
675 00:14:18.194151 RxClkDly_Margin_A0==88 ps 9
676 00:14:18.197993 TxDqDly_Margin_A0==98 ps 10
677 00:14:18.198486 RxClkDly_Margin_A1==78 ps 8
678 00:14:18.203562 TxDqDly_Margin_A1==88 ps 9
679 00:14:18.204185 TrainedVREFDQ_A0==78
680 00:14:18.204704 TrainedVREFDQ_A1==75
681 00:14:18.209213 VrefDac_Margin_A0==23
682 00:14:18.209760 DeviceVref_Margin_A0==36
683 00:14:18.214794 VrefDac_Margin_A1==22
684 00:14:18.215309 DeviceVref_Margin_A1==39
685 00:14:18.215724
686 00:14:18.220316 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 00:14:18.220840
688 00:14:18.248299 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000017 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 00:14:18.253868 2D training succeed
690 00:14:18.259465 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 00:14:18.259964 auto size-- 65535DDR cs0 size: 2048MB
692 00:14:18.265104 DDR cs1 size: 2048MB
693 00:14:18.265601 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 00:14:18.270645 cs0 DataBus test pass
695 00:14:18.271217 cs1 DataBus test pass
696 00:14:18.271642 cs0 AddrBus test pass
697 00:14:18.276434 cs1 AddrBus test pass
698 00:14:18.276947
699 00:14:18.277367 100bdlr_step_size ps== 478
700 00:14:18.277780 result report
701 00:14:18.281943 boot times 0Enable ddr reg access
702 00:14:18.289595 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 00:14:18.303227 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 00:14:18.958232 bl2z: ptr: 05129330, size: 00001e40
705 00:14:18.964630 0.0;M3 CHK:0;cm4_sp_mode 0
706 00:14:18.965241 MVN_1=0x00000000
707 00:14:18.965675 MVN_2=0x00000000
708 00:14:18.976127 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 00:14:18.976739 OPS=0x04
710 00:14:18.977246 ring efuse init
711 00:14:18.981742 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 00:14:18.982487 [0.017310 Inits done]
713 00:14:18.982993 secure task start!
714 00:14:18.988960 high task start!
715 00:14:18.989383 low task start!
716 00:14:18.989685 run into bl31
717 00:14:18.997575 NOTICE: BL31: v1.3(release):4fc40b1
718 00:14:19.005414 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 00:14:19.006096 NOTICE: BL31: G12A normal boot!
720 00:14:19.020871 NOTICE: BL31: BL33 decompress pass
721 00:14:19.026512 ERROR: Error initializing runtime service opteed_fast
722 00:14:19.820637
723 00:14:19.821040
724 00:14:19.825970 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 00:14:19.826382
726 00:14:19.829491 Model: Libre Computer AML-S905D3-CC Solitude
727 00:14:19.976418 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 00:14:19.991738 DRAM: 2 GiB (effective 3.8 GiB)
729 00:14:20.092719 Core: 406 devices, 33 uclasses, devicetree: separate
730 00:14:20.099853 WDT: Not starting watchdog@f0d0
731 00:14:20.123722 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 00:14:20.135927 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 00:14:20.140172 ** Bad device specification mmc 0 **
734 00:14:20.150921 Card did not respond to voltage select! : -110
735 00:14:20.158689 ** Bad device specification mmc 0 **
736 00:14:20.159148 Couldn't find partition mmc 0
737 00:14:20.166963 Card did not respond to voltage select! : -110
738 00:14:20.172458 ** Bad device specification mmc 0 **
739 00:14:20.172918 Couldn't find partition mmc 0
740 00:14:20.177530 Error: could not access storage.
741 00:14:20.474911 Net: eth0: ethernet@ff3f0000
742 00:14:20.475544 starting USB...
743 00:14:20.718611 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 00:14:20.719308 Starting the controller
745 00:14:20.725062 USB XHCI 1.10
746 00:14:22.281393 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 00:14:22.289738 scanning usb for storage devices... 0 Storage Device(s) found
749 00:14:22.341494 Hit any key to stop autoboot: 1
750 00:14:22.342474 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 00:14:22.343129 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 00:14:22.343627 Setting prompt string to ['=>']
753 00:14:22.344201 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 00:14:22.355924 0
755 00:14:22.357030 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 00:14:22.458358 => setenv autoload no
758 00:14:22.459194 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 00:14:22.464153 setenv autoload no
761 00:14:22.565822 => setenv initrd_high 0xffffffff
762 00:14:22.566639 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 00:14:22.571177 setenv initrd_high 0xffffffff
765 00:14:22.672977 => setenv fdt_high 0xffffffff
766 00:14:22.673804 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 00:14:22.678364 setenv fdt_high 0xffffffff
769 00:14:22.780220 => dhcp
770 00:14:22.781293 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 00:14:22.785284 dhcp
772 00:14:23.741304 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 00:14:23.741974 Speed: 1000, full duplex
774 00:14:23.742449 BOOTP broadcast 1
775 00:14:23.990129 BOOTP broadcast 2
776 00:14:24.001294 DHCP client bound to address 192.168.6.21 (259 ms)
778 00:14:24.102951 => setenv serverip 192.168.6.2
779 00:14:24.103832 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 00:14:24.109071 setenv serverip 192.168.6.2
782 00:14:24.210652 => tftpboot 0x01080000 949362/tftp-deploy-mfis0yc3/kernel/uImage
783 00:14:24.211702 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 00:14:24.218452 tftpboot 0x01080000 949362/tftp-deploy-mfis0yc3/kernel/uImage
785 00:14:24.219028 Speed: 1000, full duplex
786 00:14:24.219491 Using ethernet@ff3f0000 device
787 00:14:24.223924 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 00:14:24.229402 Filename '949362/tftp-deploy-mfis0yc3/kernel/uImage'.
789 00:14:24.233263 Load address: 0x1080000
790 00:14:26.640582 Loading: *################################################## 36.1 MiB
791 00:14:26.641374 15 MiB/s
792 00:14:26.641908 done
793 00:14:26.644913 Bytes transferred = 37880384 (2420240 hex)
795 00:14:26.746866 => tftpboot 0x08000000 949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
796 00:14:26.747801 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
797 00:14:26.754617 tftpboot 0x08000000 949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot
798 00:14:26.755121 Speed: 1000, full duplex
799 00:14:26.755520 Using ethernet@ff3f0000 device
800 00:14:26.760097 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 00:14:26.769895 Filename '949362/tftp-deploy-mfis0yc3/ramdisk/ramdisk.cpio.gz.uboot'.
802 00:14:26.770459 Load address: 0x8000000
803 00:14:28.277285 Loading: *################################################# UDP wrong checksum 00000005 00004ede
804 00:14:33.278091 T UDP wrong checksum 00000005 00004ede
805 00:14:43.279880 T T UDP wrong checksum 00000005 00004ede
806 00:15:03.284456 T T T T UDP wrong checksum 00000005 00004ede
807 00:15:18.885546 T T T UDP wrong checksum 000000ff 000055fb
808 00:15:18.975704 UDP wrong checksum 000000ff 0000eeed
809 00:15:23.288674
810 00:15:23.289098 Retry count exceeded; starting again
812 00:15:23.289995 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
815 00:15:23.290994 end: 2.4 uboot-commands (duration 00:01:20) [common]
817 00:15:23.291733 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
819 00:15:23.292382 end: 2 uboot-action (duration 00:01:20) [common]
821 00:15:23.293366 Cleaning after the job
822 00:15:23.293702 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/ramdisk
823 00:15:23.295106 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/kernel
824 00:15:23.330463 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/dtb
825 00:15:23.331820 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/nfsrootfs
826 00:15:23.651260 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949362/tftp-deploy-mfis0yc3/modules
827 00:15:23.671739 start: 4.1 power-off (timeout 00:00:30) [common]
828 00:15:23.672439 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
829 00:15:23.719412 >> OK - accepted request
830 00:15:23.721651 Returned 0 in 0 seconds
831 00:15:23.822398 end: 4.1 power-off (duration 00:00:00) [common]
833 00:15:23.823390 start: 4.2 read-feedback (timeout 00:10:00) [common]
834 00:15:23.824088 Listened to connection for namespace 'common' for up to 1s
835 00:15:24.824968 Finalising connection for namespace 'common'
836 00:15:24.825453 Disconnecting from shell: Finalise
837 00:15:24.825716 =>
838 00:15:24.926461 end: 4.2 read-feedback (duration 00:00:01) [common]
839 00:15:24.927132 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949362
840 00:15:28.134843 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949362
841 00:15:28.135486 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.