Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:54:00.074387 lava-dispatcher, installed at version: 2024.01
2 23:54:00.075276 start: 0 validate
3 23:54:00.075776 Start time: 2024-11-06 23:54:00.075741+00:00 (UTC)
4 23:54:00.076405 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:54:00.076997 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:54:00.119114 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:54:00.119668 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:54:00.155043 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:54:00.155751 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:54:00.189984 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:54:00.190519 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:54:00.221224 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:54:00.221757 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:54:00.259654 validate duration: 0.18
16 23:54:00.260598 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:54:00.260947 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:54:00.261314 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:54:00.261996 Not decompressing ramdisk as can be used compressed.
20 23:54:00.262532 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 23:54:00.262832 saving as /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/ramdisk/initrd.cpio.gz
22 23:54:00.263165 total size: 5628169 (5 MB)
23 23:54:00.301718 progress 0 % (0 MB)
24 23:54:00.309713 progress 5 % (0 MB)
25 23:54:00.318146 progress 10 % (0 MB)
26 23:54:00.325989 progress 15 % (0 MB)
27 23:54:00.331646 progress 20 % (1 MB)
28 23:54:00.335658 progress 25 % (1 MB)
29 23:54:00.340205 progress 30 % (1 MB)
30 23:54:00.344706 progress 35 % (1 MB)
31 23:54:00.348765 progress 40 % (2 MB)
32 23:54:00.353236 progress 45 % (2 MB)
33 23:54:00.357211 progress 50 % (2 MB)
34 23:54:00.361462 progress 55 % (2 MB)
35 23:54:00.365804 progress 60 % (3 MB)
36 23:54:00.369611 progress 65 % (3 MB)
37 23:54:00.373906 progress 70 % (3 MB)
38 23:54:00.377811 progress 75 % (4 MB)
39 23:54:00.382069 progress 80 % (4 MB)
40 23:54:00.386005 progress 85 % (4 MB)
41 23:54:00.390361 progress 90 % (4 MB)
42 23:54:00.394485 progress 95 % (5 MB)
43 23:54:00.397926 progress 100 % (5 MB)
44 23:54:00.398677 5 MB downloaded in 0.14 s (39.61 MB/s)
45 23:54:00.399228 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:54:00.400189 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:54:00.400496 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:54:00.400786 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:54:00.401309 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/kernel/Image
51 23:54:00.401588 saving as /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/kernel/Image
52 23:54:00.401803 total size: 45713920 (43 MB)
53 23:54:00.402019 No compression specified
54 23:54:00.434951 progress 0 % (0 MB)
55 23:54:00.465255 progress 5 % (2 MB)
56 23:54:00.493959 progress 10 % (4 MB)
57 23:54:00.522658 progress 15 % (6 MB)
58 23:54:00.551032 progress 20 % (8 MB)
59 23:54:00.579498 progress 25 % (10 MB)
60 23:54:00.608343 progress 30 % (13 MB)
61 23:54:00.636962 progress 35 % (15 MB)
62 23:54:00.665526 progress 40 % (17 MB)
63 23:54:00.693951 progress 45 % (19 MB)
64 23:54:00.723318 progress 50 % (21 MB)
65 23:54:00.751772 progress 55 % (24 MB)
66 23:54:00.780684 progress 60 % (26 MB)
67 23:54:00.809052 progress 65 % (28 MB)
68 23:54:00.837778 progress 70 % (30 MB)
69 23:54:00.866288 progress 75 % (32 MB)
70 23:54:00.895383 progress 80 % (34 MB)
71 23:54:00.923533 progress 85 % (37 MB)
72 23:54:00.952137 progress 90 % (39 MB)
73 23:54:00.980802 progress 95 % (41 MB)
74 23:54:01.009352 progress 100 % (43 MB)
75 23:54:01.009940 43 MB downloaded in 0.61 s (71.69 MB/s)
76 23:54:01.010427 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:54:01.011255 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:54:01.011531 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:54:01.011799 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:54:01.012315 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:54:01.012603 saving as /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:54:01.012814 total size: 53209 (0 MB)
84 23:54:01.013029 No compression specified
85 23:54:01.055398 progress 61 % (0 MB)
86 23:54:01.056588 progress 100 % (0 MB)
87 23:54:01.057161 0 MB downloaded in 0.04 s (1.14 MB/s)
88 23:54:01.057671 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:54:01.058495 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:54:01.058765 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:54:01.059033 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:54:01.059512 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 23:54:01.059759 saving as /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/nfsrootfs/full.rootfs.tar
95 23:54:01.059964 total size: 120894716 (115 MB)
96 23:54:01.060206 Using unxz to decompress xz
97 23:54:01.102742 progress 0 % (0 MB)
98 23:54:01.904802 progress 5 % (5 MB)
99 23:54:02.747065 progress 10 % (11 MB)
100 23:54:03.562092 progress 15 % (17 MB)
101 23:54:04.337414 progress 20 % (23 MB)
102 23:54:04.928344 progress 25 % (28 MB)
103 23:54:05.754741 progress 30 % (34 MB)
104 23:54:06.542591 progress 35 % (40 MB)
105 23:54:06.889923 progress 40 % (46 MB)
106 23:54:07.263396 progress 45 % (51 MB)
107 23:54:07.982563 progress 50 % (57 MB)
108 23:54:08.862883 progress 55 % (63 MB)
109 23:54:09.643361 progress 60 % (69 MB)
110 23:54:10.399277 progress 65 % (74 MB)
111 23:54:11.174436 progress 70 % (80 MB)
112 23:54:11.999864 progress 75 % (86 MB)
113 23:54:12.785990 progress 80 % (92 MB)
114 23:54:13.550166 progress 85 % (98 MB)
115 23:54:14.410529 progress 90 % (103 MB)
116 23:54:15.191282 progress 95 % (109 MB)
117 23:54:16.027570 progress 100 % (115 MB)
118 23:54:16.039964 115 MB downloaded in 14.98 s (7.70 MB/s)
119 23:54:16.040952 end: 1.4.1 http-download (duration 00:00:15) [common]
121 23:54:16.042748 end: 1.4 download-retry (duration 00:00:15) [common]
122 23:54:16.043336 start: 1.5 download-retry (timeout 00:09:44) [common]
123 23:54:16.043921 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 23:54:16.044838 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/modules.tar.xz
125 23:54:16.045350 saving as /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/modules/modules.tar
126 23:54:16.045812 total size: 11608172 (11 MB)
127 23:54:16.046288 Using unxz to decompress xz
128 23:54:16.089019 progress 0 % (0 MB)
129 23:54:16.156441 progress 5 % (0 MB)
130 23:54:16.231346 progress 10 % (1 MB)
131 23:54:16.327593 progress 15 % (1 MB)
132 23:54:16.420174 progress 20 % (2 MB)
133 23:54:16.501574 progress 25 % (2 MB)
134 23:54:16.577603 progress 30 % (3 MB)
135 23:54:16.651797 progress 35 % (3 MB)
136 23:54:16.729621 progress 40 % (4 MB)
137 23:54:16.806412 progress 45 % (5 MB)
138 23:54:16.891449 progress 50 % (5 MB)
139 23:54:16.970004 progress 55 % (6 MB)
140 23:54:17.057665 progress 60 % (6 MB)
141 23:54:17.140079 progress 65 % (7 MB)
142 23:54:17.217244 progress 70 % (7 MB)
143 23:54:17.299600 progress 75 % (8 MB)
144 23:54:17.383738 progress 80 % (8 MB)
145 23:54:17.464428 progress 85 % (9 MB)
146 23:54:17.545492 progress 90 % (9 MB)
147 23:54:17.623217 progress 95 % (10 MB)
148 23:54:17.701250 progress 100 % (11 MB)
149 23:54:17.712244 11 MB downloaded in 1.67 s (6.64 MB/s)
150 23:54:17.712871 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:54:17.713825 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:54:17.714157 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 23:54:17.714482 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 23:54:33.918383 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949257/extract-nfsrootfs-omv2pnhe
156 23:54:33.918980 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 23:54:33.919261 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 23:54:33.919934 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj
159 23:54:33.920438 makedir: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin
160 23:54:33.920780 makedir: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/tests
161 23:54:33.921098 makedir: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/results
162 23:54:33.921432 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-add-keys
163 23:54:33.921951 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-add-sources
164 23:54:33.922454 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-background-process-start
165 23:54:33.922944 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-background-process-stop
166 23:54:33.923467 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-common-functions
167 23:54:33.923959 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-echo-ipv4
168 23:54:33.924471 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-install-packages
169 23:54:33.924949 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-installed-packages
170 23:54:33.925420 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-os-build
171 23:54:33.925886 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-probe-channel
172 23:54:33.926377 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-probe-ip
173 23:54:33.926875 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-target-ip
174 23:54:33.927345 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-target-mac
175 23:54:33.927816 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-target-storage
176 23:54:33.928338 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-case
177 23:54:33.928819 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-event
178 23:54:33.929294 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-feedback
179 23:54:33.929761 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-raise
180 23:54:33.930271 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-reference
181 23:54:33.930773 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-runner
182 23:54:33.931253 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-set
183 23:54:33.931719 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-test-shell
184 23:54:33.932219 Updating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-add-keys (debian)
185 23:54:33.932742 Updating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-add-sources (debian)
186 23:54:33.933237 Updating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-install-packages (debian)
187 23:54:33.933724 Updating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-installed-packages (debian)
188 23:54:33.934205 Updating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/bin/lava-os-build (debian)
189 23:54:33.934631 Creating /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/environment
190 23:54:33.934994 LAVA metadata
191 23:54:33.935252 - LAVA_JOB_ID=949257
192 23:54:33.935467 - LAVA_DISPATCHER_IP=192.168.6.2
193 23:54:33.935827 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 23:54:33.936818 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 23:54:33.937129 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 23:54:33.937337 skipped lava-vland-overlay
197 23:54:33.937578 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 23:54:33.937831 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 23:54:33.938049 skipped lava-multinode-overlay
200 23:54:33.938292 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 23:54:33.938543 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 23:54:33.938787 Loading test definitions
203 23:54:33.939059 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 23:54:33.939278 Using /lava-949257 at stage 0
205 23:54:33.940464 uuid=949257_1.6.2.4.1 testdef=None
206 23:54:33.940771 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 23:54:33.941034 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 23:54:33.942566 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 23:54:33.943347 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 23:54:33.945354 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 23:54:33.946179 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 23:54:33.948028 runner path: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/0/tests/0_timesync-off test_uuid 949257_1.6.2.4.1
215 23:54:33.948578 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 23:54:33.949386 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 23:54:33.949608 Using /lava-949257 at stage 0
219 23:54:33.949957 Fetching tests from https://github.com/kernelci/test-definitions.git
220 23:54:33.950243 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/0/tests/1_kselftest-rtc'
221 23:54:37.536098 Running '/usr/bin/git checkout kernelci.org
222 23:54:37.957863 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 23:54:37.959307 uuid=949257_1.6.2.4.5 testdef=None
224 23:54:37.959647 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 23:54:37.960435 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 23:54:37.963299 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 23:54:37.964147 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 23:54:37.967859 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 23:54:37.968739 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 23:54:37.972341 runner path: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/0/tests/1_kselftest-rtc test_uuid 949257_1.6.2.4.5
234 23:54:37.972628 BOARD='meson-sm1-s905d3-libretech-cc'
235 23:54:37.972835 BRANCH='mainline'
236 23:54:37.973034 SKIPFILE='/dev/null'
237 23:54:37.973231 SKIP_INSTALL='True'
238 23:54:37.973426 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/kselftest.tar.xz'
239 23:54:37.973624 TST_CASENAME=''
240 23:54:37.973820 TST_CMDFILES='rtc'
241 23:54:37.974373 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 23:54:37.975166 Creating lava-test-runner.conf files
244 23:54:37.975371 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949257/lava-overlay-b5e_5pwj/lava-949257/0 for stage 0
245 23:54:37.975726 - 0_timesync-off
246 23:54:37.975966 - 1_kselftest-rtc
247 23:54:37.976322 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 23:54:37.976603 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 23:55:01.754378 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 23:55:01.754840 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 23:55:01.755136 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 23:55:01.755444 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 23:55:01.755737 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 23:55:02.441329 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 23:55:02.441788 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 23:55:02.442040 extracting modules file /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949257/extract-nfsrootfs-omv2pnhe
257 23:55:03.806289 extracting modules file /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk
258 23:55:05.215073 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 23:55:05.215564 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 23:55:05.215847 [common] Applying overlay to NFS
261 23:55:05.216092 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949257/compress-overlay-ijgv59nq/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949257/extract-nfsrootfs-omv2pnhe
262 23:55:07.945151 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 23:55:07.945623 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 23:55:07.945895 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 23:55:07.946123 Converting downloaded kernel to a uImage
266 23:55:07.946428 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/kernel/Image /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/kernel/uImage
267 23:55:08.422775 output: Image Name:
268 23:55:08.423201 output: Created: Wed Nov 6 23:55:07 2024
269 23:55:08.423414 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 23:55:08.423617 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
271 23:55:08.423818 output: Load Address: 01080000
272 23:55:08.424057 output: Entry Point: 01080000
273 23:55:08.424262 output:
274 23:55:08.424598 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 23:55:08.424862 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 23:55:08.425129 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 23:55:08.425381 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 23:55:08.425634 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 23:55:08.425888 Building ramdisk /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk
280 23:55:10.542860 >> 166825 blocks
281 23:55:18.490846 Adding RAMdisk u-boot header.
282 23:55:18.491462 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk.cpio.gz.uboot
283 23:55:18.757590 output: Image Name:
284 23:55:18.757998 output: Created: Wed Nov 6 23:55:18 2024
285 23:55:18.758417 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 23:55:18.758832 output: Data Size: 23432295 Bytes = 22883.10 KiB = 22.35 MiB
287 23:55:18.759238 output: Load Address: 00000000
288 23:55:18.759636 output: Entry Point: 00000000
289 23:55:18.760083 output:
290 23:55:18.761083 rename /var/lib/lava/dispatcher/tmp/949257/extract-overlay-ramdisk-vyw78er7/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
291 23:55:18.761791 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 23:55:18.762341 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 23:55:18.762865 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 23:55:18.763304 No LXC device requested
295 23:55:18.763800 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 23:55:18.764349 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 23:55:18.764849 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 23:55:18.765262 Checking files for TFTP limit of 4294967296 bytes.
299 23:55:18.767942 end: 1 tftp-deploy (duration 00:01:19) [common]
300 23:55:18.768554 start: 2 uboot-action (timeout 00:05:00) [common]
301 23:55:18.769086 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 23:55:18.769582 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 23:55:18.770080 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 23:55:18.770572 Using kernel file from prepare-kernel: 949257/tftp-deploy-wl8h7a3r/kernel/uImage
305 23:55:18.771185 substitutions:
306 23:55:18.771590 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 23:55:18.772015 - {DTB_ADDR}: 0x01070000
308 23:55:18.772421 - {DTB}: 949257/tftp-deploy-wl8h7a3r/dtb/meson-sm1-s905d3-libretech-cc.dtb
309 23:55:18.772825 - {INITRD}: 949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
310 23:55:18.773222 - {KERNEL_ADDR}: 0x01080000
311 23:55:18.773612 - {KERNEL}: 949257/tftp-deploy-wl8h7a3r/kernel/uImage
312 23:55:18.774000 - {LAVA_MAC}: None
313 23:55:18.774408 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949257/extract-nfsrootfs-omv2pnhe
314 23:55:18.774797 - {NFS_SERVER_IP}: 192.168.6.2
315 23:55:18.775184 - {PRESEED_CONFIG}: None
316 23:55:18.775568 - {PRESEED_LOCAL}: None
317 23:55:18.775953 - {RAMDISK_ADDR}: 0x08000000
318 23:55:18.776409 - {RAMDISK}: 949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
319 23:55:18.776800 - {ROOT_PART}: None
320 23:55:18.777187 - {ROOT}: None
321 23:55:18.777572 - {SERVER_IP}: 192.168.6.2
322 23:55:18.777953 - {TEE_ADDR}: 0x83000000
323 23:55:18.778331 - {TEE}: None
324 23:55:18.778713 Parsed boot commands:
325 23:55:18.779086 - setenv autoload no
326 23:55:18.779464 - setenv initrd_high 0xffffffff
327 23:55:18.779841 - setenv fdt_high 0xffffffff
328 23:55:18.780253 - dhcp
329 23:55:18.780636 - setenv serverip 192.168.6.2
330 23:55:18.781019 - tftpboot 0x01080000 949257/tftp-deploy-wl8h7a3r/kernel/uImage
331 23:55:18.781405 - tftpboot 0x08000000 949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
332 23:55:18.781791 - tftpboot 0x01070000 949257/tftp-deploy-wl8h7a3r/dtb/meson-sm1-s905d3-libretech-cc.dtb
333 23:55:18.782177 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949257/extract-nfsrootfs-omv2pnhe,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 23:55:18.782572 - bootm 0x01080000 0x08000000 0x01070000
335 23:55:18.783059 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 23:55:18.784552 start: 2.3 connect-device (timeout 00:05:00) [common]
338 23:55:18.784969 [common] connect-device Connecting to device using 'telnet conserv1 3008'
339 23:55:18.799152 Setting prompt string to ['lava-test: # ']
340 23:55:18.801307 end: 2.3 connect-device (duration 00:00:00) [common]
341 23:55:18.802080 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 23:55:18.802752 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 23:55:18.803543 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 23:55:18.804822 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
345 23:55:18.839132 >> OK - accepted request
346 23:55:18.841250 Returned 0 in 0 seconds
347 23:55:18.942351 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 23:55:18.944030 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 23:55:18.944590 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 23:55:18.945103 Setting prompt string to ['Hit any key to stop autoboot']
352 23:55:18.945539 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 23:55:18.947424 Trying 192.168.56.21...
354 23:55:18.947909 Connected to conserv1.
355 23:55:18.948355 Escape character is '^]'.
356 23:55:18.948765
357 23:55:18.949170 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 23:55:18.949611
359 23:55:26.302069 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0
360 23:55:26.302720 bl2_stage_init 0x01
361 23:55:26.303144 bl2_stage_init 0x81
362 23:55:26.307557 hw id: 0x0000 - pwm id 0x01
363 23:55:26.308120 bl2_stage_init 0xc1
364 23:55:26.313029 bl2_stage_init 0x02
365 23:55:26.313566
366 23:55:26.314024 L0:00000000
367 23:55:26.314458 L1:00000703
368 23:55:26.314875 L2:00008067
369 23:55:26.315277 L3:15000000
370 23:55:26.318754 S1:00000000
371 23:55:26.319261 B2:20282000
372 23:55:26.319670 B1:a0f83180
373 23:55:26.320105
374 23:55:26.320508 TE: 67610
375 23:55:26.320903
376 23:55:26.324350 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
377 23:55:26.324894
378 23:55:26.329824 Board ID = 1
379 23:55:26.330306 Set cpu clk to 24M
380 23:55:26.330726 Set clk81 to 24M
381 23:55:26.335476 Use GP1_pll as DSU clk.
382 23:55:26.335962 DSU clk: 1200 Mhz
383 23:55:26.336416 CPU clk: 1200 MHz
384 23:55:26.340867 Set clk81 to 166.6M
385 23:55:26.346467 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
386 23:55:26.346962 board id: 1
387 23:55:26.353734 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 23:55:26.364304 fw parse done
389 23:55:26.370269 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 23:55:26.412851 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 23:55:26.423721 PIEI prepare done
392 23:55:26.424248 fastboot data load
393 23:55:26.424678 fastboot data verify
394 23:55:26.429367 verify result: 266
395 23:55:26.435035 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
396 23:55:26.435497 LPDDR4 probe
397 23:55:26.435914 ddr clk to 1584MHz
398 23:55:26.443089 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 23:55:26.480304
400 23:55:26.480873 dmc_version 0001
401 23:55:26.486962 Check phy result
402 23:55:26.492874 INFO : End of CA training
403 23:55:26.493403 INFO : End of initialization
404 23:55:26.498462 INFO : Training has run successfully!
405 23:55:26.498991 Check phy result
406 23:55:26.504177 INFO : End of initialization
407 23:55:26.504695 INFO : End of read enable training
408 23:55:26.509666 INFO : End of fine write leveling
409 23:55:26.515271 INFO : End of Write leveling coarse delay
410 23:55:26.515789 INFO : Training has run successfully!
411 23:55:26.516231 Check phy result
412 23:55:26.520899 INFO : End of initialization
413 23:55:26.521476 INFO : End of read dq deskew training
414 23:55:26.526502 INFO : End of MPR read delay center optimization
415 23:55:26.532167 INFO : End of write delay center optimization
416 23:55:26.537665 INFO : End of read delay center optimization
417 23:55:26.538197 INFO : End of max read latency training
418 23:55:26.543334 INFO : Training has run successfully!
419 23:55:26.543865 1D training succeed
420 23:55:26.552414 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 23:55:26.600052 Check phy result
422 23:55:26.600591 INFO : End of initialization
423 23:55:26.622429 INFO : End of 2D read delay Voltage center optimization
424 23:55:26.641580 INFO : End of 2D read delay Voltage center optimization
425 23:55:26.693385 INFO : End of 2D write delay Voltage center optimization
426 23:55:26.742682 INFO : End of 2D write delay Voltage center optimization
427 23:55:26.748225 INFO : Training has run successfully!
428 23:55:26.748746
429 23:55:26.749157 channel==0
430 23:55:26.753783 RxClkDly_Margin_A0==78 ps 8
431 23:55:26.754287 TxDqDly_Margin_A0==98 ps 10
432 23:55:26.757072 RxClkDly_Margin_A1==78 ps 8
433 23:55:26.757569 TxDqDly_Margin_A1==98 ps 10
434 23:55:26.762603 TrainedVREFDQ_A0==74
435 23:55:26.763107 TrainedVREFDQ_A1==74
436 23:55:26.768234 VrefDac_Margin_A0==24
437 23:55:26.768742 DeviceVref_Margin_A0==40
438 23:55:26.769141 VrefDac_Margin_A1==22
439 23:55:26.773773 DeviceVref_Margin_A1==40
440 23:55:26.774275
441 23:55:26.774677
442 23:55:26.775073 channel==1
443 23:55:26.775460 RxClkDly_Margin_A0==78 ps 8
444 23:55:26.777187 TxDqDly_Margin_A0==98 ps 10
445 23:55:26.782731 RxClkDly_Margin_A1==78 ps 8
446 23:55:26.783234 TxDqDly_Margin_A1==88 ps 9
447 23:55:26.783637 TrainedVREFDQ_A0==78
448 23:55:26.788348 TrainedVREFDQ_A1==78
449 23:55:26.788853 VrefDac_Margin_A0==23
450 23:55:26.793941 DeviceVref_Margin_A0==36
451 23:55:26.794438 VrefDac_Margin_A1==22
452 23:55:26.794835 DeviceVref_Margin_A1==36
453 23:55:26.795231
454 23:55:26.799527 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 23:55:26.800053
456 23:55:26.833123 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
457 23:55:26.833753 2D training succeed
458 23:55:26.838772 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 23:55:26.844325 auto size-- 65535DDR cs0 size: 2048MB
460 23:55:26.844830 DDR cs1 size: 2048MB
461 23:55:26.849958 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 23:55:26.850455 cs0 DataBus test pass
463 23:55:26.850854 cs1 DataBus test pass
464 23:55:26.855519 cs0 AddrBus test pass
465 23:55:26.856047 cs1 AddrBus test pass
466 23:55:26.856458
467 23:55:26.861200 100bdlr_step_size ps== 478
468 23:55:26.861712 result report
469 23:55:26.862111 boot times 0Enable ddr reg access
470 23:55:26.871000 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 23:55:26.884829 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
472 23:55:27.539886 bl2z: ptr: 05129330, size: 00001e40
473 23:55:27.546259 0.0;M3 CHK:0;cm4_sp_mode 0
474 23:55:27.546634 MVN_1=0x00000000
475 23:55:27.546884 MVN_2=0x00000000
476 23:55:27.557487 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
477 23:55:27.557861 OPS=0x04
478 23:55:27.558075 ring efuse init
479 23:55:27.563164 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
480 23:55:27.563517 [0.017310 Inits done]
481 23:55:27.563741 secure task start!
482 23:55:27.570960 high task start!
483 23:55:27.571433 low task start!
484 23:55:27.571701 run into bl31
485 23:55:27.580275 NOTICE: BL31: v1.3(release):4fc40b1
486 23:55:27.587385 NOTICE: BL31: Built : 15:57:33, May 22 2019
487 23:55:27.587900 NOTICE: BL31: G12A normal boot!
488 23:55:27.602914 NOTICE: BL31: BL33 decompress pass
489 23:55:27.608619 ERROR: Error initializing runtime service opteed_fast
490 23:55:30.353064 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
491 23:55:30.353746 bl2_stage_init 0x01
492 23:55:30.354198 bl2_stage_init 0x81
493 23:55:30.358657 hw id: 0x0000 - pwm id 0x01
494 23:55:30.359151 bl2_stage_init 0xc1
495 23:55:30.364095 bl2_stage_init 0x02
496 23:55:30.364623
497 23:55:30.365070 L0:00000000
498 23:55:30.365510 L1:00000703
499 23:55:30.365941 L2:00008067
500 23:55:30.369383 L3:15000000
501 23:55:30.369856 S1:00000000
502 23:55:30.370291 B2:20282000
503 23:55:30.370717 B1:a0f83180
504 23:55:30.371139
505 23:55:30.371566 TE: 70537
506 23:55:30.372021
507 23:55:30.374959 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
508 23:55:30.380632
509 23:55:30.381198 Board ID = 1
510 23:55:30.381665 Set cpu clk to 24M
511 23:55:30.382117 Set clk81 to 24M
512 23:55:30.386172 Use GP1_pll as DSU clk.
513 23:55:30.386713 DSU clk: 1200 Mhz
514 23:55:30.387167 CPU clk: 1200 MHz
515 23:55:30.391783 Set clk81 to 166.6M
516 23:55:30.397409 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
517 23:55:30.397962 board id: 1
518 23:55:30.405033 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
519 23:55:30.415698 fw parse done
520 23:55:30.421683 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
521 23:55:30.464256 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
522 23:55:30.475224 PIEI prepare done
523 23:55:30.475593 fastboot data load
524 23:55:30.475796 fastboot data verify
525 23:55:30.480779 verify result: 266
526 23:55:30.486359 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
527 23:55:30.486827 LPDDR4 probe
528 23:55:30.487258 ddr clk to 1584MHz
529 23:55:30.494354 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 23:55:30.531811
531 23:55:30.532446 dmc_version 0001
532 23:55:30.538320 Check phy result
533 23:55:30.544262 INFO : End of CA training
534 23:55:30.544726 INFO : End of initialization
535 23:55:30.549846 INFO : Training has run successfully!
536 23:55:30.550316 Check phy result
537 23:55:30.555495 INFO : End of initialization
538 23:55:30.555961 INFO : End of read enable training
539 23:55:30.561041 INFO : End of fine write leveling
540 23:55:30.566687 INFO : End of Write leveling coarse delay
541 23:55:30.567154 INFO : Training has run successfully!
542 23:55:30.567591 Check phy result
543 23:55:30.572362 INFO : End of initialization
544 23:55:30.572834 INFO : End of read dq deskew training
545 23:55:30.577908 INFO : End of MPR read delay center optimization
546 23:55:30.583570 INFO : End of write delay center optimization
547 23:55:30.589092 INFO : End of read delay center optimization
548 23:55:30.589582 INFO : End of max read latency training
549 23:55:30.594721 INFO : Training has run successfully!
550 23:55:30.595195 1D training succeed
551 23:55:30.603883 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
552 23:55:30.651530 Check phy result
553 23:55:30.652116 INFO : End of initialization
554 23:55:30.673890 INFO : End of 2D read delay Voltage center optimization
555 23:55:30.693026 INFO : End of 2D read delay Voltage center optimization
556 23:55:30.745229 INFO : End of 2D write delay Voltage center optimization
557 23:55:30.794362 INFO : End of 2D write delay Voltage center optimization
558 23:55:30.799831 INFO : Training has run successfully!
559 23:55:30.800400
560 23:55:30.800859 channel==0
561 23:55:30.805311 RxClkDly_Margin_A0==78 ps 8
562 23:55:30.805840 TxDqDly_Margin_A0==98 ps 10
563 23:55:30.810862 RxClkDly_Margin_A1==88 ps 9
564 23:55:30.811347 TxDqDly_Margin_A1==98 ps 10
565 23:55:30.811792 TrainedVREFDQ_A0==75
566 23:55:30.816387 TrainedVREFDQ_A1==75
567 23:55:30.816912 VrefDac_Margin_A0==24
568 23:55:30.817372 DeviceVref_Margin_A0==39
569 23:55:30.822127 VrefDac_Margin_A1==22
570 23:55:30.822769 DeviceVref_Margin_A1==39
571 23:55:30.823253
572 23:55:30.823744
573 23:55:30.827885 channel==1
574 23:55:30.829098 RxClkDly_Margin_A0==88 ps 9
575 23:55:30.829598 TxDqDly_Margin_A0==98 ps 10
576 23:55:30.833168 RxClkDly_Margin_A1==78 ps 8
577 23:55:30.833798 TxDqDly_Margin_A1==78 ps 8
578 23:55:30.838969 TrainedVREFDQ_A0==78
579 23:55:30.839632 TrainedVREFDQ_A1==75
580 23:55:30.840171 VrefDac_Margin_A0==22
581 23:55:30.844385 DeviceVref_Margin_A0==36
582 23:55:30.844908 VrefDac_Margin_A1==22
583 23:55:30.849938 DeviceVref_Margin_A1==39
584 23:55:30.850430
585 23:55:30.850887 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
586 23:55:30.851335
587 23:55:30.883538 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000019 00000014 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
588 23:55:30.884148 2D training succeed
589 23:55:30.889136 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
590 23:55:30.894734 auto size-- 65535DDR cs0 size: 2048MB
591 23:55:30.895216 DDR cs1 size: 2048MB
592 23:55:30.900348 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
593 23:55:30.900832 cs0 DataBus test pass
594 23:55:30.905921 cs1 DataBus test pass
595 23:55:30.906400 cs0 AddrBus test pass
596 23:55:30.906851 cs1 AddrBus test pass
597 23:55:30.907295
598 23:55:30.911524 100bdlr_step_size ps== 478
599 23:55:30.912041 result report
600 23:55:30.917140 boot times 0Enable ddr reg access
601 23:55:30.922381 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
602 23:55:30.936234 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
603 23:55:31.591602 bl2z: ptr: 05129330, size: 00001e40
604 23:55:31.598983 0.0;M3 CHK:0;cm4_sp_mode 0
605 23:55:31.599501 MVN_1=0x00000000
606 23:55:31.599962 MVN_2=0x00000000
607 23:55:31.610272 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
608 23:55:31.610823 OPS=0x04
609 23:55:31.611307 ring efuse init
610 23:55:31.615863 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
611 23:55:31.616391 [0.017319 Inits done]
612 23:55:31.616843 secure task start!
613 23:55:31.623613 high task start!
614 23:55:31.624124 low task start!
615 23:55:31.624577 run into bl31
616 23:55:31.632110 NOTICE: BL31: v1.3(release):4fc40b1
617 23:55:31.640072 NOTICE: BL31: Built : 15:57:33, May 22 2019
618 23:55:31.640451 NOTICE: BL31: G12A normal boot!
619 23:55:31.655442 NOTICE: BL31: BL33 decompress pass
620 23:55:31.661158 ERROR: Error initializing runtime service opteed_fast
621 23:55:33.052110 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
622 23:55:33.052769 bl2_stage_init 0x01
623 23:55:33.053243 bl2_stage_init 0x81
624 23:55:33.057560 hw id: 0x0000 - pwm id 0x01
625 23:55:33.058063 bl2_stage_init 0xc1
626 23:55:33.063117 bl2_stage_init 0x02
627 23:55:33.063613
628 23:55:33.064115 L0:00000000
629 23:55:33.064570 L1:00000703
630 23:55:33.065017 L2:00008067
631 23:55:33.065457 L3:15000000
632 23:55:33.068727 S1:00000000
633 23:55:33.069010 B2:20282000
634 23:55:33.069229 B1:a0f83180
635 23:55:33.069668
636 23:55:33.070109 TE: 69082
637 23:55:33.070551
638 23:55:33.074256 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
639 23:55:33.074753
640 23:55:33.080048 Board ID = 1
641 23:55:33.080544 Set cpu clk to 24M
642 23:55:33.080996 Set clk81 to 24M
643 23:55:33.085590 Use GP1_pll as DSU clk.
644 23:55:33.086072 DSU clk: 1200 Mhz
645 23:55:33.086522 CPU clk: 1200 MHz
646 23:55:33.091145 Set clk81 to 166.6M
647 23:55:33.096657 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
648 23:55:33.097163 board id: 1
649 23:55:33.104097 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
650 23:55:33.114679 fw parse done
651 23:55:33.120562 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
652 23:55:33.163160 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
653 23:55:33.174073 PIEI prepare done
654 23:55:33.174615 fastboot data load
655 23:55:33.175082 fastboot data verify
656 23:55:33.179679 verify result: 266
657 23:55:33.185277 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
658 23:55:33.185795 LPDDR4 probe
659 23:55:33.186242 ddr clk to 1584MHz
660 23:55:33.193328 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 23:55:33.230702
662 23:55:33.231289 dmc_version 0001
663 23:55:33.237197 Check phy result
664 23:55:33.243082 INFO : End of CA training
665 23:55:33.243576 INFO : End of initialization
666 23:55:33.248677 INFO : Training has run successfully!
667 23:55:33.249184 Check phy result
668 23:55:33.254289 INFO : End of initialization
669 23:55:33.254778 INFO : End of read enable training
670 23:55:33.257617 INFO : End of fine write leveling
671 23:55:33.263155 INFO : End of Write leveling coarse delay
672 23:55:33.268745 INFO : Training has run successfully!
673 23:55:33.269239 Check phy result
674 23:55:33.269684 INFO : End of initialization
675 23:55:33.274327 INFO : End of read dq deskew training
676 23:55:33.280071 INFO : End of MPR read delay center optimization
677 23:55:33.280578 INFO : End of write delay center optimization
678 23:55:33.285546 INFO : End of read delay center optimization
679 23:55:33.291163 INFO : End of max read latency training
680 23:55:33.291697 INFO : Training has run successfully!
681 23:55:33.296758 1D training succeed
682 23:55:33.302731 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
683 23:55:33.350337 Check phy result
684 23:55:33.350890 INFO : End of initialization
685 23:55:33.372646 INFO : End of 2D read delay Voltage center optimization
686 23:55:33.392637 INFO : End of 2D read delay Voltage center optimization
687 23:55:33.444751 INFO : End of 2D write delay Voltage center optimization
688 23:55:33.494153 INFO : End of 2D write delay Voltage center optimization
689 23:55:33.499377 INFO : Training has run successfully!
690 23:55:33.499819
691 23:55:33.500089 channel==0
692 23:55:33.504979 RxClkDly_Margin_A0==78 ps 8
693 23:55:33.505309 TxDqDly_Margin_A0==98 ps 10
694 23:55:33.510772 RxClkDly_Margin_A1==78 ps 8
695 23:55:33.511095 TxDqDly_Margin_A1==88 ps 9
696 23:55:33.511330 TrainedVREFDQ_A0==74
697 23:55:33.516300 TrainedVREFDQ_A1==75
698 23:55:33.516619 VrefDac_Margin_A0==24
699 23:55:33.516828 DeviceVref_Margin_A0==40
700 23:55:33.521738 VrefDac_Margin_A1==22
701 23:55:33.522205 DeviceVref_Margin_A1==39
702 23:55:33.522442
703 23:55:33.522664
704 23:55:33.522877 channel==1
705 23:55:33.527292 RxClkDly_Margin_A0==88 ps 9
706 23:55:33.527601 TxDqDly_Margin_A0==98 ps 10
707 23:55:33.532875 RxClkDly_Margin_A1==88 ps 9
708 23:55:33.533213 TxDqDly_Margin_A1==88 ps 9
709 23:55:33.538524 TrainedVREFDQ_A0==78
710 23:55:33.538987 TrainedVREFDQ_A1==75
711 23:55:33.539310 VrefDac_Margin_A0==22
712 23:55:33.544213 DeviceVref_Margin_A0==36
713 23:55:33.544554 VrefDac_Margin_A1==21
714 23:55:33.549692 DeviceVref_Margin_A1==38
715 23:55:33.550178
716 23:55:33.550497 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
717 23:55:33.550725
718 23:55:33.583326 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000015 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
719 23:55:33.583734 2D training succeed
720 23:55:33.588802 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
721 23:55:33.594288 auto size-- 65535DDR cs0 size: 2048MB
722 23:55:33.594574 DDR cs1 size: 2048MB
723 23:55:33.600041 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
724 23:55:33.600356 cs0 DataBus test pass
725 23:55:33.605594 cs1 DataBus test pass
726 23:55:33.606090 cs0 AddrBus test pass
727 23:55:33.606400 cs1 AddrBus test pass
728 23:55:33.606619
729 23:55:33.611192 100bdlr_step_size ps== 478
730 23:55:33.611538 result report
731 23:55:33.616762 boot times 0Enable ddr reg access
732 23:55:33.621939 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
733 23:55:33.635758 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
734 23:55:34.290834 bl2z: ptr: 05129330, size: 00001e40
735 23:55:34.297728 0.0;M3 CHK:0;cm4_sp_mode 0
736 23:55:34.298266 MVN_1=0x00000000
737 23:55:34.298726 MVN_2=0x00000000
738 23:55:34.309176 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
739 23:55:34.309674 OPS=0x04
740 23:55:34.310127 ring efuse init
741 23:55:34.314838 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
742 23:55:34.315400 [0.017310 Inits done]
743 23:55:34.315850 secure task start!
744 23:55:34.322923 high task start!
745 23:55:34.323448 low task start!
746 23:55:34.323908 run into bl31
747 23:55:34.331519 NOTICE: BL31: v1.3(release):4fc40b1
748 23:55:34.339325 NOTICE: BL31: Built : 15:57:33, May 22 2019
749 23:55:34.339832 NOTICE: BL31: G12A normal boot!
750 23:55:34.354793 NOTICE: BL31: BL33 decompress pass
751 23:55:34.360470 ERROR: Error initializing runtime service opteed_fast
752 23:55:35.155897
753 23:55:35.156357
754 23:55:35.161219 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
755 23:55:35.161633
756 23:55:35.164710 Model: Libre Computer AML-S905D3-CC Solitude
757 23:55:35.311767 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
758 23:55:35.327129 DRAM: 2 GiB (effective 3.8 GiB)
759 23:55:35.428101 Core: 406 devices, 33 uclasses, devicetree: separate
760 23:55:35.433933 WDT: Not starting watchdog@f0d0
761 23:55:35.459055 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
762 23:55:35.471260 Loading Environment from FAT... Card did not respond to voltage select! : -110
763 23:55:35.476248 ** Bad device specification mmc 0 **
764 23:55:35.486305 Card did not respond to voltage select! : -110
765 23:55:35.493937 ** Bad device specification mmc 0 **
766 23:55:35.494220 Couldn't find partition mmc 0
767 23:55:35.502270 Card did not respond to voltage select! : -110
768 23:55:35.507793 ** Bad device specification mmc 0 **
769 23:55:35.508105 Couldn't find partition mmc 0
770 23:55:35.512857 Error: could not access storage.
771 23:55:35.809230 Net: eth0: ethernet@ff3f0000
772 23:55:35.809650 starting USB...
773 23:55:36.053927 Bus usb@ff500000: Register 3000140 NbrPorts 3
774 23:55:36.054485 Starting the controller
775 23:55:36.060852 USB XHCI 1.10
776 23:55:37.617581 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
777 23:55:37.625923 scanning usb for storage devices... 0 Storage Device(s) found
779 23:55:37.677257 Hit any key to stop autoboot: 1
780 23:55:37.678127 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
781 23:55:37.678562 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
782 23:55:37.678896 Setting prompt string to ['=>']
783 23:55:37.679209 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
784 23:55:37.691871 0
785 23:55:37.692684 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
787 23:55:37.793786 => setenv autoload no
788 23:55:37.794539 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
789 23:55:37.798759 setenv autoload no
791 23:55:37.900126 => setenv initrd_high 0xffffffff
792 23:55:37.901041 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
793 23:55:37.905162 setenv initrd_high 0xffffffff
795 23:55:38.006798 => setenv fdt_high 0xffffffff
796 23:55:38.007763 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
797 23:55:38.011828 setenv fdt_high 0xffffffff
799 23:55:38.113115 => dhcp
800 23:55:38.114046 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
801 23:55:38.117892 dhcp
802 23:55:38.673432 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete. done
803 23:55:38.673844 Speed: 1000, full duplex
804 23:55:38.674071 BOOTP broadcast 1
805 23:55:38.693183 DHCP client bound to address 192.168.6.21 (19 ms)
807 23:55:38.794463 => setenv serverip 192.168.6.2
808 23:55:38.795235 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
809 23:55:38.799670 setenv serverip 192.168.6.2
811 23:55:38.900712 => tftpboot 0x01080000 949257/tftp-deploy-wl8h7a3r/kernel/uImage
812 23:55:38.901540 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
813 23:55:38.908122 tftpboot 0x01080000 949257/tftp-deploy-wl8h7a3r/kernel/uImage
814 23:55:38.908423 Speed: 1000, full duplex
815 23:55:38.908645 Using ethernet@ff3f0000 device
816 23:55:38.913582 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
817 23:55:38.919052 Filename '949257/tftp-deploy-wl8h7a3r/kernel/uImage'.
818 23:55:38.923031 Load address: 0x1080000
819 23:55:41.880225 Loading: *################################################## 43.6 MiB
820 23:55:41.880881 14.7 MiB/s
821 23:55:41.881326 done
822 23:55:41.884615 Bytes transferred = 45713984 (2b98a40 hex)
824 23:55:41.986286 => tftpboot 0x08000000 949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
825 23:55:41.987074 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:37)
826 23:55:41.993988 tftpboot 0x08000000 949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot
827 23:55:41.994498 Speed: 1000, full duplex
828 23:55:41.994898 Using ethernet@ff3f0000 device
829 23:55:41.999434 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
830 23:55:42.009176 Filename '949257/tftp-deploy-wl8h7a3r/ramdisk/ramdisk.cpio.gz.uboot'.
831 23:55:42.009694 Load address: 0x8000000
832 23:55:43.427808 Loading: *################################################# UDP wrong checksum 00000005 000014d2
833 23:55:48.428951 T UDP wrong checksum 00000005 000014d2
834 23:55:58.430981 T T UDP wrong checksum 00000005 000014d2
835 23:56:00.361189 UDP wrong checksum 000000ff 0000c1f3
836 23:56:00.422257 UDP wrong checksum 000000ff 00004be6
837 23:56:18.434050 T T T UDP wrong checksum 00000005 000014d2
838 23:56:18.941852 T UDP wrong checksum 000000ff 0000f375
839 23:56:19.001549 UDP wrong checksum 000000ff 00008668
840 23:56:38.439881 T T T
841 23:56:38.440518 Retry count exceeded; starting again
843 23:56:38.442014 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
846 23:56:38.444044 end: 2.4 uboot-commands (duration 00:01:20) [common]
848 23:56:38.445507 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
850 23:56:38.446563 end: 2 uboot-action (duration 00:01:20) [common]
852 23:56:38.448113 Cleaning after the job
853 23:56:38.448666 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/ramdisk
854 23:56:38.451262 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/kernel
855 23:56:38.494069 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/dtb
856 23:56:38.494782 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/nfsrootfs
857 23:56:38.659770 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949257/tftp-deploy-wl8h7a3r/modules
858 23:56:38.680813 start: 4.1 power-off (timeout 00:00:30) [common]
859 23:56:38.681482 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
860 23:56:38.714710 >> OK - accepted request
861 23:56:38.716655 Returned 0 in 0 seconds
862 23:56:38.817599 end: 4.1 power-off (duration 00:00:00) [common]
864 23:56:38.818548 start: 4.2 read-feedback (timeout 00:10:00) [common]
865 23:56:38.819220 Listened to connection for namespace 'common' for up to 1s
866 23:56:39.819486 Finalising connection for namespace 'common'
867 23:56:39.820206 Disconnecting from shell: Finalise
868 23:56:39.820728 =>
869 23:56:39.921704 end: 4.2 read-feedback (duration 00:00:01) [common]
870 23:56:39.922334 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949257
871 23:56:43.058201 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949257
872 23:56:43.058816 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.