Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 23:50:59.985536 lava-dispatcher, installed at version: 2024.01
2 23:50:59.986336 start: 0 validate
3 23:50:59.986803 Start time: 2024-11-06 23:50:59.986774+00:00 (UTC)
4 23:50:59.987355 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 23:50:59.987872 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 23:51:00.026826 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 23:51:00.027383 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
8 23:51:00.061856 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 23:51:00.062780 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 23:51:00.094716 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 23:51:00.095198 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-gst-fluster%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 23:51:00.129149 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 23:51:00.129625 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-102-gf43b156921299%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
14 23:51:00.169957 validate duration: 0.18
16 23:51:00.171447 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 23:51:00.172098 start: 1.1 download-retry (timeout 00:10:00) [common]
18 23:51:00.172688 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 23:51:00.173692 Not decompressing ramdisk as can be used compressed.
20 23:51:00.174476 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/initrd.cpio.gz
21 23:51:00.174987 saving as /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/ramdisk/initrd.cpio.gz
22 23:51:00.175518 total size: 5628140 (5 MB)
23 23:51:00.213196 progress 0 % (0 MB)
24 23:51:00.221871 progress 5 % (0 MB)
25 23:51:00.230767 progress 10 % (0 MB)
26 23:51:00.238643 progress 15 % (0 MB)
27 23:51:00.245333 progress 20 % (1 MB)
28 23:51:00.249062 progress 25 % (1 MB)
29 23:51:00.253145 progress 30 % (1 MB)
30 23:51:00.257221 progress 35 % (1 MB)
31 23:51:00.260907 progress 40 % (2 MB)
32 23:51:00.264922 progress 45 % (2 MB)
33 23:51:00.268638 progress 50 % (2 MB)
34 23:51:00.272742 progress 55 % (2 MB)
35 23:51:00.276784 progress 60 % (3 MB)
36 23:51:00.280390 progress 65 % (3 MB)
37 23:51:00.284447 progress 70 % (3 MB)
38 23:51:00.288100 progress 75 % (4 MB)
39 23:51:00.292128 progress 80 % (4 MB)
40 23:51:00.295709 progress 85 % (4 MB)
41 23:51:00.299723 progress 90 % (4 MB)
42 23:51:00.303458 progress 95 % (5 MB)
43 23:51:00.306797 progress 100 % (5 MB)
44 23:51:00.307454 5 MB downloaded in 0.13 s (40.68 MB/s)
45 23:51:00.308025 end: 1.1.1 http-download (duration 00:00:00) [common]
47 23:51:00.308951 end: 1.1 download-retry (duration 00:00:00) [common]
48 23:51:00.309267 start: 1.2 download-retry (timeout 00:10:00) [common]
49 23:51:00.309556 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 23:51:00.310049 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/kernel/Image
51 23:51:00.310302 saving as /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/kernel/Image
52 23:51:00.310520 total size: 45713920 (43 MB)
53 23:51:00.310735 No compression specified
54 23:51:00.342963 progress 0 % (0 MB)
55 23:51:00.370710 progress 5 % (2 MB)
56 23:51:00.398591 progress 10 % (4 MB)
57 23:51:00.426659 progress 15 % (6 MB)
58 23:51:00.454393 progress 20 % (8 MB)
59 23:51:00.481720 progress 25 % (10 MB)
60 23:51:00.509557 progress 30 % (13 MB)
61 23:51:00.537639 progress 35 % (15 MB)
62 23:51:00.565438 progress 40 % (17 MB)
63 23:51:00.592596 progress 45 % (19 MB)
64 23:51:00.620740 progress 50 % (21 MB)
65 23:51:00.648392 progress 55 % (24 MB)
66 23:51:00.675802 progress 60 % (26 MB)
67 23:51:00.703208 progress 65 % (28 MB)
68 23:51:00.731036 progress 70 % (30 MB)
69 23:51:00.758968 progress 75 % (32 MB)
70 23:51:00.786883 progress 80 % (34 MB)
71 23:51:00.814419 progress 85 % (37 MB)
72 23:51:00.842200 progress 90 % (39 MB)
73 23:51:00.869940 progress 95 % (41 MB)
74 23:51:00.897089 progress 100 % (43 MB)
75 23:51:00.897618 43 MB downloaded in 0.59 s (74.26 MB/s)
76 23:51:00.898091 end: 1.2.1 http-download (duration 00:00:01) [common]
78 23:51:00.898904 end: 1.2 download-retry (duration 00:00:01) [common]
79 23:51:00.899179 start: 1.3 download-retry (timeout 00:09:59) [common]
80 23:51:00.899445 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 23:51:00.899915 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 23:51:00.900212 saving as /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 23:51:00.900424 total size: 53209 (0 MB)
84 23:51:00.900633 No compression specified
85 23:51:00.934696 progress 61 % (0 MB)
86 23:51:00.935597 progress 100 % (0 MB)
87 23:51:00.936227 0 MB downloaded in 0.04 s (1.42 MB/s)
88 23:51:00.936726 end: 1.3.1 http-download (duration 00:00:00) [common]
90 23:51:00.937581 end: 1.3 download-retry (duration 00:00:00) [common]
91 23:51:00.937863 start: 1.4 download-retry (timeout 00:09:59) [common]
92 23:51:00.938141 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 23:51:00.938612 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-gst-fluster/20240313.0/arm64/full.rootfs.tar.xz
94 23:51:00.938866 saving as /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/nfsrootfs/full.rootfs.tar
95 23:51:00.939084 total size: 474398908 (452 MB)
96 23:51:00.939308 Using unxz to decompress xz
97 23:51:00.971642 progress 0 % (0 MB)
98 23:51:02.068420 progress 5 % (22 MB)
99 23:51:03.503048 progress 10 % (45 MB)
100 23:51:03.947408 progress 15 % (67 MB)
101 23:51:04.797502 progress 20 % (90 MB)
102 23:51:05.343421 progress 25 % (113 MB)
103 23:51:05.712119 progress 30 % (135 MB)
104 23:51:06.325464 progress 35 % (158 MB)
105 23:51:07.268681 progress 40 % (181 MB)
106 23:51:08.151512 progress 45 % (203 MB)
107 23:51:08.902229 progress 50 % (226 MB)
108 23:51:09.594354 progress 55 % (248 MB)
109 23:51:10.806360 progress 60 % (271 MB)
110 23:51:12.253505 progress 65 % (294 MB)
111 23:51:13.837369 progress 70 % (316 MB)
112 23:51:17.082770 progress 75 % (339 MB)
113 23:51:19.538309 progress 80 % (361 MB)
114 23:51:22.496714 progress 85 % (384 MB)
115 23:51:25.720961 progress 90 % (407 MB)
116 23:51:29.268749 progress 95 % (429 MB)
117 23:51:32.549660 progress 100 % (452 MB)
118 23:51:32.562657 452 MB downloaded in 31.62 s (14.31 MB/s)
119 23:51:32.563269 end: 1.4.1 http-download (duration 00:00:32) [common]
121 23:51:32.564257 end: 1.4 download-retry (duration 00:00:32) [common]
122 23:51:32.564837 start: 1.5 download-retry (timeout 00:09:28) [common]
123 23:51:32.565403 start: 1.5.1 http-download (timeout 00:09:28) [common]
124 23:51:32.566441 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-102-gf43b156921299/arm64/defconfig/gcc-12/modules.tar.xz
125 23:51:32.566961 saving as /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/modules/modules.tar
126 23:51:32.567408 total size: 11608172 (11 MB)
127 23:51:32.567868 Using unxz to decompress xz
128 23:51:32.610446 progress 0 % (0 MB)
129 23:51:32.677269 progress 5 % (0 MB)
130 23:51:32.755463 progress 10 % (1 MB)
131 23:51:32.855473 progress 15 % (1 MB)
132 23:51:32.949077 progress 20 % (2 MB)
133 23:51:33.028701 progress 25 % (2 MB)
134 23:51:33.105391 progress 30 % (3 MB)
135 23:51:33.181029 progress 35 % (3 MB)
136 23:51:33.259638 progress 40 % (4 MB)
137 23:51:33.338697 progress 45 % (5 MB)
138 23:51:33.425150 progress 50 % (5 MB)
139 23:51:33.504050 progress 55 % (6 MB)
140 23:51:33.590833 progress 60 % (6 MB)
141 23:51:33.673744 progress 65 % (7 MB)
142 23:51:33.752215 progress 70 % (7 MB)
143 23:51:33.835225 progress 75 % (8 MB)
144 23:51:33.919928 progress 80 % (8 MB)
145 23:51:34.000981 progress 85 % (9 MB)
146 23:51:34.080639 progress 90 % (9 MB)
147 23:51:34.161317 progress 95 % (10 MB)
148 23:51:34.240096 progress 100 % (11 MB)
149 23:51:34.251867 11 MB downloaded in 1.68 s (6.57 MB/s)
150 23:51:34.252811 end: 1.5.1 http-download (duration 00:00:02) [common]
152 23:51:34.254553 end: 1.5 download-retry (duration 00:00:02) [common]
153 23:51:34.255125 start: 1.6 prepare-tftp-overlay (timeout 00:09:26) [common]
154 23:51:34.255695 start: 1.6.1 extract-nfsrootfs (timeout 00:09:26) [common]
155 23:51:50.932173 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/949238/extract-nfsrootfs-srsmzgod
156 23:51:50.932759 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 23:51:50.933045 start: 1.6.2 lava-overlay (timeout 00:09:09) [common]
158 23:51:50.933747 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz
159 23:51:50.934220 makedir: /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin
160 23:51:50.934555 makedir: /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/tests
161 23:51:50.934877 makedir: /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/results
162 23:51:50.935208 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-add-keys
163 23:51:50.935744 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-add-sources
164 23:51:50.936341 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-background-process-start
165 23:51:50.936938 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-background-process-stop
166 23:51:50.937716 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-common-functions
167 23:51:50.938284 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-echo-ipv4
168 23:51:50.938852 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-install-packages
169 23:51:50.939388 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-installed-packages
170 23:51:50.939902 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-os-build
171 23:51:50.940478 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-probe-channel
172 23:51:50.941015 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-probe-ip
173 23:51:50.941521 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-target-ip
174 23:51:50.942017 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-target-mac
175 23:51:50.942603 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-target-storage
176 23:51:50.943124 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-case
177 23:51:50.943607 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-event
178 23:51:50.944120 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-feedback
179 23:51:50.944688 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-raise
180 23:51:50.945178 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-reference
181 23:51:50.945671 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-runner
182 23:51:50.946284 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-set
183 23:51:50.946783 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-test-shell
184 23:51:50.947280 Updating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-install-packages (oe)
185 23:51:50.947819 Updating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/bin/lava-installed-packages (oe)
186 23:51:50.948299 Creating /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/environment
187 23:51:50.948679 LAVA metadata
188 23:51:50.948938 - LAVA_JOB_ID=949238
189 23:51:50.949154 - LAVA_DISPATCHER_IP=192.168.6.2
190 23:51:50.949531 start: 1.6.2.1 ssh-authorize (timeout 00:09:09) [common]
191 23:51:50.950520 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 23:51:50.950842 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:09) [common]
193 23:51:50.951051 skipped lava-vland-overlay
194 23:51:50.951293 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 23:51:50.951549 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:09) [common]
196 23:51:50.951770 skipped lava-multinode-overlay
197 23:51:50.952031 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 23:51:50.952289 start: 1.6.2.4 test-definition (timeout 00:09:09) [common]
199 23:51:50.952540 Loading test definitions
200 23:51:50.952818 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:09) [common]
201 23:51:50.953039 Using /lava-949238 at stage 0
202 23:51:50.954252 uuid=949238_1.6.2.4.1 testdef=None
203 23:51:50.954575 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 23:51:50.954840 start: 1.6.2.4.2 test-overlay (timeout 00:09:09) [common]
205 23:51:50.956691 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 23:51:50.957520 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:09) [common]
208 23:51:50.959838 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 23:51:50.960735 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:09) [common]
211 23:51:50.962995 runner path: /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/0/tests/0_v4l2-decoder-conformance-h265 test_uuid 949238_1.6.2.4.1
212 23:51:50.963630 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 23:51:50.964418 Creating lava-test-runner.conf files
215 23:51:50.964621 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/949238/lava-overlay-izz3o1mz/lava-949238/0 for stage 0
216 23:51:50.964979 - 0_v4l2-decoder-conformance-h265
217 23:51:50.965330 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 23:51:50.965605 start: 1.6.2.5 compress-overlay (timeout 00:09:09) [common]
219 23:51:50.987800 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 23:51:50.988252 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:09) [common]
221 23:51:50.988516 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 23:51:50.988784 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 23:51:50.989046 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:09) [common]
224 23:51:51.632952 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 23:51:51.633412 start: 1.6.4 extract-modules (timeout 00:09:09) [common]
226 23:51:51.633660 extracting modules file /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949238/extract-nfsrootfs-srsmzgod
227 23:51:53.047504 extracting modules file /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk
228 23:51:54.626996 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 23:51:54.627491 start: 1.6.5 apply-overlay-tftp (timeout 00:09:06) [common]
230 23:51:54.627785 [common] Applying overlay to NFS
231 23:51:54.628043 [common] Applying overlay /var/lib/lava/dispatcher/tmp/949238/compress-overlay-w4sz6r7b/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/949238/extract-nfsrootfs-srsmzgod
232 23:51:54.666281 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 23:51:54.666736 start: 1.6.6 prepare-kernel (timeout 00:09:06) [common]
234 23:51:54.667012 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:06) [common]
235 23:51:54.667246 Converting downloaded kernel to a uImage
236 23:51:54.667560 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/kernel/Image /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/kernel/uImage
237 23:51:55.151237 output: Image Name:
238 23:51:55.151666 output: Created: Wed Nov 6 23:51:54 2024
239 23:51:55.151878 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 23:51:55.152127 output: Data Size: 45713920 Bytes = 44642.50 KiB = 43.60 MiB
241 23:51:55.152332 output: Load Address: 01080000
242 23:51:55.152531 output: Entry Point: 01080000
243 23:51:55.152729 output:
244 23:51:55.153070 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 23:51:55.153350 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 23:51:55.153626 start: 1.6.7 configure-preseed-file (timeout 00:09:05) [common]
247 23:51:55.153882 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 23:51:55.154146 start: 1.6.8 compress-ramdisk (timeout 00:09:05) [common]
249 23:51:55.154409 Building ramdisk /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk
250 23:51:57.810435 >> 166825 blocks
251 23:52:05.523898 Adding RAMdisk u-boot header.
252 23:52:05.524385 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk.cpio.gz.uboot
253 23:52:05.788600 output: Image Name:
254 23:52:05.789021 output: Created: Wed Nov 6 23:52:05 2024
255 23:52:05.789237 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 23:52:05.789442 output: Data Size: 23432847 Bytes = 22883.64 KiB = 22.35 MiB
257 23:52:05.789644 output: Load Address: 00000000
258 23:52:05.789844 output: Entry Point: 00000000
259 23:52:05.790042 output:
260 23:52:05.790718 rename /var/lib/lava/dispatcher/tmp/949238/extract-overlay-ramdisk-qpr7294b/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
261 23:52:05.791140 end: 1.6.8 compress-ramdisk (duration 00:00:11) [common]
262 23:52:05.791431 end: 1.6 prepare-tftp-overlay (duration 00:00:32) [common]
263 23:52:05.791731 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:54) [common]
264 23:52:05.791976 No LXC device requested
265 23:52:05.792514 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 23:52:05.793028 start: 1.8 deploy-device-env (timeout 00:08:54) [common]
267 23:52:05.793527 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 23:52:05.793940 Checking files for TFTP limit of 4294967296 bytes.
269 23:52:05.796630 end: 1 tftp-deploy (duration 00:01:06) [common]
270 23:52:05.797198 start: 2 uboot-action (timeout 00:05:00) [common]
271 23:52:05.797718 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 23:52:05.798211 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 23:52:05.798705 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 23:52:05.799227 Using kernel file from prepare-kernel: 949238/tftp-deploy-tz0ufd7n/kernel/uImage
275 23:52:05.799849 substitutions:
276 23:52:05.800287 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 23:52:05.800688 - {DTB_ADDR}: 0x01070000
278 23:52:05.801084 - {DTB}: 949238/tftp-deploy-tz0ufd7n/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 23:52:05.801476 - {INITRD}: 949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
280 23:52:05.801866 - {KERNEL_ADDR}: 0x01080000
281 23:52:05.802255 - {KERNEL}: 949238/tftp-deploy-tz0ufd7n/kernel/uImage
282 23:52:05.802642 - {LAVA_MAC}: None
283 23:52:05.803066 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/949238/extract-nfsrootfs-srsmzgod
284 23:52:05.803457 - {NFS_SERVER_IP}: 192.168.6.2
285 23:52:05.803843 - {PRESEED_CONFIG}: None
286 23:52:05.804255 - {PRESEED_LOCAL}: None
287 23:52:05.804643 - {RAMDISK_ADDR}: 0x08000000
288 23:52:05.805026 - {RAMDISK}: 949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
289 23:52:05.805410 - {ROOT_PART}: None
290 23:52:05.805796 - {ROOT}: None
291 23:52:05.806179 - {SERVER_IP}: 192.168.6.2
292 23:52:05.806563 - {TEE_ADDR}: 0x83000000
293 23:52:05.806947 - {TEE}: None
294 23:52:05.807331 Parsed boot commands:
295 23:52:05.807707 - setenv autoload no
296 23:52:05.808111 - setenv initrd_high 0xffffffff
297 23:52:05.808496 - setenv fdt_high 0xffffffff
298 23:52:05.808877 - dhcp
299 23:52:05.809259 - setenv serverip 192.168.6.2
300 23:52:05.809641 - tftpboot 0x01080000 949238/tftp-deploy-tz0ufd7n/kernel/uImage
301 23:52:05.810023 - tftpboot 0x08000000 949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
302 23:52:05.810405 - tftpboot 0x01070000 949238/tftp-deploy-tz0ufd7n/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 23:52:05.810788 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/949238/extract-nfsrootfs-srsmzgod,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 23:52:05.811181 - bootm 0x01080000 0x08000000 0x01070000
305 23:52:05.811663 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 23:52:05.813256 start: 2.3 connect-device (timeout 00:05:00) [common]
308 23:52:05.813682 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 23:52:05.828155 Setting prompt string to ['lava-test: # ']
310 23:52:05.829623 end: 2.3 connect-device (duration 00:00:00) [common]
311 23:52:05.830206 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 23:52:05.830758 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 23:52:05.831281 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 23:52:05.832428 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 23:52:05.871911 >> OK - accepted request
316 23:52:05.873766 Returned 0 in 0 seconds
317 23:52:05.974820 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 23:52:05.976442 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 23:52:05.977015 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 23:52:05.977535 Setting prompt string to ['Hit any key to stop autoboot']
322 23:52:05.977991 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 23:52:05.979529 Trying 192.168.56.21...
324 23:52:05.980029 Connected to conserv1.
325 23:52:05.980455 Escape character is '^]'.
326 23:52:05.980867
327 23:52:05.981284 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 23:52:05.981705
329 23:52:13.289470 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 23:52:13.289906 bl2_stage_init 0x01
331 23:52:13.290154 bl2_stage_init 0x81
332 23:52:13.295252 hw id: 0x0000 - pwm id 0x01
333 23:52:13.295566 bl2_stage_init 0xc1
334 23:52:13.300514 bl2_stage_init 0x02
335 23:52:13.300825
336 23:52:13.301058 L0:00000000
337 23:52:13.301292 L1:00000703
338 23:52:13.301539 L2:00008067
339 23:52:13.301941 L3:15000000
340 23:52:13.306015 S1:00000000
341 23:52:13.306498 B2:20282000
342 23:52:13.306943 B1:a0f83180
343 23:52:13.307350
344 23:52:13.307778 TE: 67569
345 23:52:13.308278
346 23:52:13.311737 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 23:52:13.312235
348 23:52:13.317175 Board ID = 1
349 23:52:13.317657 Set cpu clk to 24M
350 23:52:13.318066 Set clk81 to 24M
351 23:52:13.321206 Use GP1_pll as DSU clk.
352 23:52:13.321664 DSU clk: 1200 Mhz
353 23:52:13.326794 CPU clk: 1200 MHz
354 23:52:13.327265 Set clk81 to 166.6M
355 23:52:13.332446 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 23:52:13.332958 board id: 1
357 23:52:13.341288 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 23:52:13.351826 fw parse done
359 23:52:13.357862 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 23:52:13.400342 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 23:52:13.411420 PIEI prepare done
362 23:52:13.411943 fastboot data load
363 23:52:13.412449 fastboot data verify
364 23:52:13.416876 verify result: 266
365 23:52:13.422599 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 23:52:13.423058 LPDDR4 probe
367 23:52:13.423461 ddr clk to 1584MHz
368 23:52:13.430492 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 23:52:13.467793
370 23:52:13.468393 dmc_version 0001
371 23:52:13.474446 Check phy result
372 23:52:13.480339 INFO : End of CA training
373 23:52:13.480839 INFO : End of initialization
374 23:52:13.485928 INFO : Training has run successfully!
375 23:52:13.486368 Check phy result
376 23:52:13.491649 INFO : End of initialization
377 23:52:13.492133 INFO : End of read enable training
378 23:52:13.494828 INFO : End of fine write leveling
379 23:52:13.500375 INFO : End of Write leveling coarse delay
380 23:52:13.505963 INFO : Training has run successfully!
381 23:52:13.506393 Check phy result
382 23:52:13.506790 INFO : End of initialization
383 23:52:13.511594 INFO : End of read dq deskew training
384 23:52:13.515021 INFO : End of MPR read delay center optimization
385 23:52:13.520607 INFO : End of write delay center optimization
386 23:52:13.526238 INFO : End of read delay center optimization
387 23:52:13.526666 INFO : End of max read latency training
388 23:52:13.531776 INFO : Training has run successfully!
389 23:52:13.532298 1D training succeed
390 23:52:13.539955 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 23:52:13.587733 Check phy result
392 23:52:13.588358 INFO : End of initialization
393 23:52:13.612429 INFO : End of 2D read delay Voltage center optimization
394 23:52:13.629143 INFO : End of 2D read delay Voltage center optimization
395 23:52:13.680991 INFO : End of 2D write delay Voltage center optimization
396 23:52:13.730315 INFO : End of 2D write delay Voltage center optimization
397 23:52:13.735707 INFO : Training has run successfully!
398 23:52:13.736231
399 23:52:13.736656 channel==0
400 23:52:13.741494 RxClkDly_Margin_A0==78 ps 8
401 23:52:13.741902 TxDqDly_Margin_A0==98 ps 10
402 23:52:13.744598 RxClkDly_Margin_A1==88 ps 9
403 23:52:13.744926 TxDqDly_Margin_A1==98 ps 10
404 23:52:13.750120 TrainedVREFDQ_A0==77
405 23:52:13.750521 TrainedVREFDQ_A1==74
406 23:52:13.755953 VrefDac_Margin_A0==22
407 23:52:13.756354 DeviceVref_Margin_A0==37
408 23:52:13.756614 VrefDac_Margin_A1==23
409 23:52:13.761292 DeviceVref_Margin_A1==40
410 23:52:13.761638
411 23:52:13.761891
412 23:52:13.762139 channel==1
413 23:52:13.762379 RxClkDly_Margin_A0==78 ps 8
414 23:52:13.767039 TxDqDly_Margin_A0==98 ps 10
415 23:52:13.767385 RxClkDly_Margin_A1==78 ps 8
416 23:52:13.775644 TxDqDly_Margin_A1==78 ps 8
417 23:52:13.776301 TrainedVREFDQ_A0==78
418 23:52:13.776874 TrainedVREFDQ_A1==75
419 23:52:13.778348 VrefDac_Margin_A0==22
420 23:52:13.778650 DeviceVref_Margin_A0==36
421 23:52:13.784119 VrefDac_Margin_A1==22
422 23:52:13.784666 DeviceVref_Margin_A1==38
423 23:52:13.785366
424 23:52:13.789394 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 23:52:13.789903
426 23:52:13.818735 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
427 23:52:13.822956 2D training succeed
428 23:52:13.828523 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 23:52:13.828917 auto size-- 65535DDR cs0 size: 2048MB
430 23:52:13.834069 DDR cs1 size: 2048MB
431 23:52:13.834457 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 23:52:13.839650 cs0 DataBus test pass
433 23:52:13.840012 cs1 DataBus test pass
434 23:52:13.840230 cs0 AddrBus test pass
435 23:52:13.845221 cs1 AddrBus test pass
436 23:52:13.845777
437 23:52:13.846191 100bdlr_step_size ps== 478
438 23:52:13.846604 result report
439 23:52:13.850803 boot times 0Enable ddr reg access
440 23:52:13.858450 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 23:52:13.872305 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 23:52:14.527179 bl2z: ptr: 05129330, size: 00001e40
443 23:52:14.534680 0.0;M3 CHK:0;cm4_sp_mode 0
444 23:52:14.535063 MVN_1=0x00000000
445 23:52:14.535295 MVN_2=0x00000000
446 23:52:14.546117 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 23:52:14.546522 OPS=0x04
448 23:52:14.546753 ring efuse init
449 23:52:14.551676 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 23:52:14.551976 [0.017319 Inits done]
451 23:52:14.552233 secure task start!
452 23:52:14.559360 high task start!
453 23:52:14.559703 low task start!
454 23:52:14.559926 run into bl31
455 23:52:14.568041 NOTICE: BL31: v1.3(release):4fc40b1
456 23:52:14.575774 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 23:52:14.576144 NOTICE: BL31: G12A normal boot!
458 23:52:14.591269 NOTICE: BL31: BL33 decompress pass
459 23:52:14.596949 ERROR: Error initializing runtime service opteed_fast
460 23:52:17.342831 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0; SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 23:52:17.343289 bl2_stage_init 0x01
462 23:52:17.343544 bl2_stage_init 0x81
463 23:52:17.348287 hw id: 0x0000 - pwm id 0x01
464 23:52:17.348615 bl2_stage_init 0xc1
465 23:52:17.353993 bl2_stage_init 0x02
466 23:52:17.354330
467 23:52:17.354542 L0:00000000
468 23:52:17.354744 L1:00000703
469 23:52:17.354946 L2:00008067
470 23:52:17.355145 L3:15000000
471 23:52:17.359534 S1:00000000
472 23:52:17.359903 B2:20282000
473 23:52:17.360187 B1:a0f83180
474 23:52:17.360417
475 23:52:17.360622 TE: 70146
476 23:52:17.360821
477 23:52:17.365160 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 23:52:17.365557
479 23:52:17.370763 Board ID = 1
480 23:52:17.371146 Set cpu clk to 24M
481 23:52:17.371368 Set clk81 to 24M
482 23:52:17.376288 Use GP1_pll as DSU clk.
483 23:52:17.376657 DSU clk: 1200 Mhz
484 23:52:17.376900 CPU clk: 1200 MHz
485 23:52:17.381997 Set clk81 to 166.6M
486 23:52:17.387519 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 23:52:17.387876 board id: 1
488 23:52:17.394725 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 23:52:17.405604 fw parse done
490 23:52:17.411568 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 23:52:17.454772 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 23:52:17.465975 PIEI prepare done
493 23:52:17.466378 fastboot data load
494 23:52:17.466591 fastboot data verify
495 23:52:17.471439 verify result: 266
496 23:52:17.477054 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 23:52:17.477402 LPDDR4 probe
498 23:52:17.477615 ddr clk to 1584MHz
499 23:52:17.485134 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
500 23:52:17.522878
501 23:52:17.523302 dmc_version 0001
502 23:52:17.529987 Check phy result
503 23:52:17.535856 INFO : End of CA training
504 23:52:17.536282 INFO : End of initialization
505 23:52:17.541422 INFO : Training has run successfully!
506 23:52:17.541828 Check phy result
507 23:52:17.547138 INFO : End of initialization
508 23:52:17.547546 INFO : End of read enable training
509 23:52:17.552557 INFO : End of fine write leveling
510 23:52:17.558218 INFO : End of Write leveling coarse delay
511 23:52:17.558633 INFO : Training has run successfully!
512 23:52:17.558890 Check phy result
513 23:52:17.563844 INFO : End of initialization
514 23:52:17.564263 INFO : End of read dq deskew training
515 23:52:17.569339 INFO : End of MPR read delay center optimization
516 23:52:17.575074 INFO : End of write delay center optimization
517 23:52:17.580546 INFO : End of read delay center optimization
518 23:52:17.580844 INFO : End of max read latency training
519 23:52:17.586125 INFO : Training has run successfully!
520 23:52:17.586421 1D training succeed
521 23:52:17.595307 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
522 23:52:17.643779 Check phy result
523 23:52:17.644403 INFO : End of initialization
524 23:52:17.671281 INFO : End of 2D read delay Voltage center optimization
525 23:52:17.695368 INFO : End of 2D read delay Voltage center optimization
526 23:52:17.752041 INFO : End of 2D write delay Voltage center optimization
527 23:52:17.805968 INFO : End of 2D write delay Voltage center optimization
528 23:52:17.811485 INFO : Training has run successfully!
529 23:52:17.811940
530 23:52:17.812377 channel==0
531 23:52:17.817071 RxClkDly_Margin_A0==78 ps 8
532 23:52:17.817501 TxDqDly_Margin_A0==98 ps 10
533 23:52:17.822667 RxClkDly_Margin_A1==78 ps 8
534 23:52:17.823091 TxDqDly_Margin_A1==98 ps 10
535 23:52:17.823490 TrainedVREFDQ_A0==74
536 23:52:17.828339 TrainedVREFDQ_A1==75
537 23:52:17.828801 VrefDac_Margin_A0==23
538 23:52:17.829200 DeviceVref_Margin_A0==40
539 23:52:17.833862 VrefDac_Margin_A1==23
540 23:52:17.834287 DeviceVref_Margin_A1==39
541 23:52:17.834682
542 23:52:17.835078
543 23:52:17.839473 channel==1
544 23:52:17.839900 RxClkDly_Margin_A0==88 ps 9
545 23:52:17.840331 TxDqDly_Margin_A0==98 ps 10
546 23:52:17.845088 RxClkDly_Margin_A1==78 ps 8
547 23:52:17.845510 TxDqDly_Margin_A1==88 ps 9
548 23:52:17.850730 TrainedVREFDQ_A0==78
549 23:52:17.851158 TrainedVREFDQ_A1==75
550 23:52:17.851556 VrefDac_Margin_A0==22
551 23:52:17.856271 DeviceVref_Margin_A0==36
552 23:52:17.856709 VrefDac_Margin_A1==22
553 23:52:17.861855 DeviceVref_Margin_A1==39
554 23:52:17.862299
555 23:52:17.862696 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
556 23:52:17.863091
557 23:52:17.896294 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
558 23:52:17.896790 2D training succeed
559 23:52:17.901239 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
560 23:52:17.908974 auto size-- 65535DDR cs0 size: 2048MB
561 23:52:17.909445 DDR cs1 size: 2048MB
562 23:52:17.914126 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
563 23:52:17.914561 cs0 DataBus test pass
564 23:52:17.918001 cs1 DataBus test pass
565 23:52:17.918435 cs0 AddrBus test pass
566 23:52:17.918826 cs1 AddrBus test pass
567 23:52:17.919217
568 23:52:17.923657 100bdlr_step_size ps== 471
569 23:52:17.924119 result report
570 23:52:17.929203 boot times 0Enable ddr reg access
571 23:52:17.934342 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
572 23:52:17.948217 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
573 23:52:18.607619 bl2z: ptr: 05129330, size: 00001e40
574 23:52:18.616216 0.0;M3 CHK:0;cm4_sp_mode 0
575 23:52:18.616745 MVN_1=0x00000000
576 23:52:18.617186 MVN_2=0x00000000
577 23:52:18.627579 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
578 23:52:18.628051 OPS=0x04
579 23:52:18.628470 ring efuse init
580 23:52:18.633243 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
581 23:52:18.633731 [0.017354 Inits done]
582 23:52:18.634141 secure task start!
583 23:52:18.640138 high task start!
584 23:52:18.640571 low task start!
585 23:52:18.640973 run into bl31
586 23:52:18.649474 NOTICE: BL31: v1.3(release):4fc40b1
587 23:52:18.657297 NOTICE: BL31: Built : 15:57:33, May 22 2019
588 23:52:18.657810 NOTICE: BL31: G12A normal boot!
589 23:52:18.672878 NOTICE: BL31: BL33 decompress pass
590 23:52:18.678565 ERROR: Error initializing runtime service opteed_fast
591 23:52:20.042754 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
592 23:52:20.043455 bl2_stage_init 0x01
593 23:52:20.043949 bl2_stage_init 0x81
594 23:52:20.048263 hw id: 0x0000 - pwm id 0x01
595 23:52:20.048765 bl2_stage_init 0xc1
596 23:52:20.053920 bl2_stage_init 0x02
597 23:52:20.054452
598 23:52:20.054889 L0:00000000
599 23:52:20.055308 L1:00000703
600 23:52:20.055718 L2:00008067
601 23:52:20.056181 L3:15000000
602 23:52:20.059245 S1:00000000
603 23:52:20.059738 B2:20282000
604 23:52:20.060184 B1:a0f83180
605 23:52:20.060624
606 23:52:20.061056 TE: 70962
607 23:52:20.061467
608 23:52:20.064761 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
609 23:52:20.065269
610 23:52:20.070578 Board ID = 1
611 23:52:20.071165 Set cpu clk to 24M
612 23:52:20.071663 Set clk81 to 24M
613 23:52:20.075964 Use GP1_pll as DSU clk.
614 23:52:20.076616 DSU clk: 1200 Mhz
615 23:52:20.077180 CPU clk: 1200 MHz
616 23:52:20.081564 Set clk81 to 166.6M
617 23:52:20.087189 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
618 23:52:20.087861 board id: 1
619 23:52:20.093879 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
620 23:52:20.105592 fw parse done
621 23:52:20.111830 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
622 23:52:20.153675 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
623 23:52:20.165833 PIEI prepare done
624 23:52:20.166511 fastboot data load
625 23:52:20.167088 fastboot data verify
626 23:52:20.171460 verify result: 266
627 23:52:20.177010 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
628 23:52:20.177647 LPDDR4 probe
629 23:52:20.178209 ddr clk to 1584MHz
630 23:52:20.184891 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
631 23:52:20.222712
632 23:52:20.223330 dmc_version 0001
633 23:52:20.229745 Check phy result
634 23:52:20.235649 INFO : End of CA training
635 23:52:20.236255 INFO : End of initialization
636 23:52:20.241357 INFO : Training has run successfully!
637 23:52:20.241689 Check phy result
638 23:52:20.246892 INFO : End of initialization
639 23:52:20.247544 INFO : End of read enable training
640 23:52:20.252582 INFO : End of fine write leveling
641 23:52:20.258215 INFO : End of Write leveling coarse delay
642 23:52:20.258789 INFO : Training has run successfully!
643 23:52:20.259262 Check phy result
644 23:52:20.263676 INFO : End of initialization
645 23:52:20.264341 INFO : End of read dq deskew training
646 23:52:20.269412 INFO : End of MPR read delay center optimization
647 23:52:20.274931 INFO : End of write delay center optimization
648 23:52:20.280594 INFO : End of read delay center optimization
649 23:52:20.281183 INFO : End of max read latency training
650 23:52:20.285907 INFO : Training has run successfully!
651 23:52:20.286262 1D training succeed
652 23:52:20.295215 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
653 23:52:20.343604 Check phy result
654 23:52:20.344451 INFO : End of initialization
655 23:52:20.370958 INFO : End of 2D read delay Voltage center optimization
656 23:52:20.394139 INFO : End of 2D read delay Voltage center optimization
657 23:52:20.451655 INFO : End of 2D write delay Voltage center optimization
658 23:52:20.505673 INFO : End of 2D write delay Voltage center optimization
659 23:52:20.511109 INFO : Training has run successfully!
660 23:52:20.511445
661 23:52:20.511706 channel==0
662 23:52:20.516714 RxClkDly_Margin_A0==78 ps 8
663 23:52:20.517040 TxDqDly_Margin_A0==98 ps 10
664 23:52:20.522390 RxClkDly_Margin_A1==69 ps 7
665 23:52:20.522722 TxDqDly_Margin_A1==88 ps 9
666 23:52:20.523106 TrainedVREFDQ_A0==74
667 23:52:20.527974 TrainedVREFDQ_A1==74
668 23:52:20.528536 VrefDac_Margin_A0==24
669 23:52:20.529005 DeviceVref_Margin_A0==40
670 23:52:20.533553 VrefDac_Margin_A1==23
671 23:52:20.534051 DeviceVref_Margin_A1==40
672 23:52:20.534515
673 23:52:20.534975
674 23:52:20.535426 channel==1
675 23:52:20.539135 RxClkDly_Margin_A0==78 ps 8
676 23:52:20.539626 TxDqDly_Margin_A0==98 ps 10
677 23:52:20.544737 RxClkDly_Margin_A1==78 ps 8
678 23:52:20.545245 TxDqDly_Margin_A1==78 ps 8
679 23:52:20.551044 TrainedVREFDQ_A0==78
680 23:52:20.551562 TrainedVREFDQ_A1==77
681 23:52:20.552067 VrefDac_Margin_A0==22
682 23:52:20.555965 DeviceVref_Margin_A0==36
683 23:52:20.556513 VrefDac_Margin_A1==22
684 23:52:20.561643 DeviceVref_Margin_A1==37
685 23:52:20.562149
686 23:52:20.562612 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
687 23:52:20.563102
688 23:52:20.595132 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
689 23:52:20.595559 2D training succeed
690 23:52:20.600689 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
691 23:52:20.607020 auto size-- 65535DDR cs0 size: 2048MB
692 23:52:20.607385 DDR cs1 size: 2048MB
693 23:52:20.612370 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
694 23:52:20.612775 cs0 DataBus test pass
695 23:52:20.617504 cs1 DataBus test pass
696 23:52:20.617862 cs0 AddrBus test pass
697 23:52:20.618089 cs1 AddrBus test pass
698 23:52:20.618303
699 23:52:20.623058 100bdlr_step_size ps== 471
700 23:52:20.623327 result report
701 23:52:20.628886 boot times 0Enable ddr reg access
702 23:52:20.633846 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
703 23:52:20.647733 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
704 23:52:21.306646 bl2z: ptr: 05129330, size: 00001e40
705 23:52:21.315113 0.0;M3 CHK:0;cm4_sp_mode 0
706 23:52:21.315742 MVN_1=0x00000000
707 23:52:21.316287 MVN_2=0x00000000
708 23:52:21.326706 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
709 23:52:21.327331 OPS=0x04
710 23:52:21.327797 ring efuse init
711 23:52:21.332239 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
712 23:52:21.332840 [0.017354 Inits done]
713 23:52:21.333302 secure task start!
714 23:52:21.339768 high task start!
715 23:52:21.340309 low task start!
716 23:52:21.340761 run into bl31
717 23:52:21.348390 NOTICE: BL31: v1.3(release):4fc40b1
718 23:52:21.355619 NOTICE: BL31: Built : 15:57:33, May 22 2019
719 23:52:21.356163 NOTICE: BL31: G12A normal boot!
720 23:52:21.371774 NOTICE: BL31: BL33 decompress pass
721 23:52:21.377479 ERROR: Error initializing runtime service opteed_fast
722 23:52:22.171560
723 23:52:22.172304
724 23:52:22.176900 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
725 23:52:22.177457
726 23:52:22.180373 Model: Libre Computer AML-S905D3-CC Solitude
727 23:52:22.327255 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
728 23:52:22.342600 DRAM: 2 GiB (effective 3.8 GiB)
729 23:52:22.443621 Core: 406 devices, 33 uclasses, devicetree: separate
730 23:52:22.449364 WDT: Not starting watchdog@f0d0
731 23:52:22.474523 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
732 23:52:22.486758 Loading Environment from FAT... Card did not respond to voltage select! : -110
733 23:52:22.491652 ** Bad device specification mmc 0 **
734 23:52:22.501727 Card did not respond to voltage select! : -110
735 23:52:22.509399 ** Bad device specification mmc 0 **
736 23:52:22.509712 Couldn't find partition mmc 0
737 23:52:22.517745 Card did not respond to voltage select! : -110
738 23:52:22.523232 ** Bad device specification mmc 0 **
739 23:52:22.523537 Couldn't find partition mmc 0
740 23:52:22.528295 Error: could not access storage.
741 23:52:22.824824 Net: eth0: ethernet@ff3f0000
742 23:52:22.825455 starting USB...
743 23:52:23.069448 Bus usb@ff500000: Register 3000140 NbrPorts 3
744 23:52:23.070180 Starting the controller
745 23:52:23.076401 USB XHCI 1.10
746 23:52:24.632260 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
747 23:52:24.640510 scanning usb for storage devices... 0 Storage Device(s) found
749 23:52:24.691745 Hit any key to stop autoboot: 1
750 23:52:24.692798 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
751 23:52:24.693416 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
752 23:52:24.693945 Setting prompt string to ['=>']
753 23:52:24.694485 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
754 23:52:24.706551 0
755 23:52:24.707571 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
757 23:52:24.808975 => setenv autoload no
758 23:52:24.809748 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
759 23:52:24.813901 setenv autoload no
761 23:52:24.915100 => setenv initrd_high 0xffffffff
762 23:52:24.915811 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
763 23:52:24.920020 setenv initrd_high 0xffffffff
765 23:52:25.021231 => setenv fdt_high 0xffffffff
766 23:52:25.022307 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
767 23:52:25.026423 setenv fdt_high 0xffffffff
769 23:52:25.128073 => dhcp
770 23:52:25.128664 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
771 23:52:25.133080 dhcp
772 23:52:25.988737 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
773 23:52:25.989411 Speed: 1000, full duplex
774 23:52:25.989870 BOOTP broadcast 1
775 23:52:26.236827 BOOTP broadcast 2
776 23:52:26.248161 DHCP client bound to address 192.168.6.21 (259 ms)
778 23:52:26.349963 => setenv serverip 192.168.6.2
779 23:52:26.351014 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
780 23:52:26.355585 setenv serverip 192.168.6.2
782 23:52:26.457828 => tftpboot 0x01080000 949238/tftp-deploy-tz0ufd7n/kernel/uImage
783 23:52:26.458933 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
784 23:52:26.465584 tftpboot 0x01080000 949238/tftp-deploy-tz0ufd7n/kernel/uImage
785 23:52:26.466159 Speed: 1000, full duplex
786 23:52:26.466626 Using ethernet@ff3f0000 device
787 23:52:26.471123 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
788 23:52:26.476568 Filename '949238/tftp-deploy-tz0ufd7n/kernel/uImage'.
789 23:52:26.480674 Load address: 0x1080000
790 23:52:29.911270 Loading: *################################################## 43.6 MiB
791 23:52:29.912149 12.7 MiB/s
792 23:52:29.912729 done
793 23:52:29.915304 Bytes transferred = 45713984 (2b98a40 hex)
795 23:52:30.017261 => tftpboot 0x08000000 949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
796 23:52:30.017895 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
797 23:52:30.024586 tftpboot 0x08000000 949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot
798 23:52:30.024970 Speed: 1000, full duplex
799 23:52:30.025226 Using ethernet@ff3f0000 device
800 23:52:30.030130 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
801 23:52:30.038950 Filename '949238/tftp-deploy-tz0ufd7n/ramdisk/ramdisk.cpio.gz.uboot'.
802 23:52:30.039355 Load address: 0x8000000
803 23:52:31.518135 Loading: *################################################# UDP wrong checksum 00000005 0000f2d8
804 23:52:36.199139 UDP wrong checksum 000000ff 0000d142
805 23:52:36.249332 UDP wrong checksum 000000ff 00005b35
806 23:52:36.518856 T UDP wrong checksum 00000005 0000f2d8
807 23:52:46.520566 T T UDP wrong checksum 00000005 0000f2d8
808 23:53:01.987382 T T T UDP wrong checksum 000000ff 00005d00
809 23:53:01.991534 UDP wrong checksum 000000ff 0000e4f2
810 23:53:06.524647 T UDP wrong checksum 00000005 0000f2d8
811 23:53:17.082162 T T UDP wrong checksum 000000ff 0000cca5
812 23:53:17.120706 UDP wrong checksum 000000ff 0000252e
813 23:53:22.012463 T UDP wrong checksum 000000ff 000092d3
814 23:53:22.051704 UDP wrong checksum 000000ff 00001dc6
815 23:53:26.382938 UDP wrong checksum 000000ff 0000740f
816 23:53:26.433300 UDP wrong checksum 000000ff 0000cc99
817 23:53:26.529594
818 23:53:26.530226 Retry count exceeded; starting again
820 23:53:26.531731 end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
823 23:53:26.533793 end: 2.4 uboot-commands (duration 00:01:21) [common]
825 23:53:26.535286 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
827 23:53:26.536486 end: 2 uboot-action (duration 00:01:21) [common]
829 23:53:26.538189 Cleaning after the job
830 23:53:26.538795 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/ramdisk
831 23:53:26.540183 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/kernel
832 23:53:26.571516 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/dtb
833 23:53:26.573017 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/nfsrootfs
834 23:53:26.736872 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/949238/tftp-deploy-tz0ufd7n/modules
835 23:53:26.756054 start: 4.1 power-off (timeout 00:00:30) [common]
836 23:53:26.756737 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
837 23:53:26.789943 >> OK - accepted request
838 23:53:26.792037 Returned 0 in 0 seconds
839 23:53:26.892892 end: 4.1 power-off (duration 00:00:00) [common]
841 23:53:26.893895 start: 4.2 read-feedback (timeout 00:10:00) [common]
842 23:53:26.894547 Listened to connection for namespace 'common' for up to 1s
843 23:53:27.894953 Finalising connection for namespace 'common'
844 23:53:27.895426 Disconnecting from shell: Finalise
845 23:53:27.895691 =>
846 23:53:27.996355 end: 4.2 read-feedback (duration 00:00:01) [common]
847 23:53:27.996799 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/949238
848 23:53:30.666339 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/949238
849 23:53:30.666952 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.