Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:16:02.983212 lava-dispatcher, installed at version: 2024.01
2 01:16:02.984108 start: 0 validate
3 01:16:02.984657 Start time: 2024-11-07 01:16:02.984625+00:00 (UTC)
4 01:16:02.985297 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:16:02.985902 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:16:03.033654 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:16:03.034243 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
8 01:16:03.071596 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:16:03.072333 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 01:16:03.104314 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:16:03.104842 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:16:03.138764 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:16:03.139292 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
14 01:16:03.188997 validate duration: 0.20
16 01:16:03.190613 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:16:03.191237 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:16:03.191843 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:16:03.192887 Not decompressing ramdisk as can be used compressed.
20 01:16:03.193698 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:16:03.194231 saving as /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/ramdisk/initrd.cpio.gz
22 01:16:03.194770 total size: 5628182 (5 MB)
23 01:16:03.239594 progress 0 % (0 MB)
24 01:16:03.247654 progress 5 % (0 MB)
25 01:16:03.256334 progress 10 % (0 MB)
26 01:16:03.264110 progress 15 % (0 MB)
27 01:16:03.272316 progress 20 % (1 MB)
28 01:16:03.277749 progress 25 % (1 MB)
29 01:16:03.281760 progress 30 % (1 MB)
30 01:16:03.285902 progress 35 % (1 MB)
31 01:16:03.289701 progress 40 % (2 MB)
32 01:16:03.293820 progress 45 % (2 MB)
33 01:16:03.297556 progress 50 % (2 MB)
34 01:16:03.301730 progress 55 % (2 MB)
35 01:16:03.305927 progress 60 % (3 MB)
36 01:16:03.309632 progress 65 % (3 MB)
37 01:16:03.313717 progress 70 % (3 MB)
38 01:16:03.317452 progress 75 % (4 MB)
39 01:16:03.321426 progress 80 % (4 MB)
40 01:16:03.324922 progress 85 % (4 MB)
41 01:16:03.328683 progress 90 % (4 MB)
42 01:16:03.332389 progress 95 % (5 MB)
43 01:16:03.335744 progress 100 % (5 MB)
44 01:16:03.336469 5 MB downloaded in 0.14 s (37.88 MB/s)
45 01:16:03.337031 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:16:03.337914 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:16:03.338215 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:16:03.338483 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:16:03.338997 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/kernel/Image
51 01:16:03.339261 saving as /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/kernel/Image
52 01:16:03.339471 total size: 169943552 (162 MB)
53 01:16:03.339683 No compression specified
54 01:16:03.381025 progress 0 % (0 MB)
55 01:16:03.485288 progress 5 % (8 MB)
56 01:16:03.588609 progress 10 % (16 MB)
57 01:16:03.692287 progress 15 % (24 MB)
58 01:16:03.794087 progress 20 % (32 MB)
59 01:16:03.895513 progress 25 % (40 MB)
60 01:16:03.998966 progress 30 % (48 MB)
61 01:16:04.102729 progress 35 % (56 MB)
62 01:16:04.206379 progress 40 % (64 MB)
63 01:16:04.309212 progress 45 % (72 MB)
64 01:16:04.417677 progress 50 % (81 MB)
65 01:16:04.524028 progress 55 % (89 MB)
66 01:16:04.648106 progress 60 % (97 MB)
67 01:16:04.773046 progress 65 % (105 MB)
68 01:16:04.900023 progress 70 % (113 MB)
69 01:16:05.024912 progress 75 % (121 MB)
70 01:16:05.149809 progress 80 % (129 MB)
71 01:16:05.273070 progress 85 % (137 MB)
72 01:16:05.395048 progress 90 % (145 MB)
73 01:16:05.496789 progress 95 % (153 MB)
74 01:16:05.598001 progress 100 % (162 MB)
75 01:16:05.598621 162 MB downloaded in 2.26 s (71.74 MB/s)
76 01:16:05.599095 end: 1.2.1 http-download (duration 00:00:02) [common]
78 01:16:05.599912 end: 1.2 download-retry (duration 00:00:02) [common]
79 01:16:05.600227 start: 1.3 download-retry (timeout 00:09:58) [common]
80 01:16:05.600563 start: 1.3.1 http-download (timeout 00:09:58) [common]
81 01:16:05.601071 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 01:16:05.601350 saving as /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/dtb/meson-g12b-a311d-libretech-cc.dtb
83 01:16:05.601559 total size: 54703 (0 MB)
84 01:16:05.601767 No compression specified
85 01:16:05.643659 progress 59 % (0 MB)
86 01:16:05.644554 progress 100 % (0 MB)
87 01:16:05.645112 0 MB downloaded in 0.04 s (1.20 MB/s)
88 01:16:05.645590 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:16:05.646398 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:16:05.646658 start: 1.4 download-retry (timeout 00:09:58) [common]
92 01:16:05.646918 start: 1.4.1 http-download (timeout 00:09:58) [common]
93 01:16:05.647384 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:16:05.647620 saving as /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/nfsrootfs/full.rootfs.tar
95 01:16:05.647823 total size: 107552908 (102 MB)
96 01:16:05.648057 Using unxz to decompress xz
97 01:16:05.687109 progress 0 % (0 MB)
98 01:16:06.336293 progress 5 % (5 MB)
99 01:16:07.061486 progress 10 % (10 MB)
100 01:16:07.792585 progress 15 % (15 MB)
101 01:16:08.553967 progress 20 % (20 MB)
102 01:16:09.127242 progress 25 % (25 MB)
103 01:16:09.749127 progress 30 % (30 MB)
104 01:16:10.487003 progress 35 % (35 MB)
105 01:16:10.831209 progress 40 % (41 MB)
106 01:16:11.263061 progress 45 % (46 MB)
107 01:16:11.964150 progress 50 % (51 MB)
108 01:16:12.653713 progress 55 % (56 MB)
109 01:16:13.412770 progress 60 % (61 MB)
110 01:16:14.165400 progress 65 % (66 MB)
111 01:16:14.909178 progress 70 % (71 MB)
112 01:16:15.714860 progress 75 % (76 MB)
113 01:16:16.453435 progress 80 % (82 MB)
114 01:16:17.216060 progress 85 % (87 MB)
115 01:16:18.005883 progress 90 % (92 MB)
116 01:16:18.754339 progress 95 % (97 MB)
117 01:16:19.495692 progress 100 % (102 MB)
118 01:16:19.508945 102 MB downloaded in 13.86 s (7.40 MB/s)
119 01:16:19.510004 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:16:19.511753 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:16:19.512360 start: 1.5 download-retry (timeout 00:09:44) [common]
123 01:16:19.513575 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 01:16:19.514572 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/modules.tar.xz
125 01:16:19.515080 saving as /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/modules/modules.tar
126 01:16:19.515518 total size: 27621356 (26 MB)
127 01:16:19.515974 Using unxz to decompress xz
128 01:16:19.567717 progress 0 % (0 MB)
129 01:16:19.785907 progress 5 % (1 MB)
130 01:16:20.009269 progress 10 % (2 MB)
131 01:16:20.254753 progress 15 % (3 MB)
132 01:16:20.491697 progress 20 % (5 MB)
133 01:16:20.692552 progress 25 % (6 MB)
134 01:16:20.896907 progress 30 % (7 MB)
135 01:16:21.103904 progress 35 % (9 MB)
136 01:16:21.299403 progress 40 % (10 MB)
137 01:16:21.493142 progress 45 % (11 MB)
138 01:16:21.704711 progress 50 % (13 MB)
139 01:16:21.905305 progress 55 % (14 MB)
140 01:16:22.122123 progress 60 % (15 MB)
141 01:16:22.331335 progress 65 % (17 MB)
142 01:16:22.538057 progress 70 % (18 MB)
143 01:16:22.754237 progress 75 % (19 MB)
144 01:16:22.961846 progress 80 % (21 MB)
145 01:16:23.172578 progress 85 % (22 MB)
146 01:16:23.380844 progress 90 % (23 MB)
147 01:16:23.583444 progress 95 % (25 MB)
148 01:16:23.786610 progress 100 % (26 MB)
149 01:16:23.802035 26 MB downloaded in 4.29 s (6.15 MB/s)
150 01:16:23.803378 end: 1.5.1 http-download (duration 00:00:04) [common]
152 01:16:23.805657 end: 1.5 download-retry (duration 00:00:04) [common]
153 01:16:23.806419 start: 1.6 prepare-tftp-overlay (timeout 00:09:39) [common]
154 01:16:23.807589 start: 1.6.1 extract-nfsrootfs (timeout 00:09:39) [common]
155 01:16:33.680814 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950526/extract-nfsrootfs-05o0eapn
156 01:16:33.681440 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:16:33.681733 start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
158 01:16:33.682357 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw
159 01:16:33.682811 makedir: /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin
160 01:16:33.683151 makedir: /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/tests
161 01:16:33.683483 makedir: /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/results
162 01:16:33.683833 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-add-keys
163 01:16:33.684475 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-add-sources
164 01:16:33.685004 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-background-process-start
165 01:16:33.685523 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-background-process-stop
166 01:16:33.686057 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-common-functions
167 01:16:33.686594 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-echo-ipv4
168 01:16:33.687097 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-install-packages
169 01:16:33.687600 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-installed-packages
170 01:16:33.688120 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-os-build
171 01:16:33.688626 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-probe-channel
172 01:16:33.689122 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-probe-ip
173 01:16:33.689603 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-target-ip
174 01:16:33.690084 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-target-mac
175 01:16:33.690576 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-target-storage
176 01:16:33.691085 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-case
177 01:16:33.691588 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-event
178 01:16:33.692101 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-feedback
179 01:16:33.692604 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-raise
180 01:16:33.693099 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-reference
181 01:16:33.693597 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-runner
182 01:16:33.694111 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-set
183 01:16:33.694614 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-test-shell
184 01:16:33.695105 Updating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-install-packages (oe)
185 01:16:33.695644 Updating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/bin/lava-installed-packages (oe)
186 01:16:33.696135 Creating /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/environment
187 01:16:33.696527 LAVA metadata
188 01:16:33.696790 - LAVA_JOB_ID=950526
189 01:16:33.697006 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:16:33.697381 start: 1.6.2.1 ssh-authorize (timeout 00:09:29) [common]
191 01:16:33.698351 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:16:33.698674 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:29) [common]
193 01:16:33.698886 skipped lava-vland-overlay
194 01:16:33.699132 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:16:33.699387 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:29) [common]
196 01:16:33.699607 skipped lava-multinode-overlay
197 01:16:33.699849 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:16:33.700132 start: 1.6.2.4 test-definition (timeout 00:09:29) [common]
199 01:16:33.700386 Loading test definitions
200 01:16:33.700667 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:29) [common]
201 01:16:33.700891 Using /lava-950526 at stage 0
202 01:16:33.702157 uuid=950526_1.6.2.4.1 testdef=None
203 01:16:33.702476 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:16:33.702744 start: 1.6.2.4.2 test-overlay (timeout 00:09:29) [common]
205 01:16:33.704590 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:16:33.705384 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:29) [common]
208 01:16:33.707635 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:16:33.708497 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:29) [common]
211 01:16:33.710677 runner path: /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/0/tests/0_dmesg test_uuid 950526_1.6.2.4.1
212 01:16:33.711246 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:16:33.712037 Creating lava-test-runner.conf files
215 01:16:33.712246 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950526/lava-overlay-3pyw4qbw/lava-950526/0 for stage 0
216 01:16:33.712602 - 0_dmesg
217 01:16:33.712978 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:16:33.713265 start: 1.6.2.5 compress-overlay (timeout 00:09:29) [common]
219 01:16:33.735174 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:16:33.735626 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:29) [common]
221 01:16:33.735890 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:16:33.736195 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:16:33.736464 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:29) [common]
224 01:16:34.435092 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:16:34.435541 start: 1.6.4 extract-modules (timeout 00:09:29) [common]
226 01:16:34.435788 extracting modules file /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950526/extract-nfsrootfs-05o0eapn
227 01:16:36.173809 extracting modules file /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk
228 01:16:37.928226 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 01:16:37.928699 start: 1.6.5 apply-overlay-tftp (timeout 00:09:25) [common]
230 01:16:37.928980 [common] Applying overlay to NFS
231 01:16:37.929194 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950526/compress-overlay-2ftow2_s/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950526/extract-nfsrootfs-05o0eapn
232 01:16:37.958315 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:16:37.958719 start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
234 01:16:37.958991 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
235 01:16:37.959219 Converting downloaded kernel to a uImage
236 01:16:37.959527 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/kernel/Image /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/kernel/uImage
237 01:16:39.609296 output: Image Name:
238 01:16:39.609725 output: Created: Thu Nov 7 01:16:37 2024
239 01:16:39.609934 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:16:39.610137 output: Data Size: 169943552 Bytes = 165960.50 KiB = 162.07 MiB
241 01:16:39.610338 output: Load Address: 01080000
242 01:16:39.610538 output: Entry Point: 01080000
243 01:16:39.610734 output:
244 01:16:39.611063 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
245 01:16:39.611325 end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
246 01:16:39.611589 start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
247 01:16:39.611838 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:16:39.612138 start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
249 01:16:39.612396 Building ramdisk /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk
250 01:16:45.112733 >> 426762 blocks
251 01:17:02.733106 Adding RAMdisk u-boot header.
252 01:17:02.733771 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk.cpio.gz.uboot
253 01:17:03.259454 output: Image Name:
254 01:17:03.260142 output: Created: Thu Nov 7 01:17:02 2024
255 01:17:03.260583 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:17:03.261007 output: Data Size: 50962545 Bytes = 49768.11 KiB = 48.60 MiB
257 01:17:03.261418 output: Load Address: 00000000
258 01:17:03.261824 output: Entry Point: 00000000
259 01:17:03.262224 output:
260 01:17:03.263281 rename /var/lib/lava/dispatcher/tmp/950526/extract-overlay-ramdisk-r9csq7ck/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/ramdisk/ramdisk.cpio.gz.uboot
261 01:17:03.264074 end: 1.6.8 compress-ramdisk (duration 00:00:24) [common]
262 01:17:03.264657 end: 1.6 prepare-tftp-overlay (duration 00:00:39) [common]
263 01:17:03.265205 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:00) [common]
264 01:17:03.265685 No LXC device requested
265 01:17:03.266203 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:17:03.266726 start: 1.8 deploy-device-env (timeout 00:09:00) [common]
267 01:17:03.267231 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:17:03.267648 Checking files for TFTP limit of 4294967296 bytes.
269 01:17:03.270334 end: 1 tftp-deploy (duration 00:01:00) [common]
270 01:17:03.270907 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:17:03.271441 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:17:03.271943 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:17:03.272489 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:17:03.273021 Using kernel file from prepare-kernel: 950526/tftp-deploy-6ffuqnvq/kernel/uImage
275 01:17:03.273650 substitutions:
276 01:17:03.274062 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:17:03.274469 - {DTB_ADDR}: 0x01070000
278 01:17:03.274869 - {DTB}: 950526/tftp-deploy-6ffuqnvq/dtb/meson-g12b-a311d-libretech-cc.dtb
279 01:17:03.275271 - {INITRD}: 950526/tftp-deploy-6ffuqnvq/ramdisk/ramdisk.cpio.gz.uboot
280 01:17:03.275669 - {KERNEL_ADDR}: 0x01080000
281 01:17:03.276095 - {KERNEL}: 950526/tftp-deploy-6ffuqnvq/kernel/uImage
282 01:17:03.276500 - {LAVA_MAC}: None
283 01:17:03.276945 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950526/extract-nfsrootfs-05o0eapn
284 01:17:03.277349 - {NFS_SERVER_IP}: 192.168.6.2
285 01:17:03.277746 - {PRESEED_CONFIG}: None
286 01:17:03.278136 - {PRESEED_LOCAL}: None
287 01:17:03.278526 - {RAMDISK_ADDR}: 0x08000000
288 01:17:03.278913 - {RAMDISK}: 950526/tftp-deploy-6ffuqnvq/ramdisk/ramdisk.cpio.gz.uboot
289 01:17:03.279301 - {ROOT_PART}: None
290 01:17:03.279691 - {ROOT}: None
291 01:17:03.280109 - {SERVER_IP}: 192.168.6.2
292 01:17:03.280504 - {TEE_ADDR}: 0x83000000
293 01:17:03.280892 - {TEE}: None
294 01:17:03.281281 Parsed boot commands:
295 01:17:03.281659 - setenv autoload no
296 01:17:03.282047 - setenv initrd_high 0xffffffff
297 01:17:03.282433 - setenv fdt_high 0xffffffff
298 01:17:03.282820 - dhcp
299 01:17:03.283206 - setenv serverip 192.168.6.2
300 01:17:03.283712 - tftpboot 0x01080000 950526/tftp-deploy-6ffuqnvq/kernel/uImage
301 01:17:03.284138 - tftpboot 0x08000000 950526/tftp-deploy-6ffuqnvq/ramdisk/ramdisk.cpio.gz.uboot
302 01:17:03.284542 - tftpboot 0x01070000 950526/tftp-deploy-6ffuqnvq/dtb/meson-g12b-a311d-libretech-cc.dtb
303 01:17:03.284941 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950526/extract-nfsrootfs-05o0eapn,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:17:03.285347 - bootm 0x01080000 0x08000000 0x01070000
305 01:17:03.285856 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:17:03.287340 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:17:03.287764 [common] connect-device Connecting to device using 'telnet conserv1 3007'
309 01:17:03.302821 Setting prompt string to ['lava-test: # ']
310 01:17:03.304299 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:17:03.304921 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:17:03.305485 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:17:03.306027 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:17:03.307388 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
315 01:17:03.344518 >> OK - accepted request
316 01:17:03.346612 Returned 0 in 0 seconds
317 01:17:03.447789 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:17:03.449493 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:17:03.450080 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:17:03.450608 Setting prompt string to ['Hit any key to stop autoboot']
322 01:17:03.451077 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:17:03.452677 Trying 192.168.56.21...
324 01:17:03.453161 Connected to conserv1.
325 01:17:03.453604 Escape character is '^]'.
326 01:17:03.454031
327 01:17:03.454473 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
328 01:17:03.454913
329 01:17:15.413607 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
330 01:17:15.414060 bl2_stage_init 0x01
331 01:17:15.414303 bl2_stage_init 0x81
332 01:17:15.418862 hw id: 0x0000 - pwm id 0x01
333 01:17:15.419179 bl2_stage_init 0xc1
334 01:17:15.419387 bl2_stage_init 0x02
335 01:17:15.419584
336 01:17:15.424458 L0:00000000
337 01:17:15.424909 L1:20000703
338 01:17:15.425302 L2:00008067
339 01:17:15.425690 L3:14000000
340 01:17:15.427531 B2:00402000
341 01:17:15.427945 B1:e0f83180
342 01:17:15.428398
343 01:17:15.428792 TE: 58124
344 01:17:15.429182
345 01:17:15.438694 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
346 01:17:15.439127
347 01:17:15.439520 Board ID = 1
348 01:17:15.439907 Set A53 clk to 24M
349 01:17:15.440328 Set A73 clk to 24M
350 01:17:15.444353 Set clk81 to 24M
351 01:17:15.444807 A53 clk: 1200 MHz
352 01:17:15.445198 A73 clk: 1200 MHz
353 01:17:15.449878 CLK81: 166.6M
354 01:17:15.450293 smccc: 00012a92
355 01:17:15.455452 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
356 01:17:15.455864 board id: 1
357 01:17:15.463879 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:17:15.474533 fw parse done
359 01:17:15.480450 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:17:15.523081 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:17:15.533983 PIEI prepare done
362 01:17:15.534403 fastboot data load
363 01:17:15.534799 fastboot data verify
364 01:17:15.539693 verify result: 266
365 01:17:15.545334 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
366 01:17:15.545805 LPDDR4 probe
367 01:17:15.546211 ddr clk to 1584MHz
368 01:17:15.553353 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:17:15.590625
370 01:17:15.591153 dmc_version 0001
371 01:17:15.597271 Check phy result
372 01:17:15.603083 INFO : End of CA training
373 01:17:15.603562 INFO : End of initialization
374 01:17:15.608686 INFO : Training has run successfully!
375 01:17:15.609166 Check phy result
376 01:17:15.614305 INFO : End of initialization
377 01:17:15.614785 INFO : End of read enable training
378 01:17:15.619882 INFO : End of fine write leveling
379 01:17:15.625582 INFO : End of Write leveling coarse delay
380 01:17:15.626110 INFO : Training has run successfully!
381 01:17:15.626513 Check phy result
382 01:17:15.631101 INFO : End of initialization
383 01:17:15.631588 INFO : End of read dq deskew training
384 01:17:15.636722 INFO : End of MPR read delay center optimization
385 01:17:15.642323 INFO : End of write delay center optimization
386 01:17:15.647907 INFO : End of read delay center optimization
387 01:17:15.648439 INFO : End of max read latency training
388 01:17:15.653500 INFO : Training has run successfully!
389 01:17:15.653978 1D training succeed
390 01:17:15.662692 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:17:15.710305 Check phy result
392 01:17:15.710830 INFO : End of initialization
393 01:17:15.732064 INFO : End of 2D read delay Voltage center optimization
394 01:17:15.752306 INFO : End of 2D read delay Voltage center optimization
395 01:17:15.804443 INFO : End of 2D write delay Voltage center optimization
396 01:17:15.853797 INFO : End of 2D write delay Voltage center optimization
397 01:17:15.859281 INFO : Training has run successfully!
398 01:17:15.859777
399 01:17:15.860244 channel==0
400 01:17:15.864908 RxClkDly_Margin_A0==88 ps 9
401 01:17:15.865407 TxDqDly_Margin_A0==98 ps 10
402 01:17:15.868282 RxClkDly_Margin_A1==88 ps 9
403 01:17:15.868761 TxDqDly_Margin_A1==88 ps 9
404 01:17:15.873894 TrainedVREFDQ_A0==74
405 01:17:15.874385 TrainedVREFDQ_A1==74
406 01:17:15.874788 VrefDac_Margin_A0==25
407 01:17:15.879500 DeviceVref_Margin_A0==40
408 01:17:15.880008 VrefDac_Margin_A1==25
409 01:17:15.885115 DeviceVref_Margin_A1==40
410 01:17:15.885641
411 01:17:15.886079
412 01:17:15.886490 channel==1
413 01:17:15.886889 RxClkDly_Margin_A0==98 ps 10
414 01:17:15.888437 TxDqDly_Margin_A0==98 ps 10
415 01:17:15.893904 RxClkDly_Margin_A1==88 ps 9
416 01:17:15.894397 TxDqDly_Margin_A1==88 ps 9
417 01:17:15.894806 TrainedVREFDQ_A0==77
418 01:17:15.899498 TrainedVREFDQ_A1==77
419 01:17:15.900011 VrefDac_Margin_A0==22
420 01:17:15.905140 DeviceVref_Margin_A0==37
421 01:17:15.905627 VrefDac_Margin_A1==24
422 01:17:15.906025 DeviceVref_Margin_A1==37
423 01:17:15.906416
424 01:17:15.913969 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:17:15.914467
426 01:17:15.942024 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
427 01:17:15.942614 2D training succeed
428 01:17:15.953219 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:17:15.953714 auto size-- 65535DDR cs0 size: 2048MB
430 01:17:15.954111 DDR cs1 size: 2048MB
431 01:17:15.958822 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:17:15.959299 cs0 DataBus test pass
433 01:17:15.964515 cs1 DataBus test pass
434 01:17:15.964991 cs0 AddrBus test pass
435 01:17:15.970019 cs1 AddrBus test pass
436 01:17:15.970489
437 01:17:15.970888 100bdlr_step_size ps== 420
438 01:17:15.971288 result report
439 01:17:15.975629 boot times 0Enable ddr reg access
440 01:17:15.982104 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:17:15.995599 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
442 01:17:16.569203 0.0;M3 CHK:0;cm4_sp_mode 0
443 01:17:16.569772 MVN_1=0x00000000
444 01:17:16.574652 MVN_2=0x00000000
445 01:17:16.580494 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
446 01:17:16.580946 OPS=0x10
447 01:17:16.581350 ring efuse init
448 01:17:16.581744 chipver efuse init
449 01:17:16.585999 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
450 01:17:16.591629 [0.018960 Inits done]
451 01:17:16.592112 secure task start!
452 01:17:16.592517 high task start!
453 01:17:16.596171 low task start!
454 01:17:16.596614 run into bl31
455 01:17:16.602840 NOTICE: BL31: v1.3(release):4fc40b1
456 01:17:16.610634 NOTICE: BL31: Built : 15:58:17, May 22 2019
457 01:17:16.611085 NOTICE: BL31: G12A normal boot!
458 01:17:16.636013 NOTICE: BL31: BL33 decompress pass
459 01:17:16.641681 ERROR: Error initializing runtime service opteed_fast
460 01:17:17.874693
461 01:17:17.875333
462 01:17:17.883003 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
463 01:17:17.883485
464 01:17:17.883913 Model: Libre Computer AML-A311D-CC Alta
465 01:17:18.091416 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
466 01:17:18.114789 DRAM: 2 GiB (effective 3.8 GiB)
467 01:17:18.257894 Core: 408 devices, 31 uclasses, devicetree: separate
468 01:17:18.263679 WDT: Not starting watchdog@f0d0
469 01:17:18.296001 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
470 01:17:18.308388 Loading Environment from FAT... Card did not respond to voltage select! : -110
471 01:17:18.313329 ** Bad device specification mmc 0 **
472 01:17:18.323708 Card did not respond to voltage select! : -110
473 01:17:18.331268 ** Bad device specification mmc 0 **
474 01:17:18.331562 Couldn't find partition mmc 0
475 01:17:18.339742 Card did not respond to voltage select! : -110
476 01:17:18.345198 ** Bad device specification mmc 0 **
477 01:17:18.345676 Couldn't find partition mmc 0
478 01:17:18.350302 Error: could not access storage.
479 01:17:19.613662 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
480 01:17:19.614272 bl2_stage_init 0x01
481 01:17:19.614708 bl2_stage_init 0x81
482 01:17:19.619213 hw id: 0x0000 - pwm id 0x01
483 01:17:19.619698 bl2_stage_init 0xc1
484 01:17:19.620166 bl2_stage_init 0x02
485 01:17:19.620585
486 01:17:19.624897 L0:00000000
487 01:17:19.625401 L1:20000703
488 01:17:19.625832 L2:00008067
489 01:17:19.626240 L3:14000000
490 01:17:19.630412 B2:00402000
491 01:17:19.630884 B1:e0f83180
492 01:17:19.631296
493 01:17:19.631705 TE: 58159
494 01:17:19.632149
495 01:17:19.636025 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
496 01:17:19.636485
497 01:17:19.636898 Board ID = 1
498 01:17:19.641597 Set A53 clk to 24M
499 01:17:19.642060 Set A73 clk to 24M
500 01:17:19.642470 Set clk81 to 24M
501 01:17:19.647195 A53 clk: 1200 MHz
502 01:17:19.647641 A73 clk: 1200 MHz
503 01:17:19.648084 CLK81: 166.6M
504 01:17:19.648494 smccc: 00012ab5
505 01:17:19.652910 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
506 01:17:19.658407 board id: 1
507 01:17:19.664272 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
508 01:17:19.674964 fw parse done
509 01:17:19.680988 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
510 01:17:19.723523 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
511 01:17:19.734420 PIEI prepare done
512 01:17:19.734893 fastboot data load
513 01:17:19.735321 fastboot data verify
514 01:17:19.740219 verify result: 266
515 01:17:19.745744 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
516 01:17:19.746220 LPDDR4 probe
517 01:17:19.746635 ddr clk to 1584MHz
518 01:17:19.753676 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
519 01:17:19.791024
520 01:17:19.791506 dmc_version 0001
521 01:17:19.797657 Check phy result
522 01:17:19.803513 INFO : End of CA training
523 01:17:19.804017 INFO : End of initialization
524 01:17:19.809134 INFO : Training has run successfully!
525 01:17:19.809608 Check phy result
526 01:17:19.814734 INFO : End of initialization
527 01:17:19.815201 INFO : End of read enable training
528 01:17:19.820331 INFO : End of fine write leveling
529 01:17:19.825919 INFO : End of Write leveling coarse delay
530 01:17:19.826392 INFO : Training has run successfully!
531 01:17:19.826810 Check phy result
532 01:17:19.831530 INFO : End of initialization
533 01:17:19.832035 INFO : End of read dq deskew training
534 01:17:19.837124 INFO : End of MPR read delay center optimization
535 01:17:19.842746 INFO : End of write delay center optimization
536 01:17:19.848304 INFO : End of read delay center optimization
537 01:17:19.848773 INFO : End of max read latency training
538 01:17:19.853931 INFO : Training has run successfully!
539 01:17:19.854398 1D training succeed
540 01:17:19.863079 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
541 01:17:19.910769 Check phy result
542 01:17:19.911243 INFO : End of initialization
543 01:17:19.932464 INFO : End of 2D read delay Voltage center optimization
544 01:17:19.952706 INFO : End of 2D read delay Voltage center optimization
545 01:17:20.004707 INFO : End of 2D write delay Voltage center optimization
546 01:17:20.054133 INFO : End of 2D write delay Voltage center optimization
547 01:17:20.059659 INFO : Training has run successfully!
548 01:17:20.060176
549 01:17:20.060596 channel==0
550 01:17:20.065249 RxClkDly_Margin_A0==88 ps 9
551 01:17:20.065732 TxDqDly_Margin_A0==98 ps 10
552 01:17:20.070872 RxClkDly_Margin_A1==88 ps 9
553 01:17:20.071339 TxDqDly_Margin_A1==98 ps 10
554 01:17:20.071755 TrainedVREFDQ_A0==74
555 01:17:20.076500 TrainedVREFDQ_A1==74
556 01:17:20.076979 VrefDac_Margin_A0==25
557 01:17:20.077392 DeviceVref_Margin_A0==40
558 01:17:20.082100 VrefDac_Margin_A1==23
559 01:17:20.082566 DeviceVref_Margin_A1==40
560 01:17:20.082976
561 01:17:20.083380
562 01:17:20.087693 channel==1
563 01:17:20.088204 RxClkDly_Margin_A0==98 ps 10
564 01:17:20.088622 TxDqDly_Margin_A0==88 ps 9
565 01:17:20.093287 RxClkDly_Margin_A1==98 ps 10
566 01:17:20.093758 TxDqDly_Margin_A1==98 ps 10
567 01:17:20.098879 TrainedVREFDQ_A0==77
568 01:17:20.099348 TrainedVREFDQ_A1==74
569 01:17:20.099761 VrefDac_Margin_A0==22
570 01:17:20.104460 DeviceVref_Margin_A0==37
571 01:17:20.104930 VrefDac_Margin_A1==22
572 01:17:20.110099 DeviceVref_Margin_A1==40
573 01:17:20.110569
574 01:17:20.110987 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
575 01:17:20.115676
576 01:17:20.143635 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000018 00000017 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
577 01:17:20.144163 2D training succeed
578 01:17:20.149261 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
579 01:17:20.154872 auto size-- 65535DDR cs0 size: 2048MB
580 01:17:20.155346 DDR cs1 size: 2048MB
581 01:17:20.160472 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
582 01:17:20.160941 cs0 DataBus test pass
583 01:17:20.166082 cs1 DataBus test pass
584 01:17:20.166553 cs0 AddrBus test pass
585 01:17:20.166964 cs1 AddrBus test pass
586 01:17:20.167367
587 01:17:20.171648 100bdlr_step_size ps== 420
588 01:17:20.172158 result report
589 01:17:20.177266 boot times 0Enable ddr reg access
590 01:17:20.182704 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
591 01:17:20.196224 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
592 01:17:20.770142 0.0;M3 CHK:0;cm4_sp_mode 0
593 01:17:20.770795 MVN_1=0x00000000
594 01:17:20.775625 MVN_2=0x00000000
595 01:17:20.781372 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
596 01:17:20.781968 OPS=0x10
597 01:17:20.782423 ring efuse init
598 01:17:20.782902 chipver efuse init
599 01:17:20.787047 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
600 01:17:20.792460 [0.018961 Inits done]
601 01:17:20.792966 secure task start!
602 01:17:20.793363 high task start!
603 01:17:20.797025 low task start!
604 01:17:20.797493 run into bl31
605 01:17:20.803679 NOTICE: BL31: v1.3(release):4fc40b1
606 01:17:20.811539 NOTICE: BL31: Built : 15:58:17, May 22 2019
607 01:17:20.812048 NOTICE: BL31: G12A normal boot!
608 01:17:20.836924 NOTICE: BL31: BL33 decompress pass
609 01:17:20.842621 ERROR: Error initializing runtime service opteed_fast
610 01:17:22.075570
611 01:17:22.076245
612 01:17:22.083881 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
613 01:17:22.084416
614 01:17:22.084859 Model: Libre Computer AML-A311D-CC Alta
615 01:17:22.292307 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
616 01:17:22.315709 DRAM: 2 GiB (effective 3.8 GiB)
617 01:17:22.458789 Core: 408 devices, 31 uclasses, devicetree: separate
618 01:17:22.464728 WDT: Not starting watchdog@f0d0
619 01:17:22.496775 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
620 01:17:22.509215 Loading Environment from FAT... Card did not respond to voltage select! : -110
621 01:17:22.514266 ** Bad device specification mmc 0 **
622 01:17:22.524549 Card did not respond to voltage select! : -110
623 01:17:22.532196 ** Bad device specification mmc 0 **
624 01:17:22.532686 Couldn't find partition mmc 0
625 01:17:22.540408 Card did not respond to voltage select! : -110
626 01:17:22.545987 ** Bad device specification mmc 0 **
627 01:17:22.546448 Couldn't find partition mmc 0
628 01:17:22.551080 Error: could not access storage.
629 01:17:22.894830 Net: eth0: ethernet@ff3f0000
630 01:17:22.895427 starting USB...
631 01:17:23.146481 Bus usb@ff500000: Register 3000140 NbrPorts 3
632 01:17:23.147065 Starting the controller
633 01:17:23.153446 USB XHCI 1.10
634 01:17:24.862684 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
635 01:17:24.863335 bl2_stage_init 0x81
636 01:17:24.868281 hw id: 0x0000 - pwm id 0x01
637 01:17:24.868748 bl2_stage_init 0xc1
638 01:17:24.869166 bl2_stage_init 0x02
639 01:17:24.869574
640 01:17:24.873783 L0:00000000
641 01:17:24.874224 L1:20000703
642 01:17:24.874635 L2:00008067
643 01:17:24.875041 L3:14000000
644 01:17:24.875443 B2:00402000
645 01:17:24.879409 B1:e0f83180
646 01:17:24.879850
647 01:17:24.880296 TE: 58150
648 01:17:24.880706
649 01:17:24.885008 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
650 01:17:24.885453
651 01:17:24.885861 Board ID = 1
652 01:17:24.890999 Set A53 clk to 24M
653 01:17:24.891433 Set A73 clk to 24M
654 01:17:24.891838 Set clk81 to 24M
655 01:17:24.896241 A53 clk: 1200 MHz
656 01:17:24.896833 A73 clk: 1200 MHz
657 01:17:24.897310 CLK81: 166.6M
658 01:17:24.897769 smccc: 00012aac
659 01:17:24.901917 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
660 01:17:24.907393 board id: 1
661 01:17:24.912279 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
662 01:17:24.923847 fw parse done
663 01:17:24.930034 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
664 01:17:24.972292 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
665 01:17:24.983542 PIEI prepare done
666 01:17:24.984129 fastboot data load
667 01:17:24.984609 fastboot data verify
668 01:17:24.988786 verify result: 266
669 01:17:24.994392 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
670 01:17:24.994916 LPDDR4 probe
671 01:17:24.995385 ddr clk to 1584MHz
672 01:17:25.002375 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
673 01:17:25.040224
674 01:17:25.040795 dmc_version 0001
675 01:17:25.046299 Check phy result
676 01:17:25.052192 INFO : End of CA training
677 01:17:25.052699 INFO : End of initialization
678 01:17:25.057860 INFO : Training has run successfully!
679 01:17:25.058364 Check phy result
680 01:17:25.063386 INFO : End of initialization
681 01:17:25.063894 INFO : End of read enable training
682 01:17:25.066732 INFO : End of fine write leveling
683 01:17:25.072458 INFO : End of Write leveling coarse delay
684 01:17:25.077932 INFO : Training has run successfully!
685 01:17:25.078432 Check phy result
686 01:17:25.078892 INFO : End of initialization
687 01:17:25.083508 INFO : End of read dq deskew training
688 01:17:25.089108 INFO : End of MPR read delay center optimization
689 01:17:25.089615 INFO : End of write delay center optimization
690 01:17:25.094726 INFO : End of read delay center optimization
691 01:17:25.100309 INFO : End of max read latency training
692 01:17:25.100817 INFO : Training has run successfully!
693 01:17:25.105902 1D training succeed
694 01:17:25.111805 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 01:17:25.159405 Check phy result
696 01:17:25.159974 INFO : End of initialization
697 01:17:25.181873 INFO : End of 2D read delay Voltage center optimization
698 01:17:25.201899 INFO : End of 2D read delay Voltage center optimization
699 01:17:25.253866 INFO : End of 2D write delay Voltage center optimization
700 01:17:25.303223 INFO : End of 2D write delay Voltage center optimization
701 01:17:25.308622 INFO : Training has run successfully!
702 01:17:25.309140
703 01:17:25.309615 channel==0
704 01:17:25.314148 RxClkDly_Margin_A0==88 ps 9
705 01:17:25.314650 TxDqDly_Margin_A0==98 ps 10
706 01:17:25.319815 RxClkDly_Margin_A1==88 ps 9
707 01:17:25.320360 TxDqDly_Margin_A1==98 ps 10
708 01:17:25.320829 TrainedVREFDQ_A0==74
709 01:17:25.325370 TrainedVREFDQ_A1==74
710 01:17:25.325872 VrefDac_Margin_A0==24
711 01:17:25.326332 DeviceVref_Margin_A0==40
712 01:17:25.331055 VrefDac_Margin_A1==24
713 01:17:25.331695 DeviceVref_Margin_A1==40
714 01:17:25.332227
715 01:17:25.332689
716 01:17:25.336741 channel==1
717 01:17:25.337529 RxClkDly_Margin_A0==98 ps 10
718 01:17:25.338079 TxDqDly_Margin_A0==98 ps 10
719 01:17:25.342239 RxClkDly_Margin_A1==98 ps 10
720 01:17:25.343074 TxDqDly_Margin_A1==88 ps 9
721 01:17:25.347798 TrainedVREFDQ_A0==77
722 01:17:25.348614 TrainedVREFDQ_A1==77
723 01:17:25.349300 VrefDac_Margin_A0==22
724 01:17:25.353391 DeviceVref_Margin_A0==37
725 01:17:25.353971 VrefDac_Margin_A1==22
726 01:17:25.358953 DeviceVref_Margin_A1==37
727 01:17:25.359465
728 01:17:25.359930 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
729 01:17:25.364627
730 01:17:25.392650 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000018 00000015 00000018 00000018 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000019 00000017 dram_vref_reg_value 0x 00000060
731 01:17:25.393089 2D training succeed
732 01:17:25.398170 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
733 01:17:25.403792 auto size-- 65535DDR cs0 size: 2048MB
734 01:17:25.404320 DDR cs1 size: 2048MB
735 01:17:25.409497 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
736 01:17:25.409861 cs0 DataBus test pass
737 01:17:25.414956 cs1 DataBus test pass
738 01:17:25.415453 cs0 AddrBus test pass
739 01:17:25.415832 cs1 AddrBus test pass
740 01:17:25.416142
741 01:17:25.420569 100bdlr_step_size ps== 420
742 01:17:25.421065 result report
743 01:17:25.426149 boot times 0Enable ddr reg access
744 01:17:25.431616 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
745 01:17:25.445091 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
746 01:17:26.018033 0.0;M3 CHK:0;cm4_sp_mode 0
747 01:17:26.018461 MVN_1=0x00000000
748 01:17:26.022504 MVN_2=0x00000000
749 01:17:26.028261 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
750 01:17:26.028576 OPS=0x10
751 01:17:26.028790 ring efuse init
752 01:17:26.028995 chipver efuse init
753 01:17:26.033847 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
754 01:17:26.039472 [0.018960 Inits done]
755 01:17:26.039776 secure task start!
756 01:17:26.040032 high task start!
757 01:17:26.044041 low task start!
758 01:17:26.044322 run into bl31
759 01:17:26.050747 NOTICE: BL31: v1.3(release):4fc40b1
760 01:17:26.058534 NOTICE: BL31: Built : 15:58:17, May 22 2019
761 01:17:26.058842 NOTICE: BL31: G12A normal boot!
762 01:17:26.083912 NOTICE: BL31: BL33 decompress pass
763 01:17:26.089625 ERROR: Error initializing runtime service opteed_fast
764 01:17:27.322598
765 01:17:27.323051
766 01:17:27.330920 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
767 01:17:27.331376
768 01:17:27.331733 Model: Libre Computer AML-A311D-CC Alta
769 01:17:27.539364 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
770 01:17:27.562833 DRAM: 2 GiB (effective 3.8 GiB)
771 01:17:27.705785 Core: 408 devices, 31 uclasses, devicetree: separate
772 01:17:27.711681 WDT: Not starting watchdog@f0d0
773 01:17:27.743954 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
774 01:17:27.756354 Loading Environment from FAT... Card did not respond to voltage select! : -110
775 01:17:27.761361 ** Bad device specification mmc 0 **
776 01:17:27.771683 Card did not respond to voltage select! : -110
777 01:17:27.779334 ** Bad device specification mmc 0 **
778 01:17:27.779851 Couldn't find partition mmc 0
779 01:17:27.787689 Card did not respond to voltage select! : -110
780 01:17:27.793179 ** Bad device specification mmc 0 **
781 01:17:27.793676 Couldn't find partition mmc 0
782 01:17:27.798235 Error: could not access storage.
783 01:17:28.140668 Net: eth0: ethernet@ff3f0000
784 01:17:28.141256 starting USB...
785 01:17:28.392546 Bus usb@ff500000: Register 3000140 NbrPorts 3
786 01:17:28.393096 Starting the controller
787 01:17:28.399516 USB XHCI 1.10
788 01:17:30.562727 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
789 01:17:30.563170 bl2_stage_init 0x01
790 01:17:30.563399 bl2_stage_init 0x81
791 01:17:30.568264 hw id: 0x0000 - pwm id 0x01
792 01:17:30.568597 bl2_stage_init 0xc1
793 01:17:30.568824 bl2_stage_init 0x02
794 01:17:30.569039
795 01:17:30.573881 L0:00000000
796 01:17:30.574229 L1:20000703
797 01:17:30.574503 L2:00008067
798 01:17:30.574927 L3:14000000
799 01:17:30.576787 B2:00402000
800 01:17:30.577264 B1:e0f83180
801 01:17:30.577681
802 01:17:30.578087 TE: 58159
803 01:17:30.578494
804 01:17:30.587884 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
805 01:17:30.588412
806 01:17:30.588839 Board ID = 1
807 01:17:30.589247 Set A53 clk to 24M
808 01:17:30.589652 Set A73 clk to 24M
809 01:17:30.593547 Set clk81 to 24M
810 01:17:30.594051 A53 clk: 1200 MHz
811 01:17:30.594467 A73 clk: 1200 MHz
812 01:17:30.596997 CLK81: 166.6M
813 01:17:30.597456 smccc: 00012ab5
814 01:17:30.602511 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
815 01:17:30.608176 board id: 1
816 01:17:30.613283 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
817 01:17:30.623955 fw parse done
818 01:17:30.629914 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
819 01:17:30.672559 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
820 01:17:30.683524 PIEI prepare done
821 01:17:30.684066 fastboot data load
822 01:17:30.684501 fastboot data verify
823 01:17:30.689027 verify result: 266
824 01:17:30.694611 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
825 01:17:30.695094 LPDDR4 probe
826 01:17:30.695511 ddr clk to 1584MHz
827 01:17:30.702647 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
828 01:17:30.739956
829 01:17:30.740438 dmc_version 0001
830 01:17:30.746638 Check phy result
831 01:17:30.752540 INFO : End of CA training
832 01:17:30.753029 INFO : End of initialization
833 01:17:30.758045 INFO : Training has run successfully!
834 01:17:30.758400 Check phy result
835 01:17:30.763662 INFO : End of initialization
836 01:17:30.764031 INFO : End of read enable training
837 01:17:30.767004 INFO : End of fine write leveling
838 01:17:30.772535 INFO : End of Write leveling coarse delay
839 01:17:30.778099 INFO : Training has run successfully!
840 01:17:30.778443 Check phy result
841 01:17:30.778670 INFO : End of initialization
842 01:17:30.783696 INFO : End of read dq deskew training
843 01:17:30.789300 INFO : End of MPR read delay center optimization
844 01:17:30.789645 INFO : End of write delay center optimization
845 01:17:30.794937 INFO : End of read delay center optimization
846 01:17:30.800558 INFO : End of max read latency training
847 01:17:30.801038 INFO : Training has run successfully!
848 01:17:30.806082 1D training succeed
849 01:17:30.812096 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 01:17:30.859756 Check phy result
851 01:17:30.860185 INFO : End of initialization
852 01:17:30.881431 INFO : End of 2D read delay Voltage center optimization
853 01:17:30.901781 INFO : End of 2D read delay Voltage center optimization
854 01:17:30.953739 INFO : End of 2D write delay Voltage center optimization
855 01:17:31.003188 INFO : End of 2D write delay Voltage center optimization
856 01:17:31.008741 INFO : Training has run successfully!
857 01:17:31.009246
858 01:17:31.009548 channel==0
859 01:17:31.014370 RxClkDly_Margin_A0==88 ps 9
860 01:17:31.014873 TxDqDly_Margin_A0==108 ps 11
861 01:17:31.019858 RxClkDly_Margin_A1==88 ps 9
862 01:17:31.020229 TxDqDly_Margin_A1==88 ps 9
863 01:17:31.020447 TrainedVREFDQ_A0==74
864 01:17:31.025544 TrainedVREFDQ_A1==74
865 01:17:31.025895 VrefDac_Margin_A0==25
866 01:17:31.026114 DeviceVref_Margin_A0==40
867 01:17:31.031082 VrefDac_Margin_A1==25
868 01:17:31.031411 DeviceVref_Margin_A1==40
869 01:17:31.031627
870 01:17:31.031835
871 01:17:31.036734 channel==1
872 01:17:31.037065 RxClkDly_Margin_A0==98 ps 10
873 01:17:31.037285 TxDqDly_Margin_A0==98 ps 10
874 01:17:31.042314 RxClkDly_Margin_A1==98 ps 10
875 01:17:31.042639 TxDqDly_Margin_A1==88 ps 9
876 01:17:31.047820 TrainedVREFDQ_A0==77
877 01:17:31.048164 TrainedVREFDQ_A1==77
878 01:17:31.048391 VrefDac_Margin_A0==22
879 01:17:31.053532 DeviceVref_Margin_A0==37
880 01:17:31.053860 VrefDac_Margin_A1==22
881 01:17:31.059082 DeviceVref_Margin_A1==37
882 01:17:31.059413
883 01:17:31.059633 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
884 01:17:31.064735
885 01:17:31.092659 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000018 00000016 00000017 00000016 00000018 00000018 00000018 00000019 00000018 0000001a 00000019 00000018 00000017 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
886 01:17:31.093052 2D training succeed
887 01:17:31.098281 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
888 01:17:31.103734 auto size-- 65535DDR cs0 size: 2048MB
889 01:17:31.104070 DDR cs1 size: 2048MB
890 01:17:31.109395 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
891 01:17:31.109694 cs0 DataBus test pass
892 01:17:31.114938 cs1 DataBus test pass
893 01:17:31.115247 cs0 AddrBus test pass
894 01:17:31.115450 cs1 AddrBus test pass
895 01:17:31.115648
896 01:17:31.120526 100bdlr_step_size ps== 420
897 01:17:31.120832 result report
898 01:17:31.126135 boot times 0Enable ddr reg access
899 01:17:31.131595 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
900 01:17:31.145045 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
901 01:17:31.718746 0.0;M3 CHK:0;cm4_sp_mode 0
902 01:17:31.719181 MVN_1=0x00000000
903 01:17:31.724173 MVN_2=0x00000000
904 01:17:31.729930 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
905 01:17:31.730231 OPS=0x10
906 01:17:31.730446 ring efuse init
907 01:17:31.730656 chipver efuse init
908 01:17:31.735539 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
909 01:17:31.741121 [0.018960 Inits done]
910 01:17:31.741545 secure task start!
911 01:17:31.741877 high task start!
912 01:17:31.745734 low task start!
913 01:17:31.746154 run into bl31
914 01:17:31.752423 NOTICE: BL31: v1.3(release):4fc40b1
915 01:17:31.760190 NOTICE: BL31: Built : 15:58:17, May 22 2019
916 01:17:31.760493 NOTICE: BL31: G12A normal boot!
917 01:17:31.785600 NOTICE: BL31: BL33 decompress pass
918 01:17:31.791246 ERROR: Error initializing runtime service opteed_fast
919 01:17:33.024171
920 01:17:33.024598
921 01:17:33.032539 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
922 01:17:33.032854
923 01:17:33.033067 Model: Libre Computer AML-A311D-CC Alta
924 01:17:33.241006 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
925 01:17:33.264417 DRAM: 2 GiB (effective 3.8 GiB)
926 01:17:33.407414 Core: 408 devices, 31 uclasses, devicetree: separate
927 01:17:33.413255 WDT: Not starting watchdog@f0d0
928 01:17:33.445553 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
929 01:17:33.457954 Loading Environment from FAT... Card did not respond to voltage select! : -110
930 01:17:33.462942 ** Bad device specification mmc 0 **
931 01:17:33.473261 Card did not respond to voltage select! : -110
932 01:17:33.480910 ** Bad device specification mmc 0 **
933 01:17:33.481209 Couldn't find partition mmc 0
934 01:17:33.489283 Card did not respond to voltage select! : -110
935 01:17:33.494778 ** Bad device specification mmc 0 **
936 01:17:33.495197 Couldn't find partition mmc 0
937 01:17:33.499845 Error: could not access storage.
938 01:17:33.842385 Net: eth0: ethernet@ff3f0000
939 01:17:33.842820 starting USB...
940 01:17:34.094163 Bus usb@ff500000: Register 3000140 NbrPorts 3
941 01:17:34.094713 Starting the controller
942 01:17:34.101078 USB XHCI 1.10
943 01:17:35.655116 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
944 01:17:35.663331 scanning usb for storage devices... 0 Storage Device(s) found
946 01:17:35.714463 Hit any key to stop autoboot: 1
947 01:17:35.715260 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
948 01:17:35.715651 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
949 01:17:35.715919 Setting prompt string to ['=>']
950 01:17:35.716214 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
951 01:17:35.720816 0
952 01:17:35.721445 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
953 01:17:35.721743 Sending with 10 millisecond of delay
955 01:17:36.860693 => setenv autoload no
956 01:17:36.874210 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:26)
957 01:17:36.879182 setenv autoload no
958 01:17:36.879909 Sending with 10 millisecond of delay
960 01:17:38.677237 => setenv initrd_high 0xffffffff
961 01:17:38.688055 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
962 01:17:38.688902 setenv initrd_high 0xffffffff
963 01:17:38.689620 Sending with 10 millisecond of delay
965 01:17:40.305973 => setenv fdt_high 0xffffffff
966 01:17:40.316773 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
967 01:17:40.317572 setenv fdt_high 0xffffffff
968 01:17:40.318284 Sending with 10 millisecond of delay
970 01:17:40.610204 => dhcp
971 01:17:40.621005 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
972 01:17:40.621817 dhcp
973 01:17:40.622258 Speed: 1000, full duplex
974 01:17:40.622671 BOOTP broadcast 1
975 01:17:40.632659 DHCP client bound to address 192.168.6.27 (12 ms)
976 01:17:40.633361 Sending with 10 millisecond of delay
978 01:17:42.313945 => setenv serverip 192.168.6.2
979 01:17:42.324503 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
980 01:17:42.325061 setenv serverip 192.168.6.2
981 01:17:42.325516 Sending with 10 millisecond of delay
983 01:17:46.049501 => tftpboot 0x01080000 950526/tftp-deploy-6ffuqnvq/kernel/uImage
984 01:17:46.060281 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:17)
985 01:17:46.060872 tftpboot 0x01080000 950526/tftp-deploy-6ffuqnvq/kernel/uImage
986 01:17:46.061114 Speed: 1000, full duplex
987 01:17:46.061324 Using ethernet@ff3f0000 device
988 01:17:46.062857 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
989 01:17:46.068502 Filename '950526/tftp-deploy-6ffuqnvq/kernel/uImage'.
990 01:17:46.072349 Load address: 0x1080000
991 01:17:50.317289 Loading: *###################
992 01:17:50.317914 TFTP error: trying to overwrite reserved memory...
994 01:17:50.319334 end: 2.4.3 bootloader-commands (duration 00:00:15) [common]
997 01:17:50.321209 end: 2.4 uboot-commands (duration 00:00:47) [common]
999 01:17:50.322660 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
1001 01:17:50.323701 end: 2 uboot-action (duration 00:00:47) [common]
1003 01:17:50.325332 Cleaning after the job
1004 01:17:50.325863 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/ramdisk
1005 01:17:50.351890 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/kernel
1006 01:17:50.413648 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/dtb
1007 01:17:50.414532 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/nfsrootfs
1008 01:17:50.584198 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950526/tftp-deploy-6ffuqnvq/modules
1009 01:17:50.650140 start: 4.1 power-off (timeout 00:00:30) [common]
1010 01:17:50.650823 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1011 01:17:50.684855 >> OK - accepted request
1012 01:17:50.687362 Returned 0 in 0 seconds
1013 01:17:50.788122 end: 4.1 power-off (duration 00:00:00) [common]
1015 01:17:50.789077 start: 4.2 read-feedback (timeout 00:10:00) [common]
1016 01:17:50.789736 Listened to connection for namespace 'common' for up to 1s
1017 01:17:51.790231 Finalising connection for namespace 'common'
1018 01:17:51.790740 Disconnecting from shell: Finalise
1019 01:17:51.791010 =>
1020 01:17:51.891633 end: 4.2 read-feedback (duration 00:00:01) [common]
1021 01:17:51.892143 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950526
1022 01:17:54.015857 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950526
1023 01:17:54.016629 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.