Boot log: meson-sm1-s905d3-libretech-cc

    1 01:17:43.511314  lava-dispatcher, installed at version: 2024.01
    2 01:17:43.512179  start: 0 validate
    3 01:17:43.512655  Start time: 2024-11-07 01:17:43.512623+00:00 (UTC)
    4 01:17:43.513208  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 01:17:43.513754  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 01:17:43.553139  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 01:17:43.553708  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fkernel%2FImage exists
    8 01:17:43.583579  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 01:17:43.584250  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 01:17:43.613115  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 01:17:43.613588  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 01:17:43.644128  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 01:17:43.644608  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bdebug%2Fgcc-12%2Fmodules.tar.xz exists
   14 01:17:43.683752  validate duration: 0.17
   16 01:17:43.684586  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 01:17:43.684906  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 01:17:43.685192  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 01:17:43.685768  Not decompressing ramdisk as can be used compressed.
   20 01:17:43.686168  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 01:17:43.686433  saving as /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/ramdisk/initrd.cpio.gz
   22 01:17:43.686696  total size: 5628182 (5 MB)
   23 01:17:43.728265  progress   0 % (0 MB)
   24 01:17:43.732965  progress   5 % (0 MB)
   25 01:17:43.737049  progress  10 % (0 MB)
   26 01:17:43.740684  progress  15 % (0 MB)
   27 01:17:43.744791  progress  20 % (1 MB)
   28 01:17:43.748364  progress  25 % (1 MB)
   29 01:17:43.752245  progress  30 % (1 MB)
   30 01:17:43.756253  progress  35 % (1 MB)
   31 01:17:43.759849  progress  40 % (2 MB)
   32 01:17:43.763775  progress  45 % (2 MB)
   33 01:17:43.767251  progress  50 % (2 MB)
   34 01:17:43.771143  progress  55 % (2 MB)
   35 01:17:43.775112  progress  60 % (3 MB)
   36 01:17:43.778656  progress  65 % (3 MB)
   37 01:17:43.782552  progress  70 % (3 MB)
   38 01:17:43.786136  progress  75 % (4 MB)
   39 01:17:43.789951  progress  80 % (4 MB)
   40 01:17:43.793278  progress  85 % (4 MB)
   41 01:17:43.796884  progress  90 % (4 MB)
   42 01:17:43.800451  progress  95 % (5 MB)
   43 01:17:43.803709  progress 100 % (5 MB)
   44 01:17:43.804370  5 MB downloaded in 0.12 s (45.62 MB/s)
   45 01:17:43.804922  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 01:17:43.805810  end: 1.1 download-retry (duration 00:00:00) [common]
   48 01:17:43.806108  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 01:17:43.806379  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 01:17:43.806923  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/kernel/Image
   51 01:17:43.807180  saving as /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/kernel/Image
   52 01:17:43.807392  total size: 169943552 (162 MB)
   53 01:17:43.807603  No compression specified
   54 01:17:43.844516  progress   0 % (0 MB)
   55 01:17:43.945549  progress   5 % (8 MB)
   56 01:17:44.043520  progress  10 % (16 MB)
   57 01:17:44.142096  progress  15 % (24 MB)
   58 01:17:44.240058  progress  20 % (32 MB)
   59 01:17:44.338241  progress  25 % (40 MB)
   60 01:17:44.436417  progress  30 % (48 MB)
   61 01:17:44.535066  progress  35 % (56 MB)
   62 01:17:44.633638  progress  40 % (64 MB)
   63 01:17:44.731767  progress  45 % (72 MB)
   64 01:17:44.830436  progress  50 % (81 MB)
   65 01:17:44.928277  progress  55 % (89 MB)
   66 01:17:45.025483  progress  60 % (97 MB)
   67 01:17:45.124061  progress  65 % (105 MB)
   68 01:17:45.222910  progress  70 % (113 MB)
   69 01:17:45.322122  progress  75 % (121 MB)
   70 01:17:45.421483  progress  80 % (129 MB)
   71 01:17:45.520658  progress  85 % (137 MB)
   72 01:17:45.620417  progress  90 % (145 MB)
   73 01:17:45.719948  progress  95 % (153 MB)
   74 01:17:45.818902  progress 100 % (162 MB)
   75 01:17:45.819535  162 MB downloaded in 2.01 s (80.55 MB/s)
   76 01:17:45.820031  end: 1.2.1 http-download (duration 00:00:02) [common]
   78 01:17:45.820861  end: 1.2 download-retry (duration 00:00:02) [common]
   79 01:17:45.821134  start: 1.3 download-retry (timeout 00:09:58) [common]
   80 01:17:45.821396  start: 1.3.1 http-download (timeout 00:09:58) [common]
   81 01:17:45.821868  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 01:17:45.822140  saving as /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 01:17:45.822349  total size: 53209 (0 MB)
   84 01:17:45.822555  No compression specified
   85 01:17:45.863840  progress  61 % (0 MB)
   86 01:17:45.864798  progress 100 % (0 MB)
   87 01:17:45.865415  0 MB downloaded in 0.04 s (1.18 MB/s)
   88 01:17:45.865886  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 01:17:45.866696  end: 1.3 download-retry (duration 00:00:00) [common]
   91 01:17:45.866958  start: 1.4 download-retry (timeout 00:09:58) [common]
   92 01:17:45.867220  start: 1.4.1 http-download (timeout 00:09:58) [common]
   93 01:17:45.867685  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 01:17:45.867922  saving as /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/nfsrootfs/full.rootfs.tar
   95 01:17:45.868163  total size: 107552908 (102 MB)
   96 01:17:45.868375  Using unxz to decompress xz
   97 01:17:45.906661  progress   0 % (0 MB)
   98 01:17:46.591809  progress   5 % (5 MB)
   99 01:17:47.336886  progress  10 % (10 MB)
  100 01:17:48.069563  progress  15 % (15 MB)
  101 01:17:48.843693  progress  20 % (20 MB)
  102 01:17:49.415869  progress  25 % (25 MB)
  103 01:17:50.039688  progress  30 % (30 MB)
  104 01:17:50.782700  progress  35 % (35 MB)
  105 01:17:51.126903  progress  40 % (41 MB)
  106 01:17:51.554066  progress  45 % (46 MB)
  107 01:17:52.244820  progress  50 % (51 MB)
  108 01:17:52.930208  progress  55 % (56 MB)
  109 01:17:53.690060  progress  60 % (61 MB)
  110 01:17:54.447467  progress  65 % (66 MB)
  111 01:17:55.177594  progress  70 % (71 MB)
  112 01:17:55.942713  progress  75 % (76 MB)
  113 01:17:56.619675  progress  80 % (82 MB)
  114 01:17:57.324575  progress  85 % (87 MB)
  115 01:17:58.052117  progress  90 % (92 MB)
  116 01:17:58.823364  progress  95 % (97 MB)
  117 01:17:59.620098  progress 100 % (102 MB)
  118 01:17:59.632577  102 MB downloaded in 13.76 s (7.45 MB/s)
  119 01:17:59.633192  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 01:17:59.634062  end: 1.4 download-retry (duration 00:00:14) [common]
  122 01:17:59.634341  start: 1.5 download-retry (timeout 00:09:44) [common]
  123 01:17:59.634615  start: 1.5.1 http-download (timeout 00:09:44) [common]
  124 01:17:59.635089  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+debug/gcc-12/modules.tar.xz
  125 01:17:59.635346  saving as /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/modules/modules.tar
  126 01:17:59.635558  total size: 27621356 (26 MB)
  127 01:17:59.635777  Using unxz to decompress xz
  128 01:17:59.683032  progress   0 % (0 MB)
  129 01:17:59.873911  progress   5 % (1 MB)
  130 01:18:00.073007  progress  10 % (2 MB)
  131 01:18:00.301342  progress  15 % (3 MB)
  132 01:18:00.534993  progress  20 % (5 MB)
  133 01:18:00.732758  progress  25 % (6 MB)
  134 01:18:00.933285  progress  30 % (7 MB)
  135 01:18:01.137117  progress  35 % (9 MB)
  136 01:18:01.329622  progress  40 % (10 MB)
  137 01:18:01.522059  progress  45 % (11 MB)
  138 01:18:01.734446  progress  50 % (13 MB)
  139 01:18:01.942085  progress  55 % (14 MB)
  140 01:18:02.220722  progress  60 % (15 MB)
  141 01:18:02.454063  progress  65 % (17 MB)
  142 01:18:02.670622  progress  70 % (18 MB)
  143 01:18:02.891658  progress  75 % (19 MB)
  144 01:18:03.092342  progress  80 % (21 MB)
  145 01:18:03.297622  progress  85 % (22 MB)
  146 01:18:03.501666  progress  90 % (23 MB)
  147 01:18:03.699352  progress  95 % (25 MB)
  148 01:18:03.898422  progress 100 % (26 MB)
  149 01:18:03.913191  26 MB downloaded in 4.28 s (6.16 MB/s)
  150 01:18:03.913771  end: 1.5.1 http-download (duration 00:00:04) [common]
  152 01:18:03.914590  end: 1.5 download-retry (duration 00:00:04) [common]
  153 01:18:03.914860  start: 1.6 prepare-tftp-overlay (timeout 00:09:40) [common]
  154 01:18:03.915127  start: 1.6.1 extract-nfsrootfs (timeout 00:09:40) [common]
  155 01:18:13.887769  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950507/extract-nfsrootfs-i7k28a_j
  156 01:18:13.888407  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 01:18:13.888702  start: 1.6.2 lava-overlay (timeout 00:09:30) [common]
  158 01:18:13.889336  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc
  159 01:18:13.889784  makedir: /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin
  160 01:18:13.890122  makedir: /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/tests
  161 01:18:13.890448  makedir: /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/results
  162 01:18:13.890788  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-add-keys
  163 01:18:13.891320  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-add-sources
  164 01:18:13.891832  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-background-process-start
  165 01:18:13.892397  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-background-process-stop
  166 01:18:13.892951  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-common-functions
  167 01:18:13.893454  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-echo-ipv4
  168 01:18:13.893943  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-install-packages
  169 01:18:13.894432  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-installed-packages
  170 01:18:13.894912  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-os-build
  171 01:18:13.895394  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-probe-channel
  172 01:18:13.895878  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-probe-ip
  173 01:18:13.896407  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-target-ip
  174 01:18:13.896912  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-target-mac
  175 01:18:13.897398  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-target-storage
  176 01:18:13.897886  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-case
  177 01:18:13.898372  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-event
  178 01:18:13.898851  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-feedback
  179 01:18:13.899354  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-raise
  180 01:18:13.899835  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-reference
  181 01:18:13.900366  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-runner
  182 01:18:13.900873  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-set
  183 01:18:13.901364  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-test-shell
  184 01:18:13.901854  Updating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-install-packages (oe)
  185 01:18:13.902392  Updating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/bin/lava-installed-packages (oe)
  186 01:18:13.902848  Creating /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/environment
  187 01:18:13.903234  LAVA metadata
  188 01:18:13.903495  - LAVA_JOB_ID=950507
  189 01:18:13.903711  - LAVA_DISPATCHER_IP=192.168.6.2
  190 01:18:13.904114  start: 1.6.2.1 ssh-authorize (timeout 00:09:30) [common]
  191 01:18:13.905101  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 01:18:13.905425  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:30) [common]
  193 01:18:13.905637  skipped lava-vland-overlay
  194 01:18:13.905883  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 01:18:13.906142  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:30) [common]
  196 01:18:13.906362  skipped lava-multinode-overlay
  197 01:18:13.906608  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 01:18:13.906863  start: 1.6.2.4 test-definition (timeout 00:09:30) [common]
  199 01:18:13.907117  Loading test definitions
  200 01:18:13.907400  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:30) [common]
  201 01:18:13.907625  Using /lava-950507 at stage 0
  202 01:18:13.908936  uuid=950507_1.6.2.4.1 testdef=None
  203 01:18:13.909276  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 01:18:13.909550  start: 1.6.2.4.2 test-overlay (timeout 00:09:30) [common]
  205 01:18:13.911398  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 01:18:13.912237  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:30) [common]
  208 01:18:13.914523  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 01:18:13.915355  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:30) [common]
  211 01:18:13.917582  runner path: /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/0/tests/0_dmesg test_uuid 950507_1.6.2.4.1
  212 01:18:13.918162  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 01:18:13.918932  Creating lava-test-runner.conf files
  215 01:18:13.919138  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950507/lava-overlay-uwvf24sc/lava-950507/0 for stage 0
  216 01:18:13.919482  - 0_dmesg
  217 01:18:13.919826  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 01:18:13.920132  start: 1.6.2.5 compress-overlay (timeout 00:09:30) [common]
  219 01:18:13.941944  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 01:18:13.942341  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:30) [common]
  221 01:18:13.942604  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 01:18:13.942870  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 01:18:13.943133  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:30) [common]
  224 01:18:14.559059  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 01:18:14.559529  start: 1.6.4 extract-modules (timeout 00:09:29) [common]
  226 01:18:14.559779  extracting modules file /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950507/extract-nfsrootfs-i7k28a_j
  227 01:18:16.317951  extracting modules file /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk
  228 01:18:18.167255  end: 1.6.4 extract-modules (duration 00:00:04) [common]
  229 01:18:18.167721  start: 1.6.5 apply-overlay-tftp (timeout 00:09:26) [common]
  230 01:18:18.168045  [common] Applying overlay to NFS
  231 01:18:18.168299  [common] Applying overlay /var/lib/lava/dispatcher/tmp/950507/compress-overlay-aa8g1uft/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950507/extract-nfsrootfs-i7k28a_j
  232 01:18:18.200206  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 01:18:18.200604  start: 1.6.6 prepare-kernel (timeout 00:09:25) [common]
  234 01:18:18.200915  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:25) [common]
  235 01:18:18.201175  Converting downloaded kernel to a uImage
  236 01:18:18.201507  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/kernel/Image /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/kernel/uImage
  237 01:18:20.009983  output: Image Name:   
  238 01:18:20.010420  output: Created:      Thu Nov  7 01:18:18 2024
  239 01:18:20.010637  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 01:18:20.010843  output: Data Size:    169943552 Bytes = 165960.50 KiB = 162.07 MiB
  241 01:18:20.011045  output: Load Address: 01080000
  242 01:18:20.011245  output: Entry Point:  01080000
  243 01:18:20.011441  output: 
  244 01:18:20.011796  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:02) [common]
  245 01:18:20.012124  end: 1.6.6 prepare-kernel (duration 00:00:02) [common]
  246 01:18:20.012424  start: 1.6.7 configure-preseed-file (timeout 00:09:24) [common]
  247 01:18:20.012684  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 01:18:20.012949  start: 1.6.8 compress-ramdisk (timeout 00:09:24) [common]
  249 01:18:20.013223  Building ramdisk /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk
  250 01:18:25.957879  >> 426762 blocks

  251 01:18:44.433026  Adding RAMdisk u-boot header.
  252 01:18:44.433466  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk.cpio.gz.uboot
  253 01:18:44.954127  output: Image Name:   
  254 01:18:44.954594  output: Created:      Thu Nov  7 01:18:44 2024
  255 01:18:44.955092  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 01:18:44.955558  output: Data Size:    50961288 Bytes = 49766.88 KiB = 48.60 MiB
  257 01:18:44.956095  output: Load Address: 00000000
  258 01:18:44.956551  output: Entry Point:  00000000
  259 01:18:44.956985  output: 
  260 01:18:44.958144  rename /var/lib/lava/dispatcher/tmp/950507/extract-overlay-ramdisk-govkkp8c/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/ramdisk/ramdisk.cpio.gz.uboot
  261 01:18:44.958930  end: 1.6.8 compress-ramdisk (duration 00:00:25) [common]
  262 01:18:44.959553  end: 1.6 prepare-tftp-overlay (duration 00:00:41) [common]
  263 01:18:44.960224  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:59) [common]
  264 01:18:44.960746  No LXC device requested
  265 01:18:44.961318  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 01:18:44.961897  start: 1.8 deploy-device-env (timeout 00:08:59) [common]
  267 01:18:44.962458  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 01:18:44.962920  Checking files for TFTP limit of 4294967296 bytes.
  269 01:18:44.965913  end: 1 tftp-deploy (duration 00:01:01) [common]
  270 01:18:44.966564  start: 2 uboot-action (timeout 00:05:00) [common]
  271 01:18:44.967196  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 01:18:44.967766  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 01:18:44.968460  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 01:18:44.969060  Using kernel file from prepare-kernel: 950507/tftp-deploy-wkv59fp4/kernel/uImage
  275 01:18:44.969762  substitutions:
  276 01:18:44.970217  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 01:18:44.970673  - {DTB_ADDR}: 0x01070000
  278 01:18:44.971118  - {DTB}: 950507/tftp-deploy-wkv59fp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 01:18:44.971562  - {INITRD}: 950507/tftp-deploy-wkv59fp4/ramdisk/ramdisk.cpio.gz.uboot
  280 01:18:44.972034  - {KERNEL_ADDR}: 0x01080000
  281 01:18:44.972481  - {KERNEL}: 950507/tftp-deploy-wkv59fp4/kernel/uImage
  282 01:18:44.972922  - {LAVA_MAC}: None
  283 01:18:44.973405  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950507/extract-nfsrootfs-i7k28a_j
  284 01:18:44.973854  - {NFS_SERVER_IP}: 192.168.6.2
  285 01:18:44.974292  - {PRESEED_CONFIG}: None
  286 01:18:44.974726  - {PRESEED_LOCAL}: None
  287 01:18:44.975162  - {RAMDISK_ADDR}: 0x08000000
  288 01:18:44.975591  - {RAMDISK}: 950507/tftp-deploy-wkv59fp4/ramdisk/ramdisk.cpio.gz.uboot
  289 01:18:44.976051  - {ROOT_PART}: None
  290 01:18:44.976498  - {ROOT}: None
  291 01:18:44.976941  - {SERVER_IP}: 192.168.6.2
  292 01:18:44.977375  - {TEE_ADDR}: 0x83000000
  293 01:18:44.977808  - {TEE}: None
  294 01:18:44.978245  Parsed boot commands:
  295 01:18:44.978667  - setenv autoload no
  296 01:18:44.979103  - setenv initrd_high 0xffffffff
  297 01:18:44.979538  - setenv fdt_high 0xffffffff
  298 01:18:44.979974  - dhcp
  299 01:18:44.980444  - setenv serverip 192.168.6.2
  300 01:18:44.980880  - tftpboot 0x01080000 950507/tftp-deploy-wkv59fp4/kernel/uImage
  301 01:18:44.981311  - tftpboot 0x08000000 950507/tftp-deploy-wkv59fp4/ramdisk/ramdisk.cpio.gz.uboot
  302 01:18:44.981747  - tftpboot 0x01070000 950507/tftp-deploy-wkv59fp4/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 01:18:44.982183  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950507/extract-nfsrootfs-i7k28a_j,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 01:18:44.982630  - bootm 0x01080000 0x08000000 0x01070000
  305 01:18:44.983195  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 01:18:44.984916  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 01:18:44.985395  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 01:18:45.000343  Setting prompt string to ['lava-test: # ']
  310 01:18:45.001996  end: 2.3 connect-device (duration 00:00:00) [common]
  311 01:18:45.002969  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 01:18:45.003677  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 01:18:45.004508  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 01:18:45.005773  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 01:18:45.047292  >> OK - accepted request

  316 01:18:45.049422  Returned 0 in 0 seconds
  317 01:18:45.150678  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 01:18:45.152632  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 01:18:45.153281  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 01:18:45.153883  Setting prompt string to ['Hit any key to stop autoboot']
  322 01:18:45.154416  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 01:18:45.156201  Trying 192.168.56.21...
  324 01:18:45.156752  Connected to conserv1.
  325 01:18:45.157243  Escape character is '^]'.
  326 01:18:45.157714  
  327 01:18:45.158195  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [,115200N81] (Debian GNU/Linux)
  328 01:18:45.158673  
  329 01:18:52.899084  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 01:18:52.899794  bl2_stage_init 0x01
  331 01:18:52.900359  bl2_stage_init 0x81
  332 01:18:52.904388  hw id: 0x0000 - pwm id 0x01
  333 01:18:52.905152  bl2_stage_init 0xc1
  334 01:18:52.909999  bl2_stage_init 0x02
  335 01:18:52.910540  
  336 01:18:52.911012  L0:00000000
  337 01:18:52.911462  L1:00000703
  338 01:18:52.911924  L2:00008067
  339 01:18:52.912410  L3:15000000
  340 01:18:52.915575  S1:00000000
  341 01:18:52.916113  B2:20282000
  342 01:18:52.916572  B1:a0f83180
  343 01:18:52.917018  
  344 01:18:52.917471  TE: 69184
  345 01:18:52.917915  
  346 01:18:52.921171  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 01:18:52.921669  
  348 01:18:52.926902  Board ID = 1
  349 01:18:52.927398  Set cpu clk to 24M
  350 01:18:52.927853  Set clk81 to 24M
  351 01:18:52.932403  Use GP1_pll as DSU clk.
  352 01:18:52.932893  DSU clk: 1200 Mhz
  353 01:18:52.933343  CPU clk: 1200 MHz
  354 01:18:52.937989  Set clk81 to 166.6M
  355 01:18:52.943555  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 01:18:52.944072  board id: 1
  357 01:18:52.950800  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 01:18:52.961435  fw parse done
  359 01:18:52.967358  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 01:18:53.010043  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 01:18:53.021062  PIEI prepare done
  362 01:18:53.021563  fastboot data load
  363 01:18:53.022019  fastboot data verify
  364 01:18:53.026588  verify result: 266
  365 01:18:53.032234  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 01:18:53.032715  LPDDR4 probe
  367 01:18:53.033163  ddr clk to 1584MHz
  368 01:18:53.040208  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 01:18:53.077466  
  370 01:18:53.077978  dmc_version 0001
  371 01:18:53.084113  Check phy result
  372 01:18:53.090083  INFO : End of CA training
  373 01:18:53.090638  INFO : End of initialization
  374 01:18:53.095804  INFO : Training has run successfully!
  375 01:18:53.096359  Check phy result
  376 01:18:53.101275  INFO : End of initialization
  377 01:18:53.101757  INFO : End of read enable training
  378 01:18:53.106816  INFO : End of fine write leveling
  379 01:18:53.112474  INFO : End of Write leveling coarse delay
  380 01:18:53.113023  INFO : Training has run successfully!
  381 01:18:53.113487  Check phy result
  382 01:18:53.118060  INFO : End of initialization
  383 01:18:53.118601  INFO : End of read dq deskew training
  384 01:18:53.123718  INFO : End of MPR read delay center optimization
  385 01:18:53.129287  INFO : End of write delay center optimization
  386 01:18:53.134927  INFO : End of read delay center optimization
  387 01:18:53.135478  INFO : End of max read latency training
  388 01:18:53.140399  INFO : Training has run successfully!
  389 01:18:53.140932  1D training succeed
  390 01:18:53.149554  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 01:18:53.197379  Check phy result
  392 01:18:53.198027  INFO : End of initialization
  393 01:18:53.219655  INFO : End of 2D read delay Voltage center optimization
  394 01:18:53.238743  INFO : End of 2D read delay Voltage center optimization
  395 01:18:53.290663  INFO : End of 2D write delay Voltage center optimization
  396 01:18:53.339815  INFO : End of 2D write delay Voltage center optimization
  397 01:18:53.345342  INFO : Training has run successfully!
  398 01:18:53.345832  
  399 01:18:53.346292  channel==0
  400 01:18:53.351034  RxClkDly_Margin_A0==78 ps 8
  401 01:18:53.351515  TxDqDly_Margin_A0==98 ps 10
  402 01:18:53.356535  RxClkDly_Margin_A1==78 ps 8
  403 01:18:53.357039  TxDqDly_Margin_A1==98 ps 10
  404 01:18:53.357502  TrainedVREFDQ_A0==74
  405 01:18:53.362105  TrainedVREFDQ_A1==74
  406 01:18:53.362586  VrefDac_Margin_A0==24
  407 01:18:53.363037  DeviceVref_Margin_A0==40
  408 01:18:53.367783  VrefDac_Margin_A1==23
  409 01:18:53.368292  DeviceVref_Margin_A1==40
  410 01:18:53.368741  
  411 01:18:53.369187  
  412 01:18:53.373322  channel==1
  413 01:18:53.373796  RxClkDly_Margin_A0==78 ps 8
  414 01:18:53.374247  TxDqDly_Margin_A0==98 ps 10
  415 01:18:53.379061  RxClkDly_Margin_A1==78 ps 8
  416 01:18:53.379542  TxDqDly_Margin_A1==88 ps 9
  417 01:18:53.384622  TrainedVREFDQ_A0==78
  418 01:18:53.385103  TrainedVREFDQ_A1==75
  419 01:18:53.385560  VrefDac_Margin_A0==22
  420 01:18:53.390211  DeviceVref_Margin_A0==36
  421 01:18:53.390794  VrefDac_Margin_A1==22
  422 01:18:53.395905  DeviceVref_Margin_A1==39
  423 01:18:53.396636  
  424 01:18:53.397130   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 01:18:53.397591  
  426 01:18:53.429457  soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  427 01:18:53.430492  2D training succeed
  428 01:18:53.435113  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 01:18:53.440640  auto size-- 65535DDR cs0 size: 2048MB
  430 01:18:53.441205  DDR cs1 size: 2048MB
  431 01:18:53.446191  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 01:18:53.446727  cs0 DataBus test pass
  433 01:18:53.451892  cs1 DataBus test pass
  434 01:18:53.452256  cs0 AddrBus test pass
  435 01:18:53.452715  cs1 AddrBus test pass
  436 01:18:53.453167  
  437 01:18:53.457372  100bdlr_step_size ps== 478
  438 01:18:53.457902  result report
  439 01:18:53.463064  boot times 0Enable ddr reg access
  440 01:18:53.468235  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 01:18:53.482130  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 01:18:54.136509  bl2z: ptr: 05129330, size: 00001e40
  443 01:18:54.143513  0.0;M3 CHK:0;cm4_sp_mode 0
  444 01:18:54.144151  MVN_1=0x00000000
  445 01:18:54.144635  MVN_2=0x00000000
  446 01:18:54.155033  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 01:18:54.155567  OPS=0x04
  448 01:18:54.156089  ring efuse init
  449 01:18:54.160613  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 01:18:54.161131  [0.017320 Inits done]
  451 01:18:54.161590  secure task start!
  452 01:18:54.168699  high task start!
  453 01:18:54.169208  low task start!
  454 01:18:54.169666  run into bl31
  455 01:18:54.177243  NOTICE:  BL31: v1.3(release):4fc40b1
  456 01:18:54.185105  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 01:18:54.185604  NOTICE:  BL31: G12A normal boot!
  458 01:18:54.200616  NOTICE:  BL31: BL33 decompress pass
  459 01:18:54.206250  ERROR:   Error initializing runtime service opteed_fast
  460 01:18:56.949589  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 01:18:56.950262  bl2_stage_init 0x01
  462 01:18:56.950749  bl2_stage_init 0x81
  463 01:18:56.954967  hw id: 0x0000 - pwm id 0x01
  464 01:18:56.955487  bl2_stage_init 0xc1
  465 01:18:56.960704  bl2_stage_init 0x02
  466 01:18:56.961251  
  467 01:18:56.961708  L0:00000000
  468 01:18:56.962147  L1:00000703
  469 01:18:56.962584  L2:00008067
  470 01:18:56.963013  L3:15000000
  471 01:18:56.966152  S1:00000000
  472 01:18:56.966618  B2:20282000
  473 01:18:56.967053  B1:a0f83180
  474 01:18:56.967484  
  475 01:18:56.967915  TE: 69369
  476 01:18:56.968408  
  477 01:18:56.971807  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 01:18:56.972305  
  479 01:18:56.977381  Board ID = 1
  480 01:18:56.977844  Set cpu clk to 24M
  481 01:18:56.978277  Set clk81 to 24M
  482 01:18:56.982980  Use GP1_pll as DSU clk.
  483 01:18:56.983442  DSU clk: 1200 Mhz
  484 01:18:56.983874  CPU clk: 1200 MHz
  485 01:18:56.988601  Set clk81 to 166.6M
  486 01:18:56.994149  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 01:18:56.994629  board id: 1
  488 01:18:57.001373  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 01:18:57.012295  fw parse done
  490 01:18:57.018290  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 01:18:57.061466  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 01:18:57.072491  PIEI prepare done
  493 01:18:57.072948  fastboot data load
  494 01:18:57.073382  fastboot data verify
  495 01:18:57.078028  verify result: 266
  496 01:18:57.083651  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 01:18:57.084164  LPDDR4 probe
  498 01:18:57.084602  ddr clk to 1584MHz
  499 01:18:57.091634  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 01:18:57.129457  
  501 01:18:57.129961  dmc_version 0001
  502 01:18:57.136499  Check phy result
  503 01:18:57.142427  INFO : End of CA training
  504 01:18:57.142898  INFO : End of initialization
  505 01:18:57.148057  INFO : Training has run successfully!
  506 01:18:57.148530  Check phy result
  507 01:18:57.153590  INFO : End of initialization
  508 01:18:57.154062  INFO : End of read enable training
  509 01:18:57.159190  INFO : End of fine write leveling
  510 01:18:57.164798  INFO : End of Write leveling coarse delay
  511 01:18:57.165301  INFO : Training has run successfully!
  512 01:18:57.165762  Check phy result
  513 01:18:57.170418  INFO : End of initialization
  514 01:18:57.170894  INFO : End of read dq deskew training
  515 01:18:57.176041  INFO : End of MPR read delay center optimization
  516 01:18:57.181595  INFO : End of write delay center optimization
  517 01:18:57.187180  INFO : End of read delay center optimization
  518 01:18:57.187651  INFO : End of max read latency training
  519 01:18:57.192802  INFO : Training has run successfully!
  520 01:18:57.193277  1D training succeed
  521 01:18:57.201996  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 01:18:57.250330  Check phy result
  523 01:18:57.250809  INFO : End of initialization
  524 01:18:57.277756  INFO : End of 2D read delay Voltage center optimization
  525 01:18:57.301932  INFO : End of 2D read delay Voltage center optimization
  526 01:18:57.358629  INFO : End of 2D write delay Voltage center optimization
  527 01:18:57.412658  INFO : End of 2D write delay Voltage center optimization
  528 01:18:57.418203  INFO : Training has run successfully!
  529 01:18:57.418675  
  530 01:18:57.419132  channel==0
  531 01:18:57.423753  RxClkDly_Margin_A0==88 ps 9
  532 01:18:57.424286  TxDqDly_Margin_A0==98 ps 10
  533 01:18:57.427051  RxClkDly_Margin_A1==88 ps 9
  534 01:18:57.427518  TxDqDly_Margin_A1==98 ps 10
  535 01:18:57.432622  TrainedVREFDQ_A0==74
  536 01:18:57.433120  TrainedVREFDQ_A1==74
  537 01:18:57.438241  VrefDac_Margin_A0==24
  538 01:18:57.438712  DeviceVref_Margin_A0==40
  539 01:18:57.439164  VrefDac_Margin_A1==23
  540 01:18:57.443853  DeviceVref_Margin_A1==40
  541 01:18:57.444354  
  542 01:18:57.444809  
  543 01:18:57.445254  channel==1
  544 01:18:57.445693  RxClkDly_Margin_A0==78 ps 8
  545 01:18:57.447270  TxDqDly_Margin_A0==98 ps 10
  546 01:18:57.452830  RxClkDly_Margin_A1==88 ps 9
  547 01:18:57.453302  TxDqDly_Margin_A1==78 ps 8
  548 01:18:57.453753  TrainedVREFDQ_A0==78
  549 01:18:57.458528  TrainedVREFDQ_A1==76
  550 01:18:57.459005  VrefDac_Margin_A0==23
  551 01:18:57.464120  DeviceVref_Margin_A0==36
  552 01:18:57.464598  VrefDac_Margin_A1==20
  553 01:18:57.465046  DeviceVref_Margin_A1==38
  554 01:18:57.465486  
  555 01:18:57.469768   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 01:18:57.470240  
  557 01:18:57.503226  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000018 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
  558 01:18:57.503744  2D training succeed
  559 01:18:57.508834  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 01:18:57.514451  auto size-- 65535DDR cs0 size: 2048MB
  561 01:18:57.514928  DDR cs1 size: 2048MB
  562 01:18:57.520029  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 01:18:57.520501  cs0 DataBus test pass
  564 01:18:57.520945  cs1 DataBus test pass
  565 01:18:57.525598  cs0 AddrBus test pass
  566 01:18:57.526068  cs1 AddrBus test pass
  567 01:18:57.526513  
  568 01:18:57.531184  100bdlr_step_size ps== 471
  569 01:18:57.531666  result report
  570 01:18:57.532157  boot times 0Enable ddr reg access
  571 01:18:57.540859  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 01:18:57.554776  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 01:18:58.214217  bl2z: ptr: 05129330, size: 00001e40
  574 01:18:58.222680  0.0;M3 CHK:0;cm4_sp_mode 0
  575 01:18:58.223185  MVN_1=0x00000000
  576 01:18:58.223637  MVN_2=0x00000000
  577 01:18:58.234137  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 01:18:58.234631  OPS=0x04
  579 01:18:58.235092  ring efuse init
  580 01:18:58.237055  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 01:18:58.243025  [0.017354 Inits done]
  582 01:18:58.243503  secure task start!
  583 01:18:58.243952  high task start!
  584 01:18:58.244448  low task start!
  585 01:18:58.247321  run into bl31
  586 01:18:58.255959  NOTICE:  BL31: v1.3(release):4fc40b1
  587 01:18:58.263746  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 01:18:58.264262  NOTICE:  BL31: G12A normal boot!
  589 01:18:58.279252  NOTICE:  BL31: BL33 decompress pass
  590 01:18:58.284946  ERROR:   Error initializing runtime service opteed_fast
  591 01:18:59.649272  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 01:18:59.649907  bl2_stage_init 0x01
  593 01:18:59.650375  bl2_stage_init 0x81
  594 01:18:59.654805  hw id: 0x0000 - pwm id 0x01
  595 01:18:59.655287  bl2_stage_init 0xc1
  596 01:18:59.659893  bl2_stage_init 0x02
  597 01:18:59.660408  
  598 01:18:59.660864  L0:00000000
  599 01:18:59.661308  L1:00000703
  600 01:18:59.661752  L2:00008067
  601 01:18:59.665481  L3:15000000
  602 01:18:59.665965  S1:00000000
  603 01:18:59.666414  B2:20282000
  604 01:18:59.666857  B1:a0f83180
  605 01:18:59.667297  
  606 01:18:59.667737  TE: 70255
  607 01:18:59.668223  
  608 01:18:59.676680  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 01:18:59.677180  
  610 01:18:59.677635  Board ID = 1
  611 01:18:59.678095  Set cpu clk to 24M
  612 01:18:59.678541  Set clk81 to 24M
  613 01:18:59.682258  Use GP1_pll as DSU clk.
  614 01:18:59.682735  DSU clk: 1200 Mhz
  615 01:18:59.683186  CPU clk: 1200 MHz
  616 01:18:59.687855  Set clk81 to 166.6M
  617 01:18:59.693453  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 01:18:59.693935  board id: 1
  619 01:18:59.701180  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 01:18:59.711854  fw parse done
  621 01:18:59.717837  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 01:18:59.760462  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 01:18:59.771434  PIEI prepare done
  624 01:18:59.771936  fastboot data load
  625 01:18:59.772451  fastboot data verify
  626 01:18:59.777006  verify result: 266
  627 01:18:59.782631  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 01:18:59.783117  LPDDR4 probe
  629 01:18:59.783572  ddr clk to 1584MHz
  630 01:18:59.790629  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 01:18:59.827888  
  632 01:18:59.828429  dmc_version 0001
  633 01:18:59.834542  Check phy result
  634 01:18:59.840446  INFO : End of CA training
  635 01:18:59.840932  INFO : End of initialization
  636 01:18:59.846039  INFO : Training has run successfully!
  637 01:18:59.846525  Check phy result
  638 01:18:59.851630  INFO : End of initialization
  639 01:18:59.852139  INFO : End of read enable training
  640 01:18:59.857242  INFO : End of fine write leveling
  641 01:18:59.862862  INFO : End of Write leveling coarse delay
  642 01:18:59.863343  INFO : Training has run successfully!
  643 01:18:59.863794  Check phy result
  644 01:18:59.868440  INFO : End of initialization
  645 01:18:59.868918  INFO : End of read dq deskew training
  646 01:18:59.874024  INFO : End of MPR read delay center optimization
  647 01:18:59.879629  INFO : End of write delay center optimization
  648 01:18:59.885223  INFO : End of read delay center optimization
  649 01:18:59.885703  INFO : End of max read latency training
  650 01:18:59.890787  INFO : Training has run successfully!
  651 01:18:59.891269  1D training succeed
  652 01:18:59.900009  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 01:18:59.947624  Check phy result
  654 01:18:59.948153  INFO : End of initialization
  655 01:18:59.969951  INFO : End of 2D read delay Voltage center optimization
  656 01:18:59.989126  INFO : End of 2D read delay Voltage center optimization
  657 01:19:00.041028  INFO : End of 2D write delay Voltage center optimization
  658 01:19:00.090179  INFO : End of 2D write delay Voltage center optimization
  659 01:19:00.095787  INFO : Training has run successfully!
  660 01:19:00.096304  
  661 01:19:00.096766  channel==0
  662 01:19:00.101342  RxClkDly_Margin_A0==78 ps 8
  663 01:19:00.101821  TxDqDly_Margin_A0==88 ps 9
  664 01:19:00.104662  RxClkDly_Margin_A1==88 ps 9
  665 01:19:00.105168  TxDqDly_Margin_A1==88 ps 9
  666 01:19:00.110274  TrainedVREFDQ_A0==74
  667 01:19:00.110760  TrainedVREFDQ_A1==74
  668 01:19:00.111212  VrefDac_Margin_A0==22
  669 01:19:00.115861  DeviceVref_Margin_A0==40
  670 01:19:00.116368  VrefDac_Margin_A1==23
  671 01:19:00.121490  DeviceVref_Margin_A1==40
  672 01:19:00.121968  
  673 01:19:00.122421  
  674 01:19:00.122861  channel==1
  675 01:19:00.123295  RxClkDly_Margin_A0==78 ps 8
  676 01:19:00.127067  TxDqDly_Margin_A0==98 ps 10
  677 01:19:00.127547  RxClkDly_Margin_A1==78 ps 8
  678 01:19:00.132674  TxDqDly_Margin_A1==88 ps 9
  679 01:19:00.133159  TrainedVREFDQ_A0==78
  680 01:19:00.133612  TrainedVREFDQ_A1==75
  681 01:19:00.138243  VrefDac_Margin_A0==22
  682 01:19:00.138723  DeviceVref_Margin_A0==36
  683 01:19:00.139173  VrefDac_Margin_A1==22
  684 01:19:00.143843  DeviceVref_Margin_A1==39
  685 01:19:00.144363  
  686 01:19:00.149438   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 01:19:00.149927  
  688 01:19:00.482198  soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 01:19:00.482816  2D training succeed
  690 01:19:00.483282  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 01:19:00.483738  auto size-- 65535DDR cs0 size: 2048MB
  692 01:19:00.484646  DDR cs1 size: 2048MB
  693 01:19:00.485124  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 01:19:00.485575  cs0 DataBus test pass
  695 01:19:00.486017  cs1 DataBus test pass
  696 01:19:00.486460  cs0 AddrBus test pass
  697 01:19:00.486896  cs1 AddrBus test pass
  698 01:19:00.487331  
  699 01:19:00.487770  100bdlr_step_size ps== 478
  700 01:19:00.488259  result report
  701 01:19:00.488696  boot times 0Enable ddr reg access
  702 01:19:00.489131  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 01:19:00.489679  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 01:19:00.888055  bl2z: ptr: 05129330, size: 00001e40
  705 01:19:00.894726  0.0;M3 CHK:0;cm4_sp_mode 0
  706 01:19:00.895272  MVN_1=0x00000000
  707 01:19:00.895742  MVN_2=0x00000000
  708 01:19:00.906153  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 01:19:00.906653  OPS=0x04
  710 01:19:00.907118  ring efuse init
  711 01:19:00.911786  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 01:19:00.912319  [0.017310 Inits done]
  713 01:19:00.912775  secure task start!
  714 01:19:00.919416  high task start!
  715 01:19:00.919922  low task start!
  716 01:19:00.920428  run into bl31
  717 01:19:00.928062  NOTICE:  BL31: v1.3(release):4fc40b1
  718 01:19:00.935838  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 01:19:00.936359  NOTICE:  BL31: G12A normal boot!
  720 01:19:00.951309  NOTICE:  BL31: BL33 decompress pass
  721 01:19:00.956998  ERROR:   Error initializing runtime service opteed_fast
  722 01:19:01.752528  
  723 01:19:01.753172  
  724 01:19:01.757926  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 01:19:01.758426  
  726 01:19:01.761340  Model: Libre Computer AML-S905D3-CC Solitude
  727 01:19:01.908399  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 01:19:01.923775  DRAM:  2 GiB (effective 3.8 GiB)
  729 01:19:02.024709  Core:  406 devices, 33 uclasses, devicetree: separate
  730 01:19:02.030581  WDT:   Not starting watchdog@f0d0
  731 01:19:02.055711  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 01:19:02.067956  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 01:19:02.072855  ** Bad device specification mmc 0 **
  734 01:19:02.082972  Card did not respond to voltage select! : -110
  735 01:19:02.090598  ** Bad device specification mmc 0 **
  736 01:19:02.091092  Couldn't find partition mmc 0
  737 01:19:02.098947  Card did not respond to voltage select! : -110
  738 01:19:02.104448  ** Bad device specification mmc 0 **
  739 01:19:02.104946  Couldn't find partition mmc 0
  740 01:19:02.109488  Error: could not access storage.
  741 01:19:02.405923  Net:   eth0: ethernet@ff3f0000
  742 01:19:02.406556  starting USB...
  743 01:19:02.650701  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 01:19:02.651270  Starting the controller
  745 01:19:02.657664  USB XHCI 1.10
  746 01:19:04.212201  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 01:19:04.220487         scanning usb for storage devices... 0 Storage Device(s) found
  749 01:19:04.272183  Hit any key to stop autoboot:  1 
  750 01:19:04.273363  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 01:19:04.274017  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 01:19:04.274511  Setting prompt string to ['=>']
  753 01:19:04.274994  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 01:19:04.286423   0 
  755 01:19:04.287350  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 01:19:04.388659  => setenv autoload no
  758 01:19:04.389622  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 01:19:04.394467  setenv autoload no
  761 01:19:04.496273  => setenv initrd_high 0xffffffff
  762 01:19:04.497411  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  763 01:19:04.501912  setenv initrd_high 0xffffffff
  765 01:19:04.603374  => setenv fdt_high 0xffffffff
  766 01:19:04.604265  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  767 01:19:04.608690  setenv fdt_high 0xffffffff
  769 01:19:04.710202  => dhcp
  770 01:19:04.711081  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 01:19:04.715598  dhcp
  772 01:19:05.669175  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 01:19:05.669772  Speed: 1000, full duplex
  774 01:19:05.670195  BOOTP broadcast 1
  775 01:19:05.674507   UDP wrong checksum 0000014f 00003b2d
  776 01:19:05.919502  BOOTP broadcast 2
  777 01:19:05.934643  DHCP client bound to address 192.168.6.21 (263 ms)
  779 01:19:06.036077  => setenv serverip 192.168.6.2
  780 01:19:06.036894  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  781 01:19:06.041330  setenv serverip 192.168.6.2
  783 01:19:06.142741  => tftpboot 0x01080000 950507/tftp-deploy-wkv59fp4/kernel/uImage
  784 01:19:06.143611  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:39)
  785 01:19:06.150249  tftpboot 0x01080000 950507/tftp-deploy-wkv59fp4/kernel/uImage
  786 01:19:06.150731  Speed: 1000, full duplex
  787 01:19:06.151145  Using ethernet@ff3f0000 device
  788 01:19:06.155726  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  789 01:19:06.161179  Filename '950507/tftp-deploy-wkv59fp4/kernel/uImage'.
  790 01:19:06.165141  Load address: 0x1080000
  791 01:19:10.377045  Loading: *###################
  792 01:19:10.377664  TFTP error: trying to overwrite reserved memory...
  794 01:19:10.379052  end: 2.4.3 bootloader-commands (duration 00:00:06) [common]
  797 01:19:10.381012  end: 2.4 uboot-commands (duration 00:00:25) [common]
  799 01:19:10.382355  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'TFTP error: trying to overwrite reserved memory' (12)'
  801 01:19:10.383433  end: 2 uboot-action (duration 00:00:25) [common]
  803 01:19:10.385148  Cleaning after the job
  804 01:19:10.385713  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/ramdisk
  805 01:19:10.414050  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/kernel
  806 01:19:10.462689  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/dtb
  807 01:19:10.463540  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/nfsrootfs
  808 01:19:10.621572  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950507/tftp-deploy-wkv59fp4/modules
  809 01:19:10.682721  start: 4.1 power-off (timeout 00:00:30) [common]
  810 01:19:10.683436  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  811 01:19:10.716969  >> OK - accepted request

  812 01:19:10.718975  Returned 0 in 0 seconds
  813 01:19:10.819675  end: 4.1 power-off (duration 00:00:00) [common]
  815 01:19:10.820630  start: 4.2 read-feedback (timeout 00:10:00) [common]
  816 01:19:10.821280  Listened to connection for namespace 'common' for up to 1s
  817 01:19:11.821303  Finalising connection for namespace 'common'
  818 01:19:11.822011  Disconnecting from shell: Finalise
  819 01:19:11.822520  => 
  820 01:19:11.923478  end: 4.2 read-feedback (duration 00:00:01) [common]
  821 01:19:11.924171  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950507
  822 01:19:13.783745  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950507
  823 01:19:13.784385  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.