Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 01:21:43.473022 lava-dispatcher, installed at version: 2024.01
2 01:21:43.473788 start: 0 validate
3 01:21:43.474256 Start time: 2024-11-07 01:21:43.474225+00:00 (UTC)
4 01:21:43.474834 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 01:21:43.475373 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 01:21:43.512594 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 01:21:43.513151 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fkernel%2FImage exists
8 01:21:43.544756 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 01:21:43.545356 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 01:21:43.576482 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 01:21:43.576958 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 01:21:43.610015 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 01:21:43.610498 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Bkselftest%2Fgcc-12%2Fmodules.tar.xz exists
14 01:21:43.646366 validate duration: 0.17
16 01:21:43.647180 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 01:21:43.647500 start: 1.1 download-retry (timeout 00:10:00) [common]
18 01:21:43.647791 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 01:21:43.648402 Not decompressing ramdisk as can be used compressed.
20 01:21:43.648857 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 01:21:43.649123 saving as /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/ramdisk/initrd.cpio.gz
22 01:21:43.649393 total size: 5628182 (5 MB)
23 01:21:43.687157 progress 0 % (0 MB)
24 01:21:43.694900 progress 5 % (0 MB)
25 01:21:43.703036 progress 10 % (0 MB)
26 01:21:43.710077 progress 15 % (0 MB)
27 01:21:43.715191 progress 20 % (1 MB)
28 01:21:43.718932 progress 25 % (1 MB)
29 01:21:43.723040 progress 30 % (1 MB)
30 01:21:43.727205 progress 35 % (1 MB)
31 01:21:43.730873 progress 40 % (2 MB)
32 01:21:43.734954 progress 45 % (2 MB)
33 01:21:43.738660 progress 50 % (2 MB)
34 01:21:43.742721 progress 55 % (2 MB)
35 01:21:43.746763 progress 60 % (3 MB)
36 01:21:43.750364 progress 65 % (3 MB)
37 01:21:43.754441 progress 70 % (3 MB)
38 01:21:43.758122 progress 75 % (4 MB)
39 01:21:43.762102 progress 80 % (4 MB)
40 01:21:43.765720 progress 85 % (4 MB)
41 01:21:43.769861 progress 90 % (4 MB)
42 01:21:43.773807 progress 95 % (5 MB)
43 01:21:43.777171 progress 100 % (5 MB)
44 01:21:43.777817 5 MB downloaded in 0.13 s (41.80 MB/s)
45 01:21:43.778359 end: 1.1.1 http-download (duration 00:00:00) [common]
47 01:21:43.779248 end: 1.1 download-retry (duration 00:00:00) [common]
48 01:21:43.779555 start: 1.2 download-retry (timeout 00:10:00) [common]
49 01:21:43.779835 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 01:21:43.780344 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+kselftest/gcc-12/kernel/Image
51 01:21:43.780593 saving as /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/kernel/Image
52 01:21:43.780803 total size: 66443776 (63 MB)
53 01:21:43.781013 No compression specified
54 01:21:43.816345 progress 0 % (0 MB)
55 01:21:43.859302 progress 5 % (3 MB)
56 01:21:43.901243 progress 10 % (6 MB)
57 01:21:43.944336 progress 15 % (9 MB)
58 01:21:43.986262 progress 20 % (12 MB)
59 01:21:44.027888 progress 25 % (15 MB)
60 01:21:44.070278 progress 30 % (19 MB)
61 01:21:44.112690 progress 35 % (22 MB)
62 01:21:44.155314 progress 40 % (25 MB)
63 01:21:44.196825 progress 45 % (28 MB)
64 01:21:44.238280 progress 50 % (31 MB)
65 01:21:44.279999 progress 55 % (34 MB)
66 01:21:44.321266 progress 60 % (38 MB)
67 01:21:44.362964 progress 65 % (41 MB)
68 01:21:44.404009 progress 70 % (44 MB)
69 01:21:44.445705 progress 75 % (47 MB)
70 01:21:44.488054 progress 80 % (50 MB)
71 01:21:44.529722 progress 85 % (53 MB)
72 01:21:44.571661 progress 90 % (57 MB)
73 01:21:44.613209 progress 95 % (60 MB)
74 01:21:44.654675 progress 100 % (63 MB)
75 01:21:44.655397 63 MB downloaded in 0.87 s (72.45 MB/s)
76 01:21:44.655886 end: 1.2.1 http-download (duration 00:00:01) [common]
78 01:21:44.656747 end: 1.2 download-retry (duration 00:00:01) [common]
79 01:21:44.657025 start: 1.3 download-retry (timeout 00:09:59) [common]
80 01:21:44.657294 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 01:21:44.657759 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+kselftest/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 01:21:44.658038 saving as /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 01:21:44.658247 total size: 53209 (0 MB)
84 01:21:44.658456 No compression specified
85 01:21:44.696573 progress 61 % (0 MB)
86 01:21:44.697420 progress 100 % (0 MB)
87 01:21:44.697956 0 MB downloaded in 0.04 s (1.28 MB/s)
88 01:21:44.698422 end: 1.3.1 http-download (duration 00:00:00) [common]
90 01:21:44.699234 end: 1.3 download-retry (duration 00:00:00) [common]
91 01:21:44.699499 start: 1.4 download-retry (timeout 00:09:59) [common]
92 01:21:44.699767 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 01:21:44.700249 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 01:21:44.700497 saving as /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/nfsrootfs/full.rootfs.tar
95 01:21:44.700702 total size: 107552908 (102 MB)
96 01:21:44.700915 Using unxz to decompress xz
97 01:21:44.743766 progress 0 % (0 MB)
98 01:21:45.387262 progress 5 % (5 MB)
99 01:21:46.133661 progress 10 % (10 MB)
100 01:21:46.858349 progress 15 % (15 MB)
101 01:21:47.610256 progress 20 % (20 MB)
102 01:21:48.178821 progress 25 % (25 MB)
103 01:21:48.802450 progress 30 % (30 MB)
104 01:21:49.536199 progress 35 % (35 MB)
105 01:21:49.886454 progress 40 % (41 MB)
106 01:21:50.315421 progress 45 % (46 MB)
107 01:21:51.005849 progress 50 % (51 MB)
108 01:21:51.692641 progress 55 % (56 MB)
109 01:21:52.447238 progress 60 % (61 MB)
110 01:21:53.197325 progress 65 % (66 MB)
111 01:21:53.932668 progress 70 % (71 MB)
112 01:21:54.704460 progress 75 % (76 MB)
113 01:21:55.381993 progress 80 % (82 MB)
114 01:21:56.082465 progress 85 % (87 MB)
115 01:21:56.807457 progress 90 % (92 MB)
116 01:21:57.514141 progress 95 % (97 MB)
117 01:21:58.250491 progress 100 % (102 MB)
118 01:21:58.262242 102 MB downloaded in 13.56 s (7.56 MB/s)
119 01:21:58.263111 end: 1.4.1 http-download (duration 00:00:14) [common]
121 01:21:58.264804 end: 1.4 download-retry (duration 00:00:14) [common]
122 01:21:58.265340 start: 1.5 download-retry (timeout 00:09:45) [common]
123 01:21:58.265863 start: 1.5.1 http-download (timeout 00:09:45) [common]
124 01:21:58.266674 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig+kselftest/gcc-12/modules.tar.xz
125 01:21:58.267137 saving as /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/modules/modules.tar
126 01:21:58.267553 total size: 16128536 (15 MB)
127 01:21:58.268004 Using unxz to decompress xz
128 01:21:58.310516 progress 0 % (0 MB)
129 01:21:58.411805 progress 5 % (0 MB)
130 01:21:58.526491 progress 10 % (1 MB)
131 01:21:58.642146 progress 15 % (2 MB)
132 01:21:58.772831 progress 20 % (3 MB)
133 01:21:58.908340 progress 25 % (3 MB)
134 01:21:59.014345 progress 30 % (4 MB)
135 01:21:59.126898 progress 35 % (5 MB)
136 01:21:59.235215 progress 40 % (6 MB)
137 01:21:59.341688 progress 45 % (6 MB)
138 01:21:59.459221 progress 50 % (7 MB)
139 01:21:59.567485 progress 55 % (8 MB)
140 01:21:59.684240 progress 60 % (9 MB)
141 01:21:59.793954 progress 65 % (10 MB)
142 01:21:59.906032 progress 70 % (10 MB)
143 01:22:00.023069 progress 75 % (11 MB)
144 01:22:00.133352 progress 80 % (12 MB)
145 01:22:00.246445 progress 85 % (13 MB)
146 01:22:00.354246 progress 90 % (13 MB)
147 01:22:00.457787 progress 95 % (14 MB)
148 01:22:00.575487 progress 100 % (15 MB)
149 01:22:00.586135 15 MB downloaded in 2.32 s (6.63 MB/s)
150 01:22:00.587090 end: 1.5.1 http-download (duration 00:00:02) [common]
152 01:22:00.588938 end: 1.5 download-retry (duration 00:00:02) [common]
153 01:22:00.589535 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 01:22:00.590126 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 01:22:10.890535 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950724/extract-nfsrootfs-38_pt1e2
156 01:22:10.891177 end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
157 01:22:10.891513 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 01:22:10.892256 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m
159 01:22:10.892776 makedir: /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin
160 01:22:10.893210 makedir: /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/tests
161 01:22:10.893619 makedir: /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/results
162 01:22:10.893976 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-add-keys
163 01:22:10.894513 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-add-sources
164 01:22:10.895028 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-background-process-start
165 01:22:10.895527 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-background-process-stop
166 01:22:10.896117 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-common-functions
167 01:22:10.896672 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-echo-ipv4
168 01:22:10.897176 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-install-packages
169 01:22:10.897743 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-installed-packages
170 01:22:10.898237 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-os-build
171 01:22:10.898739 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-probe-channel
172 01:22:10.899257 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-probe-ip
173 01:22:10.899753 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-target-ip
174 01:22:10.900298 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-target-mac
175 01:22:10.900813 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-target-storage
176 01:22:10.901419 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-case
177 01:22:10.901993 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-event
178 01:22:10.902505 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-feedback
179 01:22:10.903010 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-raise
180 01:22:10.903517 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-reference
181 01:22:10.904042 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-runner
182 01:22:10.904582 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-set
183 01:22:10.905086 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-test-shell
184 01:22:10.905594 Updating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-install-packages (oe)
185 01:22:10.906165 Updating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/bin/lava-installed-packages (oe)
186 01:22:10.906639 Creating /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/environment
187 01:22:10.907083 LAVA metadata
188 01:22:10.907362 - LAVA_JOB_ID=950724
189 01:22:10.907578 - LAVA_DISPATCHER_IP=192.168.6.2
190 01:22:10.907970 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 01:22:10.909031 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 01:22:10.909358 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 01:22:10.909567 skipped lava-vland-overlay
194 01:22:10.909809 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 01:22:10.910062 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 01:22:10.910278 skipped lava-multinode-overlay
197 01:22:10.910520 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 01:22:10.910773 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 01:22:10.911025 Loading test definitions
200 01:22:10.911303 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 01:22:10.911524 Using /lava-950724 at stage 0
202 01:22:10.912816 uuid=950724_1.6.2.4.1 testdef=None
203 01:22:10.913147 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 01:22:10.913416 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 01:22:10.915299 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 01:22:10.916132 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 01:22:10.918509 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 01:22:10.919349 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 01:22:10.921647 runner path: /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/0/tests/0_dmesg test_uuid 950724_1.6.2.4.1
212 01:22:10.922226 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 01:22:10.922978 Creating lava-test-runner.conf files
215 01:22:10.923178 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950724/lava-overlay-9oh1ri9m/lava-950724/0 for stage 0
216 01:22:10.923531 - 0_dmesg
217 01:22:10.923876 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 01:22:10.924183 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 01:22:10.946056 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 01:22:10.946468 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 01:22:10.946730 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 01:22:10.947000 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 01:22:10.947264 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 01:22:11.659309 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 01:22:11.659789 start: 1.6.4 extract-modules (timeout 00:09:32) [common]
226 01:22:11.660097 extracting modules file /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950724/extract-nfsrootfs-38_pt1e2
227 01:22:13.367930 extracting modules file /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk
228 01:22:15.213843 end: 1.6.4 extract-modules (duration 00:00:04) [common]
229 01:22:15.214339 start: 1.6.5 apply-overlay-tftp (timeout 00:09:28) [common]
230 01:22:15.214646 [common] Applying overlay to NFS
231 01:22:15.214880 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950724/compress-overlay-el62d4d_/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950724/extract-nfsrootfs-38_pt1e2
232 01:22:15.251370 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 01:22:15.251844 start: 1.6.6 prepare-kernel (timeout 00:09:28) [common]
234 01:22:15.252188 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:28) [common]
235 01:22:15.252448 Converting downloaded kernel to a uImage
236 01:22:15.252788 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/kernel/Image /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/kernel/uImage
237 01:22:15.932457 output: Image Name:
238 01:22:15.932898 output: Created: Thu Nov 7 01:22:15 2024
239 01:22:15.933133 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 01:22:15.933369 output: Data Size: 66443776 Bytes = 64886.50 KiB = 63.37 MiB
241 01:22:15.933601 output: Load Address: 01080000
242 01:22:15.933823 output: Entry Point: 01080000
243 01:22:15.934040 output:
244 01:22:15.934385 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:01) [common]
245 01:22:15.934663 end: 1.6.6 prepare-kernel (duration 00:00:01) [common]
246 01:22:15.934939 start: 1.6.7 configure-preseed-file (timeout 00:09:28) [common]
247 01:22:15.935194 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 01:22:15.935453 start: 1.6.8 compress-ramdisk (timeout 00:09:28) [common]
249 01:22:15.935722 Building ramdisk /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk
250 01:22:19.125538 >> 239643 blocks
251 01:22:29.488085 Adding RAMdisk u-boot header.
252 01:22:29.488729 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk.cpio.gz.uboot
253 01:22:29.833470 output: Image Name:
254 01:22:29.833927 output: Created: Thu Nov 7 01:22:29 2024
255 01:22:29.834427 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 01:22:29.834893 output: Data Size: 30952639 Bytes = 30227.19 KiB = 29.52 MiB
257 01:22:29.835367 output: Load Address: 00000000
258 01:22:29.835815 output: Entry Point: 00000000
259 01:22:29.836316 output:
260 01:22:29.837370 rename /var/lib/lava/dispatcher/tmp/950724/extract-overlay-ramdisk-gr0_g2nc/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
261 01:22:29.838151 end: 1.6.8 compress-ramdisk (duration 00:00:14) [common]
262 01:22:29.838764 end: 1.6 prepare-tftp-overlay (duration 00:00:29) [common]
263 01:22:29.839357 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:14) [common]
264 01:22:29.839878 No LXC device requested
265 01:22:29.840497 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 01:22:29.841078 start: 1.8 deploy-device-env (timeout 00:09:14) [common]
267 01:22:29.841635 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 01:22:29.842096 Checking files for TFTP limit of 4294967296 bytes.
269 01:22:29.845053 end: 1 tftp-deploy (duration 00:00:46) [common]
270 01:22:29.845685 start: 2 uboot-action (timeout 00:05:00) [common]
271 01:22:29.846273 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 01:22:29.846832 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 01:22:29.847395 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 01:22:29.847977 Using kernel file from prepare-kernel: 950724/tftp-deploy-abqal2xf/kernel/uImage
275 01:22:29.848713 substitutions:
276 01:22:29.849173 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 01:22:29.849623 - {DTB_ADDR}: 0x01070000
278 01:22:29.850066 - {DTB}: 950724/tftp-deploy-abqal2xf/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 01:22:29.850512 - {INITRD}: 950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
280 01:22:29.850955 - {KERNEL_ADDR}: 0x01080000
281 01:22:29.851394 - {KERNEL}: 950724/tftp-deploy-abqal2xf/kernel/uImage
282 01:22:29.851834 - {LAVA_MAC}: None
283 01:22:29.852354 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950724/extract-nfsrootfs-38_pt1e2
284 01:22:29.852809 - {NFS_SERVER_IP}: 192.168.6.2
285 01:22:29.853248 - {PRESEED_CONFIG}: None
286 01:22:29.853684 - {PRESEED_LOCAL}: None
287 01:22:29.854119 - {RAMDISK_ADDR}: 0x08000000
288 01:22:29.854554 - {RAMDISK}: 950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
289 01:22:29.854992 - {ROOT_PART}: None
290 01:22:29.855425 - {ROOT}: None
291 01:22:29.855862 - {SERVER_IP}: 192.168.6.2
292 01:22:29.856332 - {TEE_ADDR}: 0x83000000
293 01:22:29.856768 - {TEE}: None
294 01:22:29.857204 Parsed boot commands:
295 01:22:29.857625 - setenv autoload no
296 01:22:29.858058 - setenv initrd_high 0xffffffff
297 01:22:29.858488 - setenv fdt_high 0xffffffff
298 01:22:29.858916 - dhcp
299 01:22:29.859345 - setenv serverip 192.168.6.2
300 01:22:29.859776 - tftpboot 0x01080000 950724/tftp-deploy-abqal2xf/kernel/uImage
301 01:22:29.860244 - tftpboot 0x08000000 950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
302 01:22:29.860681 - tftpboot 0x01070000 950724/tftp-deploy-abqal2xf/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 01:22:29.861118 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950724/extract-nfsrootfs-38_pt1e2,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 01:22:29.861564 - bootm 0x01080000 0x08000000 0x01070000
305 01:22:29.862127 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 01:22:29.863796 start: 2.3 connect-device (timeout 00:05:00) [common]
308 01:22:29.864301 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 01:22:29.879955 Setting prompt string to ['lava-test: # ']
310 01:22:29.881585 end: 2.3 connect-device (duration 00:00:00) [common]
311 01:22:29.882267 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 01:22:29.883191 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 01:22:29.883872 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 01:22:29.885190 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 01:22:29.923792 >> OK - accepted request
316 01:22:29.925747 Returned 0 in 0 seconds
317 01:22:30.026981 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 01:22:30.028862 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 01:22:30.029507 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 01:22:30.030099 Setting prompt string to ['Hit any key to stop autoboot']
322 01:22:30.030613 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 01:22:30.032351 Trying 192.168.56.21...
324 01:22:30.032903 Connected to conserv1.
325 01:22:30.033379 Escape character is '^]'.
326 01:22:30.033835
327 01:22:30.034299 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 01:22:30.034770
329 01:22:37.159345 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 01:22:37.159768 bl2_stage_init 0x01
331 01:22:37.160019 bl2_stage_init 0x81
332 01:22:37.164865 hw id: 0x0000 - pwm id 0x01
333 01:22:37.165183 bl2_stage_init 0xc1
334 01:22:37.170528 bl2_stage_init 0x02
335 01:22:37.170799
336 01:22:37.171015 L0:00000000
337 01:22:37.171216 L1:00000703
338 01:22:37.171418 L2:00008067
339 01:22:37.171619 L3:15000000
340 01:22:37.176022 S1:00000000
341 01:22:37.176283 B2:20282000
342 01:22:37.176494 B1:a0f83180
343 01:22:37.176691
344 01:22:37.176890 TE: 69412
345 01:22:37.177088
346 01:22:37.181608 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 01:22:37.181872
348 01:22:37.187237 Board ID = 1
349 01:22:37.187532 Set cpu clk to 24M
350 01:22:37.187735 Set clk81 to 24M
351 01:22:37.192860 Use GP1_pll as DSU clk.
352 01:22:37.193117 DSU clk: 1200 Mhz
353 01:22:37.193315 CPU clk: 1200 MHz
354 01:22:37.198451 Set clk81 to 166.6M
355 01:22:37.204147 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 01:22:37.204676 board id: 1
357 01:22:37.211413 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 01:22:37.222307 fw parse done
359 01:22:37.228232 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 01:22:37.271375 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 01:22:37.282457 PIEI prepare done
362 01:22:37.282907 fastboot data load
363 01:22:37.283318 fastboot data verify
364 01:22:37.288050 verify result: 266
365 01:22:37.293669 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 01:22:37.294105 LPDDR4 probe
367 01:22:37.294508 ddr clk to 1584MHz
368 01:22:37.301644 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 01:22:37.339573
370 01:22:37.340219 dmc_version 0001
371 01:22:37.346416 Check phy result
372 01:22:37.352396 INFO : End of CA training
373 01:22:37.352853 INFO : End of initialization
374 01:22:37.358015 INFO : Training has run successfully!
375 01:22:37.358454 Check phy result
376 01:22:37.363590 INFO : End of initialization
377 01:22:37.364070 INFO : End of read enable training
378 01:22:37.369175 INFO : End of fine write leveling
379 01:22:37.374752 INFO : End of Write leveling coarse delay
380 01:22:37.375184 INFO : Training has run successfully!
381 01:22:37.375583 Check phy result
382 01:22:37.380406 INFO : End of initialization
383 01:22:37.380860 INFO : End of read dq deskew training
384 01:22:37.385984 INFO : End of MPR read delay center optimization
385 01:22:37.391549 INFO : End of write delay center optimization
386 01:22:37.397198 INFO : End of read delay center optimization
387 01:22:37.397631 INFO : End of max read latency training
388 01:22:37.402832 INFO : Training has run successfully!
389 01:22:37.403272 1D training succeed
390 01:22:37.412012 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 01:22:37.460321 Check phy result
392 01:22:37.460886 INFO : End of initialization
393 01:22:37.487635 INFO : End of 2D read delay Voltage center optimization
394 01:22:37.511816 INFO : End of 2D read delay Voltage center optimization
395 01:22:37.568481 INFO : End of 2D write delay Voltage center optimization
396 01:22:37.622421 INFO : End of 2D write delay Voltage center optimization
397 01:22:37.628039 INFO : Training has run successfully!
398 01:22:37.628545
399 01:22:37.628963 channel==0
400 01:22:37.633528 RxClkDly_Margin_A0==78 ps 8
401 01:22:37.633974 TxDqDly_Margin_A0==98 ps 10
402 01:22:37.639142 RxClkDly_Margin_A1==88 ps 9
403 01:22:37.639576 TxDqDly_Margin_A1==98 ps 10
404 01:22:37.640011 TrainedVREFDQ_A0==74
405 01:22:37.644761 TrainedVREFDQ_A1==74
406 01:22:37.645191 VrefDac_Margin_A0==23
407 01:22:37.645589 DeviceVref_Margin_A0==40
408 01:22:37.650332 VrefDac_Margin_A1==22
409 01:22:37.650760 DeviceVref_Margin_A1==40
410 01:22:37.651161
411 01:22:37.651560
412 01:22:37.656002 channel==1
413 01:22:37.656435 RxClkDly_Margin_A0==78 ps 8
414 01:22:37.656836 TxDqDly_Margin_A0==98 ps 10
415 01:22:37.661525 RxClkDly_Margin_A1==78 ps 8
416 01:22:37.661954 TxDqDly_Margin_A1==88 ps 9
417 01:22:37.667122 TrainedVREFDQ_A0==78
418 01:22:37.667554 TrainedVREFDQ_A1==75
419 01:22:37.667956 VrefDac_Margin_A0==22
420 01:22:37.672733 DeviceVref_Margin_A0==36
421 01:22:37.673156 VrefDac_Margin_A1==22
422 01:22:37.678323 DeviceVref_Margin_A1==39
423 01:22:37.678748
424 01:22:37.679151 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 01:22:37.679550
426 01:22:37.711957 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000016 dram_vref_reg_value 0x 00000061
427 01:22:37.712528 2D training succeed
428 01:22:37.717601 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 01:22:37.723216 auto size-- 65535DDR cs0 size: 2048MB
430 01:22:37.723682 DDR cs1 size: 2048MB
431 01:22:37.728799 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 01:22:37.729279 cs0 DataBus test pass
433 01:22:37.734311 cs1 DataBus test pass
434 01:22:37.734746 cs0 AddrBus test pass
435 01:22:37.735153 cs1 AddrBus test pass
436 01:22:37.735554
437 01:22:37.739966 100bdlr_step_size ps== 464
438 01:22:37.740445 result report
439 01:22:37.745512 boot times 0Enable ddr reg access
440 01:22:37.750801 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 01:22:37.764624 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 01:22:38.423113 bl2z: ptr: 05129330, size: 00001e40
443 01:22:38.431587 0.0;M3 CHK:0;cm4_sp_mode 0
444 01:22:38.432158 MVN_1=0x00000000
445 01:22:38.432583 MVN_2=0x00000000
446 01:22:38.443045 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 01:22:38.443523 OPS=0x04
448 01:22:38.443957 ring efuse init
449 01:22:38.448769 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 01:22:38.449223 [0.017354 Inits done]
451 01:22:38.449631 secure task start!
452 01:22:38.456167 high task start!
453 01:22:38.456615 low task start!
454 01:22:38.457022 run into bl31
455 01:22:38.464771 NOTICE: BL31: v1.3(release):4fc40b1
456 01:22:38.472560 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 01:22:38.473009 NOTICE: BL31: G12A normal boot!
458 01:22:38.488184 NOTICE: BL31: BL33 decompress pass
459 01:22:38.493469 ERROR: Error initializing runtime service opteed_fast
460 01:22:39.713851 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 01:22:39.714461 bl2_stage_init 0x01
462 01:22:39.714887 bl2_stage_init 0x81
463 01:22:39.719385 hw id: 0x0000 - pwm id 0x01
464 01:22:39.719852 bl2_stage_init 0xc1
465 01:22:39.724987 bl2_stage_init 0x02
466 01:22:39.725431
467 01:22:39.725848 L0:00000000
468 01:22:39.726252 L1:00000703
469 01:22:39.726654 L2:00008067
470 01:22:39.727048 L3:15000000
471 01:22:39.730577 S1:00000000
472 01:22:39.731014 B2:20282000
473 01:22:39.731413 B1:a0f83180
474 01:22:39.731808
475 01:22:39.732244 TE: 72426
476 01:22:39.732648
477 01:22:39.736166 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 01:22:39.736601
479 01:22:39.741782 Board ID = 1
480 01:22:39.742214 Set cpu clk to 24M
481 01:22:39.742614 Set clk81 to 24M
482 01:22:39.747393 Use GP1_pll as DSU clk.
483 01:22:39.747829 DSU clk: 1200 Mhz
484 01:22:39.748273 CPU clk: 1200 MHz
485 01:22:39.752988 Set clk81 to 166.6M
486 01:22:39.758597 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 01:22:39.759034 board id: 1
488 01:22:39.765768 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 01:22:39.776698 fw parse done
490 01:22:39.782645 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 01:22:39.825766 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 01:22:39.836969 PIEI prepare done
493 01:22:39.837409 fastboot data load
494 01:22:39.837815 fastboot data verify
495 01:22:39.842537 verify result: 266
496 01:22:39.849351 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 01:22:39.849798 LPDDR4 probe
498 01:22:39.850199 ddr clk to 1584MHz
499 01:22:41.208225 Lo� SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 01:22:41.208844 bl2_stage_init 0x01
501 01:22:41.209275 bl2_stage_init 0x81
502 01:22:41.213877 hw id: 0x0000 - pwm id 0x01
503 01:22:41.214363 bl2_stage_init 0xc1
504 01:22:41.219314 bl2_stage_init 0x02
505 01:22:41.219823
506 01:22:41.220287 L0:00000000
507 01:22:41.220680 L1:00000703
508 01:22:41.221065 L2:00008067
509 01:22:41.221450 L3:15000000
510 01:22:41.224927 S1:00000000
511 01:22:41.225354 B2:20282000
512 01:22:41.225743 B1:a0f83180
513 01:22:41.226124
514 01:22:41.226509 TE: 68444
515 01:22:41.226891
516 01:22:41.230492 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 01:22:41.230931
518 01:22:41.236096 Board ID = 1
519 01:22:41.236510 Set cpu clk to 24M
520 01:22:41.236893 Set clk81 to 24M
521 01:22:41.239495 Use GP1_pll as DSU clk.
522 01:22:41.239905 DSU clk: 1200 Mhz
523 01:22:41.245002 CPU clk: 1200 MHz
524 01:22:41.245414 Set clk81 to 166.6M
525 01:22:41.250720 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 01:22:41.251147 board id: 1
527 01:22:41.260284 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 01:22:41.271159 fw parse done
529 01:22:41.277182 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 01:22:41.320332 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 01:22:41.331324 PIEI prepare done
532 01:22:41.331738 fastboot data load
533 01:22:41.332168 fastboot data verify
534 01:22:41.336911 verify result: 266
535 01:22:41.342501 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 01:22:41.342916 LPDDR4 probe
537 01:22:41.343303 ddr clk to 1584MHz
538 01:22:41.350588 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 01:22:41.388234
540 01:22:41.388670 dmc_version 0001
541 01:22:41.394402 Check phy result
542 01:22:41.401254 INFO : End of CA training
543 01:22:41.401672 INFO : End of initialization
544 01:22:41.406895 INFO : Training has run successfully!
545 01:22:41.407314 Check phy result
546 01:22:41.412518 INFO : End of initialization
547 01:22:41.412972 INFO : End of read enable training
548 01:22:41.415743 INFO : End of fine write leveling
549 01:22:41.421308 INFO : End of Write leveling coarse delay
550 01:22:41.426912 INFO : Training has run successfully!
551 01:22:41.427348 Check phy result
552 01:22:41.427745 INFO : End of initialization
553 01:22:41.432545 INFO : End of read dq deskew training
554 01:22:41.438105 INFO : End of MPR read delay center optimization
555 01:22:41.438560 INFO : End of write delay center optimization
556 01:22:41.443704 INFO : End of read delay center optimization
557 01:22:41.449274 INFO : End of max read latency training
558 01:22:41.449721 INFO : Training has run successfully!
559 01:22:41.454898 1D training succeed
560 01:22:41.460867 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 01:22:41.509172 Check phy result
562 01:22:41.509623 INFO : End of initialization
563 01:22:41.536427 INFO : End of 2D read delay Voltage center optimization
564 01:22:41.560676 INFO : End of 2D read delay Voltage center optimization
565 01:22:41.617264 INFO : End of 2D write delay Voltage center optimization
566 01:22:41.671267 INFO : End of 2D write delay Voltage center optimization
567 01:22:41.676813 INFO : Training has run successfully!
568 01:22:41.677252
569 01:22:41.677661 channel==0
570 01:22:41.682377 RxClkDly_Margin_A0==69 ps 7
571 01:22:41.682809 TxDqDly_Margin_A0==98 ps 10
572 01:22:41.688053 RxClkDly_Margin_A1==88 ps 9
573 01:22:41.688498 TxDqDly_Margin_A1==98 ps 10
574 01:22:41.688905 TrainedVREFDQ_A0==74
575 01:22:41.693629 TrainedVREFDQ_A1==75
576 01:22:41.694061 VrefDac_Margin_A0==23
577 01:22:41.694461 DeviceVref_Margin_A0==40
578 01:22:41.699314 VrefDac_Margin_A1==23
579 01:22:41.699761 DeviceVref_Margin_A1==39
580 01:22:41.700210
581 01:22:41.700612
582 01:22:41.704851 channel==1
583 01:22:41.705278 RxClkDly_Margin_A0==78 ps 8
584 01:22:41.705675 TxDqDly_Margin_A0==98 ps 10
585 01:22:41.710371 RxClkDly_Margin_A1==78 ps 8
586 01:22:41.710799 TxDqDly_Margin_A1==98 ps 10
587 01:22:41.715936 TrainedVREFDQ_A0==78
588 01:22:41.716400 TrainedVREFDQ_A1==78
589 01:22:41.716800 VrefDac_Margin_A0==22
590 01:22:41.721553 DeviceVref_Margin_A0==36
591 01:22:41.721991 VrefDac_Margin_A1==22
592 01:22:41.727140 DeviceVref_Margin_A1==36
593 01:22:41.727574
594 01:22:41.727974 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 01:22:41.728410
596 01:22:41.760756 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 01:22:41.761232 2D training succeed
598 01:22:41.766347 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 01:22:41.771946 auto size-- 65535DDR cs0 size: 2048MB
600 01:22:41.772418 DDR cs1 size: 2048MB
601 01:22:41.777555 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 01:22:41.777988 cs0 DataBus test pass
603 01:22:41.783178 cs1 DataBus test pass
604 01:22:41.783604 cs0 AddrBus test pass
605 01:22:41.784029 cs1 AddrBus test pass
606 01:22:41.784430
607 01:22:41.788800 100bdlr_step_size ps== 464
608 01:22:41.789240 result report
609 01:22:41.794357 boot times 0Enable ddr reg access
610 01:22:41.799713 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 01:22:41.813701 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 01:22:42.472751 bl2z: ptr: 05129330, size: 00001e40
613 01:22:42.480907 0.0;M3 CHK:0;cm4_sp_mode 0
614 01:22:42.481375 MVN_1=0x00000000
615 01:22:42.481621 MVN_2=0x00000000
616 01:22:42.492383 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 01:22:42.492705 OPS=0x04
618 01:22:42.492917 ring efuse init
619 01:22:42.497992 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 01:22:42.498433 [0.017354 Inits done]
621 01:22:42.498769 secure task start!
622 01:22:42.506007 high task start!
623 01:22:42.506440 low task start!
624 01:22:42.506676 run into bl31
625 01:22:42.514629 NOTICE: BL31: v1.3(release):4fc40b1
626 01:22:42.522576 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 01:22:42.523113 NOTICE: BL31: G12A normal boot!
628 01:22:42.538073 NOTICE: BL31: BL33 decompress pass
629 01:22:42.543389 ERROR: Error initializing runtime service opteed_fast
630 01:22:43.912381 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 01:22:43.913051 bl2_stage_init 0x01
632 01:22:43.913539 bl2_stage_init 0x81
633 01:22:43.917582 hw id: 0x0000 - pwm id 0x01
634 01:22:43.917960 bl2_stage_init 0xc1
635 01:22:43.918184 bl2_stage_init 0x02
636 01:22:43.918397
637 01:22:43.923189 L0:00000000
638 01:22:43.923764 L1:00000703
639 01:22:43.924178 L2:00008067
640 01:22:43.924408 L3:15000000
641 01:22:43.924628 S1:00000000
642 01:22:43.928894 B2:20282000
643 01:22:43.929258 B1:a0f83180
644 01:22:43.929485
645 01:22:43.929730 TE: 69754
646 01:22:43.929968
647 01:22:43.934266 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 01:22:43.934632
649 01:22:43.940286 Board ID = 1
650 01:22:43.940896 Set cpu clk to 24M
651 01:22:43.941291 Set clk81 to 24M
652 01:22:43.945689 Use GP1_pll as DSU clk.
653 01:22:43.946525 DSU clk: 1200 Mhz
654 01:22:43.948116 CPU clk: 1200 MHz
655 01:22:43.949021 Set clk81 to 166.6M
656 01:22:43.956767 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 01:22:43.957539 board id: 1
658 01:22:43.963096 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 01:22:43.973865 fw parse done
660 01:22:43.980919 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 01:22:44.022564 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 01:22:44.033548 PIEI prepare done
663 01:22:44.034150 fastboot data load
664 01:22:44.034628 fastboot data verify
665 01:22:44.039022 verify result: 266
666 01:22:44.044574 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 01:22:44.045156 LPDDR4 probe
668 01:22:44.045547 ddr clk to 1584MHz
669 01:22:44.052391 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 01:22:44.089978
671 01:22:44.090647 dmc_version 0001
672 01:22:44.096496 Check phy result
673 01:22:44.102334 INFO : End of CA training
674 01:22:44.102888 INFO : End of initialization
675 01:22:44.107940 INFO : Training has run successfully!
676 01:22:44.108600 Check phy result
677 01:22:44.113981 INFO : End of initialization
678 01:22:44.115620 INFO : End of read enable training
679 01:22:44.118191 INFO : End of fine write leveling
680 01:22:44.122634 INFO : End of Write leveling coarse delay
681 01:22:44.128226 INFO : Training has run successfully!
682 01:22:44.128842 Check phy result
683 01:22:44.129318 INFO : End of initialization
684 01:22:44.133619 INFO : End of read dq deskew training
685 01:22:44.139175 INFO : End of MPR read delay center optimization
686 01:22:44.139708 INFO : End of write delay center optimization
687 01:22:44.144784 INFO : End of read delay center optimization
688 01:22:44.150432 INFO : End of max read latency training
689 01:22:44.150985 INFO : Training has run successfully!
690 01:22:44.156037 1D training succeed
691 01:22:44.162014 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 01:22:44.210307 Check phy result
693 01:22:44.210910 INFO : End of initialization
694 01:22:44.232708 INFO : End of 2D read delay Voltage center optimization
695 01:22:44.254648 INFO : End of 2D read delay Voltage center optimization
696 01:22:44.303770 INFO : End of 2D write delay Voltage center optimization
697 01:22:44.352355 INFO : End of 2D write delay Voltage center optimization
698 01:22:44.364443 INFO : Training has run successfully!
699 01:22:44.364870
700 01:22:44.365095 channel==0
701 01:22:44.365303 RxClkDly_Margin_A0==78 ps 8
702 01:22:44.365527 TxDqDly_Margin_A0==98 ps 10
703 01:22:44.369133 RxClkDly_Margin_A1==88 ps 9
704 01:22:44.370081 TxDqDly_Margin_A1==98 ps 10
705 01:22:44.370624 TrainedVREFDQ_A0==74
706 01:22:44.374478 TrainedVREFDQ_A1==75
707 01:22:44.374846 VrefDac_Margin_A0==22
708 01:22:44.375079 DeviceVref_Margin_A0==40
709 01:22:44.380130 VrefDac_Margin_A1==23
710 01:22:44.380874 DeviceVref_Margin_A1==39
711 01:22:44.381604
712 01:22:44.382062
713 01:22:44.385833 channel==1
714 01:22:44.386458 RxClkDly_Margin_A0==78 ps 8
715 01:22:44.386899 TxDqDly_Margin_A0==98 ps 10
716 01:22:44.391379 RxClkDly_Margin_A1==78 ps 8
717 01:22:44.391954 TxDqDly_Margin_A1==78 ps 8
718 01:22:44.396980 TrainedVREFDQ_A0==78
719 01:22:44.397522 TrainedVREFDQ_A1==75
720 01:22:44.397949 VrefDac_Margin_A0==22
721 01:22:44.402523 DeviceVref_Margin_A0==36
722 01:22:44.403061 VrefDac_Margin_A1==22
723 01:22:44.408231 DeviceVref_Margin_A1==39
724 01:22:44.408795
725 01:22:44.409226 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 01:22:44.409647
727 01:22:44.441845 soc_vref_reg_value 0x 00000019 00000018 00000017 00000017 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000015 00000016 dram_vref_reg_value 0x 00000061
728 01:22:44.442479 2D training succeed
729 01:22:44.459890 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 01:22:44.460688 auto size-- 65535DDR cs0 size: 2048MB
731 01:22:44.461156 DDR cs1 size: 2048MB
732 01:22:44.461583 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 01:22:44.462013 cs0 DataBus test pass
734 01:22:44.464273 cs1 DataBus test pass
735 01:22:44.464877 cs0 AddrBus test pass
736 01:22:44.465335 cs1 AddrBus test pass
737 01:22:44.465759
738 01:22:44.469861 100bdlr_step_size ps== 478
739 01:22:44.470466 result report
740 01:22:44.475382 boot times 0Enable ddr reg access
741 01:22:44.480630 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 01:22:44.494386 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 01:22:45.151473 bl2z: ptr: 05129330, size: 00001e40
744 01:22:45.157404 0.0;M3 CHK:0;cm4_sp_mode 0
745 01:22:45.157836 MVN_1=0x00000000
746 01:22:45.158071 MVN_2=0x00000000
747 01:22:45.168948 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 01:22:45.169536 OPS=0x04
749 01:22:45.169924 ring efuse init
750 01:22:45.175073 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 01:22:45.175482 [0.017310 Inits done]
752 01:22:45.175715 secure task start!
753 01:22:45.182472 high task start!
754 01:22:45.182877 low task start!
755 01:22:45.183109 run into bl31
756 01:22:45.193153 NOTICE: BL31: v1.3(release):4fc40b1
757 01:22:45.199081 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 01:22:45.199784 NOTICE: BL31: G12A normal boot!
759 01:22:45.214536 NOTICE: BL31: BL33 decompress pass
760 01:22:45.220144 ERROR: Error initializing runtime service opteed_fast
761 01:22:46.015481
762 01:22:46.016141
763 01:22:46.020900 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 01:22:46.021382
765 01:22:46.024375 Model: Libre Computer AML-S905D3-CC Solitude
766 01:22:46.171426 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 01:22:46.186698 DRAM: 2 GiB (effective 3.8 GiB)
768 01:22:46.287767 Core: 406 devices, 33 uclasses, devicetree: separate
769 01:22:46.293663 WDT: Not starting watchdog@f0d0
770 01:22:46.318736 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 01:22:46.330955 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 01:22:46.335887 ** Bad device specification mmc 0 **
773 01:22:46.346103 Card did not respond to voltage select! : -110
774 01:22:46.353574 ** Bad device specification mmc 0 **
775 01:22:46.354010 Couldn't find partition mmc 0
776 01:22:46.361999 Card did not respond to voltage select! : -110
777 01:22:46.367450 ** Bad device specification mmc 0 **
778 01:22:46.367884 Couldn't find partition mmc 0
779 01:22:46.371660 Error: could not access storage.
780 01:22:46.668634 Net: eth0: ethernet@ff3f0000
781 01:22:46.669262 starting USB...
782 01:22:46.913816 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 01:22:46.914428 Starting the controller
784 01:22:46.920678 USB XHCI 1.10
785 01:22:48.474989 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 01:22:48.482392 scanning usb for storage devices... 0 Storage Device(s) found
788 01:22:48.533896 Hit any key to stop autoboot: 1
789 01:22:48.535001 end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
790 01:22:48.535634 start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
791 01:22:48.536174 Setting prompt string to ['=>']
792 01:22:48.536666 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
793 01:22:48.549335 0
794 01:22:48.550264 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 01:22:48.651560 => setenv autoload no
797 01:22:48.652656 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
798 01:22:48.657488 setenv autoload no
800 01:22:48.759004 => setenv initrd_high 0xffffffff
801 01:22:48.759955 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
802 01:22:48.764477 setenv initrd_high 0xffffffff
804 01:22:48.865931 => setenv fdt_high 0xffffffff
805 01:22:48.866905 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
806 01:22:48.871548 setenv fdt_high 0xffffffff
808 01:22:48.973085 => dhcp
809 01:22:48.974079 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
810 01:22:48.978310 dhcp
811 01:22:50.084237 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 01:22:50.084858 Speed: 1000, full duplex
813 01:22:50.085281 BOOTP broadcast 1
814 01:22:50.097506 DHCP client bound to address 192.168.6.21 (12 ms)
816 01:22:50.198981 => setenv serverip 192.168.6.2
817 01:22:50.199928 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
818 01:22:50.204272 setenv serverip 192.168.6.2
820 01:22:50.305690 => tftpboot 0x01080000 950724/tftp-deploy-abqal2xf/kernel/uImage
821 01:22:50.306644 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
822 01:22:50.313214 tftpboot 0x01080000 950724/tftp-deploy-abqal2xf/kernel/uImage
823 01:22:50.313698 Speed: 1000, full duplex
824 01:22:50.314110 Using ethernet@ff3f0000 device
825 01:22:50.318806 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
826 01:22:50.324198 Filename '950724/tftp-deploy-abqal2xf/kernel/uImage'.
827 01:22:50.328083 Load address: 0x1080000
828 01:22:54.553535 Loading: *################################################## 63.4 MiB
829 01:22:54.554158 15 MiB/s
830 01:22:54.554593 done
831 01:22:54.557794 Bytes transferred = 66443840 (3f5da40 hex)
833 01:22:54.659310 => tftpboot 0x08000000 950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
834 01:22:54.660051 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:35)
835 01:22:54.666886 tftpboot 0x08000000 950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot
836 01:22:54.667337 Speed: 1000, full duplex
837 01:22:54.667731 Using ethernet@ff3f0000 device
838 01:22:54.672419 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
839 01:22:54.682174 Filename '950724/tftp-deploy-abqal2xf/ramdisk/ramdisk.cpio.gz.uboot'.
840 01:22:54.682771 Load address: 0x8000000
841 01:22:56.680796 Loading: *############################################ UDP wrong checksum 000000ff 0000b247
842 01:22:56.721435 # UDP wrong checksum 000000ff 0000423a
843 01:22:57.133447 #### UDP wrong checksum 00000007 00000600
844 01:23:02.134508 T UDP wrong checksum 00000007 00000600
845 01:23:12.136538 T T UDP wrong checksum 00000007 00000600
846 01:23:32.140517 T T T T UDP wrong checksum 00000007 00000600
847 01:23:50.097704 T T T UDP wrong checksum 000000ff 00001747
848 01:23:50.116433 UDP wrong checksum 000000ff 0000a039
849 01:23:52.145425
850 01:23:52.146132 Retry count exceeded; starting again
852 01:23:52.147712 end: 2.4.3 bootloader-commands (duration 00:01:04) [common]
855 01:23:52.149874 end: 2.4 uboot-commands (duration 00:01:22) [common]
857 01:23:52.151460 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
859 01:23:52.152695 end: 2 uboot-action (duration 00:01:22) [common]
861 01:23:52.154476 Cleaning after the job
862 01:23:52.155157 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/ramdisk
863 01:23:52.156712 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/kernel
864 01:23:52.208749 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/dtb
865 01:23:52.209801 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/nfsrootfs
866 01:23:52.305379 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950724/tftp-deploy-abqal2xf/modules
867 01:23:52.314695 start: 4.1 power-off (timeout 00:00:30) [common]
868 01:23:52.315421 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
869 01:23:52.352358 >> OK - accepted request
870 01:23:52.354485 Returned 0 in 0 seconds
871 01:23:52.455384 end: 4.1 power-off (duration 00:00:00) [common]
873 01:23:52.456611 start: 4.2 read-feedback (timeout 00:10:00) [common]
874 01:23:52.457444 Listened to connection for namespace 'common' for up to 1s
875 01:23:53.458288 Finalising connection for namespace 'common'
876 01:23:53.458804 Disconnecting from shell: Finalise
877 01:23:53.459098 =>
878 01:23:53.559730 end: 4.2 read-feedback (duration 00:00:01) [common]
879 01:23:53.560345 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950724
880 01:23:55.493542 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950724
881 01:23:55.494274 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.