Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:20:27.631076 lava-dispatcher, installed at version: 2024.01
2 03:20:27.631870 start: 0 validate
3 03:20:27.632375 Start time: 2024-11-07 03:20:27.632345+00:00 (UTC)
4 03:20:27.632896 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:20:27.633423 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:20:27.677002 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:20:27.677538 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-15%2Fkernel%2FImage exists
8 03:20:27.709047 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:20:27.709645 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:20:27.741232 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:20:27.741715 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:20:27.775862 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:20:27.776368 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-15%2Fmodules.tar.xz exists
14 03:20:27.818893 validate duration: 0.19
16 03:20:27.820384 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:20:27.820990 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:20:27.821585 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:20:27.822669 Not decompressing ramdisk as can be used compressed.
20 03:20:27.823427 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:20:27.823935 saving as /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/ramdisk/initrd.cpio.gz
22 03:20:27.824463 total size: 5628169 (5 MB)
23 03:20:27.867006 progress 0 % (0 MB)
24 03:20:27.874766 progress 5 % (0 MB)
25 03:20:27.883391 progress 10 % (0 MB)
26 03:20:27.890974 progress 15 % (0 MB)
27 03:20:27.899191 progress 20 % (1 MB)
28 03:20:27.905087 progress 25 % (1 MB)
29 03:20:27.909071 progress 30 % (1 MB)
30 03:20:27.912952 progress 35 % (1 MB)
31 03:20:27.916429 progress 40 % (2 MB)
32 03:20:27.920287 progress 45 % (2 MB)
33 03:20:27.923736 progress 50 % (2 MB)
34 03:20:27.927574 progress 55 % (2 MB)
35 03:20:27.931413 progress 60 % (3 MB)
36 03:20:27.934893 progress 65 % (3 MB)
37 03:20:27.938733 progress 70 % (3 MB)
38 03:20:27.942182 progress 75 % (4 MB)
39 03:20:27.946120 progress 80 % (4 MB)
40 03:20:27.949566 progress 85 % (4 MB)
41 03:20:27.953188 progress 90 % (4 MB)
42 03:20:27.956652 progress 95 % (5 MB)
43 03:20:27.959792 progress 100 % (5 MB)
44 03:20:27.960440 5 MB downloaded in 0.14 s (39.48 MB/s)
45 03:20:27.960963 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:20:27.961849 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:20:27.962135 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:20:27.962401 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:20:27.962863 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-15/kernel/Image
51 03:20:27.963099 saving as /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/kernel/Image
52 03:20:27.963306 total size: 37878272 (36 MB)
53 03:20:27.963512 No compression specified
54 03:20:28.003168 progress 0 % (0 MB)
55 03:20:28.027005 progress 5 % (1 MB)
56 03:20:28.050647 progress 10 % (3 MB)
57 03:20:28.074298 progress 15 % (5 MB)
58 03:20:28.097707 progress 20 % (7 MB)
59 03:20:28.121165 progress 25 % (9 MB)
60 03:20:28.144668 progress 30 % (10 MB)
61 03:20:28.168133 progress 35 % (12 MB)
62 03:20:28.191636 progress 40 % (14 MB)
63 03:20:28.215270 progress 45 % (16 MB)
64 03:20:28.238675 progress 50 % (18 MB)
65 03:20:28.261971 progress 55 % (19 MB)
66 03:20:28.285453 progress 60 % (21 MB)
67 03:20:28.308956 progress 65 % (23 MB)
68 03:20:28.332811 progress 70 % (25 MB)
69 03:20:28.356120 progress 75 % (27 MB)
70 03:20:28.379588 progress 80 % (28 MB)
71 03:20:28.403021 progress 85 % (30 MB)
72 03:20:28.426993 progress 90 % (32 MB)
73 03:20:28.450317 progress 95 % (34 MB)
74 03:20:28.472541 progress 100 % (36 MB)
75 03:20:28.473259 36 MB downloaded in 0.51 s (70.84 MB/s)
76 03:20:28.473725 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:20:28.474532 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:20:28.474804 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:20:28.475065 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:20:28.475514 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-15/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:20:28.475779 saving as /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:20:28.476002 total size: 54703 (0 MB)
84 03:20:28.476214 No compression specified
85 03:20:28.521743 progress 59 % (0 MB)
86 03:20:28.522594 progress 100 % (0 MB)
87 03:20:28.523131 0 MB downloaded in 0.05 s (1.11 MB/s)
88 03:20:28.523608 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:20:28.524478 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:20:28.524747 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:20:28.525010 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:20:28.525461 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:20:28.525700 saving as /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/nfsrootfs/full.rootfs.tar
95 03:20:28.525903 total size: 120894716 (115 MB)
96 03:20:28.526112 Using unxz to decompress xz
97 03:20:28.563204 progress 0 % (0 MB)
98 03:20:29.351560 progress 5 % (5 MB)
99 03:20:30.185998 progress 10 % (11 MB)
100 03:20:30.983736 progress 15 % (17 MB)
101 03:20:31.723850 progress 20 % (23 MB)
102 03:20:32.314226 progress 25 % (28 MB)
103 03:20:33.135331 progress 30 % (34 MB)
104 03:20:33.926653 progress 35 % (40 MB)
105 03:20:34.290457 progress 40 % (46 MB)
106 03:20:34.674799 progress 45 % (51 MB)
107 03:20:35.389486 progress 50 % (57 MB)
108 03:20:36.265228 progress 55 % (63 MB)
109 03:20:37.044758 progress 60 % (69 MB)
110 03:20:37.804941 progress 65 % (74 MB)
111 03:20:38.592322 progress 70 % (80 MB)
112 03:20:39.424264 progress 75 % (86 MB)
113 03:20:40.225617 progress 80 % (92 MB)
114 03:20:40.993145 progress 85 % (98 MB)
115 03:20:41.850726 progress 90 % (103 MB)
116 03:20:42.623468 progress 95 % (109 MB)
117 03:20:43.451480 progress 100 % (115 MB)
118 03:20:43.464261 115 MB downloaded in 14.94 s (7.72 MB/s)
119 03:20:43.465142 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:20:43.466752 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:20:43.467283 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:20:43.467808 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:20:43.468753 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-15/modules.tar.xz
125 03:20:43.469235 saving as /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/modules/modules.tar
126 03:20:43.469650 total size: 11778608 (11 MB)
127 03:20:43.470071 Using unxz to decompress xz
128 03:20:43.521073 progress 0 % (0 MB)
129 03:20:43.588111 progress 5 % (0 MB)
130 03:20:43.662505 progress 10 % (1 MB)
131 03:20:43.757216 progress 15 % (1 MB)
132 03:20:43.852408 progress 20 % (2 MB)
133 03:20:43.931494 progress 25 % (2 MB)
134 03:20:44.008277 progress 30 % (3 MB)
135 03:20:44.089321 progress 35 % (3 MB)
136 03:20:44.169037 progress 40 % (4 MB)
137 03:20:44.244786 progress 45 % (5 MB)
138 03:20:44.330616 progress 50 % (5 MB)
139 03:20:44.415220 progress 55 % (6 MB)
140 03:20:44.500954 progress 60 % (6 MB)
141 03:20:44.584391 progress 65 % (7 MB)
142 03:20:44.667159 progress 70 % (7 MB)
143 03:20:44.750738 progress 75 % (8 MB)
144 03:20:44.834250 progress 80 % (9 MB)
145 03:20:44.914493 progress 85 % (9 MB)
146 03:20:44.997318 progress 90 % (10 MB)
147 03:20:45.075838 progress 95 % (10 MB)
148 03:20:45.152613 progress 100 % (11 MB)
149 03:20:45.164468 11 MB downloaded in 1.69 s (6.63 MB/s)
150 03:20:45.165321 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:20:45.166880 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:20:45.167393 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:20:45.167901 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:21:02.163238 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950283/extract-nfsrootfs-xw_kbpw8
156 03:21:02.163847 end: 1.6.1 extract-nfsrootfs (duration 00:00:17) [common]
157 03:21:02.164198 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 03:21:02.164828 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5
159 03:21:02.165328 makedir: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin
160 03:21:02.165731 makedir: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/tests
161 03:21:02.166132 makedir: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/results
162 03:21:02.166510 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-add-keys
163 03:21:02.167059 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-add-sources
164 03:21:02.167583 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-background-process-start
165 03:21:02.168230 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-background-process-stop
166 03:21:02.168790 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-common-functions
167 03:21:02.169300 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-echo-ipv4
168 03:21:02.169791 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-install-packages
169 03:21:02.170280 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-installed-packages
170 03:21:02.170765 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-os-build
171 03:21:02.171250 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-probe-channel
172 03:21:02.171741 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-probe-ip
173 03:21:02.172268 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-target-ip
174 03:21:02.172767 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-target-mac
175 03:21:02.173286 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-target-storage
176 03:21:02.173854 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-case
177 03:21:02.174361 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-event
178 03:21:02.174841 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-feedback
179 03:21:02.175325 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-raise
180 03:21:02.175823 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-reference
181 03:21:02.176374 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-runner
182 03:21:02.176872 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-set
183 03:21:02.177358 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-test-shell
184 03:21:02.177854 Updating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-add-keys (debian)
185 03:21:02.178412 Updating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-add-sources (debian)
186 03:21:02.178946 Updating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-install-packages (debian)
187 03:21:02.179469 Updating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-installed-packages (debian)
188 03:21:02.179968 Updating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/bin/lava-os-build (debian)
189 03:21:02.180521 Creating /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/environment
190 03:21:02.180919 LAVA metadata
191 03:21:02.181182 - LAVA_JOB_ID=950283
192 03:21:02.181401 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:21:02.181784 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 03:21:02.182804 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:21:02.183139 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 03:21:02.183345 skipped lava-vland-overlay
197 03:21:02.183584 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:21:02.183837 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 03:21:02.184083 skipped lava-multinode-overlay
200 03:21:02.184331 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:21:02.184581 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 03:21:02.184832 Loading test definitions
203 03:21:02.185107 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 03:21:02.185328 Using /lava-950283 at stage 0
205 03:21:02.186431 uuid=950283_1.6.2.4.1 testdef=None
206 03:21:02.186747 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:21:02.187007 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 03:21:02.188665 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:21:02.189456 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 03:21:02.191506 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:21:02.192376 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 03:21:02.194255 runner path: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/0/tests/0_timesync-off test_uuid 950283_1.6.2.4.1
215 03:21:02.194833 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:21:02.195644 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 03:21:02.195869 Using /lava-950283 at stage 0
219 03:21:02.196265 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:21:02.196561 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/0/tests/1_kselftest-rtc'
221 03:21:05.643862 Running '/usr/bin/git checkout kernelci.org
222 03:21:06.094063 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 03:21:06.095525 uuid=950283_1.6.2.4.5 testdef=None
224 03:21:06.095867 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:21:06.096652 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 03:21:06.099503 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:21:06.100369 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 03:21:06.104214 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:21:06.105103 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 03:21:06.108830 runner path: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/0/tests/1_kselftest-rtc test_uuid 950283_1.6.2.4.5
234 03:21:06.109192 BOARD='meson-g12b-a311d-libretech-cc'
235 03:21:06.109445 BRANCH='mainline'
236 03:21:06.109672 SKIPFILE='/dev/null'
237 03:21:06.109899 SKIP_INSTALL='True'
238 03:21:06.110127 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-15/kselftest.tar.xz'
239 03:21:06.110361 TST_CASENAME=''
240 03:21:06.110586 TST_CMDFILES='rtc'
241 03:21:06.111250 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:21:06.112178 Creating lava-test-runner.conf files
244 03:21:06.112391 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950283/lava-overlay-7lkhb7o5/lava-950283/0 for stage 0
245 03:21:06.112804 - 0_timesync-off
246 03:21:06.113059 - 1_kselftest-rtc
247 03:21:06.113416 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:21:06.113707 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 03:21:29.289340 end: 1.6.2.5 compress-overlay (duration 00:00:23) [common]
250 03:21:29.289785 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:59) [common]
251 03:21:29.290058 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:21:29.290346 end: 1.6.2 lava-overlay (duration 00:00:27) [common]
253 03:21:29.290612 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:59) [common]
254 03:21:29.990569 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:21:29.991090 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 03:21:29.991348 extracting modules file /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950283/extract-nfsrootfs-xw_kbpw8
257 03:21:31.396590 extracting modules file /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk
258 03:21:32.844789 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:21:32.845272 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 03:21:32.845553 [common] Applying overlay to NFS
261 03:21:32.845769 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950283/compress-overlay-ku7nejq9/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950283/extract-nfsrootfs-xw_kbpw8
262 03:21:35.641303 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:21:35.641827 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:21:35.642115 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:21:35.642348 Converting downloaded kernel to a uImage
266 03:21:35.642659 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/kernel/Image /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/kernel/uImage
267 03:21:36.064189 output: Image Name:
268 03:21:36.064713 output: Created: Thu Nov 7 03:21:35 2024
269 03:21:36.064981 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:21:36.065233 output: Data Size: 37878272 Bytes = 36990.50 KiB = 36.12 MiB
271 03:21:36.065482 output: Load Address: 01080000
272 03:21:36.065729 output: Entry Point: 01080000
273 03:21:36.065972 output:
274 03:21:36.066386 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:21:36.066731 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:21:36.067081 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 03:21:36.067400 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:21:36.067722 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 03:21:36.068064 Building ramdisk /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk
280 03:21:38.401159 >> 173435 blocks
281 03:21:46.117098 Adding RAMdisk u-boot header.
282 03:21:46.117759 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk.cpio.gz.uboot
283 03:21:46.374409 output: Image Name:
284 03:21:46.374843 output: Created: Thu Nov 7 03:21:46 2024
285 03:21:46.375056 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:21:46.375260 output: Data Size: 24147373 Bytes = 23581.42 KiB = 23.03 MiB
287 03:21:46.375464 output: Load Address: 00000000
288 03:21:46.375663 output: Entry Point: 00000000
289 03:21:46.375863 output:
290 03:21:46.376744 rename /var/lib/lava/dispatcher/tmp/950283/extract-overlay-ramdisk-z5x6gs__/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
291 03:21:46.377480 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:21:46.378024 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 03:21:46.378582 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:41) [common]
294 03:21:46.379025 No LXC device requested
295 03:21:46.379520 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:21:46.380056 start: 1.8 deploy-device-env (timeout 00:08:41) [common]
297 03:21:46.380562 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:21:46.380974 Checking files for TFTP limit of 4294967296 bytes.
299 03:21:46.383610 end: 1 tftp-deploy (duration 00:01:19) [common]
300 03:21:46.384214 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:21:46.384738 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:21:46.385231 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:21:46.385726 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:21:46.386247 Using kernel file from prepare-kernel: 950283/tftp-deploy-k9v_5w1n/kernel/uImage
305 03:21:46.386865 substitutions:
306 03:21:46.387274 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:21:46.387673 - {DTB_ADDR}: 0x01070000
308 03:21:46.388097 - {DTB}: 950283/tftp-deploy-k9v_5w1n/dtb/meson-g12b-a311d-libretech-cc.dtb
309 03:21:46.388498 - {INITRD}: 950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
310 03:21:46.388895 - {KERNEL_ADDR}: 0x01080000
311 03:21:46.389285 - {KERNEL}: 950283/tftp-deploy-k9v_5w1n/kernel/uImage
312 03:21:46.389675 - {LAVA_MAC}: None
313 03:21:46.390102 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950283/extract-nfsrootfs-xw_kbpw8
314 03:21:46.390498 - {NFS_SERVER_IP}: 192.168.6.2
315 03:21:46.390884 - {PRESEED_CONFIG}: None
316 03:21:46.391273 - {PRESEED_LOCAL}: None
317 03:21:46.391664 - {RAMDISK_ADDR}: 0x08000000
318 03:21:46.392073 - {RAMDISK}: 950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
319 03:21:46.392465 - {ROOT_PART}: None
320 03:21:46.392849 - {ROOT}: None
321 03:21:46.393233 - {SERVER_IP}: 192.168.6.2
322 03:21:46.393617 - {TEE_ADDR}: 0x83000000
323 03:21:46.393999 - {TEE}: None
324 03:21:46.394385 Parsed boot commands:
325 03:21:46.394759 - setenv autoload no
326 03:21:46.395140 - setenv initrd_high 0xffffffff
327 03:21:46.395519 - setenv fdt_high 0xffffffff
328 03:21:46.395900 - dhcp
329 03:21:46.396302 - setenv serverip 192.168.6.2
330 03:21:46.396685 - tftpboot 0x01080000 950283/tftp-deploy-k9v_5w1n/kernel/uImage
331 03:21:46.397071 - tftpboot 0x08000000 950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
332 03:21:46.397456 - tftpboot 0x01070000 950283/tftp-deploy-k9v_5w1n/dtb/meson-g12b-a311d-libretech-cc.dtb
333 03:21:46.397839 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950283/extract-nfsrootfs-xw_kbpw8,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:21:46.398233 - bootm 0x01080000 0x08000000 0x01070000
335 03:21:46.398728 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:21:46.400226 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:21:46.400642 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 03:21:46.415853 Setting prompt string to ['lava-test: # ']
340 03:21:46.417440 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:21:46.418045 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:21:46.418613 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:21:46.419139 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:21:46.420500 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 03:21:46.457966 >> OK - accepted request
346 03:21:46.460271 Returned 0 in 0 seconds
347 03:21:46.561352 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:21:46.562964 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:21:46.563510 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:21:46.564070 Setting prompt string to ['Hit any key to stop autoboot']
352 03:21:46.564523 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:21:46.566116 Trying 192.168.56.21...
354 03:21:46.566597 Connected to conserv1.
355 03:21:46.566999 Escape character is '^]'.
356 03:21:46.567399
357 03:21:46.567813 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 03:21:46.568260
359 03:21:57.699386 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 03:21:57.700049 bl2_stage_init 0x01
361 03:21:57.700474 bl2_stage_init 0x81
362 03:21:57.704903 hw id: 0x0000 - pwm id 0x01
363 03:21:57.705381 bl2_stage_init 0xc1
364 03:21:57.705800 bl2_stage_init 0x02
365 03:21:57.706196
366 03:21:57.710528 L0:00000000
367 03:21:57.710995 L1:20000703
368 03:21:57.711404 L2:00008067
369 03:21:57.711805 L3:14000000
370 03:21:57.716088 B2:00402000
371 03:21:57.716548 B1:e0f83180
372 03:21:57.716951
373 03:21:57.717337 TE: 58159
374 03:21:57.717728
375 03:21:57.721686 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 03:21:57.722124
377 03:21:57.722511 Board ID = 1
378 03:21:57.727246 Set A53 clk to 24M
379 03:21:57.727678 Set A73 clk to 24M
380 03:21:57.728101 Set clk81 to 24M
381 03:21:57.732824 A53 clk: 1200 MHz
382 03:21:57.733256 A73 clk: 1200 MHz
383 03:21:57.733644 CLK81: 166.6M
384 03:21:57.734026 smccc: 00012ab4
385 03:21:57.738490 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 03:21:57.744091 board id: 1
387 03:21:57.749975 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:21:57.760593 fw parse done
389 03:21:57.766614 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:21:57.809250 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:21:57.820078 PIEI prepare done
392 03:21:57.820512 fastboot data load
393 03:21:57.820900 fastboot data verify
394 03:21:57.825739 verify result: 266
395 03:21:57.831295 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 03:21:57.831736 LPDDR4 probe
397 03:21:57.832164 ddr clk to 1584MHz
398 03:21:57.839309 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:21:57.876511
400 03:21:57.876944 dmc_version 0001
401 03:21:57.883230 Check phy result
402 03:21:57.889063 INFO : End of CA training
403 03:21:57.889491 INFO : End of initialization
404 03:21:57.894666 INFO : Training has run successfully!
405 03:21:57.895095 Check phy result
406 03:21:57.900303 INFO : End of initialization
407 03:21:57.900727 INFO : End of read enable training
408 03:21:57.905877 INFO : End of fine write leveling
409 03:21:57.911506 INFO : End of Write leveling coarse delay
410 03:21:57.911932 INFO : Training has run successfully!
411 03:21:57.912359 Check phy result
412 03:21:57.917051 INFO : End of initialization
413 03:21:57.917484 INFO : End of read dq deskew training
414 03:21:57.922688 INFO : End of MPR read delay center optimization
415 03:21:57.928291 INFO : End of write delay center optimization
416 03:21:57.933856 INFO : End of read delay center optimization
417 03:21:57.934286 INFO : End of max read latency training
418 03:21:57.939497 INFO : Training has run successfully!
419 03:21:57.939924 1D training succeed
420 03:21:57.948664 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:21:57.996225 Check phy result
422 03:21:57.996658 INFO : End of initialization
423 03:21:58.017869 INFO : End of 2D read delay Voltage center optimization
424 03:21:58.038020 INFO : End of 2D read delay Voltage center optimization
425 03:21:58.089901 INFO : End of 2D write delay Voltage center optimization
426 03:21:58.139249 INFO : End of 2D write delay Voltage center optimization
427 03:21:58.144780 INFO : Training has run successfully!
428 03:21:58.145223
429 03:21:58.145619 channel==0
430 03:21:58.150401 RxClkDly_Margin_A0==88 ps 9
431 03:21:58.150831 TxDqDly_Margin_A0==98 ps 10
432 03:21:58.156073 RxClkDly_Margin_A1==88 ps 9
433 03:21:58.156502 TxDqDly_Margin_A1==98 ps 10
434 03:21:58.156899 TrainedVREFDQ_A0==74
435 03:21:58.161530 TrainedVREFDQ_A1==74
436 03:21:58.161962 VrefDac_Margin_A0==25
437 03:21:58.162352 DeviceVref_Margin_A0==40
438 03:21:58.167190 VrefDac_Margin_A1==25
439 03:21:58.167611 DeviceVref_Margin_A1==40
440 03:21:58.168029
441 03:21:58.168421
442 03:21:58.172738 channel==1
443 03:21:58.173167 RxClkDly_Margin_A0==98 ps 10
444 03:21:58.173554 TxDqDly_Margin_A0==98 ps 10
445 03:21:58.178415 RxClkDly_Margin_A1==88 ps 9
446 03:21:58.178852 TxDqDly_Margin_A1==88 ps 9
447 03:21:58.184016 TrainedVREFDQ_A0==77
448 03:21:58.184445 TrainedVREFDQ_A1==77
449 03:21:58.184835 VrefDac_Margin_A0==22
450 03:21:58.189605 DeviceVref_Margin_A0==37
451 03:21:58.190032 VrefDac_Margin_A1==24
452 03:21:58.195187 DeviceVref_Margin_A1==37
453 03:21:58.195617
454 03:21:58.196049 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:21:58.196448
456 03:21:58.228663 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000018 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
457 03:21:58.229159 2D training succeed
458 03:21:58.234258 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:21:58.239955 auto size-- 65535DDR cs0 size: 2048MB
460 03:21:58.240418 DDR cs1 size: 2048MB
461 03:21:58.245498 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:21:58.245928 cs0 DataBus test pass
463 03:21:58.251089 cs1 DataBus test pass
464 03:21:58.251517 cs0 AddrBus test pass
465 03:21:58.251907 cs1 AddrBus test pass
466 03:21:58.252328
467 03:21:58.256674 100bdlr_step_size ps== 420
468 03:21:58.257112 result report
469 03:21:58.262234 boot times 0Enable ddr reg access
470 03:21:58.267587 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:21:58.281060 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 03:21:58.853110 0.0;M3 CHK:0;cm4_sp_mode 0
473 03:21:58.853662 MVN_1=0x00000000
474 03:21:58.858612 MVN_2=0x00000000
475 03:21:58.864371 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 03:21:58.864825 OPS=0x10
477 03:21:58.865234 ring efuse init
478 03:21:58.865635 chipver efuse init
479 03:21:58.869982 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 03:21:58.875548 [0.018961 Inits done]
481 03:21:58.876032 secure task start!
482 03:21:58.876445 high task start!
483 03:21:58.880182 low task start!
484 03:21:58.880631 run into bl31
485 03:21:58.886798 NOTICE: BL31: v1.3(release):4fc40b1
486 03:21:58.894601 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 03:21:58.895056 NOTICE: BL31: G12A normal boot!
488 03:21:58.920014 NOTICE: BL31: BL33 decompress pass
489 03:21:58.925672 ERROR: Error initializing runtime service opteed_fast
490 03:22:00.158528
491 03:22:00.159082
492 03:22:00.166072 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 03:22:00.166541
494 03:22:00.166958 Model: Libre Computer AML-A311D-CC Alta
495 03:22:00.375372 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 03:22:00.398773 DRAM: 2 GiB (effective 3.8 GiB)
497 03:22:00.541761 Core: 408 devices, 31 uclasses, devicetree: separate
498 03:22:00.547631 WDT: Not starting watchdog@f0d0
499 03:22:00.579903 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 03:22:00.592286 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 03:22:00.597335 ** Bad device specification mmc 0 **
502 03:22:00.607640 Card did not respond to voltage select! : -110
503 03:22:00.615284 ** Bad device specification mmc 0 **
504 03:22:00.615740 Couldn't find partition mmc 0
505 03:22:00.623605 Card did not respond to voltage select! : -110
506 03:22:00.629203 ** Bad device specification mmc 0 **
507 03:22:00.629663 Couldn't find partition mmc 0
508 03:22:00.634200 Error: could not access storage.
509 03:22:01.888395 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 03:22:01.889004 bl2_stage_init 0x01
511 03:22:01.889429 bl2_stage_init 0x81
512 03:22:01.894043 hw id: 0x0000 - pwm id 0x01
513 03:22:01.894503 bl2_stage_init 0xc1
514 03:22:01.894914 bl2_stage_init 0x02
515 03:22:01.895314
516 03:22:01.899594 L0:00000000
517 03:22:01.900067 L1:20000703
518 03:22:01.900475 L2:00008067
519 03:22:01.900874 L3:14000000
520 03:22:01.905222 B2:00402000
521 03:22:01.905675 B1:e0f83180
522 03:22:01.906079
523 03:22:01.906478 TE: 58124
524 03:22:01.906874
525 03:22:01.910792 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 03:22:01.911247
527 03:22:01.911657 Board ID = 1
528 03:22:01.916407 Set A53 clk to 24M
529 03:22:01.916855 Set A73 clk to 24M
530 03:22:01.917258 Set clk81 to 24M
531 03:22:01.921987 A53 clk: 1200 MHz
532 03:22:01.922432 A73 clk: 1200 MHz
533 03:22:01.922835 CLK81: 166.6M
534 03:22:01.923229 smccc: 00012a92
535 03:22:01.927592 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 03:22:01.933202 board id: 1
537 03:22:01.939057 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 03:22:01.949722 fw parse done
539 03:22:01.955678 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 03:22:01.998283 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 03:22:02.009236 PIEI prepare done
542 03:22:02.009695 fastboot data load
543 03:22:02.010106 fastboot data verify
544 03:22:02.014831 verify result: 266
545 03:22:02.020470 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 03:22:02.020951 LPDDR4 probe
547 03:22:02.021358 ddr clk to 1584MHz
548 03:22:02.028436 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 03:22:02.065695
550 03:22:02.066215 dmc_version 0001
551 03:22:02.072342 Check phy result
552 03:22:02.078214 INFO : End of CA training
553 03:22:02.078666 INFO : End of initialization
554 03:22:02.083789 INFO : Training has run successfully!
555 03:22:02.084287 Check phy result
556 03:22:02.089438 INFO : End of initialization
557 03:22:02.089887 INFO : End of read enable training
558 03:22:02.095012 INFO : End of fine write leveling
559 03:22:02.100630 INFO : End of Write leveling coarse delay
560 03:22:02.101083 INFO : Training has run successfully!
561 03:22:02.101487 Check phy result
562 03:22:02.106198 INFO : End of initialization
563 03:22:02.106648 INFO : End of read dq deskew training
564 03:22:02.111799 INFO : End of MPR read delay center optimization
565 03:22:02.117416 INFO : End of write delay center optimization
566 03:22:02.122999 INFO : End of read delay center optimization
567 03:22:02.123446 INFO : End of max read latency training
568 03:22:02.128569 INFO : Training has run successfully!
569 03:22:02.129021 1D training succeed
570 03:22:02.137750 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 03:22:02.185375 Check phy result
572 03:22:02.185837 INFO : End of initialization
573 03:22:02.207146 INFO : End of 2D read delay Voltage center optimization
574 03:22:02.227399 INFO : End of 2D read delay Voltage center optimization
575 03:22:02.279424 INFO : End of 2D write delay Voltage center optimization
576 03:22:02.328804 INFO : End of 2D write delay Voltage center optimization
577 03:22:02.334379 INFO : Training has run successfully!
578 03:22:02.334833
579 03:22:02.335245 channel==0
580 03:22:02.340015 RxClkDly_Margin_A0==88 ps 9
581 03:22:02.340481 TxDqDly_Margin_A0==98 ps 10
582 03:22:02.345597 RxClkDly_Margin_A1==88 ps 9
583 03:22:02.346066 TxDqDly_Margin_A1==98 ps 10
584 03:22:02.346477 TrainedVREFDQ_A0==74
585 03:22:02.351163 TrainedVREFDQ_A1==75
586 03:22:02.351618 VrefDac_Margin_A0==25
587 03:22:02.352049 DeviceVref_Margin_A0==40
588 03:22:02.356762 VrefDac_Margin_A1==25
589 03:22:02.357211 DeviceVref_Margin_A1==39
590 03:22:02.357615
591 03:22:02.358017
592 03:22:02.362356 channel==1
593 03:22:02.362807 RxClkDly_Margin_A0==98 ps 10
594 03:22:02.363205 TxDqDly_Margin_A0==98 ps 10
595 03:22:02.367956 RxClkDly_Margin_A1==88 ps 9
596 03:22:02.368432 TxDqDly_Margin_A1==88 ps 9
597 03:22:02.373627 TrainedVREFDQ_A0==76
598 03:22:02.374125 TrainedVREFDQ_A1==77
599 03:22:02.374533 VrefDac_Margin_A0==22
600 03:22:02.379194 DeviceVref_Margin_A0==38
601 03:22:02.379655 VrefDac_Margin_A1==24
602 03:22:02.384803 DeviceVref_Margin_A1==37
603 03:22:02.385302
604 03:22:02.385709 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 03:22:02.386111
606 03:22:02.418353 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000017 00000015 00000017 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 03:22:02.418911 2D training succeed
608 03:22:02.424070 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 03:22:02.429573 auto size-- 65535DDR cs0 size: 2048MB
610 03:22:02.430025 DDR cs1 size: 2048MB
611 03:22:02.435174 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 03:22:02.435624 cs0 DataBus test pass
613 03:22:02.440788 cs1 DataBus test pass
614 03:22:02.441245 cs0 AddrBus test pass
615 03:22:02.441655 cs1 AddrBus test pass
616 03:22:02.442049
617 03:22:02.446368 100bdlr_step_size ps== 420
618 03:22:02.446831 result report
619 03:22:02.451975 boot times 0Enable ddr reg access
620 03:22:02.457328 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 03:22:02.470760 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 03:22:03.044376 0.0;M3 CHK:0;cm4_sp_mode 0
623 03:22:03.044976 MVN_1=0x00000000
624 03:22:03.049987 MVN_2=0x00000000
625 03:22:03.055818 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 03:22:03.056378 OPS=0x10
627 03:22:03.056838 ring efuse init
628 03:22:03.057294 chipver efuse init
629 03:22:03.061279 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 03:22:03.066854 [0.018961 Inits done]
631 03:22:03.067303 secure task start!
632 03:22:03.067702 high task start!
633 03:22:03.071431 low task start!
634 03:22:03.071870 run into bl31
635 03:22:03.078042 NOTICE: BL31: v1.3(release):4fc40b1
636 03:22:03.085846 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 03:22:03.086293 NOTICE: BL31: G12A normal boot!
638 03:22:03.111218 NOTICE: BL31: BL33 decompress pass
639 03:22:03.116879 ERROR: Error initializing runtime service opteed_fast
640 03:22:04.350176
641 03:22:04.350777
642 03:22:04.357682 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 03:22:04.358184
644 03:22:04.358605 Model: Libre Computer AML-A311D-CC Alta
645 03:22:04.566763 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 03:22:04.590073 DRAM: 2 GiB (effective 3.8 GiB)
647 03:22:04.733037 Core: 408 devices, 31 uclasses, devicetree: separate
648 03:22:04.738921 WDT: Not starting watchdog@f0d0
649 03:22:04.771129 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 03:22:04.783583 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 03:22:04.788632 ** Bad device specification mmc 0 **
652 03:22:04.798943 Card did not respond to voltage select! : -110
653 03:22:04.806584 ** Bad device specification mmc 0 **
654 03:22:04.807068 Couldn't find partition mmc 0
655 03:22:04.814934 Card did not respond to voltage select! : -110
656 03:22:04.820465 ** Bad device specification mmc 0 **
657 03:22:04.820935 Couldn't find partition mmc 0
658 03:22:04.825512 Error: could not access storage.
659 03:22:05.168058 Net: eth0: ethernet@ff3f0000
660 03:22:05.168600 starting USB...
661 03:22:05.419726 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 03:22:05.420338 Starting the controller
663 03:22:05.426808 USB XHCI 1.10
664 03:22:07.118503 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 03:22:07.119096 bl2_stage_init 0x01
666 03:22:07.119532 bl2_stage_init 0x81
667 03:22:07.124125 hw id: 0x0000 - pwm id 0x01
668 03:22:07.124602 bl2_stage_init 0xc1
669 03:22:07.125019 bl2_stage_init 0x02
670 03:22:07.125426
671 03:22:07.129635 L0:00000000
672 03:22:07.130102 L1:20000703
673 03:22:07.130513 L2:00008067
674 03:22:07.130911 L3:14000000
675 03:22:07.135238 B2:00402000
676 03:22:07.135702 B1:e0f83180
677 03:22:07.136161
678 03:22:07.136574 TE: 58167
679 03:22:07.136978
680 03:22:07.140854 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 03:22:07.141322
682 03:22:07.141735 Board ID = 1
683 03:22:07.146426 Set A53 clk to 24M
684 03:22:07.146890 Set A73 clk to 24M
685 03:22:07.147299 Set clk81 to 24M
686 03:22:07.152159 A53 clk: 1200 MHz
687 03:22:07.152621 A73 clk: 1200 MHz
688 03:22:07.153030 CLK81: 166.6M
689 03:22:07.153432 smccc: 00012abe
690 03:22:07.157658 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 03:22:07.163258 board id: 1
692 03:22:07.169204 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 03:22:07.179782 fw parse done
694 03:22:07.185755 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 03:22:07.228357 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 03:22:07.239269 PIEI prepare done
697 03:22:07.239724 fastboot data load
698 03:22:07.240187 fastboot data verify
699 03:22:07.244910 verify result: 266
700 03:22:07.250495 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 03:22:07.250954 LPDDR4 probe
702 03:22:07.251362 ddr clk to 1584MHz
703 03:22:07.258482 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 03:22:07.295695
705 03:22:07.296184 dmc_version 0001
706 03:22:07.302406 Check phy result
707 03:22:07.308285 INFO : End of CA training
708 03:22:07.308742 INFO : End of initialization
709 03:22:07.313890 INFO : Training has run successfully!
710 03:22:07.314349 Check phy result
711 03:22:07.319489 INFO : End of initialization
712 03:22:07.319947 INFO : End of read enable training
713 03:22:07.325077 INFO : End of fine write leveling
714 03:22:07.330690 INFO : End of Write leveling coarse delay
715 03:22:07.331145 INFO : Training has run successfully!
716 03:22:07.331549 Check phy result
717 03:22:07.336308 INFO : End of initialization
718 03:22:07.336767 INFO : End of read dq deskew training
719 03:22:07.341871 INFO : End of MPR read delay center optimization
720 03:22:07.347474 INFO : End of write delay center optimization
721 03:22:07.353051 INFO : End of read delay center optimization
722 03:22:07.353504 INFO : End of max read latency training
723 03:22:07.358727 INFO : Training has run successfully!
724 03:22:07.359187 1D training succeed
725 03:22:07.368739 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 03:22:07.415538 Check phy result
727 03:22:07.416106 INFO : End of initialization
728 03:22:07.437316 INFO : End of 2D read delay Voltage center optimization
729 03:22:07.456485 INFO : End of 2D read delay Voltage center optimization
730 03:22:07.509420 INFO : End of 2D write delay Voltage center optimization
731 03:22:07.558808 INFO : End of 2D write delay Voltage center optimization
732 03:22:07.564442 INFO : Training has run successfully!
733 03:22:07.564942
734 03:22:07.565358 channel==0
735 03:22:07.570021 RxClkDly_Margin_A0==88 ps 9
736 03:22:07.570506 TxDqDly_Margin_A0==98 ps 10
737 03:22:07.575605 RxClkDly_Margin_A1==88 ps 9
738 03:22:07.576113 TxDqDly_Margin_A1==98 ps 10
739 03:22:07.576535 TrainedVREFDQ_A0==74
740 03:22:07.581198 TrainedVREFDQ_A1==74
741 03:22:07.581661 VrefDac_Margin_A0==25
742 03:22:07.582077 DeviceVref_Margin_A0==40
743 03:22:07.586802 VrefDac_Margin_A1==25
744 03:22:07.587262 DeviceVref_Margin_A1==40
745 03:22:07.587669
746 03:22:07.588108
747 03:22:07.592393 channel==1
748 03:22:07.592850 RxClkDly_Margin_A0==98 ps 10
749 03:22:07.593257 TxDqDly_Margin_A0==88 ps 9
750 03:22:07.597990 RxClkDly_Margin_A1==98 ps 10
751 03:22:07.598449 TxDqDly_Margin_A1==88 ps 9
752 03:22:07.603585 TrainedVREFDQ_A0==76
753 03:22:07.604070 TrainedVREFDQ_A1==77
754 03:22:07.604484 VrefDac_Margin_A0==22
755 03:22:07.609563 DeviceVref_Margin_A0==38
756 03:22:07.610026 VrefDac_Margin_A1==24
757 03:22:07.614778 DeviceVref_Margin_A1==37
758 03:22:07.615237
759 03:22:07.615646 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 03:22:07.616082
761 03:22:07.648300 soc_vref_reg_value 0x 00000019 00000019 00000017 00000019 00000018 00000019 00000019 00000017 00000018 00000016 00000017 00000015 00000018 00000019 00000017 00000019 00000018 00000019 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 00000019 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
762 03:22:07.648786 2D training succeed
763 03:22:07.653994 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 03:22:07.659603 auto size-- 65535DDR cs0 size: 2048MB
765 03:22:07.660087 DDR cs1 size: 2048MB
766 03:22:07.665211 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 03:22:07.665670 cs0 DataBus test pass
768 03:22:07.670778 cs1 DataBus test pass
769 03:22:07.671231 cs0 AddrBus test pass
770 03:22:07.671634 cs1 AddrBus test pass
771 03:22:07.672074
772 03:22:07.676380 100bdlr_step_size ps== 420
773 03:22:07.676848 result report
774 03:22:07.681979 boot times 0Enable ddr reg access
775 03:22:07.687344 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 03:22:07.700778 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 03:22:08.274494 0.0;M3 CHK:0;cm4_sp_mode 0
778 03:22:08.275069 MVN_1=0x00000000
779 03:22:08.280100 MVN_2=0x00000000
780 03:22:08.285781 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 03:22:08.286277 OPS=0x10
782 03:22:08.286677 ring efuse init
783 03:22:08.287062 chipver efuse init
784 03:22:08.291357 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 03:22:08.296949 [0.018961 Inits done]
786 03:22:08.297399 secure task start!
787 03:22:08.297788 high task start!
788 03:22:08.301531 low task start!
789 03:22:08.301981 run into bl31
790 03:22:08.308279 NOTICE: BL31: v1.3(release):4fc40b1
791 03:22:08.316021 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 03:22:08.316477 NOTICE: BL31: G12A normal boot!
793 03:22:08.341383 NOTICE: BL31: BL33 decompress pass
794 03:22:08.347066 ERROR: Error initializing runtime service opteed_fast
795 03:22:09.580043
796 03:22:09.580651
797 03:22:09.588504 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 03:22:09.588972
799 03:22:09.589386 Model: Libre Computer AML-A311D-CC Alta
800 03:22:09.796897 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 03:22:09.820314 DRAM: 2 GiB (effective 3.8 GiB)
802 03:22:09.963210 Core: 408 devices, 31 uclasses, devicetree: separate
803 03:22:09.969153 WDT: Not starting watchdog@f0d0
804 03:22:10.001286 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 03:22:10.013708 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 03:22:10.018803 ** Bad device specification mmc 0 **
807 03:22:10.029173 Card did not respond to voltage select! : -110
808 03:22:10.036764 ** Bad device specification mmc 0 **
809 03:22:10.037239 Couldn't find partition mmc 0
810 03:22:10.045107 Card did not respond to voltage select! : -110
811 03:22:10.050582 ** Bad device specification mmc 0 **
812 03:22:10.051039 Couldn't find partition mmc 0
813 03:22:10.055659 Error: could not access storage.
814 03:22:10.398171 Net: eth0: ethernet@ff3f0000
815 03:22:10.398692 starting USB...
816 03:22:10.650049 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 03:22:10.650602 Starting the controller
818 03:22:10.657037 USB XHCI 1.10
819 03:22:12.820234 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.�!,K��х��}���с0x01
820 03:22:12.820885 bl2_stage_init 0x81
821 03:22:12.825876 hw id: 0x0000 - pwm id 0x01
822 03:22:12.826345 bl2_stage_init 0xc1
823 03:22:12.826754 bl2_stage_init 0x02
824 03:22:12.827156
825 03:22:12.831468 L0:00000000
826 03:22:12.831927 L1:20000703
827 03:22:12.832384 L2:00008067
828 03:22:12.832784 L3:14000000
829 03:22:12.833180 B2:00402000
830 03:22:12.837144 B1:e0f83180
831 03:22:12.837602
832 03:22:12.838015 TE: 58150
833 03:22:12.838415
834 03:22:12.842567 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
835 03:22:12.843027
836 03:22:12.843435 Board ID = 1
837 03:22:12.848252 Set A53 clk to 24M
838 03:22:12.848709 Set A73 clk to 24M
839 03:22:12.849110 Set clk81 to 24M
840 03:22:12.853800 A53 clk: 1200 MHz
841 03:22:12.854259 A73 clk: 1200 MHz
842 03:22:12.854666 CLK81: 166.6M
843 03:22:12.855067 smccc: 00012aab
844 03:22:12.859447 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
845 03:22:12.865132 board id: 1
846 03:22:12.870542 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
847 03:22:12.881367 fw parse done
848 03:22:12.887344 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
849 03:22:12.929991 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
850 03:22:12.940859 PIEI prepare done
851 03:22:12.941321 fastboot data load
852 03:22:12.941733 fastboot data verify
853 03:22:12.946458 verify result: 266
854 03:22:12.952098 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
855 03:22:12.952557 LPDDR4 probe
856 03:22:12.952963 ddr clk to 1584MHz
857 03:22:12.960077 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
858 03:22:12.997364
859 03:22:12.997840 dmc_version 0001
860 03:22:13.004075 Check phy result
861 03:22:13.009896 INFO : End of CA training
862 03:22:13.010354 INFO : End of initialization
863 03:22:13.015495 INFO : Training has run successfully!
864 03:22:13.015959 Check phy result
865 03:22:13.021122 INFO : End of initialization
866 03:22:13.021601 INFO : End of read enable training
867 03:22:13.026760 INFO : End of fine write leveling
868 03:22:13.032287 INFO : End of Write leveling coarse delay
869 03:22:13.032760 INFO : Training has run successfully!
870 03:22:13.033168 Check phy result
871 03:22:13.037904 INFO : End of initialization
872 03:22:13.038360 INFO : End of read dq deskew training
873 03:22:13.043528 INFO : End of MPR read delay center optimization
874 03:22:13.049131 INFO : End of write delay center optimization
875 03:22:13.054711 INFO : End of read delay center optimization
876 03:22:13.055196 INFO : End of max read latency training
877 03:22:13.060298 INFO : Training has run successfully!
878 03:22:13.060759 1D training succeed
879 03:22:13.069538 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
880 03:22:13.116999 Check phy result
881 03:22:13.117479 INFO : End of initialization
882 03:22:13.138775 INFO : End of 2D read delay Voltage center optimization
883 03:22:13.158199 INFO : End of 2D read delay Voltage center optimization
884 03:22:13.211098 INFO : End of 2D write delay Voltage center optimization
885 03:22:13.260452 INFO : End of 2D write delay Voltage center optimization
886 03:22:13.266054 INFO : Training has run successfully!
887 03:22:13.266510
888 03:22:13.266920 channel==0
889 03:22:13.271640 RxClkDly_Margin_A0==88 ps 9
890 03:22:13.272137 TxDqDly_Margin_A0==98 ps 10
891 03:22:13.275028 RxClkDly_Margin_A1==88 ps 9
892 03:22:13.275484 TxDqDly_Margin_A1==98 ps 10
893 03:22:13.280587 TrainedVREFDQ_A0==74
894 03:22:13.281083 TrainedVREFDQ_A1==74
895 03:22:13.281494 VrefDac_Margin_A0==25
896 03:22:13.286157 DeviceVref_Margin_A0==40
897 03:22:13.286617 VrefDac_Margin_A1==25
898 03:22:13.291754 DeviceVref_Margin_A1==40
899 03:22:13.292251
900 03:22:13.292644
901 03:22:13.293029 channel==1
902 03:22:13.293407 RxClkDly_Margin_A0==98 ps 10
903 03:22:13.297352 TxDqDly_Margin_A0==98 ps 10
904 03:22:13.297801 RxClkDly_Margin_A1==88 ps 9
905 03:22:13.303000 TxDqDly_Margin_A1==88 ps 9
906 03:22:13.303454 TrainedVREFDQ_A0==77
907 03:22:13.303843 TrainedVREFDQ_A1==77
908 03:22:13.308546 VrefDac_Margin_A0==22
909 03:22:13.308993 DeviceVref_Margin_A0==37
910 03:22:13.314142 VrefDac_Margin_A1==24
911 03:22:13.314586 DeviceVref_Margin_A1==37
912 03:22:13.314970
913 03:22:13.319746 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
914 03:22:13.320222
915 03:22:13.347708 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000018 00000018 00000016 00000017 00000015 00000018 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000017 00000018 00000017 dram_vref_reg_value 0x 00000060
916 03:22:13.353344 2D training succeed
917 03:22:13.358991 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
918 03:22:13.359443 auto size-- 65535DDR cs0 size: 2048MB
919 03:22:13.364529 DDR cs1 size: 2048MB
920 03:22:13.364972 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
921 03:22:13.370144 cs0 DataBus test pass
922 03:22:13.370597 cs1 DataBus test pass
923 03:22:13.370980 cs0 AddrBus test pass
924 03:22:13.375774 cs1 AddrBus test pass
925 03:22:13.376258
926 03:22:13.376650 100bdlr_step_size ps== 420
927 03:22:13.377046 result report
928 03:22:13.381363 boot times 0Enable ddr reg access
929 03:22:13.388977 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
930 03:22:13.402424 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
931 03:22:13.976250 0.0;M3 CHK:0;cm4_sp_mode 0
932 03:22:13.976875 MVN_1=0x00000000
933 03:22:13.981682 MVN_2=0x00000000
934 03:22:13.987433 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
935 03:22:13.987960 OPS=0x10
936 03:22:13.988431 ring efuse init
937 03:22:13.988837 chipver efuse init
938 03:22:13.995655 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
939 03:22:13.996305 [0.018960 Inits done]
940 03:22:14.003143 secure task start!
941 03:22:14.003679 high task start!
942 03:22:14.004134 low task start!
943 03:22:14.004545 run into bl31
944 03:22:14.009771 NOTICE: BL31: v1.3(release):4fc40b1
945 03:22:14.017585 NOTICE: BL31: Built : 15:58:17, May 22 2019
946 03:22:14.018157 NOTICE: BL31: G12A normal boot!
947 03:22:14.042928 NOTICE: BL31: BL33 decompress pass
948 03:22:14.048550 ERROR: Error initializing runtime service opteed_fast
949 03:22:15.281532
950 03:22:15.282108
951 03:22:15.289756 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
952 03:22:15.290153
953 03:22:15.290508 Model: Libre Computer AML-A311D-CC Alta
954 03:22:15.498245 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
955 03:22:15.521736 DRAM: 2 GiB (effective 3.8 GiB)
956 03:22:15.664616 Core: 408 devices, 31 uclasses, devicetree: separate
957 03:22:15.670366 WDT: Not starting watchdog@f0d0
958 03:22:15.702642 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
959 03:22:15.715115 Loading Environment from FAT... Card did not respond to voltage select! : -110
960 03:22:15.719595 ** Bad device specification mmc 0 **
961 03:22:15.730427 Card did not respond to voltage select! : -110
962 03:22:15.738057 ** Bad device specification mmc 0 **
963 03:22:15.738348 Couldn't find partition mmc 0
964 03:22:15.746402 Card did not respond to voltage select! : -110
965 03:22:15.751900 ** Bad device specification mmc 0 **
966 03:22:15.752486 Couldn't find partition mmc 0
967 03:22:15.756997 Error: could not access storage.
968 03:22:16.099481 Net: eth0: ethernet@ff3f0000
969 03:22:16.100053 starting USB...
970 03:22:16.351297 Bus usb@ff500000: Register 3000140 NbrPorts 3
971 03:22:16.351835 Starting the controller
972 03:22:16.358190 USB XHCI 1.10
973 03:22:17.912451 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
974 03:22:17.919803 scanning usb for storage devices... 0 Storage Device(s) found
976 03:22:17.971509 Hit any key to stop autoboot: 1
977 03:22:17.972344 end: 2.4.2 bootloader-interrupt (duration 00:00:31) [common]
978 03:22:17.972979 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
979 03:22:17.973495 Setting prompt string to ['=>']
980 03:22:17.974030 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
981 03:22:17.977227 0
982 03:22:17.978117 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
983 03:22:17.978659 Sending with 10 millisecond of delay
985 03:22:19.113494 => setenv autoload no
986 03:22:19.124314 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
987 03:22:19.129704 setenv autoload no
988 03:22:19.130473 Sending with 10 millisecond of delay
990 03:22:20.927586 => setenv initrd_high 0xffffffff
991 03:22:20.938468 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
992 03:22:20.939346 setenv initrd_high 0xffffffff
993 03:22:20.940102 Sending with 10 millisecond of delay
995 03:22:22.556329 => setenv fdt_high 0xffffffff
996 03:22:22.566938 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
997 03:22:22.567515 setenv fdt_high 0xffffffff
998 03:22:22.567969 Sending with 10 millisecond of delay
1000 03:22:22.859401 => dhcp
1001 03:22:22.870064 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:24)
1002 03:22:22.870877 dhcp
1003 03:22:22.871345 Speed: 1000, full duplex
1004 03:22:22.871792 BOOTP broadcast 1
1005 03:22:22.878074 DHCP client bound to address 192.168.6.27 (8 ms)
1006 03:22:22.878804 Sending with 10 millisecond of delay
1008 03:22:24.555270 => setenv serverip 192.168.6.2
1009 03:22:24.565917 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:22)
1010 03:22:24.566609 setenv serverip 192.168.6.2
1011 03:22:24.567141 Sending with 10 millisecond of delay
1013 03:22:28.290178 => tftpboot 0x01080000 950283/tftp-deploy-k9v_5w1n/kernel/uImage
1014 03:22:28.301026 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1015 03:22:28.301884 tftpboot 0x01080000 950283/tftp-deploy-k9v_5w1n/kernel/uImage
1016 03:22:28.302369 Speed: 1000, full duplex
1017 03:22:28.302826 Using ethernet@ff3f0000 device
1018 03:22:28.303679 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1019 03:22:28.309216 Filename '950283/tftp-deploy-k9v_5w1n/kernel/uImage'.
1020 03:22:28.313132 Load address: 0x1080000
1021 03:22:30.616974 Loading: *################################################## 36.1 MiB
1022 03:22:30.617596 15.7 MiB/s
1023 03:22:30.618002 done
1024 03:22:30.621356 Bytes transferred = 37878336 (241fa40 hex)
1025 03:22:30.622101 Sending with 10 millisecond of delay
1027 03:22:35.308483 => tftpboot 0x08000000 950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
1028 03:22:35.319255 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1029 03:22:35.320112 tftpboot 0x08000000 950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot
1030 03:22:35.320555 Speed: 1000, full duplex
1031 03:22:35.320973 Using ethernet@ff3f0000 device
1032 03:22:35.321858 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1033 03:22:35.333600 Filename '950283/tftp-deploy-k9v_5w1n/ramdisk/ramdisk.cpio.gz.uboot'.
1034 03:22:35.334098 Load address: 0x8000000
1035 03:22:41.366943 Loading: *########T ################ UDP wrong checksum 000000ff 0000018c
1036 03:22:41.373745 UDP wrong checksum 000000ff 00008f7e
1037 03:22:42.625613 ######################### UDP wrong checksum 00000005 00009938
1038 03:22:47.627535 T UDP wrong checksum 00000005 00009938
1039 03:22:57.629449 T T UDP wrong checksum 00000005 00009938
1040 03:23:17.632602 T T T T UDP wrong checksum 00000005 00009938
1041 03:23:27.165941 T UDP wrong checksum 000000ff 00004f24
1042 03:23:27.211699 UDP wrong checksum 000000ff 0000da16
1043 03:23:32.637614 T
1044 03:23:32.638243 Retry count exceeded; starting again
1046 03:23:32.639649 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1049 03:23:32.641494 end: 2.4 uboot-commands (duration 00:01:46) [common]
1051 03:23:32.642844 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1053 03:23:32.643880 end: 2 uboot-action (duration 00:01:46) [common]
1055 03:23:32.645435 Cleaning after the job
1056 03:23:32.645999 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/ramdisk
1057 03:23:32.647162 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/kernel
1058 03:23:32.670194 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/dtb
1059 03:23:32.671382 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/nfsrootfs
1060 03:23:32.765572 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950283/tftp-deploy-k9v_5w1n/modules
1061 03:23:32.787619 start: 4.1 power-off (timeout 00:00:30) [common]
1062 03:23:32.788403 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1063 03:23:32.824471 >> OK - accepted request
1064 03:23:32.826681 Returned 0 in 0 seconds
1065 03:23:32.927359 end: 4.1 power-off (duration 00:00:00) [common]
1067 03:23:32.928245 start: 4.2 read-feedback (timeout 00:10:00) [common]
1068 03:23:32.928894 Listened to connection for namespace 'common' for up to 1s
1069 03:23:33.928993 Finalising connection for namespace 'common'
1070 03:23:33.929643 Disconnecting from shell: Finalise
1071 03:23:33.930150 =>
1072 03:23:34.031165 end: 4.2 read-feedback (duration 00:00:01) [common]
1073 03:23:34.031812 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950283
1074 03:23:37.002561 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950283
1075 03:23:37.003167 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.