Boot log: meson-g12b-a311d-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 03:48:48.735852 lava-dispatcher, installed at version: 2024.01
2 03:48:48.736695 start: 0 validate
3 03:48:48.737193 Start time: 2024-11-07 03:48:48.737162+00:00 (UTC)
4 03:48:48.737755 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 03:48:48.738308 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 03:48:48.776968 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 03:48:48.777512 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-16%2Fkernel%2FImage exists
8 03:48:48.806620 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 03:48:48.807252 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-16%2Fdtbs%2Famlogic%2Fmeson-g12b-a311d-libretech-cc.dtb exists
10 03:48:48.838284 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 03:48:48.838791 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm-kselftest%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 03:48:48.868060 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 03:48:48.868560 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fclang-16%2Fmodules.tar.xz exists
14 03:48:48.908434 validate duration: 0.17
16 03:48:48.909276 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 03:48:48.909601 start: 1.1 download-retry (timeout 00:10:00) [common]
18 03:48:48.909917 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 03:48:48.910501 Not decompressing ramdisk as can be used compressed.
20 03:48:48.910945 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/initrd.cpio.gz
21 03:48:48.911226 saving as /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/ramdisk/initrd.cpio.gz
22 03:48:48.911505 total size: 5628169 (5 MB)
23 03:48:48.946494 progress 0 % (0 MB)
24 03:48:48.950763 progress 5 % (0 MB)
25 03:48:48.955224 progress 10 % (0 MB)
26 03:48:48.959085 progress 15 % (0 MB)
27 03:48:48.963417 progress 20 % (1 MB)
28 03:48:48.967330 progress 25 % (1 MB)
29 03:48:48.971558 progress 30 % (1 MB)
30 03:48:48.975734 progress 35 % (1 MB)
31 03:48:48.979601 progress 40 % (2 MB)
32 03:48:48.983764 progress 45 % (2 MB)
33 03:48:48.987488 progress 50 % (2 MB)
34 03:48:48.991627 progress 55 % (2 MB)
35 03:48:48.995799 progress 60 % (3 MB)
36 03:48:48.999572 progress 65 % (3 MB)
37 03:48:49.003653 progress 70 % (3 MB)
38 03:48:49.007581 progress 75 % (4 MB)
39 03:48:49.011754 progress 80 % (4 MB)
40 03:48:49.015497 progress 85 % (4 MB)
41 03:48:49.019650 progress 90 % (4 MB)
42 03:48:49.023700 progress 95 % (5 MB)
43 03:48:49.027111 progress 100 % (5 MB)
44 03:48:49.027800 5 MB downloaded in 0.12 s (46.16 MB/s)
45 03:48:49.028384 end: 1.1.1 http-download (duration 00:00:00) [common]
47 03:48:49.029340 end: 1.1 download-retry (duration 00:00:00) [common]
48 03:48:49.029653 start: 1.2 download-retry (timeout 00:10:00) [common]
49 03:48:49.029942 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 03:48:49.030422 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-16/kernel/Image
51 03:48:49.030677 saving as /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/kernel/Image
52 03:48:49.030898 total size: 37880320 (36 MB)
53 03:48:49.031116 No compression specified
54 03:48:49.073067 progress 0 % (0 MB)
55 03:48:49.096844 progress 5 % (1 MB)
56 03:48:49.120844 progress 10 % (3 MB)
57 03:48:49.144453 progress 15 % (5 MB)
58 03:48:49.168603 progress 20 % (7 MB)
59 03:48:49.191916 progress 25 % (9 MB)
60 03:48:49.215218 progress 30 % (10 MB)
61 03:48:49.238385 progress 35 % (12 MB)
62 03:48:49.261455 progress 40 % (14 MB)
63 03:48:49.284454 progress 45 % (16 MB)
64 03:48:49.307567 progress 50 % (18 MB)
65 03:48:49.330752 progress 55 % (19 MB)
66 03:48:49.354010 progress 60 % (21 MB)
67 03:48:49.377122 progress 65 % (23 MB)
68 03:48:49.400265 progress 70 % (25 MB)
69 03:48:49.424188 progress 75 % (27 MB)
70 03:48:49.446901 progress 80 % (28 MB)
71 03:48:49.470004 progress 85 % (30 MB)
72 03:48:49.493070 progress 90 % (32 MB)
73 03:48:49.516549 progress 95 % (34 MB)
74 03:48:49.539372 progress 100 % (36 MB)
75 03:48:49.539914 36 MB downloaded in 0.51 s (70.97 MB/s)
76 03:48:49.540439 end: 1.2.1 http-download (duration 00:00:01) [common]
78 03:48:49.541298 end: 1.2 download-retry (duration 00:00:01) [common]
79 03:48:49.541595 start: 1.3 download-retry (timeout 00:09:59) [common]
80 03:48:49.541877 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 03:48:49.542357 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-16/dtbs/amlogic/meson-g12b-a311d-libretech-cc.dtb
82 03:48:49.542642 saving as /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/dtb/meson-g12b-a311d-libretech-cc.dtb
83 03:48:49.542858 total size: 54703 (0 MB)
84 03:48:49.543075 No compression specified
85 03:48:49.577830 progress 59 % (0 MB)
86 03:48:49.578697 progress 100 % (0 MB)
87 03:48:49.579249 0 MB downloaded in 0.04 s (1.43 MB/s)
88 03:48:49.579740 end: 1.3.1 http-download (duration 00:00:00) [common]
90 03:48:49.580616 end: 1.3 download-retry (duration 00:00:00) [common]
91 03:48:49.580885 start: 1.4 download-retry (timeout 00:09:59) [common]
92 03:48:49.581151 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 03:48:49.581611 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/arm64/full.rootfs.tar.xz
94 03:48:49.581853 saving as /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/nfsrootfs/full.rootfs.tar
95 03:48:49.582058 total size: 120894716 (115 MB)
96 03:48:49.582268 Using unxz to decompress xz
97 03:48:49.619032 progress 0 % (0 MB)
98 03:48:50.411137 progress 5 % (5 MB)
99 03:48:51.254543 progress 10 % (11 MB)
100 03:48:52.052546 progress 15 % (17 MB)
101 03:48:52.793257 progress 20 % (23 MB)
102 03:48:53.384922 progress 25 % (28 MB)
103 03:48:54.222578 progress 30 % (34 MB)
104 03:48:55.018628 progress 35 % (40 MB)
105 03:48:55.363438 progress 40 % (46 MB)
106 03:48:55.738472 progress 45 % (51 MB)
107 03:48:56.459667 progress 50 % (57 MB)
108 03:48:57.345944 progress 55 % (63 MB)
109 03:48:58.131825 progress 60 % (69 MB)
110 03:48:58.901972 progress 65 % (74 MB)
111 03:48:59.683821 progress 70 % (80 MB)
112 03:49:00.523884 progress 75 % (86 MB)
113 03:49:01.317631 progress 80 % (92 MB)
114 03:49:02.085541 progress 85 % (98 MB)
115 03:49:02.937909 progress 90 % (103 MB)
116 03:49:03.714705 progress 95 % (109 MB)
117 03:49:04.553710 progress 100 % (115 MB)
118 03:49:04.566316 115 MB downloaded in 14.98 s (7.69 MB/s)
119 03:49:04.566948 end: 1.4.1 http-download (duration 00:00:15) [common]
121 03:49:04.567766 end: 1.4 download-retry (duration 00:00:15) [common]
122 03:49:04.568115 start: 1.5 download-retry (timeout 00:09:44) [common]
123 03:49:04.568712 start: 1.5.1 http-download (timeout 00:09:44) [common]
124 03:49:04.569637 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-16/modules.tar.xz
125 03:49:04.570142 saving as /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/modules/modules.tar
126 03:49:04.570597 total size: 11772148 (11 MB)
127 03:49:04.571058 Using unxz to decompress xz
128 03:49:04.608514 progress 0 % (0 MB)
129 03:49:04.676160 progress 5 % (0 MB)
130 03:49:04.751598 progress 10 % (1 MB)
131 03:49:04.847525 progress 15 % (1 MB)
132 03:49:04.944818 progress 20 % (2 MB)
133 03:49:05.026923 progress 25 % (2 MB)
134 03:49:05.104234 progress 30 % (3 MB)
135 03:49:05.184483 progress 35 % (3 MB)
136 03:49:05.264471 progress 40 % (4 MB)
137 03:49:05.340873 progress 45 % (5 MB)
138 03:49:05.426245 progress 50 % (5 MB)
139 03:49:05.510808 progress 55 % (6 MB)
140 03:49:05.596798 progress 60 % (6 MB)
141 03:49:05.678478 progress 65 % (7 MB)
142 03:49:05.760994 progress 70 % (7 MB)
143 03:49:05.845124 progress 75 % (8 MB)
144 03:49:05.929307 progress 80 % (9 MB)
145 03:49:06.010299 progress 85 % (9 MB)
146 03:49:06.094238 progress 90 % (10 MB)
147 03:49:06.173416 progress 95 % (10 MB)
148 03:49:06.250779 progress 100 % (11 MB)
149 03:49:06.261789 11 MB downloaded in 1.69 s (6.64 MB/s)
150 03:49:06.262637 end: 1.5.1 http-download (duration 00:00:02) [common]
152 03:49:06.264263 end: 1.5 download-retry (duration 00:00:02) [common]
153 03:49:06.264787 start: 1.6 prepare-tftp-overlay (timeout 00:09:43) [common]
154 03:49:06.265302 start: 1.6.1 extract-nfsrootfs (timeout 00:09:43) [common]
155 03:49:22.678745 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950574/extract-nfsrootfs-hcqzfinz
156 03:49:22.679462 end: 1.6.1 extract-nfsrootfs (duration 00:00:16) [common]
157 03:49:22.679818 start: 1.6.2 lava-overlay (timeout 00:09:26) [common]
158 03:49:22.680605 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2
159 03:49:22.681135 makedir: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin
160 03:49:22.681541 makedir: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/tests
161 03:49:22.681933 makedir: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/results
162 03:49:22.682333 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-add-keys
163 03:49:22.682999 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-add-sources
164 03:49:22.683664 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-background-process-start
165 03:49:22.684360 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-background-process-stop
166 03:49:22.685025 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-common-functions
167 03:49:22.685621 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-echo-ipv4
168 03:49:22.686211 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-install-packages
169 03:49:22.686786 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-installed-packages
170 03:49:22.687355 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-os-build
171 03:49:22.687958 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-probe-channel
172 03:49:22.688614 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-probe-ip
173 03:49:22.689203 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-target-ip
174 03:49:22.689777 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-target-mac
175 03:49:22.690351 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-target-storage
176 03:49:22.690936 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-case
177 03:49:22.691520 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-event
178 03:49:22.692221 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-feedback
179 03:49:22.692849 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-raise
180 03:49:22.693455 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-reference
181 03:49:22.694038 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-runner
182 03:49:22.694631 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-set
183 03:49:22.695200 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-test-shell
184 03:49:22.695786 Updating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-add-keys (debian)
185 03:49:22.696467 Updating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-add-sources (debian)
186 03:49:22.697076 Updating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-install-packages (debian)
187 03:49:22.697682 Updating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-installed-packages (debian)
188 03:49:22.698277 Updating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/bin/lava-os-build (debian)
189 03:49:22.698803 Creating /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/environment
190 03:49:22.699258 LAVA metadata
191 03:49:22.699577 - LAVA_JOB_ID=950574
192 03:49:22.699844 - LAVA_DISPATCHER_IP=192.168.6.2
193 03:49:22.700325 start: 1.6.2.1 ssh-authorize (timeout 00:09:26) [common]
194 03:49:22.701559 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
195 03:49:22.701969 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:26) [common]
196 03:49:22.702222 skipped lava-vland-overlay
197 03:49:22.702513 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
198 03:49:22.702819 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:26) [common]
199 03:49:22.703089 skipped lava-multinode-overlay
200 03:49:22.703385 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
201 03:49:22.703687 start: 1.6.2.4 test-definition (timeout 00:09:26) [common]
202 03:49:22.704047 Loading test definitions
203 03:49:22.704396 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:26) [common]
204 03:49:22.704670 Using /lava-950574 at stage 0
205 03:49:22.706010 uuid=950574_1.6.2.4.1 testdef=None
206 03:49:22.706389 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
207 03:49:22.706712 start: 1.6.2.4.2 test-overlay (timeout 00:09:26) [common]
208 03:49:22.708614 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
210 03:49:22.709566 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:26) [common]
211 03:49:22.711901 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
213 03:49:22.712933 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:26) [common]
214 03:49:22.715143 runner path: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/0/tests/0_timesync-off test_uuid 950574_1.6.2.4.1
215 03:49:22.715837 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
217 03:49:22.716866 start: 1.6.2.4.5 git-repo-action (timeout 00:09:26) [common]
218 03:49:22.717142 Using /lava-950574 at stage 0
219 03:49:22.717571 Fetching tests from https://github.com/kernelci/test-definitions.git
220 03:49:22.717929 Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/0/tests/1_kselftest-rtc'
221 03:49:26.175429 Running '/usr/bin/git checkout kernelci.org
222 03:49:26.409885 Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/0/tests/1_kselftest-rtc/automated/linux/kselftest/kselftest.yaml
223 03:49:26.412343 uuid=950574_1.6.2.4.5 testdef=None
224 03:49:26.413023 end: 1.6.2.4.5 git-repo-action (duration 00:00:04) [common]
226 03:49:26.414686 start: 1.6.2.4.6 test-overlay (timeout 00:09:22) [common]
227 03:49:26.420810 end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
229 03:49:26.422469 start: 1.6.2.4.7 test-install-overlay (timeout 00:09:22) [common]
230 03:49:26.429575 end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
232 03:49:26.430644 start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:22) [common]
233 03:49:26.436993 runner path: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/0/tests/1_kselftest-rtc test_uuid 950574_1.6.2.4.5
234 03:49:26.437568 BOARD='meson-g12b-a311d-libretech-cc'
235 03:49:26.437979 BRANCH='mainline'
236 03:49:26.438378 SKIPFILE='/dev/null'
237 03:49:26.438776 SKIP_INSTALL='True'
238 03:49:26.439169 TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/clang-16/kselftest.tar.xz'
239 03:49:26.439570 TST_CASENAME=''
240 03:49:26.439965 TST_CMDFILES='rtc'
241 03:49:26.441136 end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
243 03:49:26.442743 Creating lava-test-runner.conf files
244 03:49:26.443167 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950574/lava-overlay-4a8tq4w2/lava-950574/0 for stage 0
245 03:49:26.443878 - 0_timesync-off
246 03:49:26.444475 - 1_kselftest-rtc
247 03:49:26.445195 end: 1.6.2.4 test-definition (duration 00:00:04) [common]
248 03:49:26.445777 start: 1.6.2.5 compress-overlay (timeout 00:09:22) [common]
249 03:49:50.569264 end: 1.6.2.5 compress-overlay (duration 00:00:24) [common]
250 03:49:50.569821 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:58) [common]
251 03:49:50.570187 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
252 03:49:50.570559 end: 1.6.2 lava-overlay (duration 00:00:28) [common]
253 03:49:50.570919 start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:58) [common]
254 03:49:51.201921 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
255 03:49:51.202518 start: 1.6.4 extract-modules (timeout 00:08:58) [common]
256 03:49:51.202853 extracting modules file /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950574/extract-nfsrootfs-hcqzfinz
257 03:49:52.667956 extracting modules file /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk
258 03:49:54.059351 end: 1.6.4 extract-modules (duration 00:00:03) [common]
259 03:49:54.059841 start: 1.6.5 apply-overlay-tftp (timeout 00:08:55) [common]
260 03:49:54.060155 [common] Applying overlay to NFS
261 03:49:54.060375 [common] Applying overlay /var/lib/lava/dispatcher/tmp/950574/compress-overlay-rfb5r0ej/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950574/extract-nfsrootfs-hcqzfinz
262 03:49:56.769572 end: 1.6.5 apply-overlay-tftp (duration 00:00:03) [common]
263 03:49:56.770041 start: 1.6.6 prepare-kernel (timeout 00:08:52) [common]
264 03:49:56.770313 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:52) [common]
265 03:49:56.770539 Converting downloaded kernel to a uImage
266 03:49:56.770847 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/kernel/Image /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/kernel/uImage
267 03:49:57.168611 output: Image Name:
268 03:49:57.169039 output: Created: Thu Nov 7 03:49:56 2024
269 03:49:57.169247 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
270 03:49:57.169454 output: Data Size: 37880320 Bytes = 36992.50 KiB = 36.13 MiB
271 03:49:57.169655 output: Load Address: 01080000
272 03:49:57.169858 output: Entry Point: 01080000
273 03:49:57.170055 output:
274 03:49:57.170391 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
275 03:49:57.170659 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
276 03:49:57.170927 start: 1.6.7 configure-preseed-file (timeout 00:08:52) [common]
277 03:49:57.171179 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
278 03:49:57.171438 start: 1.6.8 compress-ramdisk (timeout 00:08:52) [common]
279 03:49:57.171693 Building ramdisk /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk
280 03:49:59.395578 >> 173443 blocks
281 03:50:07.076060 Adding RAMdisk u-boot header.
282 03:50:07.076785 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk.cpio.gz.uboot
283 03:50:07.343009 output: Image Name:
284 03:50:07.343419 output: Created: Thu Nov 7 03:50:07 2024
285 03:50:07.343630 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
286 03:50:07.343834 output: Data Size: 24150031 Bytes = 23584.01 KiB = 23.03 MiB
287 03:50:07.344119 output: Load Address: 00000000
288 03:50:07.344523 output: Entry Point: 00000000
289 03:50:07.344917 output:
290 03:50:07.345861 rename /var/lib/lava/dispatcher/tmp/950574/extract-overlay-ramdisk-8po68oyb/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
291 03:50:07.346567 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
292 03:50:07.347104 end: 1.6 prepare-tftp-overlay (duration 00:01:01) [common]
293 03:50:07.347625 start: 1.7 lxc-create-udev-rule-action (timeout 00:08:42) [common]
294 03:50:07.348108 No LXC device requested
295 03:50:07.348614 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
296 03:50:07.349120 start: 1.8 deploy-device-env (timeout 00:08:42) [common]
297 03:50:07.349610 end: 1.8 deploy-device-env (duration 00:00:00) [common]
298 03:50:07.350016 Checking files for TFTP limit of 4294967296 bytes.
299 03:50:07.352674 end: 1 tftp-deploy (duration 00:01:18) [common]
300 03:50:07.353258 start: 2 uboot-action (timeout 00:05:00) [common]
301 03:50:07.353782 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
302 03:50:07.354272 end: 2.1 uboot-from-media (duration 00:00:00) [common]
303 03:50:07.354768 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
304 03:50:07.355295 Using kernel file from prepare-kernel: 950574/tftp-deploy-v4w2cne_/kernel/uImage
305 03:50:07.355919 substitutions:
306 03:50:07.356369 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
307 03:50:07.356779 - {DTB_ADDR}: 0x01070000
308 03:50:07.357178 - {DTB}: 950574/tftp-deploy-v4w2cne_/dtb/meson-g12b-a311d-libretech-cc.dtb
309 03:50:07.357579 - {INITRD}: 950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
310 03:50:07.357979 - {KERNEL_ADDR}: 0x01080000
311 03:50:07.358373 - {KERNEL}: 950574/tftp-deploy-v4w2cne_/kernel/uImage
312 03:50:07.358765 - {LAVA_MAC}: None
313 03:50:07.359191 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950574/extract-nfsrootfs-hcqzfinz
314 03:50:07.359589 - {NFS_SERVER_IP}: 192.168.6.2
315 03:50:07.359995 - {PRESEED_CONFIG}: None
316 03:50:07.360397 - {PRESEED_LOCAL}: None
317 03:50:07.360792 - {RAMDISK_ADDR}: 0x08000000
318 03:50:07.361178 - {RAMDISK}: 950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
319 03:50:07.361568 - {ROOT_PART}: None
320 03:50:07.361957 - {ROOT}: None
321 03:50:07.362342 - {SERVER_IP}: 192.168.6.2
322 03:50:07.362726 - {TEE_ADDR}: 0x83000000
323 03:50:07.363111 - {TEE}: None
324 03:50:07.363496 Parsed boot commands:
325 03:50:07.363870 - setenv autoload no
326 03:50:07.364278 - setenv initrd_high 0xffffffff
327 03:50:07.364666 - setenv fdt_high 0xffffffff
328 03:50:07.365049 - dhcp
329 03:50:07.365431 - setenv serverip 192.168.6.2
330 03:50:07.365817 - tftpboot 0x01080000 950574/tftp-deploy-v4w2cne_/kernel/uImage
331 03:50:07.366205 - tftpboot 0x08000000 950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
332 03:50:07.366594 - tftpboot 0x01070000 950574/tftp-deploy-v4w2cne_/dtb/meson-g12b-a311d-libretech-cc.dtb
333 03:50:07.366980 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950574/extract-nfsrootfs-hcqzfinz,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
334 03:50:07.367377 - bootm 0x01080000 0x08000000 0x01070000
335 03:50:07.367871 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
337 03:50:07.369410 start: 2.3 connect-device (timeout 00:05:00) [common]
338 03:50:07.369829 [common] connect-device Connecting to device using 'telnet conserv1 3007'
339 03:50:07.384776 Setting prompt string to ['lava-test: # ']
340 03:50:07.386331 end: 2.3 connect-device (duration 00:00:00) [common]
341 03:50:07.386936 start: 2.4 uboot-commands (timeout 00:05:00) [common]
342 03:50:07.387487 start: 2.4.1 reset-device (timeout 00:05:00) [common]
343 03:50:07.388046 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
344 03:50:07.389359 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=alta-01'
345 03:50:07.425070 >> OK - accepted request
346 03:50:07.427085 Returned 0 in 0 seconds
347 03:50:07.528178 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
349 03:50:07.529252 end: 2.4.1 reset-device (duration 00:00:00) [common]
350 03:50:07.529604 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
351 03:50:07.529912 Setting prompt string to ['Hit any key to stop autoboot']
352 03:50:07.530192 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
353 03:50:07.531176 Trying 192.168.56.21...
354 03:50:07.531491 Connected to conserv1.
355 03:50:07.531740 Escape character is '^]'.
356 03:50:07.531969
357 03:50:07.532253 ser2net port telnet,3007 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.4.4:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
358 03:50:07.532494
359 03:50:19.029363 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
360 03:50:19.030003 bl2_stage_init 0x01
361 03:50:19.030454 bl2_stage_init 0x81
362 03:50:19.035194 hw id: 0x0000 - pwm id 0x01
363 03:50:19.035784 bl2_stage_init 0xc1
364 03:50:19.036266 bl2_stage_init 0x02
365 03:50:19.036679
366 03:50:19.040498 L0:00000000
367 03:50:19.040953 L1:20000703
368 03:50:19.041364 L2:00008067
369 03:50:19.041761 L3:14000000
370 03:50:19.046109 B2:00402000
371 03:50:19.046545 B1:e0f83180
372 03:50:19.046948
373 03:50:19.047336 TE: 58159
374 03:50:19.047724
375 03:50:19.051683 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
376 03:50:19.052124
377 03:50:19.052515 Board ID = 1
378 03:50:19.057286 Set A53 clk to 24M
379 03:50:19.057712 Set A73 clk to 24M
380 03:50:19.058097 Set clk81 to 24M
381 03:50:19.062933 A53 clk: 1200 MHz
382 03:50:19.063346 A73 clk: 1200 MHz
383 03:50:19.063732 CLK81: 166.6M
384 03:50:19.064147 smccc: 00012ab5
385 03:50:19.068476 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
386 03:50:19.074048 board id: 1
387 03:50:19.080108 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
388 03:50:19.090650 fw parse done
389 03:50:19.096583 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
390 03:50:19.139283 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
391 03:50:19.150113 PIEI prepare done
392 03:50:19.150530 fastboot data load
393 03:50:19.150925 fastboot data verify
394 03:50:19.155778 verify result: 266
395 03:50:19.161324 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
396 03:50:19.161800 LPDDR4 probe
397 03:50:19.162213 ddr clk to 1584MHz
398 03:50:19.168332 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
399 03:50:19.206561
400 03:50:19.207012 dmc_version 0001
401 03:50:19.213583 Check phy result
402 03:50:19.219099 INFO : End of CA training
403 03:50:19.219541 INFO : End of initialization
404 03:50:19.224725 INFO : Training has run successfully!
405 03:50:19.225156 Check phy result
406 03:50:19.230277 INFO : End of initialization
407 03:50:19.230737 INFO : End of read enable training
408 03:50:19.235968 INFO : End of fine write leveling
409 03:50:19.241490 INFO : End of Write leveling coarse delay
410 03:50:19.241938 INFO : Training has run successfully!
411 03:50:19.242349 Check phy result
412 03:50:19.247080 INFO : End of initialization
413 03:50:19.247527 INFO : End of read dq deskew training
414 03:50:19.252733 INFO : End of MPR read delay center optimization
415 03:50:19.258280 INFO : End of write delay center optimization
416 03:50:19.264035 INFO : End of read delay center optimization
417 03:50:19.264526 INFO : End of max read latency training
418 03:50:19.269507 INFO : Training has run successfully!
419 03:50:19.269954 1D training succeed
420 03:50:19.278696 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
421 03:50:19.325332 Check phy result
422 03:50:19.325859 INFO : End of initialization
423 03:50:19.347059 INFO : End of 2D read delay Voltage center optimization
424 03:50:19.368174 INFO : End of 2D read delay Voltage center optimization
425 03:50:19.419033 INFO : End of 2D write delay Voltage center optimization
426 03:50:19.469222 INFO : End of 2D write delay Voltage center optimization
427 03:50:19.474660 INFO : Training has run successfully!
428 03:50:19.475141
429 03:50:19.475567 channel==0
430 03:50:19.480430 RxClkDly_Margin_A0==88 ps 9
431 03:50:19.480931 TxDqDly_Margin_A0==98 ps 10
432 03:50:19.485905 RxClkDly_Margin_A1==88 ps 9
433 03:50:19.486399 TxDqDly_Margin_A1==98 ps 10
434 03:50:19.486830 TrainedVREFDQ_A0==74
435 03:50:19.491488 TrainedVREFDQ_A1==75
436 03:50:19.492043 VrefDac_Margin_A0==25
437 03:50:19.492480 DeviceVref_Margin_A0==40
438 03:50:19.497156 VrefDac_Margin_A1==25
439 03:50:19.497711 DeviceVref_Margin_A1==39
440 03:50:19.497950
441 03:50:19.498171
442 03:50:19.502725 channel==1
443 03:50:19.503036 RxClkDly_Margin_A0==98 ps 10
444 03:50:19.503264 TxDqDly_Margin_A0==98 ps 10
445 03:50:19.508231 RxClkDly_Margin_A1==98 ps 10
446 03:50:19.508529 TxDqDly_Margin_A1==88 ps 9
447 03:50:19.513908 TrainedVREFDQ_A0==77
448 03:50:19.514214 TrainedVREFDQ_A1==77
449 03:50:19.514439 VrefDac_Margin_A0==22
450 03:50:19.519443 DeviceVref_Margin_A0==37
451 03:50:19.519737 VrefDac_Margin_A1==24
452 03:50:19.525116 DeviceVref_Margin_A1==37
453 03:50:19.525416
454 03:50:19.525640 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
455 03:50:19.530680
456 03:50:19.558690 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000018 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000016 00000018 00000018 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000018 00000017 dram_vref_reg_value 0x 00000060
457 03:50:19.559109 2D training succeed
458 03:50:19.564266 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
459 03:50:19.569848 auto size-- 65535DDR cs0 size: 2048MB
460 03:50:19.570137 DDR cs1 size: 2048MB
461 03:50:19.575471 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
462 03:50:19.575795 cs0 DataBus test pass
463 03:50:19.581182 cs1 DataBus test pass
464 03:50:19.581478 cs0 AddrBus test pass
465 03:50:19.581682 cs1 AddrBus test pass
466 03:50:19.581881
467 03:50:19.586642 100bdlr_step_size ps== 420
468 03:50:19.586880 result report
469 03:50:19.592246 boot times 0Enable ddr reg access
470 03:50:19.596760 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
471 03:50:19.610128 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
472 03:50:20.183420 0.0;M3 CHK:0;cm4_sp_mode 0
473 03:50:20.183957 MVN_1=0x00000000
474 03:50:20.188784 MVN_2=0x00000000
475 03:50:20.194444 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
476 03:50:20.194879 OPS=0x10
477 03:50:20.195292 ring efuse init
478 03:50:20.195693 chipver efuse init
479 03:50:20.200151 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
480 03:50:20.205661 [0.018960 Inits done]
481 03:50:20.206087 secure task start!
482 03:50:20.206491 high task start!
483 03:50:20.209321 low task start!
484 03:50:20.209746 run into bl31
485 03:50:20.216919 NOTICE: BL31: v1.3(release):4fc40b1
486 03:50:20.223721 NOTICE: BL31: Built : 15:58:17, May 22 2019
487 03:50:20.224184 NOTICE: BL31: G12A normal boot!
488 03:50:20.250168 NOTICE: BL31: BL33 decompress pass
489 03:50:20.254820 ERROR: Error initializing runtime service opteed_fast
490 03:50:21.488740
491 03:50:21.489360
492 03:50:21.496865 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
493 03:50:21.497569
494 03:50:21.497872 Model: Libre Computer AML-A311D-CC Alta
495 03:50:21.705640 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
496 03:50:21.728834 DRAM: 2 GiB (effective 3.8 GiB)
497 03:50:21.871798 Core: 408 devices, 31 uclasses, devicetree: separate
498 03:50:21.877677 WDT: Not starting watchdog@f0d0
499 03:50:21.909909 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
500 03:50:21.922360 Loading Environment from FAT... Card did not respond to voltage select! : -110
501 03:50:21.927441 ** Bad device specification mmc 0 **
502 03:50:21.937692 Card did not respond to voltage select! : -110
503 03:50:21.945475 ** Bad device specification mmc 0 **
504 03:50:21.945920 Couldn't find partition mmc 0
505 03:50:21.953659 Card did not respond to voltage select! : -110
506 03:50:21.959179 ** Bad device specification mmc 0 **
507 03:50:21.959609 Couldn't find partition mmc 0
508 03:50:21.964251 Error: could not access storage.
509 03:50:23.229834 G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
510 03:50:23.230425 bl2_stage_init 0x01
511 03:50:23.230863 bl2_stage_init 0x81
512 03:50:23.235331 hw id: 0x0000 - pwm id 0x01
513 03:50:23.235781 bl2_stage_init 0xc1
514 03:50:23.236237 bl2_stage_init 0x02
515 03:50:23.236650
516 03:50:23.240883 L0:00000000
517 03:50:23.241316 L1:20000703
518 03:50:23.241724 L2:00008067
519 03:50:23.242131 L3:14000000
520 03:50:23.246641 B2:00402000
521 03:50:23.247177 B1:e0f83180
522 03:50:23.247623
523 03:50:23.248097 TE: 58124
524 03:50:23.248534
525 03:50:23.252209 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
526 03:50:23.252702
527 03:50:23.253134 Board ID = 1
528 03:50:23.257775 Set A53 clk to 24M
529 03:50:23.258264 Set A73 clk to 24M
530 03:50:23.258702 Set clk81 to 24M
531 03:50:23.263414 A53 clk: 1200 MHz
532 03:50:23.263903 A73 clk: 1200 MHz
533 03:50:23.264461 CLK81: 166.6M
534 03:50:23.264897 smccc: 00012a92
535 03:50:23.268982 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
536 03:50:23.274630 board id: 1
537 03:50:23.280549 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
538 03:50:23.291122 fw parse done
539 03:50:23.297084 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
540 03:50:23.339728 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
541 03:50:23.350678 PIEI prepare done
542 03:50:23.351232 fastboot data load
543 03:50:23.351693 fastboot data verify
544 03:50:23.356279 verify result: 266
545 03:50:23.361854 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
546 03:50:23.362397 LPDDR4 probe
547 03:50:23.362858 ddr clk to 1584MHz
548 03:50:23.369891 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
549 03:50:23.407095
550 03:50:23.407681 dmc_version 0001
551 03:50:23.413808 Check phy result
552 03:50:23.419712 INFO : End of CA training
553 03:50:23.420289 INFO : End of initialization
554 03:50:23.425236 INFO : Training has run successfully!
555 03:50:23.425756 Check phy result
556 03:50:23.430806 INFO : End of initialization
557 03:50:23.431331 INFO : End of read enable training
558 03:50:23.436445 INFO : End of fine write leveling
559 03:50:23.442004 INFO : End of Write leveling coarse delay
560 03:50:23.442531 INFO : Training has run successfully!
561 03:50:23.442980 Check phy result
562 03:50:23.447714 INFO : End of initialization
563 03:50:23.448282 INFO : End of read dq deskew training
564 03:50:23.453212 INFO : End of MPR read delay center optimization
565 03:50:23.458923 INFO : End of write delay center optimization
566 03:50:23.464423 INFO : End of read delay center optimization
567 03:50:23.464956 INFO : End of max read latency training
568 03:50:23.469990 INFO : Training has run successfully!
569 03:50:23.470510 1D training succeed
570 03:50:23.479155 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
571 03:50:23.526882 Check phy result
572 03:50:23.527468 INFO : End of initialization
573 03:50:23.549470 INFO : End of 2D read delay Voltage center optimization
574 03:50:23.569629 INFO : End of 2D read delay Voltage center optimization
575 03:50:23.621704 INFO : End of 2D write delay Voltage center optimization
576 03:50:23.671098 INFO : End of 2D write delay Voltage center optimization
577 03:50:23.676712 INFO : Training has run successfully!
578 03:50:23.677236
579 03:50:23.677687 channel==0
580 03:50:23.682190 RxClkDly_Margin_A0==88 ps 9
581 03:50:23.682708 TxDqDly_Margin_A0==98 ps 10
582 03:50:23.685526 RxClkDly_Margin_A1==78 ps 8
583 03:50:23.686033 TxDqDly_Margin_A1==88 ps 9
584 03:50:23.691038 TrainedVREFDQ_A0==74
585 03:50:23.691550 TrainedVREFDQ_A1==74
586 03:50:23.692037 VrefDac_Margin_A0==24
587 03:50:23.696734 DeviceVref_Margin_A0==40
588 03:50:23.697246 VrefDac_Margin_A1==26
589 03:50:23.702255 DeviceVref_Margin_A1==40
590 03:50:23.702764
591 03:50:23.703215
592 03:50:23.703661 channel==1
593 03:50:23.704142 RxClkDly_Margin_A0==98 ps 10
594 03:50:23.707844 TxDqDly_Margin_A0==98 ps 10
595 03:50:23.708407 RxClkDly_Margin_A1==98 ps 10
596 03:50:23.713500 TxDqDly_Margin_A1==88 ps 9
597 03:50:23.714018 TrainedVREFDQ_A0==77
598 03:50:23.714463 TrainedVREFDQ_A1==77
599 03:50:23.719018 VrefDac_Margin_A0==22
600 03:50:23.719530 DeviceVref_Margin_A0==37
601 03:50:23.724767 VrefDac_Margin_A1==22
602 03:50:23.725338 DeviceVref_Margin_A1==37
603 03:50:23.725790
604 03:50:23.730221 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
605 03:50:23.730743
606 03:50:23.758199 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000016 00000017 00000019 00000017 00000019 00000018 00000019 0000001a 00000018 00000017 00000018 00000017 00000019 00000018 00000018 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
607 03:50:23.763818 2D training succeed
608 03:50:23.769469 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
609 03:50:23.770000 auto size-- 65535DDR cs0 size: 2048MB
610 03:50:23.775013 DDR cs1 size: 2048MB
611 03:50:23.775535 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
612 03:50:23.780753 cs0 DataBus test pass
613 03:50:23.781276 cs1 DataBus test pass
614 03:50:23.781717 cs0 AddrBus test pass
615 03:50:23.786216 cs1 AddrBus test pass
616 03:50:23.786733
617 03:50:23.787173 100bdlr_step_size ps== 420
618 03:50:23.787616 result report
619 03:50:23.791812 boot times 0Enable ddr reg access
620 03:50:23.799583 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
621 03:50:23.813132 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
622 03:50:24.386157 0.0;M3 CHK:0;cm4_sp_mode 0
623 03:50:24.386802 MVN_1=0x00000000
624 03:50:24.391629 MVN_2=0x00000000
625 03:50:24.397344 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
626 03:50:24.397857 OPS=0x10
627 03:50:24.398279 ring efuse init
628 03:50:24.398700 chipver efuse init
629 03:50:24.402944 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
630 03:50:24.408565 [0.018961 Inits done]
631 03:50:24.409099 secure task start!
632 03:50:24.409505 high task start!
633 03:50:24.413089 low task start!
634 03:50:24.413611 run into bl31
635 03:50:24.419801 NOTICE: BL31: v1.3(release):4fc40b1
636 03:50:24.427625 NOTICE: BL31: Built : 15:58:17, May 22 2019
637 03:50:24.428170 NOTICE: BL31: G12A normal boot!
638 03:50:24.452965 NOTICE: BL31: BL33 decompress pass
639 03:50:24.458615 ERROR: Error initializing runtime service opteed_fast
640 03:50:25.691477
641 03:50:25.692186
642 03:50:25.699879 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
643 03:50:25.700420
644 03:50:25.700869 Model: Libre Computer AML-A311D-CC Alta
645 03:50:25.908368 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
646 03:50:25.931724 DRAM: 2 GiB (effective 3.8 GiB)
647 03:50:26.074892 Core: 408 devices, 31 uclasses, devicetree: separate
648 03:50:26.080660 WDT: Not starting watchdog@f0d0
649 03:50:26.112891 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
650 03:50:26.125408 Loading Environment from FAT... Card did not respond to voltage select! : -110
651 03:50:26.130535 ** Bad device specification mmc 0 **
652 03:50:26.140658 Card did not respond to voltage select! : -110
653 03:50:26.148466 ** Bad device specification mmc 0 **
654 03:50:26.148959 Couldn't find partition mmc 0
655 03:50:26.156679 Card did not respond to voltage select! : -110
656 03:50:26.162144 ** Bad device specification mmc 0 **
657 03:50:26.162633 Couldn't find partition mmc 0
658 03:50:26.167372 Error: could not access storage.
659 03:50:26.509894 Net: eth0: ethernet@ff3f0000
660 03:50:26.510520 starting USB...
661 03:50:26.761654 Bus usb@ff500000: Register 3000140 NbrPorts 3
662 03:50:26.762279 Starting the controller
663 03:50:26.768552 USB XHCI 1.10
664 03:50:28.478851 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
665 03:50:28.479507 bl2_stage_init 0x01
666 03:50:28.479961 bl2_stage_init 0x81
667 03:50:28.484349 hw id: 0x0000 - pwm id 0x01
668 03:50:28.484856 bl2_stage_init 0xc1
669 03:50:28.485293 bl2_stage_init 0x02
670 03:50:28.485716
671 03:50:28.489972 L0:00000000
672 03:50:28.490471 L1:20000703
673 03:50:28.490900 L2:00008067
674 03:50:28.491318 L3:14000000
675 03:50:28.495474 B2:00402000
676 03:50:28.495951 B1:e0f83180
677 03:50:28.496419
678 03:50:28.496845 TE: 58159
679 03:50:28.497262
680 03:50:28.501207 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
681 03:50:28.501713
682 03:50:28.502147 Board ID = 1
683 03:50:28.506806 Set A53 clk to 24M
684 03:50:28.507305 Set A73 clk to 24M
685 03:50:28.507731 Set clk81 to 24M
686 03:50:28.512505 A53 clk: 1200 MHz
687 03:50:28.513019 A73 clk: 1200 MHz
688 03:50:28.513446 CLK81: 166.6M
689 03:50:28.513870 smccc: 00012ab5
690 03:50:28.518002 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
691 03:50:28.523503 board id: 1
692 03:50:28.529487 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
693 03:50:28.540227 fw parse done
694 03:50:28.546147 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
695 03:50:28.588589 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
696 03:50:28.599494 PIEI prepare done
697 03:50:28.600038 fastboot data load
698 03:50:28.600486 fastboot data verify
699 03:50:28.605104 verify result: 266
700 03:50:28.610671 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
701 03:50:28.611157 LPDDR4 probe
702 03:50:28.611584 ddr clk to 1584MHz
703 03:50:28.618695 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
704 03:50:28.656046
705 03:50:28.656653 dmc_version 0001
706 03:50:28.662608 Check phy result
707 03:50:28.668455 INFO : End of CA training
708 03:50:28.668946 INFO : End of initialization
709 03:50:28.674053 INFO : Training has run successfully!
710 03:50:28.674535 Check phy result
711 03:50:28.679713 INFO : End of initialization
712 03:50:28.680232 INFO : End of read enable training
713 03:50:28.685331 INFO : End of fine write leveling
714 03:50:28.690899 INFO : End of Write leveling coarse delay
715 03:50:28.691382 INFO : Training has run successfully!
716 03:50:28.691804 Check phy result
717 03:50:28.696465 INFO : End of initialization
718 03:50:28.696945 INFO : End of read dq deskew training
719 03:50:28.702101 INFO : End of MPR read delay center optimization
720 03:50:28.707748 INFO : End of write delay center optimization
721 03:50:28.713414 INFO : End of read delay center optimization
722 03:50:28.713967 INFO : End of max read latency training
723 03:50:28.718949 INFO : Training has run successfully!
724 03:50:28.719432 1D training succeed
725 03:50:28.728104 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
726 03:50:28.775762 Check phy result
727 03:50:28.776354 INFO : End of initialization
728 03:50:28.798307 INFO : End of 2D read delay Voltage center optimization
729 03:50:28.818418 INFO : End of 2D read delay Voltage center optimization
730 03:50:28.870192 INFO : End of 2D write delay Voltage center optimization
731 03:50:28.919610 INFO : End of 2D write delay Voltage center optimization
732 03:50:28.924945 INFO : Training has run successfully!
733 03:50:28.925450
734 03:50:28.925880 channel==0
735 03:50:28.930595 RxClkDly_Margin_A0==88 ps 9
736 03:50:28.931095 TxDqDly_Margin_A0==108 ps 11
737 03:50:28.933996 RxClkDly_Margin_A1==88 ps 9
738 03:50:28.934491 TxDqDly_Margin_A1==98 ps 10
739 03:50:28.939544 TrainedVREFDQ_A0==74
740 03:50:28.940084 TrainedVREFDQ_A1==74
741 03:50:28.945074 VrefDac_Margin_A0==25
742 03:50:28.945554 DeviceVref_Margin_A0==40
743 03:50:28.945980 VrefDac_Margin_A1==25
744 03:50:28.950802 DeviceVref_Margin_A1==40
745 03:50:28.951325
746 03:50:28.951753
747 03:50:28.952226 channel==1
748 03:50:28.952652 RxClkDly_Margin_A0==88 ps 9
749 03:50:28.954321 TxDqDly_Margin_A0==98 ps 10
750 03:50:28.959749 RxClkDly_Margin_A1==88 ps 9
751 03:50:28.960315 TxDqDly_Margin_A1==88 ps 9
752 03:50:28.960752 TrainedVREFDQ_A0==77
753 03:50:28.965281 TrainedVREFDQ_A1==77
754 03:50:28.965787 VrefDac_Margin_A0==22
755 03:50:28.971040 DeviceVref_Margin_A0==37
756 03:50:28.971590 VrefDac_Margin_A1==24
757 03:50:28.972093 DeviceVref_Margin_A1==37
758 03:50:28.972556
759 03:50:28.976671 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
760 03:50:28.977245
761 03:50:29.010143 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000017 00000019 00000018 00000017 00000017 00000016 00000017 00000015 00000017 00000019 00000018 00000019 00000018 0000001a 00000019 00000018 00000016 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
762 03:50:29.010741 2D training succeed
763 03:50:29.015751 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
764 03:50:29.021294 auto size-- 65535DDR cs0 size: 2048MB
765 03:50:29.021856 DDR cs1 size: 2048MB
766 03:50:29.026859 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
767 03:50:29.027400 cs0 DataBus test pass
768 03:50:29.027838 cs1 DataBus test pass
769 03:50:29.032468 cs0 AddrBus test pass
770 03:50:29.032989 cs1 AddrBus test pass
771 03:50:29.033422
772 03:50:29.038126 100bdlr_step_size ps== 420
773 03:50:29.038997 result report
774 03:50:29.039718 boot times 0Enable ddr reg access
775 03:50:29.047821 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
776 03:50:29.061265 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
777 03:50:29.633393 0.0;M3 CHK:0;cm4_sp_mode 0
778 03:50:29.634013 MVN_1=0x00000000
779 03:50:29.638857 MVN_2=0x00000000
780 03:50:29.644631 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
781 03:50:29.645131 OPS=0x10
782 03:50:29.645557 ring efuse init
783 03:50:29.645989 chipver efuse init
784 03:50:29.650293 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
785 03:50:29.655808 [0.018961 Inits done]
786 03:50:29.656325 secure task start!
787 03:50:29.656731 high task start!
788 03:50:29.660373 low task start!
789 03:50:29.660840 run into bl31
790 03:50:29.667024 NOTICE: BL31: v1.3(release):4fc40b1
791 03:50:29.674859 NOTICE: BL31: Built : 15:58:17, May 22 2019
792 03:50:29.675348 NOTICE: BL31: G12A normal boot!
793 03:50:29.700327 NOTICE: BL31: BL33 decompress pass
794 03:50:29.705974 ERROR: Error initializing runtime service opteed_fast
795 03:50:30.938855
796 03:50:30.939476
797 03:50:30.947178 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
798 03:50:30.947674
799 03:50:30.948150 Model: Libre Computer AML-A311D-CC Alta
800 03:50:31.155672 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
801 03:50:31.179003 DRAM: 2 GiB (effective 3.8 GiB)
802 03:50:31.322038 Core: 408 devices, 31 uclasses, devicetree: separate
803 03:50:31.327882 WDT: Not starting watchdog@f0d0
804 03:50:31.360268 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
805 03:50:31.372777 Loading Environment from FAT... Card did not respond to voltage select! : -110
806 03:50:31.377683 ** Bad device specification mmc 0 **
807 03:50:31.388124 Card did not respond to voltage select! : -110
808 03:50:31.395854 ** Bad device specification mmc 0 **
809 03:50:31.396901 Couldn't find partition mmc 0
810 03:50:31.404067 Card did not respond to voltage select! : -110
811 03:50:31.409497 ** Bad device specification mmc 0 **
812 03:50:31.410100 Couldn't find partition mmc 0
813 03:50:31.414633 Error: could not access storage.
814 03:50:31.757993 Net: eth0: ethernet@ff3f0000
815 03:50:31.758647 starting USB...
816 03:50:32.009801 Bus usb@ff500000: Register 3000140 NbrPorts 3
817 03:50:32.010450 Starting the controller
818 03:50:32.016712 USB XHCI 1.10
819 03:50:34.178773 scanning bus usb@ff500000 for devices... G12B:BL:6e7c85:2a3b91;FEAT:E0F83180:402000;POC:B;RCY:0;SPINOR:0;0.
820 03:50:34.179418 bl2_stage_init 0x01
821 03:50:34.179868 bl2_stage_init 0x81
822 03:50:34.184267 hw id: 0x0000 - pwm id 0x01
823 03:50:34.184754 bl2_stage_init 0xc1
824 03:50:34.185182 bl2_stage_init 0x02
825 03:50:34.185599
826 03:50:34.189916 L0:00000000
827 03:50:34.190418 L1:20000703
828 03:50:34.190840 L2:00008067
829 03:50:34.191261 L3:14000000
830 03:50:34.192896 B2:00402000
831 03:50:34.193369 B1:e0f83180
832 03:50:34.193794
833 03:50:34.194209 TE: 58159
834 03:50:34.194628
835 03:50:34.203914 BL2 Built : 15:22:05, Aug 28 2019. g12b g1bf2b53 - luan.yuan@droid15-sz
836 03:50:34.204441
837 03:50:34.204867 Board ID = 1
838 03:50:34.205283 Set A53 clk to 24M
839 03:50:34.205695 Set A73 clk to 24M
840 03:50:34.209640 Set clk81 to 24M
841 03:50:34.210121 A53 clk: 1200 MHz
842 03:50:34.210537 A73 clk: 1200 MHz
843 03:50:34.215290 CLK81: 166.6M
844 03:50:34.215765 smccc: 00012ab5
845 03:50:34.220852 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:22:01
846 03:50:34.221338 board id: 1
847 03:50:34.229463 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
848 03:50:34.240154 fw parse done
849 03:50:34.246070 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
850 03:50:34.288542 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
851 03:50:34.299494 PIEI prepare done
852 03:50:34.300024 fastboot data load
853 03:50:34.300465 fastboot data verify
854 03:50:34.305081 verify result: 266
855 03:50:34.310680 Cfg max: 1, cur: 1. Board id: 255. Force loop cfg
856 03:50:34.311160 LPDDR4 probe
857 03:50:34.311583 ddr clk to 1584MHz
858 03:50:34.318663 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
859 03:50:34.356063
860 03:50:34.356709 dmc_version 0001
861 03:50:34.362684 Check phy result
862 03:50:34.368498 INFO : End of CA training
863 03:50:34.369036 INFO : End of initialization
864 03:50:34.374068 INFO : Training has run successfully!
865 03:50:34.374559 Check phy result
866 03:50:34.379732 INFO : End of initialization
867 03:50:34.380331 INFO : End of read enable training
868 03:50:34.383044 INFO : End of fine write leveling
869 03:50:34.388647 INFO : End of Write leveling coarse delay
870 03:50:34.394307 INFO : Training has run successfully!
871 03:50:34.394848 Check phy result
872 03:50:34.395278 INFO : End of initialization
873 03:50:34.399818 INFO : End of read dq deskew training
874 03:50:34.405471 INFO : End of MPR read delay center optimization
875 03:50:34.406032 INFO : End of write delay center optimization
876 03:50:34.411176 INFO : End of read delay center optimization
877 03:50:34.416714 INFO : End of max read latency training
878 03:50:34.417303 INFO : Training has run successfully!
879 03:50:34.422306 1D training succeed
880 03:50:34.428133 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
881 03:50:34.474779 Check phy result
882 03:50:34.475368 INFO : End of initialization
883 03:50:34.496506 INFO : End of 2D read delay Voltage center optimization
884 03:50:34.516682 INFO : End of 2D read delay Voltage center optimization
885 03:50:34.568778 INFO : End of 2D write delay Voltage center optimization
886 03:50:34.619030 INFO : End of 2D write delay Voltage center optimization
887 03:50:34.624659 INFO : Training has run successfully!
888 03:50:34.625144
889 03:50:34.625577 channel==0
890 03:50:34.630250 RxClkDly_Margin_A0==88 ps 9
891 03:50:34.630722 TxDqDly_Margin_A0==98 ps 10
892 03:50:34.635804 RxClkDly_Margin_A1==88 ps 9
893 03:50:34.636319 TxDqDly_Margin_A1==98 ps 10
894 03:50:34.636753 TrainedVREFDQ_A0==74
895 03:50:34.641431 TrainedVREFDQ_A1==74
896 03:50:34.641928 VrefDac_Margin_A0==25
897 03:50:34.642326 DeviceVref_Margin_A0==40
898 03:50:34.647003 VrefDac_Margin_A1==23
899 03:50:34.647490 DeviceVref_Margin_A1==40
900 03:50:34.647888
901 03:50:34.648331
902 03:50:34.652563 channel==1
903 03:50:34.653032 RxClkDly_Margin_A0==98 ps 10
904 03:50:34.653429 TxDqDly_Margin_A0==98 ps 10
905 03:50:34.658284 RxClkDly_Margin_A1==98 ps 10
906 03:50:34.658751 TxDqDly_Margin_A1==88 ps 9
907 03:50:34.663814 TrainedVREFDQ_A0==77
908 03:50:34.664330 TrainedVREFDQ_A1==77
909 03:50:34.664731 VrefDac_Margin_A0==22
910 03:50:34.669368 DeviceVref_Margin_A0==37
911 03:50:34.669825 VrefDac_Margin_A1==22
912 03:50:34.675039 DeviceVref_Margin_A1==37
913 03:50:34.675533
914 03:50:34.675947 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
915 03:50:34.680593
916 03:50:34.708539 soc_vref_reg_value 0x 00000019 0000001a 00000017 00000019 00000018 00000019 00000018 00000017 00000018 00000016 00000018 00000015 00000018 00000019 00000017 00000019 00000018 0000001a 0000001a 00000018 00000017 00000018 00000018 00000019 00000018 00000017 00000019 00000019 0000001a 00000016 00000019 00000017 dram_vref_reg_value 0x 00000060
917 03:50:34.709053 2D training succeed
918 03:50:34.714229 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
919 03:50:34.719774 auto size-- 65535DDR cs0 size: 2048MB
920 03:50:34.720283 DDR cs1 size: 2048MB
921 03:50:34.725382 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
922 03:50:34.725842 cs0 DataBus test pass
923 03:50:34.730971 cs1 DataBus test pass
924 03:50:34.731430 cs0 AddrBus test pass
925 03:50:34.731828 cs1 AddrBus test pass
926 03:50:34.732276
927 03:50:34.736573 100bdlr_step_size ps== 420
928 03:50:34.737042 result report
929 03:50:34.742222 boot times 0Enable ddr reg access
930 03:50:34.746646 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
931 03:50:34.760179 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c0000, part: 0
932 03:50:35.334798 0.0;M3 CHK:0;cm4_sp_mode 0
933 03:50:35.335438 MVN_1=0x00000000
934 03:50:35.340377 MVN_2=0x00000000
935 03:50:35.346108 [Image: g12b_v1.1.3390-6ac5299 2019-09-26 14:10:05 luan.yuan@droid15-sz]
936 03:50:35.346626 OPS=0x10
937 03:50:35.347051 ring efuse init
938 03:50:35.347467 chipver efuse init
939 03:50:35.354307 29 0b 10 00 01 05 19 00 00 17 38 33 33 42 42 50
940 03:50:35.354822 [0.018961 Inits done]
941 03:50:35.360943 secure task start!
942 03:50:35.361446 high task start!
943 03:50:35.361874 low task start!
944 03:50:35.362294 run into bl31
945 03:50:35.368481 NOTICE: BL31: v1.3(release):4fc40b1
946 03:50:35.375326 NOTICE: BL31: Built : 15:58:17, May 22 2019
947 03:50:35.375823 NOTICE: BL31: G12A normal boot!
948 03:50:35.401607 NOTICE: BL31: BL33 decompress pass
949 03:50:35.407411 ERROR: Error initializing runtime service opteed_fast
950 03:50:36.640057
951 03:50:36.640780
952 03:50:36.648661 U-Boot 2024.01-rc4+ (Dec 14 2023 - 01:31:33 -0500) Libre Computer AML-A311D-CC
953 03:50:36.649616
954 03:50:36.650370 Model: Libre Computer AML-A311D-CC Alta
955 03:50:36.857287 SoC: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
956 03:50:36.880456 DRAM: 2 GiB (effective 3.8 GiB)
957 03:50:37.023263 Core: 408 devices, 31 uclasses, devicetree: separate
958 03:50:37.029267 WDT: Not starting watchdog@f0d0
959 03:50:37.061498 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
960 03:50:37.073866 Loading Environment from FAT... Card did not respond to voltage select! : -110
961 03:50:37.078825 ** Bad device specification mmc 0 **
962 03:50:37.089214 Card did not respond to voltage select! : -110
963 03:50:37.096804 ** Bad device specification mmc 0 **
964 03:50:37.097222 Couldn't find partition mmc 0
965 03:50:37.105220 Card did not respond to voltage select! : -110
966 03:50:37.110664 ** Bad device specification mmc 0 **
967 03:50:37.111243 Couldn't find partition mmc 0
968 03:50:37.115685 Error: could not access storage.
969 03:50:37.458257 Net: eth0: ethernet@ff3f0000
970 03:50:37.458915 starting USB...
971 03:50:37.710099 Bus usb@ff500000: Register 3000140 NbrPorts 3
972 03:50:37.710768 Starting the controller
973 03:50:37.716998 USB XHCI 1.10
974 03:50:39.271092 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
975 03:50:39.279360 scanning usb for storage devices... 0 Storage Device(s) found
977 03:50:39.330882 Hit any key to stop autoboot: 1
978 03:50:39.331780 end: 2.4.2 bootloader-interrupt (duration 00:00:32) [common]
979 03:50:39.332415 start: 2.4.3 bootloader-commands (timeout 00:04:28) [common]
980 03:50:39.332897 Setting prompt string to ['=>']
981 03:50:39.333394 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:28)
982 03:50:39.346902 0
983 03:50:39.347820 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
984 03:50:39.348371 Sending with 10 millisecond of delay
986 03:50:40.484427 => setenv autoload no
987 03:50:40.495272 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:27)
988 03:50:40.498732 setenv autoload no
989 03:50:40.499265 Sending with 10 millisecond of delay
991 03:50:42.296358 => setenv initrd_high 0xffffffff
992 03:50:42.307175 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:25)
993 03:50:42.308138 setenv initrd_high 0xffffffff
994 03:50:42.308862 Sending with 10 millisecond of delay
996 03:50:43.926420 => setenv fdt_high 0xffffffff
997 03:50:43.937202 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
998 03:50:43.938040 setenv fdt_high 0xffffffff
999 03:50:43.938767 Sending with 10 millisecond of delay
1001 03:50:44.230750 => dhcp
1002 03:50:44.241474 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:23)
1003 03:50:44.242421 dhcp
1004 03:50:44.242872 Speed: 1000, full duplex
1005 03:50:44.243289 BOOTP broadcast 1
1006 03:50:44.248920 DHCP client bound to address 192.168.6.27 (9 ms)
1007 03:50:44.249636 Sending with 10 millisecond of delay
1009 03:50:45.927444 => setenv serverip 192.168.6.2
1010 03:50:45.938442 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:21)
1011 03:50:45.939488 setenv serverip 192.168.6.2
1012 03:50:45.940348 Sending with 10 millisecond of delay
1014 03:50:49.666578 => tftpboot 0x01080000 950574/tftp-deploy-v4w2cne_/kernel/uImage
1015 03:50:49.677156 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:18)
1016 03:50:49.677743 tftpboot 0x01080000 950574/tftp-deploy-v4w2cne_/kernel/uImage
1017 03:50:49.677990 Speed: 1000, full duplex
1018 03:50:49.678213 Using ethernet@ff3f0000 device
1019 03:50:49.679701 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1020 03:50:49.685376 Filename '950574/tftp-deploy-v4w2cne_/kernel/uImage'.
1021 03:50:49.689201 Load address: 0x1080000
1022 03:50:52.138724 Loading: *################################################## 36.1 MiB
1023 03:50:52.139725 14.7 MiB/s
1024 03:50:52.140560 done
1025 03:50:52.142250 Bytes transferred = 37880384 (2420240 hex)
1026 03:50:52.143493 Sending with 10 millisecond of delay
1028 03:50:56.837365 => tftpboot 0x08000000 950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
1029 03:50:56.848184 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:11)
1030 03:50:56.849064 tftpboot 0x08000000 950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot
1031 03:50:56.849513 Speed: 1000, full duplex
1032 03:50:56.849930 Using ethernet@ff3f0000 device
1033 03:50:56.851032 TFTP from server 192.168.6.2; our IP address is 192.168.6.27
1034 03:50:56.860219 Filename '950574/tftp-deploy-v4w2cne_/ramdisk/ramdisk.cpio.gz.uboot'.
1035 03:50:56.860752 Load address: 0x8000000
1036 03:51:04.018323 Loading: *###T ############################################## UDP wrong checksum 00000005 00006ccb
1037 03:51:09.018114 T UDP wrong checksum 00000005 00006ccb
1038 03:51:19.020938 T T UDP wrong checksum 00000005 00006ccb
1039 03:51:39.025076 T T T UDP wrong checksum 00000005 00006ccb
1040 03:51:47.656962 T T UDP wrong checksum 000000ff 0000ce9a
1041 03:51:47.697606 UDP wrong checksum 000000ff 00006a8d
1042 03:51:54.031445 T
1043 03:51:54.032119 Retry count exceeded; starting again
1045 03:51:54.033534 end: 2.4.3 bootloader-commands (duration 00:01:15) [common]
1048 03:51:54.035358 end: 2.4 uboot-commands (duration 00:01:47) [common]
1050 03:51:54.036784 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
1052 03:51:54.037845 end: 2 uboot-action (duration 00:01:47) [common]
1054 03:51:54.039400 Cleaning after the job
1055 03:51:54.039969 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/ramdisk
1056 03:51:54.041353 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/kernel
1057 03:51:54.082509 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/dtb
1058 03:51:54.083440 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/nfsrootfs
1059 03:51:54.263357 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950574/tftp-deploy-v4w2cne_/modules
1060 03:51:54.284886 start: 4.1 power-off (timeout 00:00:30) [common]
1061 03:51:54.285590 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=alta-01'
1062 03:51:54.319249 >> OK - accepted request
1063 03:51:54.321319 Returned 0 in 0 seconds
1064 03:51:54.422059 end: 4.1 power-off (duration 00:00:00) [common]
1066 03:51:54.423024 start: 4.2 read-feedback (timeout 00:10:00) [common]
1067 03:51:54.423693 Listened to connection for namespace 'common' for up to 1s
1068 03:51:55.424653 Finalising connection for namespace 'common'
1069 03:51:55.425171 Disconnecting from shell: Finalise
1070 03:51:55.425477 =>
1071 03:51:55.526335 end: 4.2 read-feedback (duration 00:00:01) [common]
1072 03:51:55.526824 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950574
1073 03:51:58.644405 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950574
1074 03:51:58.645028 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.