Boot log: meson-sm1-s905d3-libretech-cc

    1 01:24:23.487473  lava-dispatcher, installed at version: 2024.01
    2 01:24:23.488327  start: 0 validate
    3 01:24:23.488811  Start time: 2024-11-07 01:24:23.488780+00:00 (UTC)
    4 01:24:23.489669  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    5 01:24:23.490228  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
    6 01:24:23.527213  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    7 01:24:23.527770  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fgcc-12%2Fkernel%2FImage exists
    8 01:24:23.560439  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
    9 01:24:23.561126  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fgcc-12%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
   10 01:24:23.596445  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   11 01:24:23.596927  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
   12 01:24:23.628120  Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
   13 01:24:23.628623  Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-110-gff7afaeca1a15%2Farm64%2Fdefconfig%2Fgcc-12%2Fmodules.tar.xz exists
   14 01:24:23.669287  validate duration: 0.18
   16 01:24:23.670132  start: 1 tftp-deploy (timeout 00:10:00) [common]
   17 01:24:23.670458  start: 1.1 download-retry (timeout 00:10:00) [common]
   18 01:24:23.670748  start: 1.1.1 http-download (timeout 00:10:00) [common]
   19 01:24:23.671332  Not decompressing ramdisk as can be used compressed.
   20 01:24:23.671796  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
   21 01:24:23.672098  saving as /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/ramdisk/initrd.cpio.gz
   22 01:24:23.672403  total size: 5628182 (5 MB)
   23 01:24:23.710911  progress   0 % (0 MB)
   24 01:24:23.715183  progress   5 % (0 MB)
   25 01:24:23.719543  progress  10 % (0 MB)
   26 01:24:23.723379  progress  15 % (0 MB)
   27 01:24:23.727747  progress  20 % (1 MB)
   28 01:24:23.731557  progress  25 % (1 MB)
   29 01:24:23.735797  progress  30 % (1 MB)
   30 01:24:23.739942  progress  35 % (1 MB)
   31 01:24:23.743795  progress  40 % (2 MB)
   32 01:24:23.747917  progress  45 % (2 MB)
   33 01:24:23.751759  progress  50 % (2 MB)
   34 01:24:23.755871  progress  55 % (2 MB)
   35 01:24:23.760140  progress  60 % (3 MB)
   36 01:24:23.763875  progress  65 % (3 MB)
   37 01:24:23.768464  progress  70 % (3 MB)
   38 01:24:23.772471  progress  75 % (4 MB)
   39 01:24:23.777256  progress  80 % (4 MB)
   40 01:24:23.781321  progress  85 % (4 MB)
   41 01:24:23.785438  progress  90 % (4 MB)
   42 01:24:23.789410  progress  95 % (5 MB)
   43 01:24:23.792735  progress 100 % (5 MB)
   44 01:24:23.793399  5 MB downloaded in 0.12 s (44.37 MB/s)
   45 01:24:23.793958  end: 1.1.1 http-download (duration 00:00:00) [common]
   47 01:24:23.794843  end: 1.1 download-retry (duration 00:00:00) [common]
   48 01:24:23.795136  start: 1.2 download-retry (timeout 00:10:00) [common]
   49 01:24:23.795405  start: 1.2.1 http-download (timeout 00:10:00) [common]
   50 01:24:23.795920  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/gcc-12/kernel/Image
   51 01:24:23.796205  saving as /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/kernel/Image
   52 01:24:23.796416  total size: 45713920 (43 MB)
   53 01:24:23.796626  No compression specified
   54 01:24:23.834962  progress   0 % (0 MB)
   55 01:24:23.863372  progress   5 % (2 MB)
   56 01:24:23.892383  progress  10 % (4 MB)
   57 01:24:23.921794  progress  15 % (6 MB)
   58 01:24:23.950690  progress  20 % (8 MB)
   59 01:24:23.979521  progress  25 % (10 MB)
   60 01:24:24.008314  progress  30 % (13 MB)
   61 01:24:24.037420  progress  35 % (15 MB)
   62 01:24:24.066781  progress  40 % (17 MB)
   63 01:24:24.096085  progress  45 % (19 MB)
   64 01:24:24.125569  progress  50 % (21 MB)
   65 01:24:24.154423  progress  55 % (24 MB)
   66 01:24:24.183154  progress  60 % (26 MB)
   67 01:24:24.211719  progress  65 % (28 MB)
   68 01:24:24.240573  progress  70 % (30 MB)
   69 01:24:24.268972  progress  75 % (32 MB)
   70 01:24:24.297239  progress  80 % (34 MB)
   71 01:24:24.325495  progress  85 % (37 MB)
   72 01:24:24.354292  progress  90 % (39 MB)
   73 01:24:24.383058  progress  95 % (41 MB)
   74 01:24:24.410876  progress 100 % (43 MB)
   75 01:24:24.411425  43 MB downloaded in 0.61 s (70.89 MB/s)
   76 01:24:24.411893  end: 1.2.1 http-download (duration 00:00:01) [common]
   78 01:24:24.412740  end: 1.2 download-retry (duration 00:00:01) [common]
   79 01:24:24.413014  start: 1.3 download-retry (timeout 00:09:59) [common]
   80 01:24:24.413280  start: 1.3.1 http-download (timeout 00:09:59) [common]
   81 01:24:24.413754  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/gcc-12/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
   82 01:24:24.414014  saving as /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/dtb/meson-sm1-s905d3-libretech-cc.dtb
   83 01:24:24.414222  total size: 53209 (0 MB)
   84 01:24:24.414431  No compression specified
   85 01:24:24.452477  progress  61 % (0 MB)
   86 01:24:24.453312  progress 100 % (0 MB)
   87 01:24:24.453837  0 MB downloaded in 0.04 s (1.28 MB/s)
   88 01:24:24.454315  end: 1.3.1 http-download (duration 00:00:00) [common]
   90 01:24:24.455114  end: 1.3 download-retry (duration 00:00:00) [common]
   91 01:24:24.455374  start: 1.4 download-retry (timeout 00:09:59) [common]
   92 01:24:24.455635  start: 1.4.1 http-download (timeout 00:09:59) [common]
   93 01:24:24.456117  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
   94 01:24:24.456366  saving as /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/nfsrootfs/full.rootfs.tar
   95 01:24:24.456570  total size: 107552908 (102 MB)
   96 01:24:24.456777  Using unxz to decompress xz
   97 01:24:24.494718  progress   0 % (0 MB)
   98 01:24:25.153226  progress   5 % (5 MB)
   99 01:24:25.887001  progress  10 % (10 MB)
  100 01:24:26.620011  progress  15 % (15 MB)
  101 01:24:27.385334  progress  20 % (20 MB)
  102 01:24:27.961570  progress  25 % (25 MB)
  103 01:24:28.585454  progress  30 % (30 MB)
  104 01:24:29.353803  progress  35 % (35 MB)
  105 01:24:29.713326  progress  40 % (41 MB)
  106 01:24:30.142717  progress  45 % (46 MB)
  107 01:24:30.848313  progress  50 % (51 MB)
  108 01:24:31.532713  progress  55 % (56 MB)
  109 01:24:32.294039  progress  60 % (61 MB)
  110 01:24:33.050001  progress  65 % (66 MB)
  111 01:24:33.782488  progress  70 % (71 MB)
  112 01:24:34.552469  progress  75 % (76 MB)
  113 01:24:35.245078  progress  80 % (82 MB)
  114 01:24:35.957343  progress  85 % (87 MB)
  115 01:24:36.694750  progress  90 % (92 MB)
  116 01:24:37.409771  progress  95 % (97 MB)
  117 01:24:38.161738  progress 100 % (102 MB)
  118 01:24:38.174737  102 MB downloaded in 13.72 s (7.48 MB/s)
  119 01:24:38.175440  end: 1.4.1 http-download (duration 00:00:14) [common]
  121 01:24:38.177130  end: 1.4 download-retry (duration 00:00:14) [common]
  122 01:24:38.177663  start: 1.5 download-retry (timeout 00:09:45) [common]
  123 01:24:38.178188  start: 1.5.1 http-download (timeout 00:09:45) [common]
  124 01:24:38.179112  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-110-gff7afaeca1a15/arm64/defconfig/gcc-12/modules.tar.xz
  125 01:24:38.179595  saving as /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/modules/modules.tar
  126 01:24:38.180036  total size: 11618152 (11 MB)
  127 01:24:38.180468  Using unxz to decompress xz
  128 01:24:38.218893  progress   0 % (0 MB)
  129 01:24:38.287425  progress   5 % (0 MB)
  130 01:24:38.363691  progress  10 % (1 MB)
  131 01:24:38.464677  progress  15 % (1 MB)
  132 01:24:38.557509  progress  20 % (2 MB)
  133 01:24:38.637287  progress  25 % (2 MB)
  134 01:24:38.712935  progress  30 % (3 MB)
  135 01:24:38.792193  progress  35 % (3 MB)
  136 01:24:38.865651  progress  40 % (4 MB)
  137 01:24:38.941503  progress  45 % (5 MB)
  138 01:24:39.026400  progress  50 % (5 MB)
  139 01:24:39.108845  progress  55 % (6 MB)
  140 01:24:39.189629  progress  60 % (6 MB)
  141 01:24:39.270714  progress  65 % (7 MB)
  142 01:24:39.351004  progress  70 % (7 MB)
  143 01:24:39.429010  progress  75 % (8 MB)
  144 01:24:39.512893  progress  80 % (8 MB)
  145 01:24:39.593517  progress  85 % (9 MB)
  146 01:24:39.677098  progress  90 % (10 MB)
  147 01:24:39.750811  progress  95 % (10 MB)
  148 01:24:39.828205  progress 100 % (11 MB)
  149 01:24:39.841456  11 MB downloaded in 1.66 s (6.67 MB/s)
  150 01:24:39.842194  end: 1.5.1 http-download (duration 00:00:02) [common]
  152 01:24:39.843828  end: 1.5 download-retry (duration 00:00:02) [common]
  153 01:24:39.844437  start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
  154 01:24:39.844977  start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
  155 01:24:49.794838  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/950744/extract-nfsrootfs-o1ltea5d
  156 01:24:49.795467  end: 1.6.1 extract-nfsrootfs (duration 00:00:10) [common]
  157 01:24:49.795787  start: 1.6.2 lava-overlay (timeout 00:09:34) [common]
  158 01:24:49.796549  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66
  159 01:24:49.797080  makedir: /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin
  160 01:24:49.797457  makedir: /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/tests
  161 01:24:49.797820  makedir: /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/results
  162 01:24:49.798209  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-add-keys
  163 01:24:49.798828  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-add-sources
  164 01:24:49.799419  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-background-process-start
  165 01:24:49.800023  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-background-process-stop
  166 01:24:49.800683  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-common-functions
  167 01:24:49.801251  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-echo-ipv4
  168 01:24:49.801797  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-install-packages
  169 01:24:49.802374  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-installed-packages
  170 01:24:49.802924  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-os-build
  171 01:24:49.803469  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-probe-channel
  172 01:24:49.804045  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-probe-ip
  173 01:24:49.804637  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-target-ip
  174 01:24:49.805218  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-target-mac
  175 01:24:49.805766  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-target-storage
  176 01:24:49.806312  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-case
  177 01:24:49.806860  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-event
  178 01:24:49.807397  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-feedback
  179 01:24:49.807933  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-raise
  180 01:24:49.808533  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-reference
  181 01:24:49.809129  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-runner
  182 01:24:49.809698  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-set
  183 01:24:49.810258  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-test-shell
  184 01:24:49.810852  Updating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-install-packages (oe)
  185 01:24:49.811448  Updating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/bin/lava-installed-packages (oe)
  186 01:24:49.811946  Creating /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/environment
  187 01:24:49.812424  LAVA metadata
  188 01:24:49.812711  - LAVA_JOB_ID=950744
  189 01:24:49.812944  - LAVA_DISPATCHER_IP=192.168.6.2
  190 01:24:49.813352  start: 1.6.2.1 ssh-authorize (timeout 00:09:34) [common]
  191 01:24:49.814492  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  192 01:24:49.814853  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:34) [common]
  193 01:24:49.815078  skipped lava-vland-overlay
  194 01:24:49.815333  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  195 01:24:49.815604  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:34) [common]
  196 01:24:49.815839  skipped lava-multinode-overlay
  197 01:24:49.816131  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  198 01:24:49.816407  start: 1.6.2.4 test-definition (timeout 00:09:34) [common]
  199 01:24:49.816683  Loading test definitions
  200 01:24:49.816987  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:34) [common]
  201 01:24:49.817220  Using /lava-950744 at stage 0
  202 01:24:49.818550  uuid=950744_1.6.2.4.1 testdef=None
  203 01:24:49.818905  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  204 01:24:49.819193  start: 1.6.2.4.2 test-overlay (timeout 00:09:34) [common]
  205 01:24:49.821126  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  207 01:24:49.821966  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:34) [common]
  208 01:24:49.824394  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  210 01:24:49.825275  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:34) [common]
  211 01:24:49.827580  runner path: /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/0/tests/0_dmesg test_uuid 950744_1.6.2.4.1
  212 01:24:49.828244  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  214 01:24:49.829052  Creating lava-test-runner.conf files
  215 01:24:49.829264  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/950744/lava-overlay-axdxkv66/lava-950744/0 for stage 0
  216 01:24:49.829652  - 0_dmesg
  217 01:24:49.830048  end: 1.6.2.4 test-definition (duration 00:00:00) [common]
  218 01:24:49.830347  start: 1.6.2.5 compress-overlay (timeout 00:09:34) [common]
  219 01:24:49.852423  end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
  220 01:24:49.852885  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:34) [common]
  221 01:24:49.853185  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  222 01:24:49.853499  end: 1.6.2 lava-overlay (duration 00:00:00) [common]
  223 01:24:49.853801  start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:34) [common]
  224 01:24:50.486130  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
  225 01:24:50.486608  start: 1.6.4 extract-modules (timeout 00:09:33) [common]
  226 01:24:50.486858  extracting modules file /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950744/extract-nfsrootfs-o1ltea5d
  227 01:24:51.910362  extracting modules file /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/modules/modules.tar to /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk
  228 01:24:53.442983  end: 1.6.4 extract-modules (duration 00:00:03) [common]
  229 01:24:53.443470  start: 1.6.5 apply-overlay-tftp (timeout 00:09:30) [common]
  230 01:24:53.443748  [common] Applying overlay to NFS
  231 01:24:53.443962  [common] Applying overlay /var/lib/lava/dispatcher/tmp/950744/compress-overlay-nyzs4d2q/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/950744/extract-nfsrootfs-o1ltea5d
  232 01:24:53.474696  end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
  233 01:24:53.475154  start: 1.6.6 prepare-kernel (timeout 00:09:30) [common]
  234 01:24:53.475428  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:30) [common]
  235 01:24:53.475661  Converting downloaded kernel to a uImage
  236 01:24:53.475976  mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/kernel/Image /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/kernel/uImage
  237 01:24:53.956236  output: Image Name:   
  238 01:24:53.956655  output: Created:      Thu Nov  7 01:24:53 2024
  239 01:24:53.956867  output: Image Type:   AArch64 Linux Kernel Image (uncompressed)
  240 01:24:53.957074  output: Data Size:    45713920 Bytes = 44642.50 KiB = 43.60 MiB
  241 01:24:53.957275  output: Load Address: 01080000
  242 01:24:53.957475  output: Entry Point:  01080000
  243 01:24:53.957674  output: 
  244 01:24:53.958004  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  245 01:24:53.958270  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  246 01:24:53.958536  start: 1.6.7 configure-preseed-file (timeout 00:09:30) [common]
  247 01:24:53.958787  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  248 01:24:53.959042  start: 1.6.8 compress-ramdisk (timeout 00:09:30) [common]
  249 01:24:53.959311  Building ramdisk /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk
  250 01:24:56.196871  >> 166825 blocks

  251 01:25:03.899819  Adding RAMdisk u-boot header.
  252 01:25:03.900301  mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk.cpio.gz.uboot
  253 01:25:04.165162  output: Image Name:   
  254 01:25:04.165589  output: Created:      Thu Nov  7 01:25:03 2024
  255 01:25:04.165806  output: Image Type:   AArch64 Linux RAMDisk Image (uncompressed)
  256 01:25:04.166012  output: Data Size:    23431711 Bytes = 22882.53 KiB = 22.35 MiB
  257 01:25:04.166216  output: Load Address: 00000000
  258 01:25:04.166447  output: Entry Point:  00000000
  259 01:25:04.166687  output: 
  260 01:25:04.167322  rename /var/lib/lava/dispatcher/tmp/950744/extract-overlay-ramdisk-zt5eb58m/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  261 01:25:04.167754  end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
  262 01:25:04.168152  end: 1.6 prepare-tftp-overlay (duration 00:00:24) [common]
  263 01:25:04.168803  start: 1.7 lxc-create-udev-rule-action (timeout 00:09:20) [common]
  264 01:25:04.169311  No LXC device requested
  265 01:25:04.169862  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  266 01:25:04.170423  start: 1.8 deploy-device-env (timeout 00:09:19) [common]
  267 01:25:04.170972  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  268 01:25:04.171439  Checking files for TFTP limit of 4294967296 bytes.
  269 01:25:04.174723  end: 1 tftp-deploy (duration 00:00:41) [common]
  270 01:25:04.175426  start: 2 uboot-action (timeout 00:05:00) [common]
  271 01:25:04.176083  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  272 01:25:04.176678  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  273 01:25:04.177266  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  274 01:25:04.177875  Using kernel file from prepare-kernel: 950744/tftp-deploy-ez96rj99/kernel/uImage
  275 01:25:04.178588  substitutions:
  276 01:25:04.179056  - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
  277 01:25:04.179520  - {DTB_ADDR}: 0x01070000
  278 01:25:04.180001  - {DTB}: 950744/tftp-deploy-ez96rj99/dtb/meson-sm1-s905d3-libretech-cc.dtb
  279 01:25:04.180470  - {INITRD}: 950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  280 01:25:04.180924  - {KERNEL_ADDR}: 0x01080000
  281 01:25:04.181369  - {KERNEL}: 950744/tftp-deploy-ez96rj99/kernel/uImage
  282 01:25:04.181814  - {LAVA_MAC}: None
  283 01:25:04.182309  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/950744/extract-nfsrootfs-o1ltea5d
  284 01:25:04.182767  - {NFS_SERVER_IP}: 192.168.6.2
  285 01:25:04.183209  - {PRESEED_CONFIG}: None
  286 01:25:04.183649  - {PRESEED_LOCAL}: None
  287 01:25:04.184171  - {RAMDISK_ADDR}: 0x08000000
  288 01:25:04.184632  - {RAMDISK}: 950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  289 01:25:04.185087  - {ROOT_PART}: None
  290 01:25:04.185535  - {ROOT}: None
  291 01:25:04.185980  - {SERVER_IP}: 192.168.6.2
  292 01:25:04.186420  - {TEE_ADDR}: 0x83000000
  293 01:25:04.186863  - {TEE}: None
  294 01:25:04.187305  Parsed boot commands:
  295 01:25:04.187736  - setenv autoload no
  296 01:25:04.188254  - setenv initrd_high 0xffffffff
  297 01:25:04.188702  - setenv fdt_high 0xffffffff
  298 01:25:04.189144  - dhcp
  299 01:25:04.189583  - setenv serverip 192.168.6.2
  300 01:25:04.190019  - tftpboot 0x01080000 950744/tftp-deploy-ez96rj99/kernel/uImage
  301 01:25:04.190459  - tftpboot 0x08000000 950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  302 01:25:04.190899  - tftpboot 0x01070000 950744/tftp-deploy-ez96rj99/dtb/meson-sm1-s905d3-libretech-cc.dtb
  303 01:25:04.191340  - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/950744/extract-nfsrootfs-o1ltea5d,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  304 01:25:04.191793  - bootm 0x01080000 0x08000000 0x01070000
  305 01:25:04.192413  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  307 01:25:04.194126  start: 2.3 connect-device (timeout 00:05:00) [common]
  308 01:25:04.194619  [common] connect-device Connecting to device using 'telnet conserv1 3008'
  309 01:25:04.210492  Setting prompt string to ['lava-test: # ']
  310 01:25:04.212175  end: 2.3 connect-device (duration 00:00:00) [common]
  311 01:25:04.212873  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  312 01:25:04.213505  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  313 01:25:04.214118  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  314 01:25:04.215379  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
  315 01:25:04.256503  >> OK - accepted request

  316 01:25:04.258390  Returned 0 in 0 seconds
  317 01:25:04.359256  end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
  319 01:25:04.360636  end: 2.4.1 reset-device (duration 00:00:00) [common]
  320 01:25:04.361121  start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
  321 01:25:04.361531  Setting prompt string to ['Hit any key to stop autoboot']
  322 01:25:04.361895  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  323 01:25:04.363044  Trying 192.168.56.21...
  324 01:25:04.363421  Connected to conserv1.
  325 01:25:04.363711  Escape character is '^]'.
  326 01:25:04.364019  
  327 01:25:04.364314  ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
  328 01:25:04.364593  
  329 01:25:11.940849  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  330 01:25:11.941463  bl2_stage_init 0x01
  331 01:25:11.941889  bl2_stage_init 0x81
  332 01:25:11.946444  hw id: 0x0000 - pwm id 0x01
  333 01:25:11.946919  bl2_stage_init 0xc1
  334 01:25:11.952173  bl2_stage_init 0x02
  335 01:25:11.952796  
  336 01:25:11.953365  L0:00000000
  337 01:25:11.953920  L1:00000703
  338 01:25:11.954440  L2:00008067
  339 01:25:11.954977  L3:15000000
  340 01:25:11.957566  S1:00000000
  341 01:25:11.958035  B2:20282000
  342 01:25:11.958447  B1:a0f83180
  343 01:25:11.958850  
  344 01:25:11.959257  TE: 69584
  345 01:25:11.959656  
  346 01:25:11.963208  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  347 01:25:11.963681  
  348 01:25:11.968711  Board ID = 1
  349 01:25:11.969203  Set cpu clk to 24M
  350 01:25:11.969613  Set clk81 to 24M
  351 01:25:11.974287  Use GP1_pll as DSU clk.
  352 01:25:11.974746  DSU clk: 1200 Mhz
  353 01:25:11.975151  CPU clk: 1200 MHz
  354 01:25:11.979948  Set clk81 to 166.6M
  355 01:25:11.985477  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  356 01:25:11.985944  board id: 1
  357 01:25:11.992705  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  358 01:25:12.003350  fw parse done
  359 01:25:12.009315  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  360 01:25:12.051936  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  361 01:25:12.062874  PIEI prepare done
  362 01:25:12.063389  fastboot data load
  363 01:25:12.063838  fastboot data verify
  364 01:25:12.068460  verify result: 266
  365 01:25:12.074117  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  366 01:25:12.074603  LPDDR4 probe
  367 01:25:12.075011  ddr clk to 1584MHz
  368 01:25:12.082055  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  369 01:25:12.119278  
  370 01:25:12.119783  dmc_version 0001
  371 01:25:12.125986  Check phy result
  372 01:25:12.131867  INFO : End of CA training
  373 01:25:12.132358  INFO : End of initialization
  374 01:25:12.137500  INFO : Training has run successfully!
  375 01:25:12.137957  Check phy result
  376 01:25:12.143121  INFO : End of initialization
  377 01:25:12.143577  INFO : End of read enable training
  378 01:25:12.148655  INFO : End of fine write leveling
  379 01:25:12.154294  INFO : End of Write leveling coarse delay
  380 01:25:12.154915  INFO : Training has run successfully!
  381 01:25:12.155469  Check phy result
  382 01:25:12.159853  INFO : End of initialization
  383 01:25:12.160376  INFO : End of read dq deskew training
  384 01:25:12.165493  INFO : End of MPR read delay center optimization
  385 01:25:12.171112  INFO : End of write delay center optimization
  386 01:25:12.176678  INFO : End of read delay center optimization
  387 01:25:12.177137  INFO : End of max read latency training
  388 01:25:12.182297  INFO : Training has run successfully!
  389 01:25:12.182756  1D training succeed
  390 01:25:12.190444  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  391 01:25:12.239085  Check phy result
  392 01:25:12.239585  INFO : End of initialization
  393 01:25:12.261459  INFO : End of 2D read delay Voltage center optimization
  394 01:25:12.280646  INFO : End of 2D read delay Voltage center optimization
  395 01:25:12.332496  INFO : End of 2D write delay Voltage center optimization
  396 01:25:12.381690  INFO : End of 2D write delay Voltage center optimization
  397 01:25:12.387286  INFO : Training has run successfully!
  398 01:25:12.387749  
  399 01:25:12.388214  channel==0
  400 01:25:12.392895  RxClkDly_Margin_A0==78 ps 8
  401 01:25:12.393371  TxDqDly_Margin_A0==98 ps 10
  402 01:25:12.398546  RxClkDly_Margin_A1==88 ps 9
  403 01:25:12.399004  TxDqDly_Margin_A1==98 ps 10
  404 01:25:12.399417  TrainedVREFDQ_A0==74
  405 01:25:12.404168  TrainedVREFDQ_A1==74
  406 01:25:12.404813  VrefDac_Margin_A0==23
  407 01:25:12.405370  DeviceVref_Margin_A0==40
  408 01:25:12.409688  VrefDac_Margin_A1==23
  409 01:25:12.410155  DeviceVref_Margin_A1==40
  410 01:25:12.410565  
  411 01:25:12.410976  
  412 01:25:12.415253  channel==1
  413 01:25:12.415726  RxClkDly_Margin_A0==78 ps 8
  414 01:25:12.416188  TxDqDly_Margin_A0==98 ps 10
  415 01:25:12.420976  RxClkDly_Margin_A1==78 ps 8
  416 01:25:12.421641  TxDqDly_Margin_A1==88 ps 9
  417 01:25:12.426657  TrainedVREFDQ_A0==78
  418 01:25:12.427305  TrainedVREFDQ_A1==75
  419 01:25:12.427850  VrefDac_Margin_A0==22
  420 01:25:12.432233  DeviceVref_Margin_A0==36
  421 01:25:12.432865  VrefDac_Margin_A1==20
  422 01:25:12.437686  DeviceVref_Margin_A1==39
  423 01:25:12.438314  
  424 01:25:12.438874   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  425 01:25:12.439413  
  426 01:25:12.471355  soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000014 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000019 00000015 00000017 00000015 00000016 00000017 00000018 00000019 00000018 00000018 0000001c 00000017 00000015 00000017 dram_vref_reg_value 0x 00000061
  427 01:25:12.472189  2D training succeed
  428 01:25:12.476991  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  429 01:25:12.482421  auto size-- 65535DDR cs0 size: 2048MB
  430 01:25:12.483059  DDR cs1 size: 2048MB
  431 01:25:12.488157  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  432 01:25:12.488788  cs0 DataBus test pass
  433 01:25:12.493618  cs1 DataBus test pass
  434 01:25:12.494129  cs0 AddrBus test pass
  435 01:25:12.494583  cs1 AddrBus test pass
  436 01:25:12.495004  
  437 01:25:12.499154  100bdlr_step_size ps== 478
  438 01:25:12.499650  result report
  439 01:25:12.504790  boot times 0Enable ddr reg access
  440 01:25:12.510084  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  441 01:25:12.523816  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  442 01:25:13.178926  bl2z: ptr: 05129330, size: 00001e40
  443 01:25:13.185339  0.0;M3 CHK:0;cm4_sp_mode 0
  444 01:25:13.185832  MVN_1=0x00000000
  445 01:25:13.186243  MVN_2=0x00000000
  446 01:25:13.196805  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  447 01:25:13.197311  OPS=0x04
  448 01:25:13.197740  ring efuse init
  449 01:25:13.202444  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  450 01:25:13.202931  [0.017310 Inits done]
  451 01:25:13.203337  secure task start!
  452 01:25:13.210031  high task start!
  453 01:25:13.210502  low task start!
  454 01:25:13.210908  run into bl31
  455 01:25:13.218638  NOTICE:  BL31: v1.3(release):4fc40b1
  456 01:25:13.226466  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  457 01:25:13.226943  NOTICE:  BL31: G12A normal boot!
  458 01:25:13.241949  NOTICE:  BL31: BL33 decompress pass
  459 01:25:13.247708  ERROR:   Error initializing runtime service opteed_fast
  460 01:25:15.991328  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  461 01:25:15.991936  bl2_stage_init 0x01
  462 01:25:15.992390  bl2_stage_init 0x81
  463 01:25:15.996965  hw id: 0x0000 - pwm id 0x01
  464 01:25:15.997458  bl2_stage_init 0xc1
  465 01:25:16.002638  bl2_stage_init 0x02
  466 01:25:16.003166  
  467 01:25:16.003599  L0:00000000
  468 01:25:16.004028  L1:00000703
  469 01:25:16.004429  L2:00008067
  470 01:25:16.004817  L3:15000000
  471 01:25:16.008105  S1:00000000
  472 01:25:16.008593  B2:20282000
  473 01:25:16.008987  B1:a0f83180
  474 01:25:16.009371  
  475 01:25:16.009755  TE: 68915
  476 01:25:16.010142  
  477 01:25:16.013689  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  478 01:25:16.014158  
  479 01:25:16.019272  Board ID = 1
  480 01:25:16.019724  Set cpu clk to 24M
  481 01:25:16.020155  Set clk81 to 24M
  482 01:25:16.024923  Use GP1_pll as DSU clk.
  483 01:25:16.025386  DSU clk: 1200 Mhz
  484 01:25:16.025773  CPU clk: 1200 MHz
  485 01:25:16.030599  Set clk81 to 166.6M
  486 01:25:16.036110  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  487 01:25:16.036582  board id: 1
  488 01:25:16.043284  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  489 01:25:16.053972  fw parse done
  490 01:25:16.059919  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  491 01:25:16.101688  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  492 01:25:16.113492  PIEI prepare done
  493 01:25:16.113968  fastboot data load
  494 01:25:16.114362  fastboot data verify
  495 01:25:16.119054  verify result: 266
  496 01:25:16.124681  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  497 01:25:16.125173  LPDDR4 probe
  498 01:25:16.125564  ddr clk to 1584MHz
  499 01:25:16.132729  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  500 01:25:16.169873  
  501 01:25:16.170367  dmc_version 0001
  502 01:25:16.176548  Check phy result
  503 01:25:16.182549  INFO : End of CA training
  504 01:25:16.183056  INFO : End of initialization
  505 01:25:16.188104  INFO : Training has run successfully!
  506 01:25:16.188574  Check phy result
  507 01:25:16.193696  INFO : End of initialization
  508 01:25:16.194158  INFO : End of read enable training
  509 01:25:16.199282  INFO : End of fine write leveling
  510 01:25:16.204879  INFO : End of Write leveling coarse delay
  511 01:25:16.205348  INFO : Training has run successfully!
  512 01:25:16.205758  Check phy result
  513 01:25:16.210525  INFO : End of initialization
  514 01:25:16.211013  INFO : End of read dq deskew training
  515 01:25:16.216113  INFO : End of MPR read delay center optimization
  516 01:25:16.221675  INFO : End of write delay center optimization
  517 01:25:16.227293  INFO : End of read delay center optimization
  518 01:25:16.227764  INFO : End of max read latency training
  519 01:25:16.232870  INFO : Training has run successfully!
  520 01:25:16.233333  1D training succeed
  521 01:25:16.242019  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  522 01:25:16.289751  Check phy result
  523 01:25:16.290274  INFO : End of initialization
  524 01:25:16.312098  INFO : End of 2D read delay Voltage center optimization
  525 01:25:16.331200  INFO : End of 2D read delay Voltage center optimization
  526 01:25:16.383062  INFO : End of 2D write delay Voltage center optimization
  527 01:25:16.432279  INFO : End of 2D write delay Voltage center optimization
  528 01:25:16.437784  INFO : Training has run successfully!
  529 01:25:16.438260  
  530 01:25:16.438676  channel==0
  531 01:25:16.443396  RxClkDly_Margin_A0==78 ps 8
  532 01:25:16.443883  TxDqDly_Margin_A0==88 ps 9
  533 01:25:16.449016  RxClkDly_Margin_A1==78 ps 8
  534 01:25:16.449488  TxDqDly_Margin_A1==98 ps 10
  535 01:25:16.449898  TrainedVREFDQ_A0==74
  536 01:25:16.454676  TrainedVREFDQ_A1==74
  537 01:25:16.455158  VrefDac_Margin_A0==24
  538 01:25:16.455565  DeviceVref_Margin_A0==40
  539 01:25:16.460198  VrefDac_Margin_A1==23
  540 01:25:16.460662  DeviceVref_Margin_A1==40
  541 01:25:16.461063  
  542 01:25:16.461460  
  543 01:25:16.461855  channel==1
  544 01:25:16.465835  RxClkDly_Margin_A0==78 ps 8
  545 01:25:16.466297  TxDqDly_Margin_A0==98 ps 10
  546 01:25:16.471420  RxClkDly_Margin_A1==78 ps 8
  547 01:25:16.471886  TxDqDly_Margin_A1==88 ps 9
  548 01:25:16.477013  TrainedVREFDQ_A0==78
  549 01:25:16.477478  TrainedVREFDQ_A1==78
  550 01:25:16.477883  VrefDac_Margin_A0==22
  551 01:25:16.482690  DeviceVref_Margin_A0==36
  552 01:25:16.483161  VrefDac_Margin_A1==22
  553 01:25:16.488250  DeviceVref_Margin_A1==36
  554 01:25:16.488741  
  555 01:25:16.489151   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  556 01:25:16.489555  
  557 01:25:16.521758  soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000016 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000016 dram_vref_reg_value 0x 00000061
  558 01:25:16.522365  2D training succeed
  559 01:25:16.527443  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  560 01:25:16.533062  auto size-- 65535DDR cs0 size: 2048MB
  561 01:25:16.533598  DDR cs1 size: 2048MB
  562 01:25:16.538739  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  563 01:25:16.539241  cs0 DataBus test pass
  564 01:25:16.544307  cs1 DataBus test pass
  565 01:25:16.544851  cs0 AddrBus test pass
  566 01:25:16.545266  cs1 AddrBus test pass
  567 01:25:16.545667  
  568 01:25:16.549876  100bdlr_step_size ps== 478
  569 01:25:16.550426  result report
  570 01:25:16.555495  boot times 0Enable ddr reg access
  571 01:25:16.560717  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  572 01:25:16.574431  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  573 01:25:17.229343  bl2z: ptr: 05129330, size: 00001e40
  574 01:25:17.236962  0.0;M3 CHK:0;cm4_sp_mode 0
  575 01:25:17.237499  MVN_1=0x00000000
  576 01:25:17.237956  MVN_2=0x00000000
  577 01:25:17.248418  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  578 01:25:17.248924  OPS=0x04
  579 01:25:17.249342  ring efuse init
  580 01:25:17.254037  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  581 01:25:17.254538  [0.017319 Inits done]
  582 01:25:17.254973  secure task start!
  583 01:25:17.261573  high task start!
  584 01:25:17.262059  low task start!
  585 01:25:17.262508  run into bl31
  586 01:25:17.270169  NOTICE:  BL31: v1.3(release):4fc40b1
  587 01:25:17.277999  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  588 01:25:17.278656  NOTICE:  BL31: G12A normal boot!
  589 01:25:17.293500  NOTICE:  BL31: BL33 decompress pass
  590 01:25:17.299187  ERROR:   Error initializing runtime service opteed_fast
  591 01:25:18.690099  SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
  592 01:25:18.690853  bl2_stage_init 0x01
  593 01:25:18.691409  bl2_stage_init 0x81
  594 01:25:18.695731  hw id: 0x0000 - pwm id 0x01
  595 01:25:18.696384  bl2_stage_init 0xc1
  596 01:25:18.701259  bl2_stage_init 0x02
  597 01:25:18.701699  
  598 01:25:18.701942  L0:00000000
  599 01:25:18.702162  L1:00000703
  600 01:25:18.702369  L2:00008067
  601 01:25:18.702575  L3:15000000
  602 01:25:18.706872  S1:00000000
  603 01:25:18.707337  B2:20282000
  604 01:25:18.707751  B1:a0f83180
  605 01:25:18.708192  
  606 01:25:18.708598  TE: 68881
  607 01:25:18.708998  
  608 01:25:18.712424  BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
  609 01:25:18.713053  
  610 01:25:18.718032  Board ID = 1
  611 01:25:18.718636  Set cpu clk to 24M
  612 01:25:18.719178  Set clk81 to 24M
  613 01:25:18.723611  Use GP1_pll as DSU clk.
  614 01:25:18.724261  DSU clk: 1200 Mhz
  615 01:25:18.724809  CPU clk: 1200 MHz
  616 01:25:18.729276  Set clk81 to 166.6M
  617 01:25:18.734827  DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
  618 01:25:18.735416  board id: 1
  619 01:25:18.742056  Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
  620 01:25:18.752774  fw parse done
  621 01:25:18.758683  Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
  622 01:25:18.801277  Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
  623 01:25:18.812150  PIEI prepare done
  624 01:25:18.812701  fastboot data load
  625 01:25:18.813194  fastboot data verify
  626 01:25:18.817722  verify result: 266
  627 01:25:18.823362  Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
  628 01:25:18.823912  LPDDR4 probe
  629 01:25:18.824455  ddr clk to 1584MHz
  630 01:25:18.831439  Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
  631 01:25:18.868674  
  632 01:25:18.869267  dmc_version 0001
  633 01:25:18.875315  Check phy result
  634 01:25:18.881164  INFO : End of CA training
  635 01:25:18.881728  INFO : End of initialization
  636 01:25:18.886728  INFO : Training has run successfully!
  637 01:25:18.887282  Check phy result
  638 01:25:18.892352  INFO : End of initialization
  639 01:25:18.892893  INFO : End of read enable training
  640 01:25:18.895673  INFO : End of fine write leveling
  641 01:25:18.901261  INFO : End of Write leveling coarse delay
  642 01:25:18.906919  INFO : Training has run successfully!
  643 01:25:18.907675  Check phy result
  644 01:25:18.908520  INFO : End of initialization
  645 01:25:18.912628  INFO : End of read dq deskew training
  646 01:25:18.918554  INFO : End of MPR read delay center optimization
  647 01:25:18.919349  INFO : End of write delay center optimization
  648 01:25:18.923757  INFO : End of read delay center optimization
  649 01:25:18.929541  INFO : End of max read latency training
  650 01:25:18.930107  INFO : Training has run successfully!
  651 01:25:18.934940  1D training succeed
  652 01:25:18.940882  Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
  653 01:25:18.988617  Check phy result
  654 01:25:18.989432  INFO : End of initialization
  655 01:25:19.010899  INFO : End of 2D read delay Voltage center optimization
  656 01:25:19.030146  INFO : End of 2D read delay Voltage center optimization
  657 01:25:19.081890  INFO : End of 2D write delay Voltage center optimization
  658 01:25:19.131057  INFO : End of 2D write delay Voltage center optimization
  659 01:25:19.136527  INFO : Training has run successfully!
  660 01:25:19.136969  
  661 01:25:19.137285  channel==0
  662 01:25:19.142674  RxClkDly_Margin_A0==88 ps 9
  663 01:25:19.143052  TxDqDly_Margin_A0==98 ps 10
  664 01:25:19.147706  RxClkDly_Margin_A1==88 ps 9
  665 01:25:19.148045  TxDqDly_Margin_A1==98 ps 10
  666 01:25:19.148452  TrainedVREFDQ_A0==74
  667 01:25:19.153311  TrainedVREFDQ_A1==75
  668 01:25:19.153647  VrefDac_Margin_A0==23
  669 01:25:19.154098  DeviceVref_Margin_A0==40
  670 01:25:19.158944  VrefDac_Margin_A1==23
  671 01:25:19.159268  DeviceVref_Margin_A1==39
  672 01:25:19.159514  
  673 01:25:19.159772  
  674 01:25:19.164398  channel==1
  675 01:25:19.164716  RxClkDly_Margin_A0==78 ps 8
  676 01:25:19.164956  TxDqDly_Margin_A0==98 ps 10
  677 01:25:19.170069  RxClkDly_Margin_A1==78 ps 8
  678 01:25:19.170388  TxDqDly_Margin_A1==78 ps 8
  679 01:25:19.175578  TrainedVREFDQ_A0==78
  680 01:25:19.175889  TrainedVREFDQ_A1==75
  681 01:25:19.176331  VrefDac_Margin_A0==22
  682 01:25:19.181366  DeviceVref_Margin_A0==36
  683 01:25:19.181927  VrefDac_Margin_A1==22
  684 01:25:19.186847  DeviceVref_Margin_A1==39
  685 01:25:19.187155  
  686 01:25:19.187504   dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 
  687 01:25:19.188100  
  688 01:25:19.220557  soc_vref_reg_value 0x 00000019 00000018 00000018 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000018 00000017 00000018 00000018 00000017 00000019 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
  689 01:25:19.220964  2D training succeed
  690 01:25:19.226152  aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
  691 01:25:19.231802  auto size-- 65535DDR cs0 size: 2048MB
  692 01:25:19.232198  DDR cs1 size: 2048MB
  693 01:25:19.237388  DMC_DDR_CTRL: 00e00024DDR size: 3928MB
  694 01:25:19.237713  cs0 DataBus test pass
  695 01:25:19.242785  cs1 DataBus test pass
  696 01:25:19.243114  cs0 AddrBus test pass
  697 01:25:19.243351  cs1 AddrBus test pass
  698 01:25:19.243573  
  699 01:25:19.248320  100bdlr_step_size ps== 478
  700 01:25:19.248651  result report
  701 01:25:19.254131  boot times 0Enable ddr reg access
  702 01:25:19.259369  Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
  703 01:25:19.273091  Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
  704 01:25:19.927692  bl2z: ptr: 05129330, size: 00001e40
  705 01:25:19.935189  0.0;M3 CHK:0;cm4_sp_mode 0
  706 01:25:19.935760  MVN_1=0x00000000
  707 01:25:19.936259  MVN_2=0x00000000
  708 01:25:19.946641  [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
  709 01:25:19.947220  OPS=0x04
  710 01:25:19.947708  ring efuse init
  711 01:25:19.952261  2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50 
  712 01:25:19.952810  [0.017319 Inits done]
  713 01:25:19.953287  secure task start!
  714 01:25:19.960261  high task start!
  715 01:25:19.960837  low task start!
  716 01:25:19.961310  run into bl31
  717 01:25:19.968876  NOTICE:  BL31: v1.3(release):4fc40b1
  718 01:25:19.976636  NOTICE:  BL31: Built : 15:57:33, May 22 2019
  719 01:25:19.977216  NOTICE:  BL31: G12A normal boot!
  720 01:25:19.992369  NOTICE:  BL31: BL33 decompress pass
  721 01:25:19.997952  ERROR:   Error initializing runtime service opteed_fast
  722 01:25:20.792362  
  723 01:25:20.793030  
  724 01:25:20.797637  U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
  725 01:25:20.798203  
  726 01:25:20.801119  Model: Libre Computer AML-S905D3-CC Solitude
  727 01:25:20.947972  SoC:   Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
  728 01:25:20.963346  DRAM:  2 GiB (effective 3.8 GiB)
  729 01:25:21.064287  Core:  406 devices, 33 uclasses, devicetree: separate
  730 01:25:21.070352  WDT:   Not starting watchdog@f0d0
  731 01:25:21.095218  MMC:   mmc@ffe05000: 1, mmc@ffe07000: 0
  732 01:25:21.107739  Loading Environment from FAT... Card did not respond to voltage select! : -110
  733 01:25:21.112305  ** Bad device specification mmc 0 **
  734 01:25:21.122488  Card did not respond to voltage select! : -110
  735 01:25:21.129437  ** Bad device specification mmc 0 **
  736 01:25:21.129785  Couldn't find partition mmc 0
  737 01:25:21.138450  Card did not respond to voltage select! : -110
  738 01:25:21.143949  ** Bad device specification mmc 0 **
  739 01:25:21.144302  Couldn't find partition mmc 0
  740 01:25:21.148087  Error: could not access storage.
  741 01:25:21.446464  Net:   eth0: ethernet@ff3f0000
  742 01:25:21.446865  starting USB...
  743 01:25:21.691108  Bus usb@ff500000: Register 3000140 NbrPorts 3
  744 01:25:21.691496  Starting the controller
  745 01:25:21.698079  USB XHCI 1.10
  746 01:25:23.251789  scanning bus usb@ff500000 for devices... 3 USB Device(s) found
  747 01:25:23.260055         scanning usb for storage devices... 0 Storage Device(s) found
  749 01:25:23.311289  Hit any key to stop autoboot:  1 
  750 01:25:23.312114  end: 2.4.2 bootloader-interrupt (duration 00:00:19) [common]
  751 01:25:23.312502  start: 2.4.3 bootloader-commands (timeout 00:04:41) [common]
  752 01:25:23.312779  Setting prompt string to ['=>']
  753 01:25:23.313051  bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:41)
  754 01:25:23.326042   0 
  755 01:25:23.326708  Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
  757 01:25:23.427530  => setenv autoload no
  758 01:25:23.428274  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  759 01:25:23.432366  setenv autoload no
  761 01:25:23.533379  => setenv initrd_high 0xffffffff
  762 01:25:23.534029  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  763 01:25:23.538240  setenv initrd_high 0xffffffff
  765 01:25:23.639218  => setenv fdt_high 0xffffffff
  766 01:25:23.639841  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:41)
  767 01:25:23.643905  setenv fdt_high 0xffffffff
  769 01:25:23.744938  => dhcp
  770 01:25:23.745624  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  771 01:25:23.749580  dhcp
  772 01:25:24.405218  ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
  773 01:25:24.405638  Speed: 1000, full duplex
  774 01:25:24.405877  BOOTP broadcast 1
  775 01:25:24.413905  DHCP client bound to address 192.168.6.21 (8 ms)
  777 01:25:24.515083  => setenv serverip 192.168.6.2
  778 01:25:24.515793  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  779 01:25:24.520171  setenv serverip 192.168.6.2
  781 01:25:24.621224  => tftpboot 0x01080000 950744/tftp-deploy-ez96rj99/kernel/uImage
  782 01:25:24.621839  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
  783 01:25:24.628440  tftpboot 0x01080000 950744/tftp-deploy-ez96rj99/kernel/uImage
  784 01:25:24.628919  Speed: 1000, full duplex
  785 01:25:24.629329  Using ethernet@ff3f0000 device
  786 01:25:24.634349  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  787 01:25:24.639572  Filename '950744/tftp-deploy-ez96rj99/kernel/uImage'.
  788 01:25:24.643523  Load address: 0x1080000
  789 01:25:27.974252  Loading: *##################################################  43.6 MiB
  790 01:25:27.974841  	 13.1 MiB/s
  791 01:25:27.975147  done
  792 01:25:27.978542  Bytes transferred = 45713984 (2b98a40 hex)
  794 01:25:28.080048  => tftpboot 0x08000000 950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  795 01:25:28.080607  bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:36)
  796 01:25:28.087253  tftpboot 0x08000000 950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot
  797 01:25:28.087795  Speed: 1000, full duplex
  798 01:25:28.088234  Using ethernet@ff3f0000 device
  799 01:25:28.092786  TFTP from server 192.168.6.2; our IP address is 192.168.6.21
  800 01:25:28.102518  Filename '950744/tftp-deploy-ez96rj99/ramdisk/ramdisk.cpio.gz.uboot'.
  801 01:25:28.102981  Load address: 0x8000000
  802 01:25:32.242737  Loading: *################################### UDP wrong checksum 00000007 00000600
  803 01:25:35.329954  T ############## UDP wrong checksum 00000005 00001eef
  804 01:25:40.332303  T  UDP wrong checksum 00000005 00001eef
  805 01:25:42.499140   UDP wrong checksum 000000ff 0000156b
  806 01:25:42.539663   UDP wrong checksum 000000ff 0000a65d
  807 01:25:50.334539  T T  UDP wrong checksum 00000005 00001eef
  808 01:26:10.338534  T T T T  UDP wrong checksum 00000005 00001eef
  809 01:26:22.302003  T T  UDP wrong checksum 000000ff 00009323
  810 01:26:22.341239   UDP wrong checksum 000000ff 00002d16
  811 01:26:25.341675  
  812 01:26:25.342422  Retry count exceeded; starting again
  814 01:26:25.344393  end: 2.4.3 bootloader-commands (duration 00:01:02) [common]
  817 01:26:25.346762  end: 2.4 uboot-commands (duration 00:01:21) [common]
  819 01:26:25.348556  uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
  821 01:26:25.349977  end: 2 uboot-action (duration 00:01:21) [common]
  823 01:26:25.352023  Cleaning after the job
  824 01:26:25.352757  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/ramdisk
  825 01:26:25.354736  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/kernel
  826 01:26:25.403428  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/dtb
  827 01:26:25.404384  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/nfsrootfs
  828 01:26:25.557052  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/950744/tftp-deploy-ez96rj99/modules
  829 01:26:25.576096  start: 4.1 power-off (timeout 00:00:30) [common]
  830 01:26:25.576729  Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
  831 01:26:25.609009  >> OK - accepted request

  832 01:26:25.611037  Returned 0 in 0 seconds
  833 01:26:25.711757  end: 4.1 power-off (duration 00:00:00) [common]
  835 01:26:25.712658  start: 4.2 read-feedback (timeout 00:10:00) [common]
  836 01:26:25.713282  Listened to connection for namespace 'common' for up to 1s
  837 01:26:26.714208  Finalising connection for namespace 'common'
  838 01:26:26.714636  Disconnecting from shell: Finalise
  839 01:26:26.714895  => 
  840 01:26:26.815451  end: 4.2 read-feedback (duration 00:00:01) [common]
  841 01:26:26.815764  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/950744
  842 01:26:28.489166  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/950744
  843 01:26:28.489781  InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.