Boot log: meson-sm1-s905d3-libretech-cc
- Warnings: 0
- Kernel Warnings: 0
- Errors: 2
- Boot result: UNKNOWN
- Kernel Errors: 0
1 19:52:46.288028 lava-dispatcher, installed at version: 2024.01
2 19:52:46.288817 start: 0 validate
3 19:52:46.289295 Start time: 2024-11-07 19:52:46.289265+00:00 (UTC)
4 19:52:46.289840 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
5 19:52:46.290402 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Finitrd.cpio.gz exists
6 19:52:46.330694 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
7 19:52:46.331271 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-114-g80fb25341631b%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fkernel%2FImage exists
8 19:52:46.366389 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
9 19:52:46.367112 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-114-g80fb25341631b%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fdtbs%2Famlogic%2Fmeson-sm1-s905d3-libretech-cc.dtb exists
10 19:52:46.399767 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
11 19:52:46.400367 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fimages%2Frootfs%2Fdebian%2Fbookworm%2F20240313.0%2Farm64%2Ffull.rootfs.tar.xz exists
12 19:52:46.434817 Using caching service: 'http://192.168.56.18:8001/api/v1/fetch?url=%s'
13 19:52:46.435304 Validating that http://192.168.56.18:8001/api/v1/fetch?url=http%3A%2F%2Fstorage.kernelci.org%2Fmainline%2Fmaster%2Fv6.12-rc6-114-g80fb25341631b%2Farm64%2Fdefconfig%2BCONFIG_ARM64_64K_PAGES%3Dy%2Fclang-15%2Fmodules.tar.xz exists
14 19:52:46.484165 validate duration: 0.20
16 19:52:46.485007 start: 1 tftp-deploy (timeout 00:10:00) [common]
17 19:52:46.485344 start: 1.1 download-retry (timeout 00:10:00) [common]
18 19:52:46.485647 start: 1.1.1 http-download (timeout 00:10:00) [common]
19 19:52:46.486253 Not decompressing ramdisk as can be used compressed.
20 19:52:46.486718 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/initrd.cpio.gz
21 19:52:46.486996 saving as /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/ramdisk/initrd.cpio.gz
22 19:52:46.487280 total size: 5628182 (5 MB)
23 19:52:46.528519 progress 0 % (0 MB)
24 19:52:46.536516 progress 5 % (0 MB)
25 19:52:46.544689 progress 10 % (0 MB)
26 19:52:46.551738 progress 15 % (0 MB)
27 19:52:46.558217 progress 20 % (1 MB)
28 19:52:46.562035 progress 25 % (1 MB)
29 19:52:46.566297 progress 30 % (1 MB)
30 19:52:46.570612 progress 35 % (1 MB)
31 19:52:46.574610 progress 40 % (2 MB)
32 19:52:46.578968 progress 45 % (2 MB)
33 19:52:46.582724 progress 50 % (2 MB)
34 19:52:46.587024 progress 55 % (2 MB)
35 19:52:46.591267 progress 60 % (3 MB)
36 19:52:46.595128 progress 65 % (3 MB)
37 19:52:46.599211 progress 70 % (3 MB)
38 19:52:46.603060 progress 75 % (4 MB)
39 19:52:46.607293 progress 80 % (4 MB)
40 19:52:46.610991 progress 85 % (4 MB)
41 19:52:46.615164 progress 90 % (4 MB)
42 19:52:46.619244 progress 95 % (5 MB)
43 19:52:46.622767 progress 100 % (5 MB)
44 19:52:46.623460 5 MB downloaded in 0.14 s (39.42 MB/s)
45 19:52:46.624038 end: 1.1.1 http-download (duration 00:00:00) [common]
47 19:52:46.624936 end: 1.1 download-retry (duration 00:00:00) [common]
48 19:52:46.625236 start: 1.2 download-retry (timeout 00:10:00) [common]
49 19:52:46.625503 start: 1.2.1 http-download (timeout 00:10:00) [common]
50 19:52:46.626010 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-114-g80fb25341631b/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/kernel/Image
51 19:52:46.626291 saving as /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/kernel/Image
52 19:52:46.626520 total size: 39424512 (37 MB)
53 19:52:46.626736 No compression specified
54 19:52:46.666868 progress 0 % (0 MB)
55 19:52:46.692602 progress 5 % (1 MB)
56 19:52:46.718338 progress 10 % (3 MB)
57 19:52:46.743724 progress 15 % (5 MB)
58 19:52:46.770036 progress 20 % (7 MB)
59 19:52:46.796249 progress 25 % (9 MB)
60 19:52:46.822494 progress 30 % (11 MB)
61 19:52:46.849714 progress 35 % (13 MB)
62 19:52:46.875831 progress 40 % (15 MB)
63 19:52:46.902009 progress 45 % (16 MB)
64 19:52:46.928296 progress 50 % (18 MB)
65 19:52:46.954590 progress 55 % (20 MB)
66 19:52:46.980612 progress 60 % (22 MB)
67 19:52:47.007068 progress 65 % (24 MB)
68 19:52:47.033414 progress 70 % (26 MB)
69 19:52:47.059734 progress 75 % (28 MB)
70 19:52:47.085674 progress 80 % (30 MB)
71 19:52:47.111635 progress 85 % (31 MB)
72 19:52:47.137816 progress 90 % (33 MB)
73 19:52:47.164127 progress 95 % (35 MB)
74 19:52:47.189732 progress 100 % (37 MB)
75 19:52:47.190294 37 MB downloaded in 0.56 s (66.69 MB/s)
76 19:52:47.190766 end: 1.2.1 http-download (duration 00:00:01) [common]
78 19:52:47.191577 end: 1.2 download-retry (duration 00:00:01) [common]
79 19:52:47.191850 start: 1.3 download-retry (timeout 00:09:59) [common]
80 19:52:47.192146 start: 1.3.1 http-download (timeout 00:09:59) [common]
81 19:52:47.192617 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-114-g80fb25341631b/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/dtbs/amlogic/meson-sm1-s905d3-libretech-cc.dtb
82 19:52:47.192862 saving as /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/dtb/meson-sm1-s905d3-libretech-cc.dtb
83 19:52:47.193065 total size: 53209 (0 MB)
84 19:52:47.193273 No compression specified
85 19:52:47.235382 progress 61 % (0 MB)
86 19:52:47.236288 progress 100 % (0 MB)
87 19:52:47.236841 0 MB downloaded in 0.04 s (1.16 MB/s)
88 19:52:47.237306 end: 1.3.1 http-download (duration 00:00:00) [common]
90 19:52:47.238111 end: 1.3 download-retry (duration 00:00:00) [common]
91 19:52:47.238374 start: 1.4 download-retry (timeout 00:09:59) [common]
92 19:52:47.238634 start: 1.4.1 http-download (timeout 00:09:59) [common]
93 19:52:47.239094 downloading http://storage.kernelci.org/images/rootfs/debian/bookworm/20240313.0/arm64/full.rootfs.tar.xz
94 19:52:47.239332 saving as /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/nfsrootfs/full.rootfs.tar
95 19:52:47.239536 total size: 107552908 (102 MB)
96 19:52:47.239743 Using unxz to decompress xz
97 19:52:47.274314 progress 0 % (0 MB)
98 19:52:47.932463 progress 5 % (5 MB)
99 19:52:48.679075 progress 10 % (10 MB)
100 19:52:49.401754 progress 15 % (15 MB)
101 19:52:50.157515 progress 20 % (20 MB)
102 19:52:50.726465 progress 25 % (25 MB)
103 19:52:51.341961 progress 30 % (30 MB)
104 19:52:52.071598 progress 35 % (35 MB)
105 19:52:52.432301 progress 40 % (41 MB)
106 19:52:52.861568 progress 45 % (46 MB)
107 19:52:53.546885 progress 50 % (51 MB)
108 19:52:54.222200 progress 55 % (56 MB)
109 19:52:54.970348 progress 60 % (61 MB)
110 19:52:55.718834 progress 65 % (66 MB)
111 19:52:56.444510 progress 70 % (71 MB)
112 19:52:57.202426 progress 75 % (76 MB)
113 19:52:57.874421 progress 80 % (82 MB)
114 19:52:58.574491 progress 85 % (87 MB)
115 19:52:59.310710 progress 90 % (92 MB)
116 19:53:00.019932 progress 95 % (97 MB)
117 19:53:00.759346 progress 100 % (102 MB)
118 19:53:00.771226 102 MB downloaded in 13.53 s (7.58 MB/s)
119 19:53:00.772146 end: 1.4.1 http-download (duration 00:00:14) [common]
121 19:53:00.773765 end: 1.4 download-retry (duration 00:00:14) [common]
122 19:53:00.774277 start: 1.5 download-retry (timeout 00:09:46) [common]
123 19:53:00.774781 start: 1.5.1 http-download (timeout 00:09:46) [common]
124 19:53:00.775532 downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-114-g80fb25341631b/arm64/defconfig+CONFIG_ARM64_64K_PAGES=y/clang-15/modules.tar.xz
125 19:53:00.776006 saving as /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/modules/modules.tar
126 19:53:00.776411 total size: 11767440 (11 MB)
127 19:53:00.776822 Using unxz to decompress xz
128 19:53:00.829348 progress 0 % (0 MB)
129 19:53:00.896726 progress 5 % (0 MB)
130 19:53:00.972572 progress 10 % (1 MB)
131 19:53:01.069705 progress 15 % (1 MB)
132 19:53:01.168309 progress 20 % (2 MB)
133 19:53:01.253430 progress 25 % (2 MB)
134 19:53:01.345748 progress 30 % (3 MB)
135 19:53:01.429659 progress 35 % (3 MB)
136 19:53:01.510125 progress 40 % (4 MB)
137 19:53:01.587531 progress 45 % (5 MB)
138 19:53:01.673783 progress 50 % (5 MB)
139 19:53:01.757409 progress 55 % (6 MB)
140 19:53:01.843637 progress 60 % (6 MB)
141 19:53:01.927052 progress 65 % (7 MB)
142 19:53:02.010580 progress 70 % (7 MB)
143 19:53:02.099646 progress 75 % (8 MB)
144 19:53:02.187242 progress 80 % (9 MB)
145 19:53:02.270201 progress 85 % (9 MB)
146 19:53:02.356030 progress 90 % (10 MB)
147 19:53:02.438030 progress 95 % (10 MB)
148 19:53:02.516722 progress 100 % (11 MB)
149 19:53:02.527348 11 MB downloaded in 1.75 s (6.41 MB/s)
150 19:53:02.528195 end: 1.5.1 http-download (duration 00:00:02) [common]
152 19:53:02.530325 end: 1.5 download-retry (duration 00:00:02) [common]
153 19:53:02.531004 start: 1.6 prepare-tftp-overlay (timeout 00:09:44) [common]
154 19:53:02.531679 start: 1.6.1 extract-nfsrootfs (timeout 00:09:44) [common]
155 19:53:13.228507 Extracted nfsroot to /var/lib/lava/dispatcher/tmp/955249/extract-nfsrootfs-iyabypo3
156 19:53:13.229132 end: 1.6.1 extract-nfsrootfs (duration 00:00:11) [common]
157 19:53:13.229526 start: 1.6.2 lava-overlay (timeout 00:09:33) [common]
158 19:53:13.231190 [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy
159 19:53:13.231752 makedir: /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin
160 19:53:13.232226 makedir: /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/tests
161 19:53:13.232630 makedir: /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/results
162 19:53:13.233002 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-add-keys
163 19:53:13.233645 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-add-sources
164 19:53:13.234284 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-background-process-start
165 19:53:13.234842 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-background-process-stop
166 19:53:13.235429 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-common-functions
167 19:53:13.236024 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-echo-ipv4
168 19:53:13.236618 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-install-packages
169 19:53:13.237162 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-installed-packages
170 19:53:13.237686 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-os-build
171 19:53:13.238261 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-probe-channel
172 19:53:13.238871 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-probe-ip
173 19:53:13.239542 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-target-ip
174 19:53:13.240169 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-target-mac
175 19:53:13.240734 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-target-storage
176 19:53:13.241270 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-case
177 19:53:13.241803 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-event
178 19:53:13.242401 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-feedback
179 19:53:13.242942 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-raise
180 19:53:13.243470 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-reference
181 19:53:13.244105 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-runner
182 19:53:13.244758 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-set
183 19:53:13.245313 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-test-shell
184 19:53:13.245844 Updating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-install-packages (oe)
185 19:53:13.246502 Updating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/bin/lava-installed-packages (oe)
186 19:53:13.247044 Creating /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/environment
187 19:53:13.247552 LAVA metadata
188 19:53:13.247855 - LAVA_JOB_ID=955249
189 19:53:13.248121 - LAVA_DISPATCHER_IP=192.168.6.2
190 19:53:13.248533 start: 1.6.2.1 ssh-authorize (timeout 00:09:33) [common]
191 19:53:13.249678 end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
192 19:53:13.250051 start: 1.6.2.2 lava-vland-overlay (timeout 00:09:33) [common]
193 19:53:13.250285 skipped lava-vland-overlay
194 19:53:13.250542 end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
195 19:53:13.250811 start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:33) [common]
196 19:53:13.251042 skipped lava-multinode-overlay
197 19:53:13.251287 end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
198 19:53:13.251538 start: 1.6.2.4 test-definition (timeout 00:09:33) [common]
199 19:53:13.251807 Loading test definitions
200 19:53:13.252137 start: 1.6.2.4.1 inline-repo-action (timeout 00:09:33) [common]
201 19:53:13.252370 Using /lava-955249 at stage 0
202 19:53:13.253704 uuid=955249_1.6.2.4.1 testdef=None
203 19:53:13.254070 end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
204 19:53:13.254341 start: 1.6.2.4.2 test-overlay (timeout 00:09:33) [common]
205 19:53:13.256516 end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
207 19:53:13.257414 start: 1.6.2.4.3 test-install-overlay (timeout 00:09:33) [common]
208 19:53:13.259962 end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
210 19:53:13.260956 start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:33) [common]
211 19:53:13.263488 runner path: /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/0/tests/0_dmesg test_uuid 955249_1.6.2.4.1
212 19:53:13.265321 end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
214 19:53:13.266196 Creating lava-test-runner.conf files
215 19:53:13.266436 Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/955249/lava-overlay-t0b0qjvy/lava-955249/0 for stage 0
216 19:53:13.266945 - 0_dmesg
217 19:53:13.267427 end: 1.6.2.4 test-definition (duration 00:00:00) [common]
218 19:53:13.267759 start: 1.6.2.5 compress-overlay (timeout 00:09:33) [common]
219 19:53:13.291251 end: 1.6.2.5 compress-overlay (duration 00:00:00) [common]
220 19:53:13.291686 start: 1.6.2.6 persistent-nfs-overlay (timeout 00:09:33) [common]
221 19:53:13.291947 end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
222 19:53:13.292259 end: 1.6.2 lava-overlay (duration 00:00:00) [common]
223 19:53:13.292525 start: 1.6.3 extract-overlay-ramdisk (timeout 00:09:33) [common]
224 19:53:13.932416 end: 1.6.3 extract-overlay-ramdisk (duration 00:00:01) [common]
225 19:53:13.932877 start: 1.6.4 extract-modules (timeout 00:09:33) [common]
226 19:53:13.933153 extracting modules file /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955249/extract-nfsrootfs-iyabypo3
227 19:53:15.641855 extracting modules file /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/modules/modules.tar to /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk
228 19:53:17.070377 end: 1.6.4 extract-modules (duration 00:00:03) [common]
229 19:53:17.070863 start: 1.6.5 apply-overlay-tftp (timeout 00:09:29) [common]
230 19:53:17.071142 [common] Applying overlay to NFS
231 19:53:17.071356 [common] Applying overlay /var/lib/lava/dispatcher/tmp/955249/compress-overlay-yxgaq7ou/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/955249/extract-nfsrootfs-iyabypo3
232 19:53:17.101267 end: 1.6.5 apply-overlay-tftp (duration 00:00:00) [common]
233 19:53:17.101688 start: 1.6.6 prepare-kernel (timeout 00:09:29) [common]
234 19:53:17.101959 start: 1.6.6.1 uboot-prepare-kernel (timeout 00:09:29) [common]
235 19:53:17.102194 Converting downloaded kernel to a uImage
236 19:53:17.102508 mkimage -A arm64 -O linux -T kernel -C none -a 0x1080000 -e 0x1080000 -d /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/kernel/Image /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/kernel/uImage
237 19:53:17.532135 output: Image Name:
238 19:53:17.532555 output: Created: Thu Nov 7 19:53:17 2024
239 19:53:17.532767 output: Image Type: AArch64 Linux Kernel Image (uncompressed)
240 19:53:17.532972 output: Data Size: 39424512 Bytes = 38500.50 KiB = 37.60 MiB
241 19:53:17.533174 output: Load Address: 01080000
242 19:53:17.533373 output: Entry Point: 01080000
243 19:53:17.533570 output:
244 19:53:17.533899 end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
245 19:53:17.534166 end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
246 19:53:17.534432 start: 1.6.7 configure-preseed-file (timeout 00:09:29) [common]
247 19:53:17.534683 end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
248 19:53:17.534937 start: 1.6.8 compress-ramdisk (timeout 00:09:29) [common]
249 19:53:17.535206 Building ramdisk /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk
250 19:53:19.815694 >> 173477 blocks
251 19:53:27.498512 Adding RAMdisk u-boot header.
252 19:53:27.498943 mkimage -A arm64 -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk.cpio.gz.uboot
253 19:53:27.792189 output: Image Name:
254 19:53:27.792863 output: Created: Thu Nov 7 19:53:27 2024
255 19:53:27.793417 output: Image Type: AArch64 Linux RAMDisk Image (uncompressed)
256 19:53:27.793879 output: Data Size: 24139545 Bytes = 23573.77 KiB = 23.02 MiB
257 19:53:27.794323 output: Load Address: 00000000
258 19:53:27.794761 output: Entry Point: 00000000
259 19:53:27.795195 output:
260 19:53:27.796498 rename /var/lib/lava/dispatcher/tmp/955249/extract-overlay-ramdisk-41wec6y8/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
261 19:53:27.797302 end: 1.6.8 compress-ramdisk (duration 00:00:10) [common]
262 19:53:27.797900 end: 1.6 prepare-tftp-overlay (duration 00:00:25) [common]
263 19:53:27.798485 start: 1.7 lxc-create-udev-rule-action (timeout 00:09:19) [common]
264 19:53:27.798984 No LXC device requested
265 19:53:27.799531 end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
266 19:53:27.800124 start: 1.8 deploy-device-env (timeout 00:09:19) [common]
267 19:53:27.800679 end: 1.8 deploy-device-env (duration 00:00:00) [common]
268 19:53:27.801131 Checking files for TFTP limit of 4294967296 bytes.
269 19:53:27.804144 end: 1 tftp-deploy (duration 00:00:41) [common]
270 19:53:27.804794 start: 2 uboot-action (timeout 00:05:00) [common]
271 19:53:27.805367 start: 2.1 uboot-from-media (timeout 00:05:00) [common]
272 19:53:27.805911 end: 2.1 uboot-from-media (duration 00:00:00) [common]
273 19:53:27.806458 start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
274 19:53:27.807030 Using kernel file from prepare-kernel: 955249/tftp-deploy-whwktopx/kernel/uImage
275 19:53:27.807715 substitutions:
276 19:53:27.808196 - {BOOTX}: bootm 0x01080000 0x08000000 0x01070000
277 19:53:27.808646 - {DTB_ADDR}: 0x01070000
278 19:53:27.809084 - {DTB}: 955249/tftp-deploy-whwktopx/dtb/meson-sm1-s905d3-libretech-cc.dtb
279 19:53:27.809525 - {INITRD}: 955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
280 19:53:27.809962 - {KERNEL_ADDR}: 0x01080000
281 19:53:27.810393 - {KERNEL}: 955249/tftp-deploy-whwktopx/kernel/uImage
282 19:53:27.810826 - {LAVA_MAC}: None
283 19:53:27.811299 - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/955249/extract-nfsrootfs-iyabypo3
284 19:53:27.811737 - {NFS_SERVER_IP}: 192.168.6.2
285 19:53:27.812199 - {PRESEED_CONFIG}: None
286 19:53:27.812627 - {PRESEED_LOCAL}: None
287 19:53:27.813056 - {RAMDISK_ADDR}: 0x08000000
288 19:53:27.813482 - {RAMDISK}: 955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
289 19:53:27.813910 - {ROOT_PART}: None
290 19:53:27.814338 - {ROOT}: None
291 19:53:27.814767 - {SERVER_IP}: 192.168.6.2
292 19:53:27.815192 - {TEE_ADDR}: 0x83000000
293 19:53:27.815618 - {TEE}: None
294 19:53:27.816070 Parsed boot commands:
295 19:53:27.816492 - setenv autoload no
296 19:53:27.816919 - setenv initrd_high 0xffffffff
297 19:53:27.817341 - setenv fdt_high 0xffffffff
298 19:53:27.817763 - dhcp
299 19:53:27.818186 - setenv serverip 192.168.6.2
300 19:53:27.818606 - tftpboot 0x01080000 955249/tftp-deploy-whwktopx/kernel/uImage
301 19:53:27.819027 - tftpboot 0x08000000 955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
302 19:53:27.819452 - tftpboot 0x01070000 955249/tftp-deploy-whwktopx/dtb/meson-sm1-s905d3-libretech-cc.dtb
303 19:53:27.819876 - setenv bootargs 'console=ttyAML0,115200n8 root=/dev/nfs rw nfsroot=192.168.6.2:/var/lib/lava/dispatcher/tmp/955249/extract-nfsrootfs-iyabypo3,tcp,hard console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
304 19:53:27.820363 - bootm 0x01080000 0x08000000 0x01070000
305 19:53:27.820920 end: 2.2 bootloader-overlay (duration 00:00:00) [common]
307 19:53:27.822543 start: 2.3 connect-device (timeout 00:05:00) [common]
308 19:53:27.822996 [common] connect-device Connecting to device using 'telnet conserv1 3008'
309 19:53:27.837843 Setting prompt string to ['lava-test: # ']
310 19:53:27.839461 end: 2.3 connect-device (duration 00:00:00) [common]
311 19:53:27.840155 start: 2.4 uboot-commands (timeout 00:05:00) [common]
312 19:53:27.840754 start: 2.4.1 reset-device (timeout 00:05:00) [common]
313 19:53:27.841342 start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
314 19:53:27.842561 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/reboot?hostname=cambrionix&port=solitude-01'
315 19:53:27.878096 >> OK - accepted request
316 19:53:27.880197 Returned 0 in 0 seconds
317 19:53:27.981408 end: 2.4.1.1 pdu-reboot (duration 00:00:00) [common]
319 19:53:27.983197 end: 2.4.1 reset-device (duration 00:00:00) [common]
320 19:53:27.983833 start: 2.4.2 bootloader-interrupt (timeout 00:05:00) [common]
321 19:53:27.984461 Setting prompt string to ['Hit any key to stop autoboot']
322 19:53:27.984980 bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
323 19:53:27.986671 Trying 192.168.56.21...
324 19:53:27.987202 Connected to conserv1.
325 19:53:27.987654 Escape character is '^]'.
326 19:53:27.988138
327 19:53:27.988601 ser2net port telnet,3008 device serialdev, /dev/serial/by-path/platform-fd500000.pcie-pci-0000:01:00.0-usb-0:1.2.3.3:1.0-port0, 115200n81, local=false [] (Debian GNU/Linux)
328 19:53:27.989060
329 19:53:34.540738 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
330 19:53:34.541144 bl2_stage_init 0x01
331 19:53:34.541398 bl2_stage_init 0x81
332 19:53:34.546204 hw id: 0x0000 - pwm id 0x01
333 19:53:34.546542 bl2_stage_init 0xc1
334 19:53:34.551823 bl2_stage_init 0x02
335 19:53:34.552188
336 19:53:34.552437 L0:00000000
337 19:53:34.552682 L1:00000703
338 19:53:34.552919 L2:00008067
339 19:53:34.553149 L3:15000000
340 19:53:34.557393 S1:00000000
341 19:53:34.557710 B2:20282000
342 19:53:34.557956 B1:a0f83180
343 19:53:34.558189
344 19:53:34.558417 TE: 70785
345 19:53:34.558646
346 19:53:34.563091 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
347 19:53:34.563402
348 19:53:34.568576 Board ID = 1
349 19:53:34.568881 Set cpu clk to 24M
350 19:53:34.569122 Set clk81 to 24M
351 19:53:34.574222 Use GP1_pll as DSU clk.
352 19:53:34.574568 DSU clk: 1200 Mhz
353 19:53:34.574816 CPU clk: 1200 MHz
354 19:53:34.579792 Set clk81 to 166.6M
355 19:53:34.585380 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
356 19:53:34.585707 board id: 1
357 19:53:34.591662 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
358 19:53:34.603555 fw parse done
359 19:53:34.608579 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
360 19:53:34.651569 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
361 19:53:34.663743 PIEI prepare done
362 19:53:34.664113 fastboot data load
363 19:53:34.664369 fastboot data verify
364 19:53:34.669198 verify result: 266
365 19:53:34.674903 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
366 19:53:34.675201 LPDDR4 probe
367 19:53:34.675437 ddr clk to 1584MHz
368 19:53:34.681975 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
369 19:53:34.719813
370 19:53:34.720265 dmc_version 0001
371 19:53:34.726677 Check phy result
372 19:53:34.733579 INFO : End of CA training
373 19:53:34.733888 INFO : End of initialization
374 19:53:34.739247 INFO : Training has run successfully!
375 19:53:34.739530 Check phy result
376 19:53:34.744831 INFO : End of initialization
377 19:53:34.745123 INFO : End of read enable training
378 19:53:34.750418 INFO : End of fine write leveling
379 19:53:34.756176 INFO : End of Write leveling coarse delay
380 19:53:34.756464 INFO : Training has run successfully!
381 19:53:34.756700 Check phy result
382 19:53:34.761631 INFO : End of initialization
383 19:53:34.761926 INFO : End of read dq deskew training
384 19:53:34.767186 INFO : End of MPR read delay center optimization
385 19:53:34.772821 INFO : End of write delay center optimization
386 19:53:34.778426 INFO : End of read delay center optimization
387 19:53:34.778710 INFO : End of max read latency training
388 19:53:34.784146 INFO : Training has run successfully!
389 19:53:34.784443 1D training succeed
390 19:53:34.792194 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
391 19:53:34.840664 Check phy result
392 19:53:34.841040 INFO : End of initialization
393 19:53:34.868117 INFO : End of 2D read delay Voltage center optimization
394 19:53:34.892227 INFO : End of 2D read delay Voltage center optimization
395 19:53:34.948903 INFO : End of 2D write delay Voltage center optimization
396 19:53:35.003940 INFO : End of 2D write delay Voltage center optimization
397 19:53:35.009429 INFO : Training has run successfully!
398 19:53:35.009771
399 19:53:35.010014 channel==0
400 19:53:35.014989 RxClkDly_Margin_A0==78 ps 8
401 19:53:35.015339 TxDqDly_Margin_A0==98 ps 10
402 19:53:35.018354 RxClkDly_Margin_A1==88 ps 9
403 19:53:35.018694 TxDqDly_Margin_A1==88 ps 9
404 19:53:35.023876 TrainedVREFDQ_A0==74
405 19:53:35.024399 TrainedVREFDQ_A1==74
406 19:53:35.024670 VrefDac_Margin_A0==24
407 19:53:35.030233 DeviceVref_Margin_A0==40
408 19:53:35.030586 VrefDac_Margin_A1==23
409 19:53:35.035067 DeviceVref_Margin_A1==40
410 19:53:35.035392
411 19:53:35.035635
412 19:53:35.035865 channel==1
413 19:53:35.036130 RxClkDly_Margin_A0==78 ps 8
414 19:53:35.040675 TxDqDly_Margin_A0==98 ps 10
415 19:53:35.041023 RxClkDly_Margin_A1==78 ps 8
416 19:53:35.046275 TxDqDly_Margin_A1==78 ps 8
417 19:53:35.046621 TrainedVREFDQ_A0==78
418 19:53:35.046858 TrainedVREFDQ_A1==75
419 19:53:35.051860 VrefDac_Margin_A0==22
420 19:53:35.052239 DeviceVref_Margin_A0==36
421 19:53:35.057488 VrefDac_Margin_A1==22
422 19:53:35.057829 DeviceVref_Margin_A1==39
423 19:53:35.058064
424 19:53:35.063179 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
425 19:53:35.063545
426 19:53:35.090979 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
427 19:53:35.096545 2D training succeed
428 19:53:35.102299 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
429 19:53:35.102635 auto size-- 65535DDR cs0 size: 2048MB
430 19:53:35.107840 DDR cs1 size: 2048MB
431 19:53:35.108202 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
432 19:53:35.113383 cs0 DataBus test pass
433 19:53:35.113710 cs1 DataBus test pass
434 19:53:35.113945 cs0 AddrBus test pass
435 19:53:35.119000 cs1 AddrBus test pass
436 19:53:35.119320
437 19:53:35.119555 100bdlr_step_size ps== 471
438 19:53:35.119788 result report
439 19:53:35.124655 boot times 0Enable ddr reg access
440 19:53:35.131266 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
441 19:53:35.145067 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
442 19:53:35.804560 bl2z: ptr: 05129330, size: 00001e40
443 19:53:35.813356 0.0;M3 CHK:0;cm4_sp_mode 0
444 19:53:35.813683 MVN_1=0x00000000
445 19:53:35.813922 MVN_2=0x00000000
446 19:53:35.824756 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
447 19:53:35.825071 OPS=0x04
448 19:53:35.825311 ring efuse init
449 19:53:35.830306 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
450 19:53:35.830595 [0.017354 Inits done]
451 19:53:35.830829 secure task start!
452 19:53:35.836785 high task start!
453 19:53:35.837079 low task start!
454 19:53:35.837313 run into bl31
455 19:53:35.846249 NOTICE: BL31: v1.3(release):4fc40b1
456 19:53:35.853105 NOTICE: BL31: Built : 15:57:33, May 22 2019
457 19:53:35.853413 NOTICE: BL31: G12A normal boot!
458 19:53:35.869721 NOTICE: BL31: BL33 decompress pass
459 19:53:35.874350 ERROR: Error initializing runtime service opteed_fast
460 19:53:37.088925 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
461 19:53:37.089802 bl2_stage_init 0x01
462 19:53:37.090374 bl2_stage_init 0x81
463 19:53:37.094499 hw id: 0x0000 - pwm id 0x01
464 19:53:37.095545 bl2_stage_init 0xc1
465 19:53:37.099707 bl2_stage_init 0x02
466 19:53:37.100460
467 19:53:37.101040 L0:00000000
468 19:53:37.101603 L1:00000703
469 19:53:37.102149 L2:00008067
470 19:53:37.105184 L3:15000000
471 19:53:37.105789 S1:00000000
472 19:53:37.106311 B2:20282000
473 19:53:37.106860 B1:a0f83180
474 19:53:37.107406
475 19:53:37.107922 TE: 68768
476 19:53:37.108491
477 19:53:37.110739 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
478 19:53:37.116479
479 19:53:37.117211 Board ID = 1
480 19:53:37.117762 Set cpu clk to 24M
481 19:53:37.118299 Set clk81 to 24M
482 19:53:37.121981 Use GP1_pll as DSU clk.
483 19:53:37.122616 DSU clk: 1200 Mhz
484 19:53:37.123161 CPU clk: 1200 MHz
485 19:53:37.127965 Set clk81 to 166.6M
486 19:53:37.133218 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
487 19:53:37.133844 board id: 1
488 19:53:37.139909 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
489 19:53:37.151718 fw parse done
490 19:53:37.156802 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
491 19:53:37.199899 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
492 19:53:37.211961 PIEI prepare done
493 19:53:37.212320 fastboot data load
494 19:53:37.212541 fastboot data verify
495 19:53:37.218032 verify result: 266
496 19:53:37.223087 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
497 19:53:37.223419 LPDDR4 probe
498 19:53:37.223637 ddr clk to 1584MHz
499 19:53:38.588691 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, pa SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
500 19:53:38.589844 bl2_stage_init 0x01
501 19:53:38.590196 bl2_stage_init 0x81
502 19:53:38.594460 hw id: 0x0000 - pwm id 0x01
503 19:53:38.595164 bl2_stage_init 0xc1
504 19:53:38.600244 bl2_stage_init 0x02
505 19:53:38.600892
506 19:53:38.601414 L0:00000000
507 19:53:38.601968 L1:00000703
508 19:53:38.602521 L2:00008067
509 19:53:38.603015 L3:15000000
510 19:53:38.605650 S1:00000000
511 19:53:38.606337 B2:20282000
512 19:53:38.606949 B1:a0f83180
513 19:53:38.607497
514 19:53:38.608198 TE: 68867
515 19:53:38.608759
516 19:53:38.611186 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
517 19:53:38.611869
518 19:53:38.616849 Board ID = 1
519 19:53:38.617525 Set cpu clk to 24M
520 19:53:38.618142 Set clk81 to 24M
521 19:53:38.620135 Use GP1_pll as DSU clk.
522 19:53:38.620831 DSU clk: 1200 Mhz
523 19:53:38.625934 CPU clk: 1200 MHz
524 19:53:38.626514 Set clk81 to 166.6M
525 19:53:38.631174 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
526 19:53:38.631628 board id: 1
527 19:53:38.639805 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
528 19:53:38.651644 fw parse done
529 19:53:38.656468 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
530 19:53:38.699447 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
531 19:53:38.711030 PIEI prepare done
532 19:53:38.711628 fastboot data load
533 19:53:38.712272 fastboot data verify
534 19:53:38.716537 verify result: 266
535 19:53:38.722094 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
536 19:53:38.722704 LPDDR4 probe
537 19:53:38.723209 ddr clk to 1584MHz
538 19:53:38.729090 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
539 19:53:38.766453
540 19:53:38.767239 dmc_version 0001
541 19:53:38.773075 Check phy result
542 19:53:38.780205 INFO : End of CA training
543 19:53:38.780804 INFO : End of initialization
544 19:53:38.785578 INFO : Training has run successfully!
545 19:53:38.786191 Check phy result
546 19:53:38.791211 INFO : End of initialization
547 19:53:38.792023 INFO : End of read enable training
548 19:53:38.794466 INFO : End of fine write leveling
549 19:53:38.799886 INFO : End of Write leveling coarse delay
550 19:53:38.805446 INFO : Training has run successfully!
551 19:53:38.805747 Check phy result
552 19:53:38.805988 INFO : End of initialization
553 19:53:38.811123 INFO : End of read dq deskew training
554 19:53:38.816699 INFO : End of MPR read delay center optimization
555 19:53:38.817038 INFO : End of write delay center optimization
556 19:53:38.822214 INFO : End of read delay center optimization
557 19:53:38.827839 INFO : End of max read latency training
558 19:53:38.828172 INFO : Training has run successfully!
559 19:53:38.833427 1D training succeed
560 19:53:38.838506 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
561 19:53:38.886166 Check phy result
562 19:53:38.886918 INFO : End of initialization
563 19:53:38.908664 INFO : End of 2D read delay Voltage center optimization
564 19:53:38.927658 INFO : End of 2D read delay Voltage center optimization
565 19:53:38.979409 INFO : End of 2D write delay Voltage center optimization
566 19:53:39.029600 INFO : End of 2D write delay Voltage center optimization
567 19:53:39.035117 INFO : Training has run successfully!
568 19:53:39.035604
569 19:53:39.036122 channel==0
570 19:53:39.040769 RxClkDly_Margin_A0==69 ps 7
571 19:53:39.041045 TxDqDly_Margin_A0==98 ps 10
572 19:53:39.043959 RxClkDly_Margin_A1==69 ps 7
573 19:53:39.044482 TxDqDly_Margin_A1==98 ps 10
574 19:53:39.049562 TrainedVREFDQ_A0==74
575 19:53:39.050013 TrainedVREFDQ_A1==75
576 19:53:39.055144 VrefDac_Margin_A0==23
577 19:53:39.055703 DeviceVref_Margin_A0==40
578 19:53:39.056221 VrefDac_Margin_A1==23
579 19:53:39.060791 DeviceVref_Margin_A1==39
580 19:53:39.061331
581 19:53:39.061801
582 19:53:39.062263 channel==1
583 19:53:39.062720 RxClkDly_Margin_A0==88 ps 9
584 19:53:39.066407 TxDqDly_Margin_A0==98 ps 10
585 19:53:39.066938 RxClkDly_Margin_A1==78 ps 8
586 19:53:39.071933 TxDqDly_Margin_A1==88 ps 9
587 19:53:39.072519 TrainedVREFDQ_A0==78
588 19:53:39.072968 TrainedVREFDQ_A1==77
589 19:53:39.077493 VrefDac_Margin_A0==22
590 19:53:39.077980 DeviceVref_Margin_A0==36
591 19:53:39.083112 VrefDac_Margin_A1==22
592 19:53:39.083584 DeviceVref_Margin_A1==37
593 19:53:39.084051
594 19:53:39.088842 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
595 19:53:39.089325
596 19:53:39.116853 soc_vref_reg_value 0x 00000019 00000018 00000017 00000016 00000018 00000015 00000018 00000015 00000017 00000017 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000017 00000018 00000015 00000018 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000017 00000016 00000017 dram_vref_reg_value 0x 00000061
597 19:53:39.122339 2D training succeed
598 19:53:39.128030 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
599 19:53:39.128524 auto size-- 65535DDR cs0 size: 2048MB
600 19:53:39.133526 DDR cs1 size: 2048MB
601 19:53:39.134008 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
602 19:53:39.139168 cs0 DataBus test pass
603 19:53:39.139647 cs1 DataBus test pass
604 19:53:39.140119 cs0 AddrBus test pass
605 19:53:39.144804 cs1 AddrBus test pass
606 19:53:39.145278
607 19:53:39.145720 100bdlr_step_size ps== 478
608 19:53:39.146161 result report
609 19:53:39.150465 boot times 0Enable ddr reg access
610 19:53:39.157265 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
611 19:53:39.171171 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
612 19:53:39.824692 bl2z: ptr: 05129330, size: 00001e40
613 19:53:39.832624 0.0;M3 CHK:0;cm4_sp_mode 0
614 19:53:39.833061 MVN_1=0x00000000
615 19:53:39.833308 MVN_2=0x00000000
616 19:53:39.847933 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
617 19:53:39.848376 OPS=0x04
618 19:53:39.848606 ring efuse init
619 19:53:39.848821 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
620 19:53:39.852652 [0.017319 Inits done]
621 19:53:39.853011 secure task start!
622 19:53:39.853227 high task start!
623 19:53:39.853433 low task start!
624 19:53:39.856104 run into bl31
625 19:53:39.865749 NOTICE: BL31: v1.3(release):4fc40b1
626 19:53:39.872608 NOTICE: BL31: Built : 15:57:33, May 22 2019
627 19:53:39.873015 NOTICE: BL31: G12A normal boot!
628 19:53:39.889151 NOTICE: BL31: BL33 decompress pass
629 19:53:39.893671 ERROR: Error initializing runtime service opteed_fast
630 19:53:41.145853 SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:B;RCY:0;SPINOR:0;0.0;CHK:0;
631 19:53:41.146284 bl2_stage_init 0x01
632 19:53:41.146526 bl2_stage_init 0x81
633 19:53:41.151434 hw id: 0x0000 - pwm id 0x01
634 19:53:41.151811 bl2_stage_init 0xc1
635 19:53:41.152080 bl2_stage_init 0x02
636 19:53:41.152327
637 19:53:41.157019 L0:00000000
638 19:53:41.157472 L1:00000703
639 19:53:41.157723 L2:00008067
640 19:53:41.157967 L3:15000000
641 19:53:41.158189 S1:00000000
642 19:53:41.158844 B2:20282000
643 19:53:41.164419 B1:a0f83180
644 19:53:41.164789
645 19:53:41.165006 TE: 75055
646 19:53:41.165232
647 19:53:41.170036 BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz
648 19:53:41.170446
649 19:53:41.170689 Board ID = 1
650 19:53:41.175648 Set cpu clk to 24M
651 19:53:41.176072 Set clk81 to 24M
652 19:53:41.176313 Use GP1_pll as DSU clk.
653 19:53:41.176526 DSU clk: 1200 Mhz
654 19:53:41.181218 CPU clk: 1200 MHz
655 19:53:41.181781 Set clk81 to 166.6M
656 19:53:41.186883 DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45
657 19:53:41.187455 board id: 1
658 19:53:41.196319 Load FIP HDR from SPI, src: 0x00010000, des: 0xfffd0000, size: 0x00004000, part: 0
659 19:53:41.208193 fw parse done
660 19:53:41.213041 Load ddrfw from SPI, src: 0x00030000, des: 0xfffd0000, size: 0x0000c000, part: 0
661 19:53:41.256431 Load ddrfw from SPI, src: 0x00014000, des: 0xfffd0000, size: 0x00004000, part: 0
662 19:53:41.268268 PIEI prepare done
663 19:53:41.269192 fastboot data load
664 19:53:41.269734 fastboot data verify
665 19:53:41.273990 verify result: 266
666 19:53:41.279876 Cfg max: 2, cur: 1. Board id: 255. Force loop cfg
667 19:53:41.280557 LPDDR4 probe
668 19:53:41.281013 ddr clk to 1584MHz
669 19:53:41.286801 Load ddrfw from SPI, src: 0x00018000, des: 0xfffd0000, size: 0x0000c000, part: 0
670 19:53:41.324331
671 19:53:41.324913 dmc_version 0001
672 19:53:41.331228 Check phy result
673 19:53:41.338102 INFO : End of CA training
674 19:53:41.338674 INFO : End of initialization
675 19:53:41.343727 INFO : Training has run successfully!
676 19:53:41.344134 Check phy result
677 19:53:41.349248 INFO : End of initialization
678 19:53:41.349836 INFO : End of read enable training
679 19:53:41.352664 INFO : End of fine write leveling
680 19:53:41.358474 INFO : End of Write leveling coarse delay
681 19:53:41.363855 INFO : Training has run successfully!
682 19:53:41.364254 Check phy result
683 19:53:41.364468 INFO : End of initialization
684 19:53:41.369523 INFO : End of read dq deskew training
685 19:53:41.372825 INFO : End of MPR read delay center optimization
686 19:53:41.378390 INFO : End of write delay center optimization
687 19:53:41.384072 INFO : End of read delay center optimization
688 19:53:41.384577 INFO : End of max read latency training
689 19:53:41.389513 INFO : Training has run successfully!
690 19:53:41.389881 1D training succeed
691 19:53:41.396771 Load ddrfw from SPI, src: 0x00024000, des: 0xfffd0000, size: 0x0000c000, part: 0
692 19:53:41.445178 Check phy result
693 19:53:41.445594 INFO : End of initialization
694 19:53:41.472597 INFO : End of 2D read delay Voltage center optimization
695 19:53:41.496607 INFO : End of 2D read delay Voltage center optimization
696 19:53:41.553334 INFO : End of 2D write delay Voltage center optimization
697 19:53:41.608377 INFO : End of 2D write delay Voltage center optimization
698 19:53:41.613806 INFO : Training has run successfully!
699 19:53:41.614578
700 19:53:41.615154 channel==0
701 19:53:41.619313 RxClkDly_Margin_A0==78 ps 8
702 19:53:41.619938 TxDqDly_Margin_A0==98 ps 10
703 19:53:41.622566 RxClkDly_Margin_A1==88 ps 9
704 19:53:41.623145 TxDqDly_Margin_A1==98 ps 10
705 19:53:41.628213 TrainedVREFDQ_A0==74
706 19:53:41.628939 TrainedVREFDQ_A1==74
707 19:53:41.633750 VrefDac_Margin_A0==23
708 19:53:41.634435 DeviceVref_Margin_A0==40
709 19:53:41.635030 VrefDac_Margin_A1==23
710 19:53:41.639421 DeviceVref_Margin_A1==40
711 19:53:41.641399
712 19:53:41.642071
713 19:53:41.642616 channel==1
714 19:53:41.643143 RxClkDly_Margin_A0==78 ps 8
715 19:53:41.644966 TxDqDly_Margin_A0==88 ps 9
716 19:53:41.645697 RxClkDly_Margin_A1==78 ps 8
717 19:53:41.650640 TxDqDly_Margin_A1==88 ps 9
718 19:53:41.651343 TrainedVREFDQ_A0==75
719 19:53:41.651933 TrainedVREFDQ_A1==77
720 19:53:41.656199 VrefDac_Margin_A0==22
721 19:53:41.656874 DeviceVref_Margin_A0==39
722 19:53:41.661824 VrefDac_Margin_A1==22
723 19:53:41.662518 DeviceVref_Margin_A1==37
724 19:53:41.663111
725 19:53:41.667428 dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004
726 19:53:41.668156
727 19:53:41.695374 soc_vref_reg_value 0x 00000019 00000018 00000018 00000017 00000018 00000015 00000018 00000015 00000018 00000017 00000017 00000017 00000017 00000018 00000018 00000018 00000018 00000017 00000018 00000015 00000017 00000014 00000015 00000017 00000018 00000019 00000017 00000018 0000001c 00000018 00000016 00000017 dram_vref_reg_value 0x 00000061
728 19:53:41.701055 2D training succeed
729 19:53:41.706568 aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:54:19
730 19:53:41.706930 auto size-- 65535DDR cs0 size: 2048MB
731 19:53:41.712201 DDR cs1 size: 2048MB
732 19:53:41.712566 DMC_DDR_CTRL: 00e00024DDR size: 3928MB
733 19:53:41.717841 cs0 DataBus test pass
734 19:53:41.718221 cs1 DataBus test pass
735 19:53:41.718450 cs0 AddrBus test pass
736 19:53:41.723380 cs1 AddrBus test pass
737 19:53:41.723701
738 19:53:41.723919 100bdlr_step_size ps== 471
739 19:53:41.724175 result report
740 19:53:41.728985 boot times 0Enable ddr reg access
741 19:53:41.735631 Load FIP HDR from SPI, src: 0x00010000, des: 0x01700000, size: 0x00004000, part: 0
742 19:53:41.749407 Load BL3X from SPI, src: 0x0003c000, des: 0x0172c000, size: 0x000c4000, part: 0
743 19:53:42.408785 bl2z: ptr: 05129330, size: 00001e40
744 19:53:42.415685 0.0;M3 CHK:0;cm4_sp_mode 0
745 19:53:42.416028 MVN_1=0x00000000
746 19:53:42.416244 MVN_2=0x00000000
747 19:53:42.427257 [Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz]
748 19:53:42.427553 OPS=0x04
749 19:53:42.427763 ring efuse init
750 19:53:42.430107 2b 0c 04 00 01 21 18 00 00 04 34 34 36 46 50 50
751 19:53:42.435547 [0.017354 Inits done]
752 19:53:42.435826 secure task start!
753 19:53:42.436058 high task start!
754 19:53:42.436262 low task start!
755 19:53:42.439966 run into bl31
756 19:53:42.449633 NOTICE: BL31: v1.3(release):4fc40b1
757 19:53:42.456440 NOTICE: BL31: Built : 15:57:33, May 22 2019
758 19:53:42.456755 NOTICE: BL31: G12A normal boot!
759 19:53:42.473001 NOTICE: BL31: BL33 decompress pass
760 19:53:42.477625 ERROR: Error initializing runtime service opteed_fast
761 19:53:43.273944
762 19:53:43.274325
763 19:53:43.279494 U-Boot 2024.01-rc4+ (Dec 14 2023 - 02:26:00 -0500) Libre Computer AML-S905D3-CC
764 19:53:43.279748
765 19:53:43.281843 Model: Libre Computer AML-S905D3-CC Solitude
766 19:53:43.428987 SoC: Amlogic Meson SM1 (S905D3) Revision 2b:c (4:2)
767 19:53:43.444267 DRAM: 2 GiB (effective 3.8 GiB)
768 19:53:43.546340 Core: 406 devices, 33 uclasses, devicetree: separate
769 19:53:43.551091 WDT: Not starting watchdog@f0d0
770 19:53:43.577212 MMC: mmc@ffe05000: 1, mmc@ffe07000: 0
771 19:53:43.589393 Loading Environment from FAT... Card did not respond to voltage select! : -110
772 19:53:43.593366 ** Bad device specification mmc 0 **
773 19:53:43.604479 Card did not respond to voltage select! : -110
774 19:53:43.611142 ** Bad device specification mmc 0 **
775 19:53:43.611814 Couldn't find partition mmc 0
776 19:53:43.620431 Card did not respond to voltage select! : -110
777 19:53:43.625957 ** Bad device specification mmc 0 **
778 19:53:43.626526 Couldn't find partition mmc 0
779 19:53:43.630070 Error: could not access storage.
780 19:53:43.927488 Net: eth0: ethernet@ff3f0000
781 19:53:43.928157 starting USB...
782 19:53:44.172176 Bus usb@ff500000: Register 3000140 NbrPorts 3
783 19:53:44.172852 Starting the controller
784 19:53:44.179117 USB XHCI 1.10
785 19:53:45.735484 scanning bus usb@ff500000 for devices... 3 USB Device(s) found
786 19:53:45.743942 scanning usb for storage devices... 0 Storage Device(s) found
788 19:53:45.796426 Hit any key to stop autoboot: 1
789 19:53:45.797646 end: 2.4.2 bootloader-interrupt (duration 00:00:18) [common]
790 19:53:45.798544 start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
791 19:53:45.799215 Setting prompt string to ['=>']
792 19:53:45.799958 bootloader-commands: Wait for prompt ['=>'] (timeout 00:04:42)
793 19:53:45.808947 0
794 19:53:45.809627 Setting prompt string to ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image']
796 19:53:45.910463 => setenv autoload no
797 19:53:45.911177 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
798 19:53:45.915566 setenv autoload no
800 19:53:46.016746 => setenv initrd_high 0xffffffff
801 19:53:46.017445 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
802 19:53:46.021855 setenv initrd_high 0xffffffff
804 19:53:46.122997 => setenv fdt_high 0xffffffff
805 19:53:46.123677 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
806 19:53:46.127179 setenv fdt_high 0xffffffff
808 19:53:46.228258 => dhcp
809 19:53:46.228812 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:42)
810 19:53:46.232957 dhcp
811 19:53:46.937667 ethernet@ff3f0000 Waiting for PHY auto negotiation to complete.. done
812 19:53:46.938286 Speed: 1000, full duplex
813 19:53:46.938692 BOOTP broadcast 1
814 19:53:47.186743 BOOTP broadcast 2
815 19:53:47.212188 DHCP client bound to address 192.168.6.21 (273 ms)
817 19:53:47.313317 => setenv serverip 192.168.6.2
818 19:53:47.313857 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
819 19:53:47.318132 setenv serverip 192.168.6.2
821 19:53:47.419282 => tftpboot 0x01080000 955249/tftp-deploy-whwktopx/kernel/uImage
822 19:53:47.420089 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:40)
823 19:53:47.426912 tftpboot 0x01080000 955249/tftp-deploy-whwktopx/kernel/uImage
824 19:53:47.427448 Speed: 1000, full duplex
825 19:53:47.427864 Using ethernet@ff3f0000 device
826 19:53:47.432288 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
827 19:53:47.437775 Filename '955249/tftp-deploy-whwktopx/kernel/uImage'.
828 19:53:47.441615 Load address: 0x1080000
829 19:53:50.159660 Loading: *################################################## 37.6 MiB
830 19:53:50.160336 13.8 MiB/s
831 19:53:50.160789 done
832 19:53:50.163970 Bytes transferred = 39424576 (2599240 hex)
834 19:53:50.265660 => tftpboot 0x08000000 955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
835 19:53:50.266187 bootloader-commands: Wait for prompt ['=>', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image'] (timeout 00:04:38)
836 19:53:50.272973 tftpboot 0x08000000 955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot
837 19:53:50.273279 Speed: 1000, full duplex
838 19:53:50.273488 Using ethernet@ff3f0000 device
839 19:53:50.278280 TFTP from server 192.168.6.2; our IP address is 192.168.6.21
840 19:53:50.288205 Filename '955249/tftp-deploy-whwktopx/ramdisk/ramdisk.cpio.gz.uboot'.
841 19:53:50.288551 Load address: 0x8000000
842 19:53:51.878925 Loading: *################################################# UDP wrong checksum 00000005 00003416
843 19:53:53.946256 UDP wrong checksum 000000ff 00003f93
844 19:53:54.248802 UDP wrong checksum 000000ff 0000cf85
845 19:53:56.882371 T UDP wrong checksum 00000005 00003416
846 19:54:04.965037 T UDP wrong checksum 000000ff 0000cd99
847 19:54:05.015104 UDP wrong checksum 000000ff 0000688c
848 19:54:06.881929 T UDP wrong checksum 00000005 00003416
849 19:54:26.885856 T T T T UDP wrong checksum 00000005 00003416
850 19:54:40.399778 T T UDP wrong checksum 000000ff 00005b09
851 19:54:40.414712 UDP wrong checksum 000000ff 0000f1fb
852 19:54:40.706451 UDP wrong checksum 000000ff 000035f4
853 19:54:40.766500 UDP wrong checksum 000000ff 0000c6e6
854 19:54:46.890492 T
855 19:54:46.890925 Retry count exceeded; starting again
857 19:54:46.892232 end: 2.4.3 bootloader-commands (duration 00:01:01) [common]
860 19:54:46.893254 end: 2.4 uboot-commands (duration 00:01:19) [common]
862 19:54:46.894031 uboot-action failed: 1 of 1 attempts. 'matched a bootloader error message: 'Retry count exceeded' (4)'
864 19:54:46.894627 end: 2 uboot-action (duration 00:01:19) [common]
866 19:54:46.895672 Cleaning after the job
867 19:54:46.896045 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/ramdisk
868 19:54:46.896920 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/kernel
869 19:54:46.900644 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/dtb
870 19:54:46.901479 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/nfsrootfs
871 19:54:46.937120 Cleaning up download directory: /var/lib/lava/dispatcher/tmp/955249/tftp-deploy-whwktopx/modules
872 19:54:46.953622 start: 4.1 power-off (timeout 00:00:30) [common]
873 19:54:46.954303 Calling: 'curl' 'http://conserv1.mayfield.sirena.org.uk:16421/power/control/off?hostname=cambrionix&port=solitude-01'
874 19:54:46.990148 >> OK - accepted request
875 19:54:46.993383 Returned 0 in 0 seconds
876 19:54:47.094222 end: 4.1 power-off (duration 00:00:00) [common]
878 19:54:47.095226 start: 4.2 read-feedback (timeout 00:10:00) [common]
879 19:54:47.095868 Listened to connection for namespace 'common' for up to 1s
880 19:54:48.096183 Finalising connection for namespace 'common'
881 19:54:48.096668 Disconnecting from shell: Finalise
882 19:54:48.097228 =>
883 19:54:48.198026 end: 4.2 read-feedback (duration 00:00:01) [common]
884 19:54:48.198503 Override tmp directory removed at /var/lib/lava/dispatcher/tmp/955249
885 19:54:50.127024 Root tmp directory removed at /var/lib/lava/dispatcher/tmp/955249
886 19:54:50.128909 InfrastructureError: The Infrastructure is not working correctly. Please report this error to LAVA admins.