Boot log: beaglebone-black

    1 02:04:58.754431  lava-dispatcher, installed at version: 2023.08
    2 02:04:58.754833  start: 0 validate
    3 02:04:58.755061  Start time: 2024-11-08 02:04:58.755047+00:00 (UTC)
    4 02:04:58.755336  Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz exists
    5 02:04:59.105302  Validating that http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/kernel/zImage exists
    6 02:04:59.262131  Validating that http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/dtbs/ti/omap/am335x-boneblack.dtb exists
    7 02:04:59.419120  Validating that http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz exists
    8 02:04:59.577080  Validating that http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/modules.tar.xz exists
    9 02:04:59.742137  validate duration: 0.99
   11 02:04:59.743253  start: 1 tftp-deploy (timeout 00:10:00) [common]
   12 02:04:59.743732  start: 1.1 download-retry (timeout 00:10:00) [common]
   13 02:04:59.744176  start: 1.1.1 http-download (timeout 00:10:00) [common]
   14 02:04:59.744956  Not decompressing ramdisk as can be used compressed.
   15 02:04:59.745393  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/initrd.cpio.gz
   16 02:04:59.745747  saving as /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/ramdisk/initrd.cpio.gz
   17 02:04:59.746097  total size: 4775763 (4 MB)
   18 02:05:00.060111  progress   0 % (0 MB)
   19 02:05:00.526968  progress   5 % (0 MB)
   20 02:05:00.681931  progress  10 % (0 MB)
   21 02:05:01.026860  progress  15 % (0 MB)
   22 02:05:01.036438  progress  20 % (0 MB)
   23 02:05:01.042719  progress  25 % (1 MB)
   24 02:05:01.048833  progress  30 % (1 MB)
   25 02:05:01.055658  progress  35 % (1 MB)
   26 02:05:01.151218  progress  40 % (1 MB)
   27 02:05:01.304730  progress  45 % (2 MB)
   28 02:05:01.330828  progress  50 % (2 MB)
   29 02:05:01.479948  progress  55 % (2 MB)
   30 02:05:01.621891  progress  60 % (2 MB)
   31 02:05:01.660676  progress  65 % (2 MB)
   32 02:05:01.793447  progress  70 % (3 MB)
   33 02:05:01.936069  progress  75 % (3 MB)
   34 02:05:02.007786  progress  80 % (3 MB)
   35 02:05:02.102872  progress  85 % (3 MB)
   36 02:05:02.247829  progress  90 % (4 MB)
   37 02:05:02.316915  progress  95 % (4 MB)
   38 02:05:02.415584  progress 100 % (4 MB)
   39 02:05:02.416687  4 MB downloaded in 2.67 s (1.71 MB/s)
   40 02:05:02.417409  end: 1.1.1 http-download (duration 00:00:03) [common]
   42 02:05:02.418564  end: 1.1 download-retry (duration 00:00:03) [common]
   43 02:05:02.418979  start: 1.2 download-retry (timeout 00:09:57) [common]
   44 02:05:02.419383  start: 1.2.1 http-download (timeout 00:09:57) [common]
   45 02:05:02.420006  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/kernel/zImage
   46 02:05:02.420322  saving as /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/kernel/zImage
   47 02:05:02.420624  total size: 12050944 (11 MB)
   48 02:05:02.420955  No compression specified
   49 02:05:02.581051  progress   0 % (0 MB)
   50 02:05:02.896359  progress   5 % (0 MB)
   51 02:05:03.202341  progress  10 % (1 MB)
   52 02:05:03.521059  progress  15 % (1 MB)
   53 02:05:03.879620  progress  20 % (2 MB)
   54 02:05:04.191935  progress  25 % (2 MB)
   55 02:05:04.640997  progress  30 % (3 MB)
   56 02:05:05.064924  progress  35 % (4 MB)
   57 02:05:05.429516  progress  40 % (4 MB)
   58 02:05:05.877387  progress  45 % (5 MB)
   59 02:05:06.209774  progress  50 % (5 MB)
   60 02:05:06.653705  progress  55 % (6 MB)
   61 02:05:06.984051  progress  60 % (6 MB)
   62 02:05:07.421288  progress  65 % (7 MB)
   63 02:05:07.753179  progress  70 % (8 MB)
   64 02:05:08.083744  progress  75 % (8 MB)
   65 02:05:08.522556  progress  80 % (9 MB)
   66 02:05:08.853255  progress  85 % (9 MB)
   67 02:05:09.284993  progress  90 % (10 MB)
   68 02:05:09.621695  progress  95 % (10 MB)
   69 02:05:10.024216  progress 100 % (11 MB)
   70 02:05:10.025386  11 MB downloaded in 7.60 s (1.51 MB/s)
   71 02:05:10.026234  end: 1.2.1 http-download (duration 00:00:08) [common]
   73 02:05:10.027442  end: 1.2 download-retry (duration 00:00:08) [common]
   74 02:05:10.027854  start: 1.3 download-retry (timeout 00:09:50) [common]
   75 02:05:10.028286  start: 1.3.1 http-download (timeout 00:09:50) [common]
   76 02:05:10.028955  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/dtbs/ti/omap/am335x-boneblack.dtb
   77 02:05:10.029310  saving as /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb
   78 02:05:10.029643  total size: 70568 (0 MB)
   79 02:05:10.029943  No compression specified
   80 02:05:10.191251  progress  46 % (0 MB)
   81 02:05:10.194079  progress  92 % (0 MB)
   82 02:05:10.195323  progress 100 % (0 MB)
   83 02:05:10.195862  0 MB downloaded in 0.17 s (0.40 MB/s)
   84 02:05:10.196423  end: 1.3.1 http-download (duration 00:00:00) [common]
   86 02:05:10.197536  end: 1.3 download-retry (duration 00:00:00) [common]
   87 02:05:10.197931  start: 1.4 download-retry (timeout 00:09:50) [common]
   88 02:05:10.198372  start: 1.4.1 http-download (timeout 00:09:50) [common]
   89 02:05:10.198916  downloading http://storage.kernelci.org/images/rootfs/debian/bookworm-kselftest/20240313.0/armhf/full.rootfs.tar.xz
   90 02:05:10.199227  saving as /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/nfsrootfs/full.rootfs.tar
   91 02:05:10.199557  total size: 117747780 (112 MB)
   92 02:05:10.199867  Using unxz to decompress xz
   93 02:05:10.361540  progress   0 % (0 MB)
   94 02:05:14.277063  progress   5 % (5 MB)
   95 02:05:17.977760  progress  10 % (11 MB)
   96 02:05:21.105185  progress  15 % (16 MB)
   97 02:05:23.289175  progress  20 % (22 MB)
   98 02:05:24.847409  progress  25 % (28 MB)
   99 02:05:26.051051  progress  30 % (33 MB)
  100 02:05:26.988410  progress  35 % (39 MB)
  101 02:05:27.910735  progress  40 % (44 MB)
  102 02:05:28.904813  progress  45 % (50 MB)
  103 02:05:29.813590  progress  50 % (56 MB)
  104 02:05:30.673730  progress  55 % (61 MB)
  105 02:05:31.509313  progress  60 % (67 MB)
  106 02:05:32.361684  progress  65 % (73 MB)
  107 02:05:33.453784  progress  70 % (78 MB)
  108 02:05:34.543616  progress  75 % (84 MB)
  109 02:05:35.890828  progress  80 % (89 MB)
  110 02:05:37.134272  progress  85 % (95 MB)
  111 02:05:38.312735  progress  90 % (101 MB)
  112 02:05:39.598171  progress  95 % (106 MB)
  113 02:05:41.070415  progress 100 % (112 MB)
  114 02:05:41.077675  112 MB downloaded in 30.88 s (3.64 MB/s)
  115 02:05:41.078293  end: 1.4.1 http-download (duration 00:00:31) [common]
  117 02:05:41.079421  end: 1.4 download-retry (duration 00:00:31) [common]
  118 02:05:41.079823  start: 1.5 download-retry (timeout 00:09:19) [common]
  119 02:05:41.080222  start: 1.5.1 http-download (timeout 00:09:19) [common]
  120 02:05:41.080874  downloading http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/modules.tar.xz
  121 02:05:41.081050  saving as /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/modules/modules.tar
  122 02:05:41.081214  total size: 6916884 (6 MB)
  123 02:05:41.081454  Using unxz to decompress xz
  124 02:05:41.241405  progress   0 % (0 MB)
  125 02:05:41.423977  progress   5 % (0 MB)
  126 02:05:41.468082  progress  10 % (0 MB)
  127 02:05:41.500248  progress  15 % (1 MB)
  128 02:05:41.580380  progress  20 % (1 MB)
  129 02:05:41.722059  progress  25 % (1 MB)
  130 02:05:41.866017  progress  30 % (2 MB)
  131 02:05:41.900677  progress  35 % (2 MB)
  132 02:05:42.039114  progress  40 % (2 MB)
  133 02:05:42.179075  progress  45 % (2 MB)
  134 02:05:42.216134  progress  50 % (3 MB)
  135 02:05:42.356121  progress  55 % (3 MB)
  136 02:05:42.493240  progress  60 % (3 MB)
  137 02:05:42.530286  progress  65 % (4 MB)
  138 02:05:42.668445  progress  70 % (4 MB)
  139 02:05:42.808242  progress  75 % (4 MB)
  140 02:05:42.844793  progress  80 % (5 MB)
  141 02:05:42.980490  progress  85 % (5 MB)
  142 02:05:43.111680  progress  90 % (5 MB)
  143 02:05:43.157737  progress  95 % (6 MB)
  144 02:05:43.283857  progress 100 % (6 MB)
  145 02:05:43.290539  6 MB downloaded in 2.21 s (2.99 MB/s)
  146 02:05:43.291121  end: 1.5.1 http-download (duration 00:00:02) [common]
  148 02:05:43.292225  end: 1.5 download-retry (duration 00:00:02) [common]
  149 02:05:43.292631  start: 1.6 prepare-tftp-overlay (timeout 00:09:16) [common]
  150 02:05:43.292972  start: 1.6.1 extract-nfsrootfs (timeout 00:09:16) [common]
  151 02:05:50.589487  Extracted nfsroot to /var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3
  152 02:05:50.589755  end: 1.6.1 extract-nfsrootfs (duration 00:00:07) [common]
  153 02:05:50.589906  start: 1.6.2 lava-overlay (timeout 00:09:09) [common]
  154 02:05:50.590201  [common] Preparing overlay tarball in /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p
  155 02:05:50.590448  makedir: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin
  156 02:05:50.590631  makedir: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/tests
  157 02:05:50.590797  makedir: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/results
  158 02:05:50.590956  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-add-keys
  159 02:05:50.591201  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-add-sources
  160 02:05:50.591422  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-background-process-start
  161 02:05:50.591642  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-background-process-stop
  162 02:05:50.591878  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-common-functions
  163 02:05:50.592095  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-echo-ipv4
  164 02:05:50.592313  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-install-packages
  165 02:05:50.592534  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-installed-packages
  166 02:05:50.592747  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-os-build
  167 02:05:50.592969  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-probe-channel
  168 02:05:50.593246  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-probe-ip
  169 02:05:50.593464  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-target-ip
  170 02:05:50.593677  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-target-mac
  171 02:05:50.593893  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-target-storage
  172 02:05:50.594110  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-case
  173 02:05:50.594325  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-event
  174 02:05:50.594537  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-feedback
  175 02:05:50.594749  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-raise
  176 02:05:50.594961  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-reference
  177 02:05:50.595175  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-runner
  178 02:05:50.595385  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-set
  179 02:05:50.595597  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-test-shell
  180 02:05:50.595814  Updating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-add-keys (debian)
  181 02:05:50.628087  Updating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-add-sources (debian)
  182 02:05:50.628408  Updating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-install-packages (debian)
  183 02:05:50.628672  Updating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-installed-packages (debian)
  184 02:05:50.628987  Updating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/bin/lava-os-build (debian)
  185 02:05:50.629230  Creating /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/environment
  186 02:05:50.629412  LAVA metadata
  187 02:05:50.629528  - LAVA_JOB_ID=1219052
  188 02:05:50.629640  - LAVA_DISPATCHER_IP=172.16.3.3
  189 02:05:50.629811  start: 1.6.2.1 ssh-authorize (timeout 00:09:09) [common]
  190 02:05:50.630251  end: 1.6.2.1 ssh-authorize (duration 00:00:00) [common]
  191 02:05:50.630404  start: 1.6.2.2 lava-vland-overlay (timeout 00:09:09) [common]
  192 02:05:50.630510  skipped lava-vland-overlay
  193 02:05:50.630639  end: 1.6.2.2 lava-vland-overlay (duration 00:00:00) [common]
  194 02:05:50.630775  start: 1.6.2.3 lava-multinode-overlay (timeout 00:09:09) [common]
  195 02:05:50.630902  skipped lava-multinode-overlay
  196 02:05:50.631033  end: 1.6.2.3 lava-multinode-overlay (duration 00:00:00) [common]
  197 02:05:50.631180  start: 1.6.2.4 test-definition (timeout 00:09:09) [common]
  198 02:05:50.631297  Loading test definitions
  199 02:05:50.631438  start: 1.6.2.4.1 inline-repo-action (timeout 00:09:09) [common]
  200 02:05:50.631550  Using /lava-1219052 at stage 0
  201 02:05:50.632099  uuid=1219052_1.6.2.4.1 testdef=None
  202 02:05:50.632251  end: 1.6.2.4.1 inline-repo-action (duration 00:00:00) [common]
  203 02:05:50.632385  start: 1.6.2.4.2 test-overlay (timeout 00:09:09) [common]
  204 02:05:50.633207  end: 1.6.2.4.2 test-overlay (duration 00:00:00) [common]
  206 02:05:50.633581  start: 1.6.2.4.3 test-install-overlay (timeout 00:09:09) [common]
  207 02:05:50.634513  end: 1.6.2.4.3 test-install-overlay (duration 00:00:00) [common]
  209 02:05:50.634899  start: 1.6.2.4.4 test-runscript-overlay (timeout 00:09:09) [common]
  210 02:05:50.649774  runner path: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/0/tests/0_timesync-off test_uuid 1219052_1.6.2.4.1
  211 02:05:50.650060  end: 1.6.2.4.4 test-runscript-overlay (duration 00:00:00) [common]
  213 02:05:50.650479  start: 1.6.2.4.5 git-repo-action (timeout 00:09:09) [common]
  214 02:05:50.650597  Using /lava-1219052 at stage 0
  215 02:05:50.650761  Fetching tests from https://github.com/kernelci/test-definitions.git
  216 02:05:50.650879  Running '/usr/bin/git clone https://github.com/kernelci/test-definitions.git /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/0/tests/1_kselftest-dt'
  217 02:05:56.329803  Running '/usr/bin/git checkout kernelci.org
  218 02:05:56.644633  Tests stored (tmp) in /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/0/tests/1_kselftest-dt/automated/linux/kselftest/kselftest.yaml
  219 02:05:56.646445  uuid=1219052_1.6.2.4.5 testdef=None
  220 02:05:56.646942  end: 1.6.2.4.5 git-repo-action (duration 00:00:06) [common]
  222 02:05:56.648084  start: 1.6.2.4.6 test-overlay (timeout 00:09:03) [common]
  223 02:05:56.651733  end: 1.6.2.4.6 test-overlay (duration 00:00:00) [common]
  225 02:05:56.652902  start: 1.6.2.4.7 test-install-overlay (timeout 00:09:03) [common]
  226 02:05:56.657767  end: 1.6.2.4.7 test-install-overlay (duration 00:00:00) [common]
  228 02:05:56.658986  start: 1.6.2.4.8 test-runscript-overlay (timeout 00:09:03) [common]
  229 02:05:56.663873  runner path: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/0/tests/1_kselftest-dt test_uuid 1219052_1.6.2.4.5
  230 02:05:56.664280  BOARD='beaglebone-black'
  231 02:05:56.664624  BRANCH='mainline'
  232 02:05:56.664908  SKIPFILE='/dev/null'
  233 02:05:56.665036  SKIP_INSTALL='True'
  234 02:05:56.665288  TESTPROG_URL='http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz'
  235 02:05:56.665614  TST_CASENAME=''
  236 02:05:56.665936  TST_CMDFILES='dt'
  237 02:05:56.666677  end: 1.6.2.4.8 test-runscript-overlay (duration 00:00:00) [common]
  239 02:05:56.667764  Creating lava-test-runner.conf files
  240 02:05:56.668089  Using lava-test-runner path: /var/lib/lava/dispatcher/tmp/1219052/lava-overlay-dwi0951p/lava-1219052/0 for stage 0
  241 02:05:56.668575  - 0_timesync-off
  242 02:05:56.668909  - 1_kselftest-dt
  243 02:05:56.669224  end: 1.6.2.4 test-definition (duration 00:00:06) [common]
  244 02:05:56.669657  start: 1.6.2.5 compress-overlay (timeout 00:09:03) [common]
  245 02:06:06.422084  end: 1.6.2.5 compress-overlay (duration 00:00:10) [common]
  246 02:06:06.422351  start: 1.6.2.6 persistent-nfs-overlay (timeout 00:08:53) [common]
  247 02:06:06.422519  end: 1.6.2.6 persistent-nfs-overlay (duration 00:00:00) [common]
  248 02:06:06.422680  end: 1.6.2 lava-overlay (duration 00:00:16) [common]
  249 02:06:06.422859  start: 1.6.3 extract-overlay-ramdisk (timeout 00:08:53) [common]
  250 02:06:06.566735  end: 1.6.3 extract-overlay-ramdisk (duration 00:00:00) [common]
  251 02:06:06.567007  start: 1.6.4 extract-modules (timeout 00:08:53) [common]
  252 02:06:06.567144  extracting modules file /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3
  253 02:06:06.964551  extracting modules file /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/modules/modules.tar to /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk
  254 02:06:07.372671  end: 1.6.4 extract-modules (duration 00:00:01) [common]
  255 02:06:07.372932  start: 1.6.5 apply-overlay-tftp (timeout 00:08:52) [common]
  256 02:06:07.373070  [common] Applying overlay to NFS
  257 02:06:07.373195  [common] Applying overlay /var/lib/lava/dispatcher/tmp/1219052/compress-overlay-txhd3252/overlay-1.6.2.5.tar.gz to directory /var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3
  258 02:06:08.739432  end: 1.6.5 apply-overlay-tftp (duration 00:00:01) [common]
  259 02:06:08.739647  start: 1.6.6 prepare-kernel (timeout 00:08:51) [common]
  260 02:06:08.739790  start: 1.6.6.1 uboot-prepare-kernel (timeout 00:08:51) [common]
  261 02:06:08.739934  end: 1.6.6.1 uboot-prepare-kernel (duration 00:00:00) [common]
  262 02:06:08.740067  end: 1.6.6 prepare-kernel (duration 00:00:00) [common]
  263 02:06:08.740203  start: 1.6.7 configure-preseed-file (timeout 00:08:51) [common]
  264 02:06:08.740365  end: 1.6.7 configure-preseed-file (duration 00:00:00) [common]
  265 02:06:08.740505  start: 1.6.8 compress-ramdisk (timeout 00:08:51) [common]
  266 02:06:08.740635  Building ramdisk /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk.cpio containing /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk
  267 02:06:09.054466  >> 79012 blocks

  268 02:06:11.452420  Adding RAMdisk u-boot header.
  269 02:06:11.452837  mkimage -A arm -T ramdisk -C none -d /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk.cpio.gz /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk.cpio.gz.uboot
  270 02:06:11.744414  output: Image Name:   
  271 02:06:11.744904  output: Created:      Fri Nov  8 02:06:11 2024
  272 02:06:11.745060  output: Image Type:   ARM Linux RAMDisk Image (uncompressed)
  273 02:06:11.745381  output: Data Size:    15357897 Bytes = 14997.95 KiB = 14.65 MiB
  274 02:06:11.745691  output: Load Address: 00000000
  275 02:06:11.745998  output: Entry Point:  00000000
  276 02:06:11.746296  output: 
  277 02:06:11.746812  rename /var/lib/lava/dispatcher/tmp/1219052/extract-overlay-ramdisk-x2gl8jad/ramdisk.cpio.gz.uboot to /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  278 02:06:11.747334  end: 1.6.8 compress-ramdisk (duration 00:00:03) [common]
  279 02:06:11.747760  end: 1.6 prepare-tftp-overlay (duration 00:00:28) [common]
  280 02:06:11.748182  start: 1.7 lxc-create-udev-rule-action (timeout 00:08:48) [common]
  281 02:06:11.748501  No LXC device requested
  282 02:06:11.748883  end: 1.7 lxc-create-udev-rule-action (duration 00:00:00) [common]
  283 02:06:11.749087  start: 1.8 deploy-device-env (timeout 00:08:48) [common]
  284 02:06:11.749479  end: 1.8 deploy-device-env (duration 00:00:00) [common]
  285 02:06:11.749798  Checking files for TFTP limit of 4294967296 bytes.
  286 02:06:11.751797  end: 1 tftp-deploy (duration 00:01:12) [common]
  287 02:06:11.752223  start: 2 uboot-action (timeout 00:05:00) [common]
  288 02:06:11.752655  start: 2.1 uboot-from-media (timeout 00:05:00) [common]
  289 02:06:11.752948  end: 2.1 uboot-from-media (duration 00:00:00) [common]
  290 02:06:11.753253  start: 2.2 bootloader-overlay (timeout 00:05:00) [common]
  291 02:06:11.753830  substitutions:
  292 02:06:11.754150  - {BOOTX}: bootz 0x82000000 0x83000000 0x88000000
  293 02:06:11.754468  - {DTB_ADDR}: 0x88000000
  294 02:06:11.754774  - {DTB}: 1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb
  295 02:06:11.755069  - {INITRD}: 1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  296 02:06:11.755374  - {KERNEL_ADDR}: 0x82000000
  297 02:06:11.755680  - {KERNEL}: 1219052/tftp-deploy-k10r_dqk/kernel/zImage
  298 02:06:11.755982  - {LAVA_MAC}: None
  299 02:06:11.756300  - {NFSROOTFS}: /var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3
  300 02:06:11.756602  - {NFS_SERVER_IP}: 172.16.3.3
  301 02:06:11.756883  - {PRESEED_CONFIG}: None
  302 02:06:11.757006  - {PRESEED_LOCAL}: None
  303 02:06:11.757277  - {RAMDISK_ADDR}: 0x83000000
  304 02:06:11.757573  - {RAMDISK}: 1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  305 02:06:11.757865  - {ROOT_PART}: None
  306 02:06:11.758143  - {ROOT}: None
  307 02:06:11.758433  - {SERVER_IP}: 172.16.3.3
  308 02:06:11.758721  - {TEE_ADDR}: 0x83000000
  309 02:06:11.759009  - {TEE}: None
  310 02:06:11.759301  Parsed boot commands:
  311 02:06:11.759583  - setenv autoload no
  312 02:06:11.759861  - setenv initrd_high 0xffffffff
  313 02:06:11.760155  - setenv fdt_high 0xffffffff
  314 02:06:11.760441  - dhcp
  315 02:06:11.760727  - setenv serverip 172.16.3.3
  316 02:06:11.760930  - tftp 0x82000000 1219052/tftp-deploy-k10r_dqk/kernel/zImage
  317 02:06:11.761095  - tftp 0x83000000 1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  318 02:06:11.761388  - setenv initrd_size ${filesize}
  319 02:06:11.761674  - tftp 0x88000000 1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb
  320 02:06:11.761950  - setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  321 02:06:11.762260  - bootz 0x82000000 0x83000000 0x88000000
  322 02:06:11.762631  end: 2.2 bootloader-overlay (duration 00:00:00) [common]
  324 02:06:11.763676  start: 2.3 connect-device (timeout 00:05:00) [common]
  325 02:06:11.764001  [common] connect-device Connecting to device using 'telnet ts5 2002'
  326 02:06:11.773618  Setting prompt string to ['lava-test: # ']
  327 02:06:11.774797  end: 2.3 connect-device (duration 00:00:00) [common]
  328 02:06:11.775290  start: 2.4 uboot-commands (timeout 00:05:00) [common]
  329 02:06:11.775753  start: 2.4.1 reset-device (timeout 00:05:00) [common]
  330 02:06:11.776200  start: 2.4.1.1 pdu-reboot (timeout 00:05:00) [common]
  331 02:06:11.776907  Calling: 'drpm' 'lf-bbb-02' 'powercycle'
  332 02:06:12.142731  >> OFF

  333 02:06:27.430411  >> ON

  334 02:06:27.431446  Returned 0 in 15 seconds
  335 02:06:27.532370  end: 2.4.1.1 pdu-reboot (duration 00:00:16) [common]
  337 02:06:27.533560  end: 2.4.1 reset-device (duration 00:00:16) [common]
  338 02:06:27.533988  start: 2.4.2 bootloader-interrupt (timeout 00:04:44) [common]
  339 02:06:27.534379  Setting prompt string to ['Hit any key to stop autoboot']
  340 02:06:27.534722  bootloader-interrupt: Wait for prompt ['Hit any key to stop autoboot'] (timeout 00:05:00)
  341 02:06:27.535647  Trying 192.168.1.205...
  342 02:06:27.535971  Connected to ts5.
  343 02:06:27.536270  Escape character is '^]'.
  344 02:06:27.536569  
  345 02:06:27.536922  ser2net port telnet,2002 device serialdev,/dev/ttyUSB-lf-bbb-02,115200n81,local [] (Debian GNU/Linux)
  346 02:06:27.537225  
  347 02:06:28.247716  
  348 02:06:28.255635  U-Boot SPL 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
  349 02:06:28.256028  Trying to boot from MMC2
  350 02:06:28.768517  
  351 02:06:28.768958  
  352 02:06:28.774509  U-Boot 2021.10-nethacked-for-LAVA_hws@denx.de-dirty (Oct 19 2021 - 19:02:35 +0200)
  353 02:06:28.774911  
  354 02:06:28.775241  CPU  : AM335X-GP rev 2.1
  355 02:06:28.781323  Model: TI AM335x BeagleBone Black
  356 02:06:28.781722  DRAM:  512 MiB
  357 02:06:28.861327  WDT:   Started with servicing (60s timeout)
  358 02:06:29.267393  NAND:  0 MiB
  359 02:06:29.277207  MMC:   OMAP SD/MMC: 0, OMAP SD/MMC: 1
  360 02:06:29.310638  Loading Environment from FAT... <ethaddr> not set. Validating first E-fuse MAC
  361 02:06:29.339000  Net:   eth2: ethernet@4a100000, eth3: usb_ether
  362 02:06:29.398530  end: 2.4.2 bootloader-interrupt (duration 00:00:02) [common]
  363 02:06:29.399069  start: 2.4.3 bootloader-commands (timeout 00:04:42) [common]
  364 02:06:29.399449  Setting prompt string to ['=> ']
  365 02:06:29.399831  bootloader-commands: Wait for prompt ['=> '] (timeout 00:04:42)
  366 02:06:29.409666  Hit any key to stop autoboot:  2   0 
  367 02:06:29.410437  Setting prompt string to ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  368 02:06:29.410825  Sending with 10 millisecond of delay
  370 02:06:30.547020  => setenv autoload no
  371 02:06:30.557562  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:41)
  372 02:06:30.560721  setenv autoload no
  373 02:06:30.561346  Sending with 10 millisecond of delay
  375 02:06:32.360246  => setenv initrd_high 0xffffffff
  376 02:06:32.370857  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:39)
  377 02:06:32.371489  setenv initrd_high 0xffffffff
  378 02:06:32.372057  Sending with 10 millisecond of delay
  380 02:06:33.990660  => setenv fdt_high 0xffffffff
  381 02:06:34.001244  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:38)
  382 02:06:34.001861  setenv fdt_high 0xffffffff
  383 02:06:34.002422  Sending with 10 millisecond of delay
  385 02:06:34.294504  => dhcp
  386 02:06:34.305053  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:37)
  387 02:06:34.306050  dhcp
  388 02:06:34.306378  link up on port 0, speed 100, full duplex
  389 02:06:34.306681  BOOTP broadcast 1
  390 02:06:34.353339  DHCP client bound to address 172.16.3.189 (41 ms)
  391 02:06:34.353955  Sending with 10 millisecond of delay
  393 02:06:35.973188  => setenv serverip 172.16.3.3
  394 02:06:35.983735  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:36)
  395 02:06:35.984370  setenv serverip 172.16.3.3
  396 02:06:35.984936  Sending with 10 millisecond of delay
  398 02:06:39.532863  => tftp 0x82000000 1219052/tftp-deploy-k10r_dqk/kernel/zImage
  399 02:06:39.543543  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:32)
  400 02:06:39.544201  tftp 0x82000000 1219052/tftp-deploy-k10r_dqk/kernel/zImage
  401 02:06:39.544529  link up on port 0, speed 100, full duplex
  402 02:06:39.549786  Using ethernet@4a100000 device
  403 02:06:39.555698  TFTP from server 172.16.3.3; our IP address is 172.16.3.189
  404 02:06:39.556358  Filename '1219052/tftp-deploy-k10r_dqk/kernel/zImage'.
  405 02:06:39.561774  Load address: 0x82000000
  406 02:06:42.555621  Loading: *##################################################  11.5 MiB
  407 02:06:42.556164  	 3.8 MiB/s
  408 02:06:42.556479  done
  409 02:06:42.561032  Bytes transferred = 12050944 (b7e200 hex)
  410 02:06:42.561409  Sending with 10 millisecond of delay
  412 02:06:47.073282  => tftp 0x83000000 1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  413 02:06:47.083929  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:25)
  414 02:06:47.084631  tftp 0x83000000 1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot
  415 02:06:47.085004  link up on port 0, speed 100, full duplex
  416 02:06:47.089481  Using ethernet@4a100000 device
  417 02:06:47.095627  TFTP from server 172.16.3.3; our IP address is 172.16.3.189
  418 02:06:47.104845  Filename '1219052/tftp-deploy-k10r_dqk/ramdisk/ramdisk.cpio.gz.uboot'.
  419 02:06:47.105047  Load address: 0x83000000
  420 02:06:50.882400  Loading: *##################################################  14.6 MiB
  421 02:06:50.882852  	 3.9 MiB/s
  422 02:06:50.883170  done
  423 02:06:50.887940  Bytes transferred = 15357961 (ea5809 hex)
  424 02:06:50.888596  Sending with 10 millisecond of delay
  426 02:06:52.748275  => setenv initrd_size ${filesize}
  427 02:06:52.758895  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:19)
  428 02:06:52.759525  setenv initrd_size ${filesize}
  429 02:06:52.760091  Sending with 10 millisecond of delay
  431 02:06:56.970420  => tftp 0x88000000 1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb
  432 02:06:56.981055  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:15)
  433 02:06:56.981996  tftp 0x88000000 1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb
  434 02:06:56.982335  link up on port 0, speed 100, full duplex
  435 02:06:56.987985  Using ethernet@4a100000 device
  436 02:06:56.992932  TFTP from server 172.16.3.3; our IP address is 172.16.3.189
  437 02:06:57.006077  Filename '1219052/tftp-deploy-k10r_dqk/dtb/am335x-boneblack.dtb'.
  438 02:06:57.006301  Load address: 0x88000000
  439 02:06:57.020767  Loading: *##################################################  68.9 KiB
  440 02:06:57.021177  	 3.4 MiB/s
  441 02:06:57.028766  done
  442 02:06:57.029023  Bytes transferred = 70568 (113a8 hex)
  443 02:06:57.029610  Sending with 10 millisecond of delay
  445 02:07:10.404268  => setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  446 02:07:10.414969  bootloader-commands: Wait for prompt ['=> ', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:04:01)
  447 02:07:10.415612  setenv bootargs 'console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp'
  448 02:07:10.416201  Sending with 10 millisecond of delay
  450 02:07:12.758022  => bootz 0x82000000 0x83000000 0x88000000
  451 02:07:12.768643  Setting prompt string to ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  452 02:07:12.769132  bootloader-commands: Wait for prompt ['Starting kernel', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:03:59)
  453 02:07:12.769864  bootz 0x82000000 0x83000000 0x88000000
  454 02:07:12.770190  Kernel image @ 0x82000000 [ 0x000000 - 0xb7e200 ]
  455 02:07:12.771352  ## Loading init Ramdisk from Legacy Image at 83000000 ...
  456 02:07:12.777374     Image Name:   
  457 02:07:12.777758     Created:      2024-11-08   2:06:11 UTC
  458 02:07:12.782371     Image Type:   ARM Linux RAMDisk Image (uncompressed)
  459 02:07:12.788432     Data Size:    15357897 Bytes = 14.6 MiB
  460 02:07:12.788850     Load Address: 00000000
  461 02:07:12.793240     Entry Point:  00000000
  462 02:07:12.969485     Verifying Checksum ... OK
  463 02:07:12.969874  ## Flattened Device Tree blob at 88000000
  464 02:07:12.976838     Booting using the fdt blob at 0x88000000
  465 02:07:12.981155     Using Device Tree in place at 88000000, end 880143a7
  466 02:07:12.994467  
  467 02:07:12.994865  Starting kernel ...
  468 02:07:12.995180  
  469 02:07:12.995887  end: 2.4.3 bootloader-commands (duration 00:00:44) [common]
  470 02:07:12.996311  start: 2.4.4 auto-login-action (timeout 00:03:59) [common]
  471 02:07:12.996660  Setting prompt string to ['Linux version [0-9]']
  472 02:07:12.997047  Setting prompt string to ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid']
  473 02:07:12.997392  auto-login-action: Wait for prompt ['Linux version [0-9]', 'Resetting CPU', 'Must RESET board to recover', 'TIMEOUT', 'Retry count exceeded', 'Retry time exceeded; starting again', 'ERROR: The remote end did not respond in time.', 'File not found', 'Bad Linux ARM64 Image magic!', 'Wrong Ramdisk Image Format', 'Ramdisk image is corrupt or invalid', 'ERROR: Failed to allocate', 'TFTP error: trying to overwrite reserved memory', 'Bad Linux RISCV Image magic!', 'Wrong Image Format for boot', 'ERROR: Did not find a cmdline Flattened Device Tree', 'ERROR: RD image overlaps OS image', 'Ramdisk image is corrupt or invalid'] (timeout 00:05:00)
  474 02:07:13.885107  [    0.000000] Booting Linux on physical CPU 0x0
  475 02:07:13.890500  start: 2.4.4.1 login-action (timeout 00:03:58) [common]
  476 02:07:13.890925  The string '/ #' does not look like a typical prompt and could match status messages instead. Please check the job log files and use a prompt string which matches the actual prompt string more closely.
  477 02:07:13.891276  Setting prompt string to []
  478 02:07:13.891628  Setting prompt string to ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing']
  479 02:07:13.891967  Using line separator: #'\n'#
  480 02:07:13.892265  No login prompt set.
  481 02:07:13.892577  Parsing kernel messages
  482 02:07:13.892900  ['-\\[ cut here \\]', 'Unhandled fault', 'BUG: KCSAN:', 'BUG: KASAN:', 'BUG: KFENCE:', 'Oops(?: -|:)', 'WARNING:', '(kernel BUG at|BUG:)', 'invalid opcode:', 'Kernel panic - not syncing', '/ #', 'Login timed out', 'Login incorrect']
  483 02:07:13.893425  [login-action] Waiting for messages, (timeout 00:03:58)
  484 02:07:13.904988  [    0.000000] Linux version 6.12.0-rc6 (KernelCI@build-j367761-arm-clang-15-multi-v7-defconfig-rs45f) (Debian clang version 15.0.7, Debian LLD 15.0.7) #1 SMP Fri Nov  8 01:18:01 UTC 2024
  485 02:07:13.911088  [    0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d
  486 02:07:13.918321  [    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
  487 02:07:13.924423  [    0.000000] OF: fdt: Machine model: TI AM335x BeagleBone Black
  488 02:07:13.930526  [    0.000000] earlycon: omap8250 at MMIO 0x44e09000 (options '')
  489 02:07:13.935342  [    0.000000] printk: legacy bootconsole [omap8250] enabled
  490 02:07:13.940519  [    0.000000] Memory policy: Data cache writeback
  491 02:07:13.947850  [    0.000000] efi: UEFI not found.
  492 02:07:13.956152  [    0.000000] cma: Reserved 64 MiB at 0x9b800000 on node -1
  493 02:07:13.956535  [    0.000000] Zone ranges:
  494 02:07:13.961164  [    0.000000]   DMA      [mem 0x0000000080000000-0x000000009fdfffff]
  495 02:07:13.967484  [    0.000000]   Normal   empty
  496 02:07:13.967866  [    0.000000]   HighMem  empty
  497 02:07:13.973714  [    0.000000] Movable zone start for each node
  498 02:07:13.977374  [    0.000000] Early memory node ranges
  499 02:07:13.982275  [    0.000000]   node   0: [mem 0x0000000080000000-0x000000009fdfffff]
  500 02:07:13.990339  [    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009fdfffff]
  501 02:07:14.008535  [    0.000000] CPU: All CPU(s) started in SVC mode.
  502 02:07:14.014028  [    0.000000] AM335X ES2.1 (sgx neon)
  503 02:07:14.026399  [    0.000000] percpu: Embedded 17 pages/cpu s40716 r8192 d20724 u69632
  504 02:07:14.046268  [    0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/nfs rw nfsroot=172.16.3.3:/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3,tcp,hard,v3 console_msg_format=syslog earlycon deferred_probe_timeout=60 ip=dhcp
  505 02:07:14.052286  <6>[    0.000000] Dentry cache hash table entries: 65536 (order: 6, 262144 bytes, linear)
  506 02:07:14.060934  <6>[    0.000000] Inode-cache hash table entries: 32768 (order: 5, 131072 bytes, linear)
  507 02:07:14.073163  <6>[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 130560
  508 02:07:14.076375  <6>[    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
  509 02:07:14.106881  <6>[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
  510 02:07:14.112950  <6>[    0.000000] trace event string verifier disabled
  511 02:07:14.113343  <6>[    0.000000] rcu: Hierarchical RCU implementation.
  512 02:07:14.120517  <6>[    0.000000] rcu: 	RCU event tracing is enabled.
  513 02:07:14.126761  <6>[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=1.
  514 02:07:14.136463  <6>[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.
  515 02:07:14.143395  <6>[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=1
  516 02:07:14.158367  <6>[    0.000000] NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
  517 02:07:14.175910  <6>[    0.000000] IRQ: Found an INTC at 0x(ptrval) (revision 5.0) with 128 interrupts
  518 02:07:14.182602  <6>[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
  519 02:07:14.286950  <6>[    0.000000] TI gptimer clocksource: always-on /ocp/interconnect@44c00000/segment@200000/target-module@31000
  520 02:07:14.295776  <6>[    0.000003] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 89478484971ns
  521 02:07:14.307031  <6>[    0.008341] clocksource: dmtimer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 79635851949 ns
  522 02:07:14.317151  <6>[    0.019252] TI gptimer clockevent: 24000000 Hz at /ocp/interconnect@48000000/segment@0/target-module@40000
  523 02:07:14.326009  <6>[    0.034614] Console: colour dummy device 80x30
  524 02:07:14.332522  Matched prompt #6: WARNING:
  525 02:07:14.332956  Setting prompt string to ['end trace[^\\r]*\\r', '/ #', 'Login timed out', 'Login incorrect']
  526 02:07:14.338233  <3>[    0.039605] WARNING: Your 'console=ttyO0' has been replaced by 'ttyS0'
  527 02:07:14.340576  <3>[    0.046593] This ensures that you still see kernel messages. Please
  528 02:07:14.345109  <3>[    0.053316] update your kernel commandline.
  529 02:07:14.386534  <6>[    0.057928] Calibrating delay loop... 996.14 BogoMIPS (lpj=4980736)
  530 02:07:14.391383  <6>[    0.096261] CPU: Testing write buffer coherency: ok
  531 02:07:14.393893  <6>[    0.101628] CPU0: Spectre v2: using BPIALL workaround
  532 02:07:14.399997  <6>[    0.107094] pid_max: default: 32768 minimum: 301
  533 02:07:14.406133  <6>[    0.112289] Mount-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
  534 02:07:14.415813  <6>[    0.120118] Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes, linear)
  535 02:07:14.422260  <6>[    0.129503] CPU0: thread -1, cpu 0, socket -1, mpidr 0
  536 02:07:14.437037  <6>[    0.136520] Setting up static identity map for 0x80300000 - 0x803000ac
  537 02:07:14.442018  <6>[    0.146327] rcu: Hierarchical SRCU implementation.
  538 02:07:14.445364  <6>[    0.151617] rcu: 	Max phase no-delay instances is 1000.
  539 02:07:14.454928  <6>[    0.163278] EFI services will not be available.
  540 02:07:14.461015  <6>[    0.168567] smp: Bringing up secondary CPUs ...
  541 02:07:14.467131  <6>[    0.173631] smp: Brought up 1 node, 1 CPU
  542 02:07:14.474505  <6>[    0.178035] SMP: Total of 1 processors activated (996.14 BogoMIPS).
  543 02:07:14.480488  <6>[    0.184807] CPU: All CPU(s) started in SVC mode.
  544 02:07:14.498439  <6>[    0.190007] Memory: 404424K/522240K available (17408K kernel code, 2538K rwdata, 6696K rodata, 2048K init, 432K bss, 50624K reserved, 65536K cma-reserved, 0K highmem)
  545 02:07:14.498839  <6>[    0.206300] devtmpfs: initialized
  546 02:07:14.521477  <6>[    0.224398] VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 3
  547 02:07:14.530257  <6>[    0.233014] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
  548 02:07:14.538526  <6>[    0.243480] futex hash table entries: 256 (order: 2, 16384 bytes, linear)
  549 02:07:14.549891  <6>[    0.255787] pinctrl core: initialized pinctrl subsystem
  550 02:07:14.559966  <6>[    0.266823] DMI not present or invalid.
  551 02:07:14.567269  <6>[    0.272717] NET: Registered PF_NETLINK/PF_ROUTE protocol family
  552 02:07:14.577837  <6>[    0.281719] DMA: preallocated 256 KiB pool for atomic coherent allocations
  553 02:07:14.593262  <6>[    0.293442] thermal_sys: Registered thermal governor 'step_wise'
  554 02:07:14.593651  <6>[    0.293637] cpuidle: using governor menu
  555 02:07:14.620014  <6>[    0.329231] No ATAGs?
  556 02:07:14.626823  <6>[    0.331969] hw-breakpoint: debug architecture 0x4 unsupported.
  557 02:07:14.637168  <6>[    0.344277] Serial: AMBA PL011 UART driver
  558 02:07:14.666656  <6>[    0.375890] iommu: Default domain type: Translated
  559 02:07:14.676017  <6>[    0.381240] iommu: DMA domain TLB invalidation policy: strict mode
  560 02:07:14.704523  <5>[    0.410865] SCSI subsystem initialized
  561 02:07:14.716887  <6>[    0.420060] usbcore: registered new interface driver usbfs
  562 02:07:14.723063  <6>[    0.426016] usbcore: registered new interface driver hub
  563 02:07:14.723448  <6>[    0.431848] usbcore: registered new device driver usb
  564 02:07:14.730465  <6>[    0.438411] pps_core: LinuxPPS API ver. 1 registered
  565 02:07:14.742785  <6>[    0.443850] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
  566 02:07:14.746552  <6>[    0.453556] PTP clock support registered
  567 02:07:14.749928  <6>[    0.458007] EDAC MC: Ver: 3.0.0
  568 02:07:14.804738  <6>[    0.510499] scmi_core: SCMI protocol bus registered
  569 02:07:14.810391  <6>[    0.518682] vgaarb: loaded
  570 02:07:14.822131  <6>[    0.531450] clocksource: Switched to clocksource dmtimer
  571 02:07:14.849676  <6>[    0.558737] NET: Registered PF_INET protocol family
  572 02:07:14.863118  <6>[    0.564457] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
  573 02:07:14.869377  <6>[    0.573475] tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 4096 bytes, linear)
  574 02:07:14.880323  <6>[    0.582408] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
  575 02:07:14.885193  <6>[    0.590650] TCP established hash table entries: 4096 (order: 2, 16384 bytes, linear)
  576 02:07:14.897346  <6>[    0.598937] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)
  577 02:07:14.903504  <6>[    0.606657] TCP: Hash tables configured (established 4096 bind 4096)
  578 02:07:14.908339  <6>[    0.613573] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)
  579 02:07:14.914439  <6>[    0.620587] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)
  580 02:07:14.922612  <6>[    0.628198] NET: Registered PF_UNIX/PF_LOCAL protocol family
  581 02:07:15.015308  <6>[    0.718824] RPC: Registered named UNIX socket transport module.
  582 02:07:15.015698  <6>[    0.725273] RPC: Registered udp transport module.
  583 02:07:15.021427  <6>[    0.730379] RPC: Registered tcp transport module.
  584 02:07:15.028948  <6>[    0.735510] RPC: Registered tcp-with-tls transport module.
  585 02:07:15.035270  <6>[    0.741439] RPC: Registered tcp NFSv4.1 backchannel transport module.
  586 02:07:15.041499  <6>[    0.748347] PCI: CLS 0 bytes, default 64
  587 02:07:15.048423  <5>[    0.754245] Initialise system trusted keyrings
  588 02:07:15.069472  <6>[    0.775289] Trying to unpack rootfs image as initramfs...
  589 02:07:15.138997  <6>[    0.841867] workingset: timestamp_bits=30 max_order=17 bucket_order=0
  590 02:07:15.143244  <6>[    0.849389] squashfs: version 4.0 (2009/01/31) Phillip Lougher
  591 02:07:15.173876  <5>[    0.882489] NFS: Registering the id_resolver key type
  592 02:07:15.179929  <5>[    0.888075] Key type id_resolver registered
  593 02:07:15.186059  <5>[    0.892777] Key type id_legacy registered
  594 02:07:15.193504  <6>[    0.897218] nfs4filelayout_init: NFSv4 File Layout Driver Registering...
  595 02:07:15.200328  <6>[    0.904425] nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering...
  596 02:07:15.285996  <5>[    0.994580] Key type asymmetric registered
  597 02:07:15.292058  <5>[    0.999106] Asymmetric key parser 'x509' registered
  598 02:07:15.300587  <6>[    1.004605] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 246)
  599 02:07:15.305612  <6>[    1.012544] io scheduler mq-deadline registered
  600 02:07:15.314723  <6>[    1.017478] io scheduler kyber registered
  601 02:07:15.315107  <6>[    1.021950] io scheduler bfq registered
  602 02:07:15.437320  <6>[    1.141887] ledtrig-cpu: registered to indicate activity on CPUs
  603 02:07:15.683411  <6>[    1.388560] Serial: 8250/16550 driver, 5 ports, IRQ sharing enabled
  604 02:07:15.718516  <6>[    1.426818] msm_serial: driver initialized
  605 02:07:15.724656  <6>[    1.431820] SuperH (H)SCI(F) driver initialized
  606 02:07:15.729523  <6>[    1.436962] STMicroelectronics ASC driver initialized
  607 02:07:15.735522  <6>[    1.442620] STM32 USART driver initialized
  608 02:07:15.854272  <6>[    1.562914] brd: module loaded
  609 02:07:15.900381  <6>[    1.609215] loop: module loaded
  610 02:07:15.951298  <6>[    1.659636] CAN device driver interface
  611 02:07:15.958657  <6>[    1.664933] bgmac_bcma: Broadcom 47xx GBit MAC driver loaded
  612 02:07:15.963535  <6>[    1.672062] e1000e: Intel(R) PRO/1000 Network Driver
  613 02:07:15.969657  <6>[    1.677452] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
  614 02:07:15.975794  <6>[    1.683914] igb: Intel(R) Gigabit Ethernet Network Driver
  615 02:07:15.983751  <6>[    1.689737] igb: Copyright (c) 2007-2014 Intel Corporation.
  616 02:07:15.995386  <6>[    1.699096] pegasus: Pegasus/Pegasus II USB Ethernet driver
  617 02:07:16.001477  <6>[    1.705263] usbcore: registered new interface driver pegasus
  618 02:07:16.005147  <6>[    1.711420] usbcore: registered new interface driver asix
  619 02:07:16.010125  <6>[    1.717280] usbcore: registered new interface driver ax88179_178a
  620 02:07:16.016353  <6>[    1.723872] usbcore: registered new interface driver cdc_ether
  621 02:07:16.026111  <6>[    1.730171] usbcore: registered new interface driver smsc75xx
  622 02:07:16.031004  <6>[    1.736412] usbcore: registered new interface driver smsc95xx
  623 02:07:16.036135  <6>[    1.742652] usbcore: registered new interface driver net1080
  624 02:07:16.042130  <6>[    1.748772] usbcore: registered new interface driver cdc_subset
  625 02:07:16.047205  <6>[    1.755193] usbcore: registered new interface driver zaurus
  626 02:07:16.055282  <6>[    1.761241] usbcore: registered new interface driver cdc_ncm
  627 02:07:16.066000  <6>[    1.770765] usbcore: registered new interface driver usb-storage
  628 02:07:16.075385  <6>[    1.782253] i2c_dev: i2c /dev entries driver
  629 02:07:16.099671  <5>[    1.800628] cpuidle: enable-method property 'ti,am3352' found operations
  630 02:07:16.105878  <6>[    1.810256] sdhci: Secure Digital Host Controller Interface driver
  631 02:07:16.113135  <6>[    1.817027] sdhci: Copyright(c) Pierre Ossman
  632 02:07:16.119218  <6>[    1.823480] Synopsys Designware Multimedia Card Interface Driver
  633 02:07:16.126104  <6>[    1.831271] sdhci-pltfm: SDHCI platform and OF driver helper
  634 02:07:16.138241  <6>[    1.841319] usbcore: registered new interface driver usbhid
  635 02:07:16.138630  <6>[    1.847447] usbhid: USB HID core driver
  636 02:07:16.152887  <6>[    1.858949] NET: Registered PF_INET6 protocol family
  637 02:07:16.596409  <6>[    2.305402] Segment Routing with IPv6
  638 02:07:16.602535  <6>[    2.309545] In-situ OAM (IOAM) with IPv6
  639 02:07:16.608598  <6>[    2.314076] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
  640 02:07:16.615992  <6>[    2.321497] NET: Registered PF_PACKET protocol family
  641 02:07:16.622135  <6>[    2.326988] can: controller area network core
  642 02:07:16.628146  <6>[    2.331849] NET: Registered PF_CAN protocol family
  643 02:07:16.628531  <6>[    2.337051] can: raw protocol
  644 02:07:16.631852  <6>[    2.340373] can: broadcast manager protocol
  645 02:07:16.636836  <6>[    2.344989] can: netlink gateway - max_hops=1
  646 02:07:16.643037  <5>[    2.350488] Key type dns_resolver registered
  647 02:07:16.649080  <6>[    2.355585] ThumbEE CPU extension supported.
  648 02:07:16.652827  <5>[    2.360280] Registering SWP/SWPB emulation handler
  649 02:07:16.661043  <3>[    2.365987] omap_voltage_late_init: Voltage driver support not added
  650 02:07:16.856106  <5>[    2.562446] Loading compiled-in X.509 certificates
  651 02:07:17.003012  <6>[    2.698331] platform 44e10800.pinmux: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800/clkout2-pins
  652 02:07:17.009855  <6>[    2.715067] pinctrl-single 44e10800.pinmux: 142 pins, size 568
  653 02:07:17.036740  <3>[    2.739398] ti-sysc 44e31000.target-module: probe with driver ti-sysc failed with error -16
  654 02:07:17.248324  <3>[    2.952167] ti-sysc 48040000.target-module: probe with driver ti-sysc failed with error -16
  655 02:07:17.444382  <6>[    3.152220] OMAP GPIO hardware version 0.1
  656 02:07:17.464691  <6>[    3.171322] omap-mailbox 480c8000.mailbox: omap mailbox rev 0x400
  657 02:07:17.558449  <4>[    3.264118] at24 2-0054: supply vcc not found, using dummy regulator
  658 02:07:17.591365  <4>[    3.296705] at24 2-0055: supply vcc not found, using dummy regulator
  659 02:07:17.630475  <4>[    3.335539] at24 2-0056: supply vcc not found, using dummy regulator
  660 02:07:17.671708  <4>[    3.377110] at24 2-0057: supply vcc not found, using dummy regulator
  661 02:07:17.708700  <6>[    3.414679] omap_i2c 4819c000.i2c: bus 2 rev0.11 at 100 kHz
  662 02:07:17.767301  <3>[    3.468153] 48000000.interconnect:segment@200000:target-module@0:mpu@0:fck: device ID is greater than 24
  663 02:07:17.791797  <6>[    3.489405] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
  664 02:07:17.812268  <4>[    3.516470] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
  665 02:07:17.828359  <4>[    3.532802] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
  666 02:07:17.916314  <6>[    3.621979] omap_rng 48310000.rng: Random Number Generator ver. 20
  667 02:07:17.941263  <5>[    3.649021] random: crng init done
  668 02:07:17.992457  <6>[    3.701138] Freeing initrd memory: 15000K
  669 02:07:18.001980  <6>[    3.705984] davinci_mdio 4a101000.mdio: davinci mdio revision 1.6, bus freq 1000000
  670 02:07:18.051247  <6>[    3.753957] davinci_mdio 4a101000.mdio: phy[0]: device 4a101000.mdio:00, driver SMSC LAN8710/LAN8720
  671 02:07:18.056137  <6>[    3.764345] cpsw-switch 4a100000.switch: initialized cpsw ale version 1.4
  672 02:07:18.066162  <6>[    3.771741] cpsw-switch 4a100000.switch: ALE Table size 1024, Policers 0
  673 02:07:18.076224  <6>[    3.779208] cpsw-switch 4a100000.switch: cpts: overflow check period 500 (jiffies)
  674 02:07:18.086102  <6>[    3.787347] cpsw-switch 4a100000.switch: CPTS: ref_clk_freq:250000000 calc_mult:2147483648 calc_shift:29 error:0 nsec/sec
  675 02:07:18.093462  <6>[    3.798987] cpsw-switch 4a100000.switch: Detected MACID = 04:79:b7:e7:06:e0
  676 02:07:18.106304  <5>[    3.808128] cpsw-switch 4a100000.switch: initialized (regs 0x4a100000, pool size 256) hw_ver:0019010C 1.12 (0)
  677 02:07:18.135692  <3>[    3.838620] debugfs: Directory '49000000.dma' with parent 'dmaengine' already present!
  678 02:07:18.141310  <6>[    3.847216] edma 49000000.dma: TI EDMA DMA engine driver
  679 02:07:18.214605  <3>[    3.916984] target-module@4b000000:target-module@140000:pmu@0:fck: device ID is greater than 24
  680 02:07:18.229912  <6>[    3.931721] hw perfevents: enabled with armv7_cortex_a8 PMU driver, 5 (8000000f) counters available
  681 02:07:18.242584  <3>[    3.948781] l3-aon-clkctrl:0000:0: failed to disable
  682 02:07:18.297168  <6>[    4.000030] 44e09000.serial: ttyS0 at MMIO 0x44e09000 (irq = 36, base_baud = 3000000) is a 8250
  683 02:07:18.302216  <6>[    4.009548] printk: legacy console [ttyS0] enabled
  684 02:07:18.305875  <6>[    4.009548] printk: legacy console [ttyS0] enabled
  685 02:07:18.310994  <6>[    4.019887] printk: legacy bootconsole [omap8250] disabled
  686 02:07:18.320255  <6>[    4.019887] printk: legacy bootconsole [omap8250] disabled
  687 02:07:18.349594  <4>[    4.052318] tps65217-pmic: Failed to locate of_node [id: -1]
  688 02:07:18.353971  <4>[    4.059721] tps65217-bl: Failed to locate of_node [id: -1]
  689 02:07:18.370869  <6>[    4.079929] tps65217 0-0024: TPS65217 ID 0xe version 1.2
  690 02:07:18.388058  <6>[    4.086950] platform 4830e000.lcdc: Fixed dependency cycle(s) with /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
  691 02:07:18.400300  <6>[    4.100663] i2c 0-0070: Fixed dependency cycle(s) with /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
  692 02:07:18.406161  <6>[    4.112627] omap_i2c 44e0b000.i2c: bus 0 rev0.11 at 400 kHz
  693 02:07:18.429194  <6>[    4.132993] omap_gpio 44e07000.gpio: Could not set line 6 debounce to 200000 microseconds (-22)
  694 02:07:18.435447  <6>[    4.142178] sdhci-omap 48060000.mmc: Got CD GPIO
  695 02:07:18.443535  <4>[    4.147328] sdhci-omap 48060000.mmc: supply pbias not found, using dummy regulator
  696 02:07:18.458256  <4>[    4.161150] sdhci-omap 48060000.mmc: supply vqmmc not found, using dummy regulator
  697 02:07:18.464306  <4>[    4.169935] sdhci-omap 481d8000.mmc: supply pbias not found, using dummy regulator
  698 02:07:18.474808  <4>[    4.178584] sdhci-omap 481d8000.mmc: supply vqmmc not found, using dummy regulator
  699 02:07:18.574253  <6>[    4.278933] at24 0-0050: 32768 byte 24c256 EEPROM, writable, 1 bytes/write
  700 02:07:18.613706  <6>[    4.317342] mmc0: SDHCI controller on 48060000.mmc [48060000.mmc] using External DMA
  701 02:07:18.659106  <6>[    4.361643] mmc1: SDHCI controller on 481d8000.mmc [481d8000.mmc] using External DMA
  702 02:07:18.665793  <6>[    4.370479] cpsw-switch 4a100000.switch: starting ndev. mode: dual_mac
  703 02:07:18.734210  <6>[    4.432824] mmc1: new high speed MMC card at address 0001
  704 02:07:18.734595  <6>[    4.441321] mmcblk1: mmc1:0001 M62704 3.56 GiB
  705 02:07:18.746103  <6>[    4.452546]  mmcblk1: p1
  706 02:07:18.750540  <6>[    4.457901] mmcblk1boot0: mmc1:0001 M62704 2.00 MiB
  707 02:07:18.762944  <6>[    4.465682] SMSC LAN8710/LAN8720 4a101000.mdio:00: attached PHY driver (mii_bus:phy_addr=4a101000.mdio:00, irq=POLL)
  708 02:07:18.769567  <6>[    4.476934] mmcblk1boot1: mmc1:0001 M62704 2.00 MiB
  709 02:07:18.787678  <6>[    4.492768] mmcblk1rpmb: mmc1:0001 M62704 512 KiB, chardev (236:0)
  710 02:07:21.928995  <6>[    7.632479] cpsw-switch 4a100000.switch eth0: Link is Up - 100Mbps/Full - flow control off
  711 02:07:22.032241  <5>[    7.661465] Sending DHCP requests ., OK
  712 02:07:22.043489  <6>[    7.745920] IP-Config: Got DHCP answer from 172.16.3.3, my address is 172.16.3.189
  713 02:07:22.043871  <6>[    7.754023] IP-Config: Complete:
  714 02:07:22.058069  <6>[    7.757564]      device=eth0, hwaddr=04:79:b7:e7:06:e0, ipaddr=172.16.3.189, mask=255.255.255.0, gw=172.16.3.3
  715 02:07:22.063100  <6>[    7.768001]      host=172.16.3.189, domain=denx.de, nis-domain=(none)
  716 02:07:22.067809  <6>[    7.774827]      bootserver=172.16.3.33, rootserver=172.16.3.3, rootpath=
  717 02:07:22.072823  <6>[    7.774863]      nameserver0=172.16.3.3
  718 02:07:22.079968  <6>[    7.786169]      ntpserver0=172.16.3.3
  719 02:07:22.086021  <6>[    7.791673] clk: Disabling unused clocks
  720 02:07:22.089088  <6>[    7.796289] PM: genpd: Disabling unused power domains
  721 02:07:22.106421  <6>[    7.812871] Freeing unused kernel image (initmem) memory: 2048K
  722 02:07:22.114229  <6>[    7.822752] Run /init as init process
  723 02:07:22.140080  Loading, please wait...
  724 02:07:22.218164  Starting systemd-udevd version 252.22-1~deb12u1
  725 02:07:25.482466  <4>[   11.184623] am335x-phy-driver 47401300.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
  726 02:07:25.660077  <4>[   11.362861] am335x-phy-driver 47401b00.usb-phy: dummy supplies not allowed for exclusive requests (id=vbus)
  727 02:07:25.786562  <6>[   11.494768] tda998x 0-0070: found TDA19988
  728 02:07:25.831811  <6>[   11.541339] musb-hdrc musb-hdrc.1: MUSB HDRC host driver
  729 02:07:25.842401  <6>[   11.547221] musb-hdrc musb-hdrc.1: new USB bus registered, assigned bus number 1
  730 02:07:26.133040  <6>[   11.842053] hub 1-0:1.0: USB hub found
  731 02:07:26.187913  <6>[   11.896351] hub 1-0:1.0: 1 port detected
  732 02:07:28.765849  Begin: Loading essential drivers ... done.
  733 02:07:28.773334  Begin: Running /scripts/init-premount ... done.
  734 02:07:28.784420  Begin: Mounting root file system ... Begin: Running /scripts/nfs-top ... done.
  735 02:07:28.788056  Begin: Running /scripts/nfs-premount ... Waiting up to 60 secs for any ethernet to become available
  736 02:07:28.796973  Device /sys/class/net/eth0 found
  737 02:07:28.797351  done.
  738 02:07:28.857606  Begin: Waiting up to 180 secs for any network device to become available ... done.
  739 02:07:28.945500  IP-Config: eth0 hardware address 04:79:b7:e7:06:e0 mtu 1500 DHCP
  740 02:07:28.993626  IP-Config: eth0 complete (dhcp from 172.16.3.3):
  741 02:07:29.004634   address: 172.16.3.189     broadcast: 172.16.3.255     netmask: 255.255.255.0   
  742 02:07:29.008169   gateway: 172.16.3.3       dns0     : 172.16.3.3       dns1   : 0.0.0.0         
  743 02:07:29.013144   domain : denx.de                                                         
  744 02:07:29.019347   rootserver: 172.16.3.33 rootpath: 
  745 02:07:29.023597   filename  : this-host-is-not-configured.kpxe
  746 02:07:29.081951  done.
  747 02:07:29.095731  Begin: Running /scripts/nfs-bottom ... done.
  748 02:07:29.165701  Begin: Running /scripts/init-bottom ... done.
  749 02:07:30.785599  <30>[   16.491349] systemd[1]: System time before build time, advancing clock.
  750 02:07:30.997050  <30>[   16.677270] systemd[1]: systemd 252.22-1~deb12u1 running in system mode (+PAM +AUDIT +SELINUX +APPARMOR +IMA +SMACK +SECCOMP +GCRYPT -GNUTLS +OPENSSL +ACL +BLKID +CURL +ELFUTILS +FIDO2 +IDN2 -IDN +IPTC +KMOD +LIBCRYPTSETUP +LIBFDISK +PCRE2 -PWQUALITY +P11KIT +QRENCODE +TPM2 +BZIP2 +LZ4 +XZ +ZLIB +ZSTD -BPF_FRAMEWORK -XKBCOMMON +UTMP +SYSVINIT default-hierarchy=unified)
  751 02:07:31.005954  <30>[   16.714047] systemd[1]: Detected architecture arm.
  752 02:07:31.020884  
  753 02:07:31.021273  Welcome to [1mDebian GNU/Linux 12 (bookworm)[0m!
  754 02:07:31.021584  
  755 02:07:31.046340  <30>[   16.752493] systemd[1]: Hostname set to <debian-bookworm-armhf>.
  756 02:07:33.463315  <30>[   19.169076] systemd[1]: Queued start job for default target graphical.target.
  757 02:07:33.483332  <30>[   19.185990] systemd[1]: Created slice system-getty.slice - Slice /system/getty.
  758 02:07:33.490135  [[0;32m  OK  [0m] Created slice [0;1;39msystem-getty.slice[0m - Slice /system/getty.
  759 02:07:33.513635  <30>[   19.217974] systemd[1]: Created slice system-modprobe.slice - Slice /system/modprobe.
  760 02:07:33.526013  [[0;32m  OK  [0m] Created slice [0;1;39msystem-modpr…lice[0m - Slice /system/modprobe.
  761 02:07:33.550913  <30>[   19.253913] systemd[1]: Created slice system-serial\x2dgetty.slice - Slice /system/serial-getty.
  762 02:07:33.561354  [[0;32m  OK  [0m] Created slice [0;1;39msystem-seria…[0m - Slice /system/serial-getty.
  763 02:07:33.580341  <30>[   19.283774] systemd[1]: Created slice user.slice - User and Session Slice.
  764 02:07:33.587084  [[0;32m  OK  [0m] Created slice [0;1;39muser.slice[0m - User and Session Slice.
  765 02:07:33.612210  <30>[   19.314229] systemd[1]: Started systemd-ask-password-console.path - Dispatch Password Requests to Console Directory Watch.
  766 02:07:33.626090  [[0;32m  OK  [0m] Started [0;1;39msystemd-ask-passwo…quests to Console Directory Watch.
  767 02:07:33.650470  <30>[   19.352364] systemd[1]: Started systemd-ask-password-wall.path - Forward Password Requests to Wall Directory Watch.
  768 02:07:33.660898  [[0;32m  OK  [0m] Started [0;1;39msystemd-ask-passwo… Requests to Wall Directory Watch.
  769 02:07:33.687176  <30>[   19.382627] systemd[1]: proc-sys-fs-binfmt_misc.automount - Arbitrary Executable File Formats File System Automount Point was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/binfmt_misc).
  770 02:07:33.701614  <30>[   19.404760] systemd[1]: Expecting device dev-ttyS0.device - /dev/ttyS0...
  771 02:07:33.705965           Expecting device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0...
  772 02:07:33.728103  <30>[   19.431970] systemd[1]: Reached target cryptsetup.target - Local Encrypted Volumes.
  773 02:07:33.736096  [[0;32m  OK  [0m] Reached target [0;1;39mcryptsetup.…get[0m - Local Encrypted Volumes.
  774 02:07:33.758065  <30>[   19.462388] systemd[1]: Reached target integritysetup.target - Local Integrity Protected Volumes.
  775 02:07:33.766417  [[0;32m  OK  [0m] Reached target [0;1;39mintegrityse…Local Integrity Protected Volumes.
  776 02:07:33.788159  <30>[   19.492491] systemd[1]: Reached target paths.target - Path Units.
  777 02:07:33.793732  [[0;32m  OK  [0m] Reached target [0;1;39mpaths.target[0m - Path Units.
  778 02:07:33.817920  <30>[   19.522064] systemd[1]: Reached target remote-fs.target - Remote File Systems.
  779 02:07:33.825860  [[0;32m  OK  [0m] Reached target [0;1;39mremote-fs.target[0m - Remote File Systems.
  780 02:07:33.849002  <30>[   19.552023] systemd[1]: Reached target slices.target - Slice Units.
  781 02:07:33.853256  [[0;32m  OK  [0m] Reached target [0;1;39mslices.target[0m - Slice Units.
  782 02:07:33.878428  <30>[   19.582285] systemd[1]: Reached target swap.target - Swaps.
  783 02:07:33.882768  [[0;32m  OK  [0m] Reached target [0;1;39mswap.target[0m - Swaps.
  784 02:07:33.907773  <30>[   19.612211] systemd[1]: Reached target veritysetup.target - Local Verity Protected Volumes.
  785 02:07:33.916190  [[0;32m  OK  [0m] Reached target [0;1;39mveritysetup… - Local Verity Protected Volumes.
  786 02:07:33.940645  <30>[   19.644525] systemd[1]: Listening on systemd-initctl.socket - initctl Compatibility Named Pipe.
  787 02:07:33.955198  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-initc… initctl Compatibility Named Pipe.
  788 02:07:34.043214  <30>[   19.742671] systemd[1]: systemd-journald-audit.socket - Journal Audit Socket was skipped because of an unmet condition check (ConditionSecurity=audit).
  789 02:07:34.056921  <30>[   19.760531] systemd[1]: Listening on systemd-journald-dev-log.socket - Journal Socket (/dev/log).
  790 02:07:34.065125  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-journ…t[0m - Journal Socket (/dev/log).
  791 02:07:34.090401  <30>[   19.796021] systemd[1]: Listening on systemd-journald.socket - Journal Socket.
  792 02:07:34.103411  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-journald.socket[0m - Journal Socket.
  793 02:07:34.132977  <30>[   19.834461] systemd[1]: Listening on systemd-networkd.socket - Network Service Netlink Socket.
  794 02:07:34.141407  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-netwo… - Network Service Netlink Socket.
  795 02:07:34.175254  <30>[   19.879890] systemd[1]: Listening on systemd-udevd-control.socket - udev Control Socket.
  796 02:07:34.189617  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-udevd….socket[0m - udev Control Socket.
  797 02:07:34.210653  <30>[   19.913462] systemd[1]: Listening on systemd-udevd-kernel.socket - udev Kernel Socket.
  798 02:07:34.217646  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-udevd…l.socket[0m - udev Kernel Socket.
  799 02:07:34.245852  <30>[   19.943265] systemd[1]: dev-hugepages.mount - Huge Pages File System was skipped because of an unmet condition check (ConditionPathExists=/sys/kernel/mm/hugepages).
  800 02:07:34.262575  <30>[   19.959948] systemd[1]: dev-mqueue.mount - POSIX Message Queue File System was skipped because of an unmet condition check (ConditionPathExists=/proc/sys/fs/mqueue).
  801 02:07:34.313302  <30>[   20.017729] systemd[1]: Mounting sys-kernel-debug.mount - Kernel Debug File System...
  802 02:07:34.332430           Mounting [0;1;39msys-kernel-debug.…[0m - Kernel Debug File System...
  803 02:07:34.380136  <30>[   20.084918] systemd[1]: Mounting sys-kernel-tracing.mount - Kernel Trace File System...
  804 02:07:34.399237           Mounting [0;1;39msys-kernel-tracin…[0m - Kernel Trace File System...
  805 02:07:34.464014  <30>[   20.167576] systemd[1]: Starting kmod-static-nodes.service - Create List of Static Device Nodes...
  806 02:07:34.506429           Starting [0;1;39mkmod-static-nodes…ate List of Static Device Nodes...
  807 02:07:34.558523  <30>[   20.262894] systemd[1]: Starting modprobe@configfs.service - Load Kernel Module configfs...
  808 02:07:34.584099           Starting [0;1;39mmodprobe@configfs…m - Load Kernel Module configfs...
  809 02:07:34.618149  <30>[   20.322788] systemd[1]: Starting modprobe@dm_mod.service - Load Kernel Module dm_mod...
  810 02:07:34.630103           Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
  811 02:07:34.668482  <30>[   20.372952] systemd[1]: Starting modprobe@drm.service - Load Kernel Module drm...
  812 02:07:34.686716           Starting [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm...
  813 02:07:34.741684  <30>[   20.442840] systemd[1]: Starting modprobe@efi_pstore.service - Load Kernel Module efi_pstore...
  814 02:07:34.750982           Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
  815 02:07:34.821017  <30>[   20.525979] systemd[1]: Starting modprobe@fuse.service - Load Kernel Module fuse...
  816 02:07:34.836045           Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
  817 02:07:34.901725  <30>[   20.606501] systemd[1]: Starting modprobe@loop.service - Load Kernel Module loop...
  818 02:07:34.921105           Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
  819 02:07:34.956839  <28>[   20.653689] systemd[1]: systemd-journald.service: unit configures an IP firewall, but the local system does not support BPF/cgroup firewalling.
  820 02:07:34.964685  <28>[   20.667949] systemd[1]: (This warning is only shown for the first unit using IP firewalling.)
  821 02:07:35.008772  <30>[   20.712700] systemd[1]: Starting systemd-journald.service - Journal Service...
  822 02:07:35.015572           Starting [0;1;39msystemd-journald.service[0m - Journal Service...
  823 02:07:35.087870  <30>[   20.793032] systemd[1]: Starting systemd-modules-load.service - Load Kernel Modules...
  824 02:07:35.110019           Starting [0;1;39msystemd-modules-l…rvice[0m - Load Kernel Modules...
  825 02:07:35.150909  <30>[   20.855400] systemd[1]: Starting systemd-network-generator.service - Generate network units from Kernel command line...
  826 02:07:35.197385           Starting [0;1;39msystemd-network-g… units from Kernel command line...
  827 02:07:35.253974  <30>[   20.956306] systemd[1]: Starting systemd-remount-fs.service - Remount Root and Kernel File Systems...
  828 02:07:35.311249           Starting [0;1;39msystemd-remount-f…nt Root and Kernel File Systems...
  829 02:07:35.393012  <30>[   21.096234] systemd[1]: Starting systemd-udev-trigger.service - Coldplug All udev Devices...
  830 02:07:35.449160           Starting [0;1;39msystemd-udev-trig…[0m - Coldplug All udev Devices...
  831 02:07:35.549598  <30>[   21.254188] systemd[1]: Mounted sys-kernel-debug.mount - Kernel Debug File System.
  832 02:07:35.588069  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-debug.m…nt[0m - Kernel Debug File System.
  833 02:07:35.609333  <30>[   21.313982] systemd[1]: Mounted sys-kernel-tracing.mount - Kernel Trace File System.
  834 02:07:35.637048  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-tracing…nt[0m - Kernel Trace File System.
  835 02:07:35.671266  <30>[   21.375066] systemd[1]: Finished kmod-static-nodes.service - Create List of Static Device Nodes.
  836 02:07:35.692872  [[0;32m  OK  [0m] Finished [0;1;39mkmod-static-nodes…reate List of Static Device Nodes.
  837 02:07:35.838608  <30>[   21.544199] systemd[1]: modprobe@configfs.service: Deactivated successfully.
  838 02:07:35.878816  <30>[   21.581979] systemd[1]: Finished modprobe@configfs.service - Load Kernel Module configfs.
  839 02:07:35.885908  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@configfs…[0m - Load Kernel Module configfs.
  840 02:07:35.908046  <30>[   21.614369] systemd[1]: modprobe@dm_mod.service: Deactivated successfully.
  841 02:07:35.938787  <30>[   21.643328] systemd[1]: Finished modprobe@dm_mod.service - Load Kernel Module dm_mod.
  842 02:07:35.967591  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
  843 02:07:35.988854  <30>[   21.694495] systemd[1]: modprobe@drm.service: Deactivated successfully.
  844 02:07:36.027888  <30>[   21.731783] systemd[1]: Finished modprobe@drm.service - Load Kernel Module drm.
  845 02:07:36.034964  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@drm.service[0m - Load Kernel Module drm.
  846 02:07:36.058878  <30>[   21.763199] systemd[1]: Started systemd-journald.service - Journal Service.
  847 02:07:36.066758  [[0;32m  OK  [0m] Started [0;1;39msystemd-journald.service[0m - Journal Service.
  848 02:07:36.109232  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
  849 02:07:36.133816  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
  850 02:07:36.167549  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
  851 02:07:36.191517  [[0;32m  OK  [0m] Finished [0;1;39msystemd-modules-l…service[0m - Load Kernel Modules.
  852 02:07:36.209842  [[0;32m  OK  [0m] Finished [0;1;39msystemd-network-g…rk units from Kernel command line.
  853 02:07:36.231203  [[0;32m  OK  [0m] Finished [0;1;39msystemd-remount-f…ount Root and Kernel File Systems.
  854 02:07:36.262246  [[0;32m  OK  [0m] Reached target [0;1;39mnetwork-pre…get[0m - Preparation for Network.
  855 02:07:36.327985           Mounting [0;1;39msys-kernel-config…ernel Configuration File System...
  856 02:07:36.375692           Starting [0;1;39msystemd-journal-f…h Journal to Persistent Storage...
  857 02:07:36.422231           Starting [0;1;39msystemd-random-se…ice[0m - Load/Save Random Seed...
  858 02:07:36.512215           Starting [0;1;39msystemd-sysctl.se…ce[0m - Apply Kernel Variables...
  859 02:07:36.604060           Starting [0;1;39msystemd-sysusers.…rvice[0m - Create System Users...
  860 02:07:36.771108  [[0;32m  OK  [0m] Mounted [0;1;39msys-kernel-config.… Kernel Configuration File System.
  861 02:07:36.819374  <46>[   22.525269] systemd-journald[162]: Received client request to flush runtime journal.
  862 02:07:36.960277  [[0;32m  OK  [0m] Finished [0;1;39msystemd-sysctl.service[0m - Apply Kernel Variables.
  863 02:07:37.029904  [[0;32m  OK  [0m] Finished [0;1;39msystemd-sysusers.service[0m - Create System Users.
  864 02:07:37.050243  [[0;32m  OK  [0m] Finished [0;1;39msystemd-random-se…rvice[0m - Load/Save Random Seed.
  865 02:07:37.108669           Starting [0;1;39msystemd-tmpfiles-…ate Static Device Nodes in /dev...
  866 02:07:38.318637  [[0;32m  OK  [0m] Finished [0;1;39msystemd-tmpfiles-…reate Static Device Nodes in /dev.
  867 02:07:38.338848  [[0;32m  OK  [0m] Reached target [0;1;39mlocal-fs-pr…reparation for Local File Systems.
  868 02:07:38.367610  [[0;32m  OK  [0m] Reached target [0;1;39mlocal-fs.target[0m - Local File Systems.
  869 02:07:38.603362           Starting [0;1;39msystemd-udevd.ser…ger for Device Events and Files...
  870 02:07:38.827398  [[0;32m  OK  [0m] Finished [0;1;39msystemd-journal-f…ush Journal to Persistent Storage.
  871 02:07:38.883397           Starting [0;1;39msystemd-tmpfiles-… Volatile Files and Directories...
  872 02:07:39.575025  [[0;32m  OK  [0m] Started [0;1;39msystemd-udevd.serv…nager for Device Events and Files.
  873 02:07:39.646071           Starting [0;1;39msystemd-networkd.…ice[0m - Network Configuration...
  874 02:07:41.100615  [[0;32m  OK  [0m] Finished [0;1;39msystemd-tmpfiles-…te Volatile Files and Directories.
  875 02:07:41.368922  <5>[   27.074613] cfg80211: Loading compiled-in X.509 certificates for regulatory database
  876 02:07:42.451921  [[0;32m  OK  [0m] Finished [0;1;39msystemd-udev-trig…e[0m - Coldplug All udev Devices.
  877 02:07:42.956420  <5>[   28.664009] Loaded X.509 cert 'sforshee: 00b28ddf47aef9cea7'
  878 02:07:42.980119  [[0;32m  OK  [0m] Found device [0;1;39mdev-ttyS0.device[0m - /dev/ttyS0.
  879 02:07:43.018901  <5>[   28.722461] Loaded X.509 cert 'wens: 61c038651aabdcf94bd0ac7ff06c7248db18c600'
  880 02:07:43.025017  <4>[   28.731929] platform regulatory.0: Direct firmware load for regulatory.db failed with error -2
  881 02:07:43.031802  <6>[   28.740900] cfg80211: failed to load regulatory.db
  882 02:07:44.497284  [[0;32m  OK  [0m] Started [0;1;39msystemd-networkd.service[0m - Network Configuration.
  883 02:07:52.482442  [[0;32m  OK  [0m] Reached target [0;1;39mnetwork.target[0m - Network.
  884 02:07:52.509166  [[0;32m  OK  [0m] Reached target [0;1;39musb-gadget.…m - Hardware activated USB gadget.
  885 02:07:52.529642  [[0;32m  OK  [0m] Listening on [0;1;39msystemd-rfkil…l Switch Status /dev/rfkill Watch.
  886 02:07:52.586907           Starting [0;1;39mmodprobe@dm_mod.s…[0m - Load Kernel Module dm_mod...
  887 02:07:52.641819           Starting [0;1;39mmodprobe@efi_psto…- Load Kernel Module efi_pstore...
  888 02:07:52.710808           Starting [0;1;39mmodprobe@fuse.ser…e[0m - Load Kernel Module fuse...
  889 02:07:52.753154           Starting [0;1;39mmodprobe@loop.ser…e[0m - Load Kernel Module loop...
  890 02:07:52.977494           Starting [0;1;39msystemd-timesyncd… - Network Time Synchronization...
  891 02:07:53.010272           Starting [0;1;39msystemd-update-ut…rd System Boot/Shutdown in UTMP...
  892 02:07:53.061133  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@dm_mod.s…e[0m - Load Kernel Module dm_mod.
  893 02:07:53.099404  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@efi_psto…m - Load Kernel Module efi_pstore.
  894 02:07:53.138539  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@fuse.service[0m - Load Kernel Module fuse.
  895 02:07:53.165470  [[0;32m  OK  [0m] Finished [0;1;39mmodprobe@loop.service[0m - Load Kernel Module loop.
  896 02:07:53.309230  [[0;32m  OK  [0m] Finished [0;1;39msystemd-update-ut…cord System Boot/Shutdown in UTMP.
  897 02:07:53.926888  [[0;32m  OK  [0m] Started [0;1;39msystemd-timesyncd.…0m - Network Time Synchronization.
  898 02:07:53.958773  [[0;32m  OK  [0m] Reached target [0;1;39msysinit.target[0m - System Initialization.
  899 02:07:53.978088  [[0;32m  OK  [0m] Started [0;1;39msystemd-tmpfiles-c… Cleanup of Temporary Directories.
  900 02:07:53.998420  [[0;32m  OK  [0m] Reached target [0;1;39mtime-set.target[0m - System Time Set.
  901 02:07:54.186756  [[0;32m  OK  [0m] Started [0;1;39mapt-daily.timer[0m - Daily apt download activities.
  902 02:07:54.307219  [[0;32m  OK  [0m] Started [0;1;39mapt-daily-upgrade.… apt upgrade and clean activities.
  903 02:07:54.331738  [[0;32m  OK  [0m] Started [0;1;39mdpkg-db-backup.tim… Daily dpkg database backup timer.
  904 02:07:54.485228  [[0;32m  OK  [0m] Started [0;1;39me2scrub_all.timer…etadata Check for All Filesystems.
  905 02:07:54.680892  [[0;32m  OK  [0m] Started [0;1;39mfstrim.timer[0m - Discard unused blocks once a week.
  906 02:07:54.707254  [[0;32m  OK  [0m] Reached target [0;1;39mtimers.target[0m - Timer Units.
  907 02:07:54.735260  [[0;32m  OK  [0m] Listening on [0;1;39mdbus.socket[…- D-Bus System Message Bus Socket.
  908 02:07:54.756527  [[0;32m  OK  [0m] Reached target [0;1;39msockets.target[0m - Socket Units.
  909 02:07:54.775688  [[0;32m  OK  [0m] Reached target [0;1;39mbasic.target[0m - Basic System.
  910 02:07:54.853168           Starting [0;1;39malsa-restore.serv…- Save/Restore Sound Card State...
  911 02:07:54.885813           Starting [0;1;39mdbus.service[0m - D-Bus System Message Bus...
  912 02:07:55.106187           Starting [0;1;39me2scrub_reap.serv…e ext4 Metadata Check Snapshots...
  913 02:07:55.407172           Starting [0;1;39msystemd-logind.se…ice[0m - User Login Management...
  914 02:07:55.517467           Starting [0;1;39msystemd-user-sess…vice[0m - Permit User Sessions...
  915 02:07:55.538747  [[0;32m  OK  [0m] Started [0;1;39mdbus.service[0m - D-Bus System Message Bus.
  916 02:07:55.633084  [[0;32m  OK  [0m] Finished [0;1;39malsa-restore.serv…m - Save/Restore Sound Card State.
  917 02:07:55.656239  [[0;32m  OK  [0m] Reached target [0;1;39msound.target[0m - Sound Card.
  918 02:07:55.937619           Starting [0;1;39msystemd-hostnamed.service[0m - Hostname Service...
  919 02:07:55.960155  [[0;32m  OK  [0m] Finished [0;1;39msystemd-user-sess…ervice[0m - Permit User Sessions.
  920 02:07:56.026927  [[0;32m  OK  [0m] Started [0;1;39mgetty@tty1.service[0m - Getty on tty1.
  921 02:07:56.057727  [[0;32m  OK  [0m] Started [0;1;39mserial-getty@ttyS0…rvice[0m - Serial Getty on ttyS0.
  922 02:07:56.075770  [[0;32m  OK  [0m] Reached target [0;1;39mgetty.target[0m - Login Prompts.
  923 02:07:56.178287  [[0;32m  OK  [0m] Started [0;1;39msystemd-logind.service[0m - User Login Management.
  924 02:07:56.719280  [[0;32m  OK  [0m] Started [0;1;39msystemd-hostnamed.service[0m - Hostname Service.
  925 02:07:56.784158  [[0;32m  OK  [0m] Finished [0;1;39me2scrub_reap.serv…ine ext4 Metadata Check Snapshots.
  926 02:07:56.832778  [[0;32m  OK  [0m] Reached target [0;1;39mmulti-user.target[0m - Multi-User System.
  927 02:07:56.861603  [[0;32m  OK  [0m] Reached target [0;1;39mgraphical.target[0m - Graphical Interface.
  928 02:07:56.939881           Starting [0;1;39msystemd-update-ut… Record Runlevel Change in UTMP...
  929 02:07:57.191194  [[0;32m  OK  [0m] Finished [0;1;39msystemd-update-ut… - Record Runlevel Change in UTMP.
  930 02:07:57.408741  
  931 02:07:57.409165  Debian GNU/Linux 12 debian-bookworm-armhf ttyS0
  932 02:07:57.409492  
  933 02:07:57.416611  debian-bookworm-armhflogin: root (automatic login)
  934 02:07:57.417030  
  935 02:07:57.774371  Linux debian-bookworm-armhf 6.12.0-rc6 #1 SMP Fri Nov  8 01:18:01 UTC 2024 armv7l
  936 02:07:57.774756  
  937 02:07:57.779168  The programs included with the Debian GNU/Linux system are free software;
  938 02:07:57.787867  the exact distribution terms for each program are described in the
  939 02:07:57.788247  individual files in /usr/share/doc/*/copyright.
  940 02:07:57.788555  
  941 02:07:57.793975  Debian GNU/Linux comes with ABSOLUTELY NO WARRANTY, to the extent
  942 02:07:57.799703  permitted by applicable law.
  943 02:08:02.615796  Unable to match end of the kernel message
  945 02:08:02.616904  Setting prompt string to ['/ #']
  946 02:08:02.617341  end: 2.4.4.1 login-action (duration 00:00:49) [common]
  948 02:08:02.618308  end: 2.4.4 auto-login-action (duration 00:00:50) [common]
  949 02:08:02.618724  start: 2.4.5 expect-shell-connection (timeout 00:03:09) [common]
  950 02:08:02.619075  Setting prompt string to ['/ #']
  951 02:08:02.619383  Forcing a shell prompt, looking for ['/ #']
  953 02:08:02.670157  / # 
  954 02:08:02.670745  expect-shell-connection: Wait for prompt ['/ #'] (timeout 00:05:00)
  955 02:08:02.671192  Waiting using forced prompt support (timeout 00:02:30)
  956 02:08:02.676573  
  957 02:08:02.709809  end: 2.4.5 expect-shell-connection (duration 00:00:00) [common]
  958 02:08:02.710296  start: 2.4.6 export-device-env (timeout 00:03:09) [common]
  959 02:08:02.710670  Sending with 10 millisecond of delay
  961 02:08:07.765797  / # export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3'
  962 02:08:07.776507  export NFS_ROOTFS='/var/lib/lava/dispatcher/tmp/1219052/extract-nfsrootfs-k643f8e3'
  963 02:08:07.780157  Sending with 10 millisecond of delay
  965 02:08:09.820821  / # export NFS_SERVER_IP='172.16.3.3'
  966 02:08:09.831541  export NFS_SERVER_IP='172.16.3.3'
  967 02:08:09.835032  end: 2.4.6 export-device-env (duration 00:00:07) [common]
  968 02:08:09.835517  end: 2.4 uboot-commands (duration 00:01:58) [common]
  969 02:08:09.835960  end: 2 uboot-action (duration 00:01:58) [common]
  970 02:08:09.836398  start: 3 lava-test-retry (timeout 00:06:50) [common]
  971 02:08:09.836872  start: 3.1 lava-test-shell (timeout 00:06:50) [common]
  972 02:08:09.837224  Using namespace: common
  974 02:08:09.938235  / # #
  975 02:08:09.938751  lava-test-shell: Wait for prompt ['/ #'] (timeout 00:10:00)
  976 02:08:09.945920  #
  977 02:08:09.952865  Using /lava-1219052
  979 02:08:10.053879  / # export SHELL=/bin/bash
  980 02:08:10.061106  export SHELL=/bin/bash
  982 02:08:10.168600  / # . /lava-1219052/environment
  983 02:08:10.176164  . /lava-1219052/environment
  985 02:08:10.290183  / # /lava-1219052/bin/lava-test-runner /lava-1219052/0
  986 02:08:10.290701  Test shell timeout: 10s (minimum of the action and connection timeout)
  987 02:08:10.297024  /lava-1219052/bin/lava-test-runner /lava-1219052/0
  988 02:08:10.943033  + export TESTRUN_ID=0_timesync-off
  989 02:08:10.951044  + TESTRUN_ID=0_timesync-off
  990 02:08:10.951459  + cd /lava-1219052/0/tests/0_timesync-off
  991 02:08:10.951778  ++ cat uuid
  992 02:08:10.972125  + UUID=1219052_1.6.2.4.1
  993 02:08:10.972514  + set +x
  994 02:08:10.978225  <LAVA_SIGNAL_STARTRUN 0_timesync-off 1219052_1.6.2.4.1>
  995 02:08:10.978872  Received signal: <STARTRUN> 0_timesync-off 1219052_1.6.2.4.1
  996 02:08:10.979212  Starting test lava.0_timesync-off (1219052_1.6.2.4.1)
  997 02:08:10.979624  Skipping test definition patterns.
  998 02:08:10.981528  + systemctl stop systemd-timesyncd
  999 02:08:11.304400  + set +x
 1000 02:08:11.305061  Received signal: <ENDRUN> 0_timesync-off 1219052_1.6.2.4.1
 1001 02:08:11.305469  Ending use of test pattern.
 1002 02:08:11.305777  Ending test lava.0_timesync-off (1219052_1.6.2.4.1), duration 0.33
 1004 02:08:11.307618  <LAVA_SIGNAL_ENDRUN 0_timesync-off 1219052_1.6.2.4.1>
 1005 02:08:11.617798  + export TESTRUN_ID=1_kselftest-dt
 1006 02:08:11.625510  + TESTRUN_ID=1_kselftest-dt
 1007 02:08:11.625909  + cd /lava-1219052/0/tests/1_kselftest-dt
 1008 02:08:11.626226  ++ cat uuid
 1009 02:08:11.648101  + UUID=1219052_1.6.2.4.5
 1010 02:08:11.648490  + set +x
 1011 02:08:11.654105  <LAVA_SIGNAL_STARTRUN 1_kselftest-dt 1219052_1.6.2.4.5>
 1012 02:08:11.654496  + cd ./automated/linux/kselftest/
 1013 02:08:11.655076  Received signal: <STARTRUN> 1_kselftest-dt 1219052_1.6.2.4.5
 1014 02:08:11.655398  Starting test lava.1_kselftest-dt (1219052_1.6.2.4.5)
 1015 02:08:11.655752  Skipping test definition patterns.
 1016 02:08:11.683063  + ./kselftest.sh -c dt -T '' -t kselftest_armhf.tar.gz -s True -u http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz -L '' -S /dev/null -b beaglebone-black -g mainline -e '' -p /opt/kselftests/mainline/ -n 1 -i 1 -E ''
 1017 02:08:11.890570  INFO: install_deps skipped
 1018 02:08:12.603703  --2024-01-26 21:49:17--  http://storage.kernelci.org/mainline/master/v6.12-rc6-169-g906bd684e4b1e/arm/multi_v7_defconfig/clang-15/kselftest.tar.xz
 1019 02:08:12.651201  Resolving storage.kernelci.org (storage.kernelci.org)... 20.171.243.82
 1020 02:08:12.813942  Connecting to storage.kernelci.org (storage.kernelci.org)|20.171.243.82|:80... connected.
 1021 02:08:12.971304  HTTP request sent, awaiting response... 200 OK
 1022 02:08:12.971690  Length: 2542220 (2.4M) [application/octet-stream]
 1023 02:08:12.977423  Saving to: 'kselftest_armhf.tar.gz'
 1024 02:08:12.977803  
 1025 02:08:14.958790  kselftest_armhf.tar   0%[                    ]       0  --.-KB/s               kselftest_armhf.tar   2%[                    ]  49.92K   159KB/s               kselftest_armhf.tar   8%[>                   ] 213.48K   339KB/s               kselftest_armhf.tar  26%[====>               ] 661.64K   670KB/s               kselftest_armhf.tar  31%[=====>              ] 793.82K   594KB/s               kselftest_armhf.tar  86%[================>   ]   2.11M  1.33MB/s               kselftest_armhf.tar  96%[==================> ]   2.33M  1.28MB/s               kselftest_armhf.tar 100%[===================>]   2.42M  1.22MB/s    in 2.0s    
 1026 02:08:14.959248  
 1027 02:08:15.477291  2024-01-26 21:49:20 (1.22 MB/s) - 'kselftest_armhf.tar.gz' saved [2542220/2542220]
 1028 02:08:15.477699  
 1029 02:08:15.804601  tar: ./nsfs/pidns: time stamp 2024-11-08 01:37:18 is 24724076.981431287 s in the future
 1030 02:08:16.061314  tar: ./nsfs/config: time stamp 2024-11-04 18:27:53 is 24439111.723577745 s in the future
 1031 02:08:16.307501  tar: ./nsfs/owner: time stamp 2024-11-08 01:37:18 is 24724076.476814245 s in the future
 1032 02:08:16.415324  tar: ./nsfs: time stamp 2024-11-08 01:38:20 is 24724138.36841062 s in the future
 1033 02:08:16.713426  tar: ./cachestat/test_cachestat: time stamp 2024-11-08 01:35:24 is 24723962.07224112 s in the future
 1034 02:08:16.828888  tar: ./cachestat: time stamp 2024-11-08 01:38:08 is 24724125.955477662 s in the future
 1035 02:08:17.121596  tar: ./kselftest/prefix.pl: time stamp 2024-11-08 01:38:08 is 24724125.663837537 s in the future
 1036 02:08:17.365500  tar: ./kselftest/ktap_helpers.sh: time stamp 2024-11-04 18:27:53 is 24439110.419182287 s in the future
 1037 02:08:17.612778  tar: ./kselftest/runner.sh: time stamp 2024-11-08 01:38:08 is 24724125.171688203 s in the future
 1038 02:08:17.864212  tar: ./kselftest/ksft.py: time stamp 2024-11-08 01:38:08 is 24724124.921327162 s in the future
 1039 02:08:18.106220  tar: ./kselftest/module.sh: time stamp 2024-11-08 01:38:08 is 24724124.679338203 s in the future
 1040 02:08:18.229967  tar: ./kselftest: time stamp 2024-11-04 18:27:53 is 24439109.554328328 s in the future
 1041 02:08:18.519554  tar: ./cpufreq/governor.sh: time stamp 2024-11-04 18:27:53 is 24439109.266338953 s in the future
 1042 02:08:18.742599  tar: ./cpufreq/config: time stamp 2024-11-04 18:27:53 is 24439109.04185787 s in the future
 1043 02:08:18.973045  tar: ./cpufreq/cpufreq.sh: time stamp 2024-11-04 18:27:53 is 24439108.811805828 s in the future
 1044 02:08:19.201448  tar: ./cpufreq/special-tests.sh: time stamp 2024-11-04 18:27:53 is 24439108.583095911 s in the future
 1045 02:08:19.440297  tar: ./cpufreq/module.sh: time stamp 2024-11-04 18:27:53 is 24439108.344664161 s in the future
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 1048 02:08:20.022598  tar: ./cpufreq: time stamp 2024-11-08 01:38:09 is 24724123.760670078 s in the future
 1049 02:08:20.319382  tar: ./kvm/config: time stamp 2024-11-04 18:27:53 is 24439107.464684161 s in the future
 1050 02:08:20.620582  tar: ./kvm/settings: time stamp 2024-11-04 18:27:53 is 24439107.164505995 s in the future
 1051 02:08:20.717764  tar: ./kvm: time stamp 2024-11-08 01:38:14 is 24724128.06537462 s in the future
 1052 02:08:21.042281  tar: ./amd-pstate/gitsource.sh: time stamp 2024-11-04 18:27:52 is 24439105.742761911 s in the future
 1053 02:08:21.283314  tar: ./amd-pstate/run.sh: time stamp 2024-11-04 18:27:52 is 24439105.501497411 s in the future
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 1055 02:08:21.825276  tar: ./amd-pstate/config: time stamp 2024-11-04 18:27:52 is 24439104.959272453 s in the future
 1056 02:08:22.068492  tar: ./amd-pstate/tbench.sh: time stamp 2024-11-04 18:27:52 is 24439104.716715578 s in the future
 1057 02:08:22.187990  tar: ./amd-pstate: time stamp 2024-11-08 01:38:08 is 24724120.596086036 s in the future
 1058 02:08:22.494540  tar: ./pidfd/pidfd_poll_test: time stamp 2024-11-08 01:37:20 is 24724072.291276619 s in the future
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 1061 02:08:23.252293  tar: ./pidfd/pidfd_setns_test: time stamp 2024-11-08 01:37:21 is 24724072.532916869 s in the future
 1062 02:08:23.524034  tar: ./pidfd/pidfd_getfd_test: time stamp 2024-11-08 01:37:21 is 24724072.261522703 s in the future
 1063 02:08:23.830392  tar: ./pidfd/pidfd_wait: time stamp 2024-11-08 01:37:21 is 24724071.954251828 s in the future
 1064 02:08:24.089502  tar: ./pidfd/pidfd_fdinfo_test: time stamp 2024-11-08 01:37:20 is 24724070.696486286 s in the future
 1065 02:08:24.345320  tar: ./pidfd/pidfd_open_test: time stamp 2024-11-08 01:37:20 is 24724070.440133244 s in the future
 1066 02:08:24.456348  tar: ./pidfd: time stamp 2024-11-08 01:38:21 is 24724131.327438619 s in the future
 1067 02:08:24.752201  tar: ./alsa/utimer-test: time stamp 2024-11-08 01:35:24 is 24723954.031788702 s in the future
 1068 02:08:25.016373  tar: ./alsa/pcm-test.conf: time stamp 2024-11-04 18:27:52 is 24439101.768689119 s in the future
 1069 02:08:25.258335  tar: ./alsa/global-timer: time stamp 2024-11-08 01:35:23 is 24723952.526628119 s in the future
 1070 02:08:25.502582  tar: ./alsa/mixer-test: time stamp 2024-11-08 01:35:23 is 24723952.280875744 s in the future
 1071 02:08:25.782577  tar: ./alsa/libatest.so: time stamp 2024-11-08 01:35:22 is 24723951.001114494 s in the future
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 1073 02:08:26.292275  tar: ./alsa/pcm-test: time stamp 2024-11-08 01:35:23 is 24723951.492501327 s in the future
 1074 02:08:26.583405  tar: ./alsa/conf.d/Lenovo_ThinkPad_P1_Gen2.conf: time stamp 2024-11-04 18:27:52 is 24439100.203910494 s in the future
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 1076 02:08:26.816021  tar: ./alsa: time stamp 2024-11-08 01:38:08 is 24724115.967048494 s in the future
 1077 02:08:27.083422  tar: ./rust/test_probe_samples.sh: time stamp 2024-11-04 18:27:53 is 24439100.702193244 s in the future
 1078 02:08:27.367778  tar: ./rust/config: time stamp 2024-11-04 18:27:53 is 24439100.416342869 s in the future
 1079 02:08:27.475561  tar: ./rust: time stamp 2024-11-08 01:38:23 is 24724130.307556702 s in the future
 1080 02:08:27.785185  tar: ./capabilities/test_execve: time stamp 2024-11-08 01:35:24 is 24723951.000084952 s in the future
 1081 02:08:28.058135  tar: ./capabilities/validate_cap: time stamp 2024-11-08 01:35:24 is 24723950.727285327 s in the future
 1082 02:08:28.174434  tar: ./capabilities: time stamp 2024-11-08 01:38:09 is 24724115.609525577 s in the future
 1083 02:08:28.449080  tar: ./net/net_helper.sh: time stamp 2024-11-04 18:27:53 is 24439099.335146077 s in the future
 1084 02:08:28.716280  tar: ./net/lib.sh: time stamp 2024-11-04 18:27:53 is 24439099.067679077 s in the future
 1085 02:08:29.003740  tar: ./net/netfilter/nft_tproxy_tcp.sh: time stamp 2024-11-04 18:27:53 is 24439098.781509077 s in the future
 1086 02:08:29.237533  tar: ./net/netfilter/nf_nat_edemux.sh: time stamp 2024-11-04 18:27:53 is 24439098.547927702 s in the future
 1087 02:08:29.486285  tar: ./net/netfilter/conntrack_sctp_collision.sh: time stamp 2024-11-04 18:27:53 is 24439098.300614869 s in the future
 1088 02:08:29.720327  tar: ./net/netfilter/audit_logread: time stamp 2024-11-08 01:37:05 is 24724050.064762952 s in the future
 1089 02:08:29.971864  tar: ./net/netfilter/br_netfilter.sh: time stamp 2024-11-04 18:27:53 is 24439097.813607535 s in the future
 1090 02:08:30.204443  tar: ./net/netfilter/conntrack_icmp_related.sh: time stamp 2024-11-04 18:27:53 is 24439097.581070952 s in the future
 1091 02:08:30.426523  tar: ./net/netfilter/lib.sh: time stamp 2024-11-04 18:27:53 is 24439097.357726827 s in the future
 1092 02:08:30.669662  tar: ./net/netfilter/ipvs.sh: time stamp 2024-11-04 18:27:53 is 24439097.114134577 s in the future
 1093 02:08:30.902421  tar: ./net/netfilter/nft_concat_range.sh: time stamp 2024-11-04 18:27:53 is 24439096.88221516 s in the future
 1094 02:08:31.220418  tar: ./net/netfilter/nf_queue: time stamp 2024-11-08 01:37:05 is 24724048.563431535 s in the future
 1095 02:08:31.463458  tar: ./net/netfilter/nft_queue.sh: time stamp 2024-11-04 18:27:53 is 24439096.321539743 s in the future
 1096 02:08:31.713986  tar: ./net/netfilter/vxlan_mtu_frag.sh: time stamp 2024-11-04 18:27:53 is 24439096.071251243 s in the future
 1097 02:08:31.991185  tar: ./net/netfilter/conntrack_reverse_clash.sh: time stamp 2024-11-04 18:27:53 is 24439095.795170202 s in the future
 1098 02:08:32.245957  tar: ./net/netfilter/nft_synproxy.sh: time stamp 2024-11-04 18:27:53 is 24439095.539279202 s in the future
 1099 02:08:32.502769  tar: ./net/netfilter/conntrack_reverse_clash: time stamp 2024-11-08 01:37:05 is 24724047.286423701 s in the future
 1100 02:08:32.748051  tar: ./net/netfilter/nft_nat_zones.sh: time stamp 2024-11-04 18:27:53 is 24439095.037016993 s in the future
 1101 02:08:33.021957  tar: ./net/netfilter/nft_tproxy_udp.sh: time stamp 2024-11-04 18:27:53 is 24439094.763711826 s in the future
 1102 02:08:33.279947  tar: ./net/netfilter/nft_audit.sh: time stamp 2024-11-04 18:27:53 is 24439094.504991118 s in the future
 1103 02:08:33.532929  tar: ./net/netfilter/sctp_collision: time stamp 2024-11-08 01:37:06 is 24724047.25217916 s in the future
 1104 02:08:33.786630  tar: ./net/netfilter/nft_meta.sh: time stamp 2024-11-04 18:27:53 is 24439093.997739326 s in the future
 1105 02:08:34.030073  tar: ./net/netfilter/config: time stamp 2024-11-04 18:27:53 is 24439093.754498368 s in the future
 1106 02:08:34.335761  tar: ./net/netfilter/packetdrill/conntrack_syn_challenge_ack.pkt: time stamp 2024-11-04 18:27:53 is 24439093.451468451 s in the future
 1107 02:08:34.640605  tar: ./net/netfilter/packetdrill/conntrack_rst_invalid.pkt: time stamp 2024-11-04 18:27:53 is 24439093.146992576 s in the future
 1108 02:08:34.893585  tar: ./net/netfilter/packetdrill/conntrack_synack_old.pkt: time stamp 2024-11-04 18:27:53 is 24439092.892629326 s in the future
 1109 02:08:35.145238  tar: ./net/netfilter/packetdrill/conntrack_synack_reuse.pkt: time stamp 2024-11-04 18:27:53 is 24439092.642399576 s in the future
 1110 02:08:35.409598  tar: ./net/netfilter/packetdrill/common.sh: time stamp 2024-11-04 18:27:53 is 24439092.375562868 s in the future
 1111 02:08:35.650181  tar: ./net/netfilter/packetdrill/conntrack_ack_loss_stall.pkt: time stamp 2024-11-04 18:27:53 is 24439092.137398826 s in the future
 1112 02:08:35.884459  tar: ./net/netfilter/packetdrill/conntrack_inexact_rst.pkt: time stamp 2024-11-04 18:27:53 is 24439091.903140243 s in the future
 1113 02:08:35.996474  tar: ./net/netfilter/packetdrill: time stamp 2024-11-04 18:27:53 is 24439091.787375284 s in the future
 1114 02:08:36.298841  tar: ./net/netfilter/rpath.sh: time stamp 2024-11-04 18:27:53 is 24439091.485539659 s in the future
 1115 02:08:36.539901  tar: ./net/netfilter/xt_string.sh: time stamp 2024-11-04 18:27:53 is 24439091.245291076 s in the future
 1116 02:08:36.775763  tar: ./net/netfilter/bridge_brouter.sh: time stamp 2024-11-04 18:27:53 is 24439091.009507326 s in the future
 1117 02:08:37.040181  tar: ./net/netfilter/nft_nat.sh: time stamp 2024-11-04 18:27:53 is 24439090.744706493 s in the future
 1118 02:08:37.277022  tar: ./net/netfilter/nf_conntrack_packetdrill.sh: time stamp 2024-11-04 18:27:53 is 24439090.509241659 s in the future
 1119 02:08:37.489560  tar: ./net/netfilter/nft_fib.sh: time stamp 2024-11-04 18:27:53 is 24439090.294361826 s in the future
 1120 02:08:37.754024  tar: ./net/netfilter/conntrack_ipip_mtu.sh: time stamp 2024-11-04 18:27:53 is 24439090.031674076 s in the future
 1121 02:08:38.029309  tar: ./net/netfilter/conntrack_tcp_unreplied.sh: time stamp 2024-11-04 18:27:53 is 24439089.756527409 s in the future
 1122 02:08:38.268427  tar: ./net/netfilter/conntrack_dump_flush: time stamp 2024-11-08 01:37:05 is 24724041.516584951 s in the future
 1123 02:08:38.513149  tar: ./net/netfilter/nft_concat_range_perf.sh: time stamp 2024-11-04 18:27:53 is 24439089.272476701 s in the future
 1124 02:08:38.736501  tar: ./net/netfilter/br_netfilter_queue.sh: time stamp 2024-11-04 18:27:53 is 24439089.049237242 s in the future
 1125 02:08:38.978552  tar: ./net/netfilter/settings: time stamp 2024-11-04 18:27:53 is 24439088.805271117 s in the future
 1126 02:08:39.213426  tar: ./net/netfilter/nft_flowtable.sh: time stamp 2024-11-04 18:27:53 is 24439088.572152242 s in the future
 1127 02:08:39.481339  tar: ./net/netfilter/nft_conntrack_helper.sh: time stamp 2024-11-04 18:27:53 is 24439088.304866492 s in the future
 1128 02:08:39.711941  tar: ./net/netfilter/conntrack_vrf.sh: time stamp 2024-11-04 18:27:53 is 24439088.073189284 s in the future
 1129 02:08:39.949137  tar: ./net/netfilter/nft_zones_many.sh: time stamp 2024-11-04 18:27:53 is 24439087.837635826 s in the future
 1130 02:08:40.195562  tar: ./net/netfilter/connect_close: time stamp 2024-11-08 01:37:05 is 24724039.589159492 s in the future
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 1132 02:08:40.735873  tar: ./net/tcp_ao/self-connect_ipv4: time stamp 2024-11-08 01:37:11 is 24724045.049274617 s in the future
 1133 02:08:41.093359  tar: ./net/tcp_ao/restore_ipv4: time stamp 2024-11-08 01:37:11 is 24724044.691462242 s in the future
 1134 02:08:41.530904  tar: ./net/tcp_ao/icmps-discard_ipv6: time stamp 2024-11-08 01:37:14 is 24724047.253353534 s in the future
 1135 02:08:41.850263  tar: ./net/tcp_ao/connect-deny_ipv6: time stamp 2024-11-08 01:37:13 is 24724045.933446575 s in the future
 1136 02:08:42.128384  tar: ./net/tcp_ao/bench-lookups_ipv4: time stamp 2024-11-08 01:37:08 is 24724040.657688075 s in the future
 1137 02:08:42.431829  tar: ./net/tcp_ao/bench-lookups_ipv6: time stamp 2024-11-08 01:37:13 is 24724045.352500825 s in the future
 1138 02:08:42.758753  tar: ./net/tcp_ao/icmps-discard_ipv4: time stamp 2024-11-08 01:37:10 is 24724042.0269047 s in the future
 1139 02:08:43.070678  tar: ./net/tcp_ao/self-connect_ipv6: time stamp 2024-11-08 01:37:16 is 24724047.713963867 s in the future
 1140 02:08:43.294760  tar: ./net/tcp_ao/config: time stamp 2024-11-04 18:27:53 is 24439084.488816492 s in the future
 1141 02:08:43.607736  tar: ./net/tcp_ao/seq-ext_ipv4: time stamp 2024-11-08 01:37:12 is 24724043.176459533 s in the future
 1142 02:08:43.877303  tar: ./net/tcp_ao/connect_ipv4: time stamp 2024-11-08 01:37:09 is 24724039.906861867 s in the future
 1143 02:08:44.187174  tar: ./net/tcp_ao/unsigned-md5_ipv6: time stamp 2024-11-08 01:37:18 is 24724048.597448533 s in the future
 1144 02:08:44.482406  tar: ./net/tcp_ao/connect-deny_ipv4: time stamp 2024-11-08 01:37:09 is 24724039.301859492 s in the future
 1145 02:08:44.833391  tar: ./net/tcp_ao/key-management_ipv4: time stamp 2024-11-08 01:37:10 is 24724039.950409075 s in the future
 1146 02:08:45.130383  tar: ./net/tcp_ao/restore_ipv6: time stamp 2024-11-08 01:37:15 is 24724044.653634617 s in the future
 1147 02:08:45.413877  tar: ./net/tcp_ao/seq-ext_ipv6: time stamp 2024-11-08 01:37:16 is 24724045.370170867 s in the future
 1148 02:08:45.734194  tar: ./net/tcp_ao/setsockopt-closed_ipv4: time stamp 2024-11-08 01:37:12 is 24724041.050799533 s in the future
 1149 02:08:46.016325  tar: ./net/tcp_ao/connect_ipv6: time stamp 2024-11-08 01:37:13 is 24724041.767006117 s in the future
 1150 02:08:46.385278  tar: ./net/tcp_ao/rst_ipv6: time stamp 2024-11-08 01:37:16 is 24724044.398786491 s in the future
 1151 02:08:46.706674  tar: ./net/tcp_ao/rst_ipv4: time stamp 2024-11-08 01:37:11 is 24724039.077223491 s in the future
 1152 02:08:47.028088  tar: ./net/tcp_ao/icmps-accept_ipv4: time stamp 2024-11-08 01:37:09 is 24724036.756508075 s in the future
 1153 02:08:47.337075  tar: ./net/tcp_ao/setsockopt-closed_ipv6: time stamp 2024-11-08 01:37:17 is 24724044.447615033 s in the future
 1154 02:08:47.626866  tar: ./net/tcp_ao/settings: time stamp 2024-11-04 18:27:53 is 24439080.156014075 s in the future
 1155 02:08:47.999917  tar: ./net/tcp_ao/icmps-accept_ipv6: time stamp 2024-11-08 01:37:14 is 24724040.78450145 s in the future
 1156 02:08:48.300252  tar: ./net/tcp_ao/unsigned-md5_ipv4: time stamp 2024-11-08 01:37:12 is 24724038.4841837 s in the future
 1157 02:08:48.605555  tar: ./net/tcp_ao/key-management_ipv6: time stamp 2024-11-08 01:37:15 is 24724041.178420075 s in the future
 1158 02:08:48.724305  tar: ./net/tcp_ao: time stamp 2024-11-08 01:38:20 is 24724106.058928658 s in the future
 1159 02:08:49.014169  tar: ./net/packetdrill/tcp_inq_server.pkt: time stamp 2024-11-04 18:27:53 is 24439078.771173116 s in the future
 1160 02:08:49.270601  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt-send-5pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439078.516680783 s in the future
 1161 02:08:49.515214  tar: ./net/packetdrill/tcp_zerocopy_client.pkt: time stamp 2024-11-04 18:27:53 is 24439078.270652908 s in the future
 1162 02:08:49.786240  tar: ./net/packetdrill/tcp_zerocopy_fastopen-client.pkt: time stamp 2024-11-04 18:27:53 is 24439077.999480783 s in the future
 1163 02:08:50.018061  tar: ./net/packetdrill/defaults.sh: time stamp 2024-11-04 18:27:53 is 24439077.765928199 s in the future
 1164 02:08:50.288312  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt-send-6pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439077.499176449 s in the future
 1165 02:08:50.512901  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-4pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439077.273875616 s in the future
 1166 02:08:50.788323  tar: ./net/packetdrill/tcp_zerocopy_epoll_oneshot.pkt: time stamp 2024-11-04 18:27:53 is 24439076.998358408 s in the future
 1167 02:08:51.038377  tar: ./net/packetdrill/tcp_md5_md5-only-on-client-ack.pkt: time stamp 2024-11-04 18:27:53 is 24439076.748199158 s in the future
 1168 02:08:51.273423  tar: ./net/packetdrill/tcp_slow_start_slow-start-app-limited-9-packets-out.pkt: time stamp 2024-11-04 18:27:53 is 24439076.514538574 s in the future
 1169 02:08:51.559391  tar: ./net/packetdrill/tcp_slow_start_slow-start-fq-ack-per-2pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439076.227249449 s in the future
 1170 02:08:51.788180  tar: ./net/packetdrill/tcp_zerocopy_maxfrags.pkt: time stamp 2024-11-04 18:27:53 is 24439075.997390533 s in the future
 1171 02:08:52.036564  tar: ./net/packetdrill/config: time stamp 2024-11-04 18:27:53 is 24439075.747202032 s in the future
 1172 02:08:52.281351  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-1pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439075.505287574 s in the future
 1173 02:08:52.514197  tar: ./net/packetdrill/tcp_zerocopy_fastopen-server.pkt: time stamp 2024-11-04 18:27:53 is 24439075.271741991 s in the future
 1174 02:08:52.765338  tar: ./net/packetdrill/tcp_slow_start_slow-start-after-win-update.pkt: time stamp 2024-11-04 18:27:53 is 24439075.021481407 s in the future
 1175 02:08:52.998334  tar: ./net/packetdrill/tcp_slow_start_slow-start-ack-per-2pkt.pkt: time stamp 2024-11-04 18:27:53 is 24439074.787909199 s in the future
 1176 02:08:53.238122  tar: ./net/packetdrill/tcp_zerocopy_closed.pkt: time stamp 2024-11-04 18:27:53 is 24439074.546005616 s in the future
 1177 02:08:53.503742  tar: ./net/packetdrill/set_sysctls.py: time stamp 2024-11-04 18:27:53 is 24439074.280596282 s in the future
 1178 02:08:53.745453  tar: ./net/packetdrill/tcp_slow_start_slow-start-after-idle.pkt: time stamp 2024-11-04 18:27:53 is 24439074.041199949 s in the future
 1179 02:08:54.001152  tar: ./net/packetdrill/ksft_runner.sh: time stamp 2024-11-04 18:27:53 is 24439073.782749824 s in the future
 1180 02:08:54.278338  tar: ./net/packetdrill/tcp_slow_start_slow-start-app-limited.pkt: time stamp 2024-11-04 18:27:53 is 24439073.507584657 s in the future
 1181 02:08:54.546928  tar: ./net/packetdrill/tcp_zerocopy_small.pkt: time stamp 2024-11-04 18:27:53 is 24439073.238125824 s in the future
 1182 02:08:54.786041  tar: ./net/packetdrill/tcp_zerocopy_batch.pkt: time stamp 2024-11-04 18:27:53 is 24439072.998869365 s in the future
 1183 02:08:55.054488  tar: ./net/packetdrill/tcp_inq_client.pkt: time stamp 2024-11-04 18:27:53 is 24439072.729291865 s in the future
 1184 02:08:55.328318  tar: ./net/packetdrill/tcp_zerocopy_epoll_edge.pkt: time stamp 2024-11-04 18:27:53 is 24439072.45678049 s in the future
 1185 02:08:55.581158  tar: ./net/packetdrill/tcp_zerocopy_epoll_exclusive.pkt: time stamp 2024-11-04 18:27:53 is 24439072.203799407 s in the future
 1186 02:08:55.828816  tar: ./net/packetdrill/tcp_zerocopy_basic.pkt: time stamp 2024-11-04 18:27:53 is 24439071.956443407 s in the future
 1187 02:08:55.943246  tar: ./net/packetdrill: time stamp 2024-11-04 18:27:53 is 24439071.83921024 s in the future
 1188 02:08:56.281116  tar: ./net/hsr/hsr_ping.sh: time stamp 2024-11-04 18:27:53 is 24439071.50162574 s in the future
 1189 02:08:56.510452  tar: ./net/hsr/config: time stamp 2024-11-04 18:27:53 is 24439071.272022699 s in the future
 1190 02:08:56.752570  tar: ./net/hsr/hsr_redbox.sh: time stamp 2024-11-04 18:27:53 is 24439071.030652407 s in the future
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 1221 02:09:04.577937  tar: ./net/forwarding/custom_multipath_hash.sh: time stamp 2024-11-04 18:27:53 is 24439063.206296281 s in the future
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 1237 02:09:08.691137  tar: ./net/forwarding/mirror_gre_topo_lib.sh: time stamp 2024-11-04 18:27:53 is 24439059.093515155 s in the future
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 1262 02:09:15.028628  tar: ./net/forwarding/tc_tunnel_key.sh: time stamp 2024-11-04 18:27:53 is 24439052.754098155 s in the future
 1263 02:09:15.282440  tar: ./net/forwarding/bridge_sticky_fdb.sh: time stamp 2024-11-04 18:27:53 is 24439052.500414905 s in the future
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 1266 02:09:16.039034  tar: ./net/forwarding/router_multicast.sh: time stamp 2024-11-04 18:27:53 is 24439051.743887363 s in the future
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 1277 02:09:18.745670  tar: ./net/forwarding/router_bridge_pvid_vlan_upper.sh: time stamp 2024-11-04 18:27:53 is 24439049.038390863 s in the future
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 1282 02:09:19.968436  tar: ./net/forwarding/bridge_locked_port.sh: time stamp 2024-11-04 18:27:53 is 24439047.815027987 s in the future
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 1292 02:09:22.520143  tar: ./net/forwarding/gre_multipath.sh: time stamp 2024-11-04 18:27:53 is 24439045.262616071 s in the future
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 1294 02:09:23.029003  tar: ./net/forwarding/gre_inner_v6_multipath.sh: time stamp 2024-11-04 18:27:53 is 24439044.753471112 s in the future
 1295 02:09:23.270097  tar: ./net/forwarding/no_forwarding.sh: time stamp 2024-11-04 18:27:53 is 24439044.51209082 s in the future
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 1313 02:09:27.811172  tar: ./net/forwarding/vxlan_asymmetric_ipv6.sh: time stamp 2024-11-04 18:27:53 is 24439039.971476737 s in the future
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 1929 02:11:12.736297  tar: ./timers/nanosleep: time stamp 2024-11-08 01:37:39 is 24723921.038874391 s in the future
 1930 02:11:12.867318  tar: ./timers/set-2038: time stamp 2024-11-08 01:37:43 is 24723924.907703932 s in the future
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 1936 02:11:13.704495  tar: ./timers/alarmtimer-suspend: time stamp 2024-11-08 01:37:41 is 24723922.071430099 s in the future
 1937 02:11:13.841858  tar: ./timers/mqueue-lat: time stamp 2024-11-08 01:37:40 is 24723920.932887099 s in the future
 1938 02:11:14.026795  tar: ./timers/clocksource-switch: time stamp 2024-11-08 01:37:42 is 24723922.748512266 s in the future
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 1940 02:11:14.312245  tar: ./timers/leapcrash: time stamp 2024-11-08 01:37:43 is 24723923.462536516 s in the future
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 1942 02:11:14.602001  tar: ./timers/settings: time stamp 2024-11-04 18:27:53 is 24438933.173099765 s in the future
 1943 02:11:14.754223  tar: ./timers/leap-a-day: time stamp 2024-11-08 01:37:43 is 24723923.020500515 s in the future
 1944 02:11:14.907585  tar: ./timers/raw_skew: time stamp 2024-11-08 01:37:40 is 24723919.867590765 s in the future
 1945 02:11:14.967979  tar: ./timers: time stamp 2024-11-08 01:38:25 is 24723964.807270557 s in the future
 1946 02:11:15.135897  tar: ./splice/config: time stamp 2024-11-04 18:27:53 is 24438932.638196474 s in the future
 1947 02:11:15.274714  tar: ./splice/default_file_splice_read.sh: time stamp 2024-11-04 18:27:53 is 24438932.502482599 s in the future
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 1950 02:11:15.728914  tar: ./splice/default_file_splice_read: time stamp 2024-11-08 01:37:35 is 24723914.048551849 s in the future
 1951 02:11:15.860002  tar: ./splice/settings: time stamp 2024-11-04 18:27:53 is 24438931.914290724 s in the future
 1952 02:11:15.934962  tar: ./splice: time stamp 2024-11-08 01:38:24 is 24723962.83849264 s in the future
 1953 02:11:16.116013  tar: ./acct/acct_syscall: time stamp 2024-11-08 01:35:22 is 24723780.658590807 s in the future
 1954 02:11:16.173282  tar: ./acct: time stamp 2024-11-08 01:38:08 is 24723946.60025939 s in the future
 1955 02:11:16.336318  tar: ./ir/ir_loopback: time stamp 2024-11-08 01:36:33 is 24723851.438406057 s in the future
 1956 02:11:16.462321  tar: ./ir/ir_loopback.sh: time stamp 2024-11-04 18:27:53 is 24438931.313135682 s in the future
 1957 02:11:16.519709  tar: ./ir: time stamp 2024-11-08 01:38:14 is 24723952.254943724 s in the future
 1958 02:11:16.691572  tar: ./membarrier/membarrier_test_single_thread: time stamp 2024-11-08 01:36:46 is 24723864.085483224 s in the future
 1959 02:11:16.831400  tar: ./membarrier/membarrier_test_multi_thread: time stamp 2024-11-08 01:36:46 is 24723863.946038849 s in the future
 1960 02:11:16.886558  tar: ./membarrier: time stamp 2024-11-08 01:38:17 is 24723954.887858099 s in the future
 1961 02:11:17.064671  tar: ./power_supply/test_power_supply_properties.sh: time stamp 2024-11-04 18:27:53 is 24438930.712691432 s in the future
 1962 02:11:17.207591  tar: ./power_supply/helpers.sh: time stamp 2024-11-04 18:27:53 is 24438930.568491724 s in the future
 1963 02:11:17.270125  tar: ./power_supply: time stamp 2024-11-08 01:38:21 is 24723958.504083598 s in the future
 1964 02:11:17.445483  tar: ./timens/vfork_exec: time stamp 2024-11-08 01:37:39 is 24723916.329155348 s in the future
 1965 02:11:17.580241  tar: ./timens/clock_nanosleep: time stamp 2024-11-08 01:37:38 is 24723915.195416015 s in the future
 1966 02:11:17.717629  tar: ./timens/timer: time stamp 2024-11-08 01:37:37 is 24723914.05755839 s in the future
 1967 02:11:17.867768  tar: ./timens/gettime_perf: time stamp 2024-11-08 01:37:39 is 24723915.90742214 s in the future
 1968 02:11:17.999908  tar: ./timens/config: time stamp 2024-11-04 18:27:53 is 24438929.775119223 s in the future
 1969 02:11:18.124811  tar: ./timens/exec: time stamp 2024-11-08 01:37:38 is 24723914.649928598 s in the future
 1970 02:11:18.262184  tar: ./timens/timens: time stamp 2024-11-08 01:37:37 is 24723913.511800473 s in the future
 1971 02:11:18.415435  tar: ./timens/timerfd: time stamp 2024-11-08 01:37:37 is 24723913.35906814 s in the future
 1972 02:11:18.549517  tar: ./timens/procfs: time stamp 2024-11-08 01:37:38 is 24723914.225045723 s in the future
 1973 02:11:18.675546  tar: ./timens/futex: time stamp 2024-11-08 01:37:38 is 24723914.099448473 s in the future
 1974 02:11:18.732768  tar: ./timens: time stamp 2024-11-08 01:38:25 is 24723961.040511848 s in the future
 1975 02:11:18.910786  tar: ./perf_events/remove_on_exec: time stamp 2024-11-08 01:37:19 is 24723894.86533989 s in the future
 1976 02:11:19.060183  tar: ./perf_events/sigtrap_threads: time stamp 2024-11-08 01:37:19 is 24723894.715788098 s in the future
 1977 02:11:19.199077  tar: ./perf_events/watermark_signal: time stamp 2024-11-08 01:37:19 is 24723894.576797473 s in the future
 1978 02:11:19.321734  tar: ./perf_events/config: time stamp 2024-11-04 18:27:53 is 24438928.452632432 s in the future
 1979 02:11:19.460203  tar: ./perf_events/settings: time stamp 2024-11-04 18:27:53 is 24438928.314822682 s in the future
 1980 02:11:19.522721  tar: ./perf_events: time stamp 2024-11-08 01:38:20 is 24723955.251667515 s in the future
 1981 02:11:19.702447  tar: ./iommu/iommufd_fail_nth: time stamp 2024-11-08 01:36:33 is 24723848.073639182 s in the future
 1982 02:11:19.935085  tar: ./iommu/iommufd: time stamp 2024-11-08 01:36:32 is 24723846.839287807 s in the future
 1983 02:11:20.081235  tar: ./iommu/config: time stamp 2024-11-04 18:27:53 is 24438927.693661848 s in the future
 1984 02:11:20.139620  tar: ./iommu: time stamp 2024-11-08 01:38:14 is 24723948.634436681 s in the future
 1985 02:11:20.277066  tar: ./sysctl/config: time stamp 2024-11-04 18:27:53 is 24438927.497271223 s in the future
 1986 02:11:20.411364  tar: ./sysctl/sysctl.sh: time stamp 2024-11-04 18:27:53 is 24438927.363736431 s in the future
 1987 02:11:20.543604  tar: ./sysctl: time stamp 2024-11-08 01:38:24 is 24723958.230505181 s in the future
 1988 02:11:20.801348  tar: ./efivarfs/config: time stamp 2024-11-04 18:27:53 is 24438926.973511265 s in the future
 1989 02:11:20.961106  tar: ./efivarfs/open-unlink: time stamp 2024-11-08 01:36:21 is 24723834.813570765 s in the future
 1990 02:11:21.119642  tar: ./efivarfs/create-read: time stamp 2024-11-08 01:36:21 is 24723834.655127848 s in the future
 1991 02:11:21.252983  tar: ./efivarfs/efivarfs.sh: time stamp 2024-11-04 18:27:53 is 24438926.521614765 s in the future
 1992 02:11:21.316643  tar: ./efivarfs: time stamp 2024-11-08 01:38:11 is 24723944.458197931 s in the future
 1993 02:11:21.491094  tar: ./intel_pstate/run.sh: time stamp 2024-11-04 18:27:53 is 24438926.283237515 s in the future
 1994 02:11:21.566548  tar: ./intel_pstate: time stamp 2024-11-08 01:38:14 is 24723947.207823265 s in the future
 1995 02:11:21.769626  tar: ./filesystems/fat/config: time stamp 2024-11-04 18:27:53 is 24438926.00471639 s in the future
 1996 02:11:21.917946  tar: ./filesystems/fat/rename_exchange: time stamp 2024-11-08 01:36:25 is 24723837.857539598 s in the future
 1997 02:11:22.043003  tar: ./filesystems/fat/run_fat_tests.sh: time stamp 2024-11-04 18:27:53 is 24438925.73244539 s in the future
 1998 02:11:22.103615  tar: ./filesystems/fat: time stamp 2024-11-08 01:38:12 is 24723944.671267431 s in the future
 1999 02:11:22.241096  tar: ./filesystems/dnotify_test: time stamp 2024-11-08 01:36:23 is 24723835.534387848 s in the future
 2000 02:11:22.469626  tar: ./filesystems/epoll/epoll_wakeup_test: time stamp 2024-11-08 01:36:24 is 24723836.306788598 s in the future
 2001 02:11:22.519607  tar: ./filesystems/epoll: time stamp 2024-11-08 01:38:12 is 24723944.255360265 s in the future
 2002 02:11:22.670943  tar: ./filesystems/binderfs/config: time stamp 2024-11-04 18:27:53 is 24438925.104133723 s in the future
 2003 02:11:22.822659  tar: ./filesystems/binderfs/binderfs_test: time stamp 2024-11-08 01:36:23 is 24723834.954224431 s in the future
 2004 02:11:22.888668  tar: ./filesystems/binderfs: time stamp 2024-11-08 01:38:12 is 24723943.888178556 s in the future
 2005 02:11:23.029252  tar: ./filesystems/devpts_pts: time stamp 2024-11-08 01:36:23 is 24723834.745622056 s in the future
 2006 02:11:23.221760  tar: ./filesystems/overlayfs/dev_in_maps: time stamp 2024-11-08 01:36:25 is 24723836.553602181 s in the future
 2007 02:11:23.288602  tar: ./filesystems/overlayfs: time stamp 2024-11-08 01:38:12 is 24723943.487114223 s in the future
 2008 02:11:23.447825  tar: ./filesystems/statmount/statmount_test: time stamp 2024-11-08 01:36:25 is 24723836.329131431 s in the future
 2009 02:11:23.589761  tar: ./filesystems/statmount/statmount_test_ns: time stamp 2024-11-08 01:36:25 is 24723836.186983473 s in the future
 2010 02:11:23.641852  tar: ./filesystems/statmount: time stamp 2024-11-08 01:38:12 is 24723943.133031306 s in the future
 2011 02:11:23.687790  tar: ./filesystems: time stamp 2024-11-08 01:38:12 is 24723943.086649264 s in the future
 2012 02:11:23.820909  tar: ./firmware/fw_upload.sh: time stamp 2024-11-04 18:27:53 is 24438923.953871473 s in the future
 2013 02:11:23.963988  tar: ./firmware/fw_run_tests.sh: time stamp 2024-11-04 18:27:53 is 24438923.811488931 s in the future
 2014 02:11:24.092104  tar: ./firmware/fw_lib.sh: time stamp 2024-11-04 18:27:53 is 24438923.682625473 s in the future
 2015 02:11:24.242153  tar: ./firmware/config: time stamp 2024-11-04 18:27:53 is 24438923.531914806 s in the future
 2016 02:11:24.406351  tar: ./firmware/fw_filesystem.sh: time stamp 2024-11-04 18:27:53 is 24438923.369190889 s in the future
 2017 02:11:24.548219  tar: ./firmware/fw_namespace: time stamp 2024-11-08 01:36:26 is 24723836.227165514 s in the future
 2018 02:11:24.664897  tar: ./firmware/fw_fallback.sh: time stamp 2024-11-04 18:27:53 is 24438923.110531223 s in the future
 2019 02:11:24.798214  tar: ./firmware/settings: time stamp 2024-11-04 18:27:53 is 24438922.976919973 s in the future
 2020 02:11:24.858555  tar: ./firmware: time stamp 2024-11-08 01:38:13 is 24723942.914221723 s in the future
 2021 02:11:25.023640  tar: ./memfd/memfd_test: time stamp 2024-11-08 01:36:46 is 24723855.751711139 s in the future
 2022 02:11:25.156019  tar: ./memfd/config: time stamp 2024-11-04 18:27:53 is 24438922.618331223 s in the future
 2023 02:11:25.290743  tar: ./memfd/run_fuse_test.sh: time stamp 2024-11-04 18:27:53 is 24438922.484928098 s in the future
 2024 02:11:25.437714  tar: ./memfd/fuse_test: time stamp 2024-11-08 01:36:46 is 24723855.336391598 s in the future
 2025 02:11:25.564877  tar: ./memfd/fuse_mnt: time stamp 2024-11-08 01:36:47 is 24723856.209396223 s in the future
 2026 02:11:25.708110  tar: ./memfd/run_hugetlbfs_test.sh: time stamp 2024-11-04 18:27:53 is 24438922.067737597 s in the future
 2027 02:11:25.760013  tar: ./memfd: time stamp 2024-11-08 01:38:17 is 24723946.013426264 s in the future
 2028 02:11:26.047408  tar: ./gpio/gpio-chip-info: time stamp 2024-11-08 01:36:29 is 24723837.727133681 s in the future
 2029 02:11:26.174452  tar: ./gpio/gpio-mockup-sysfs.sh: time stamp 2024-11-04 18:27:53 is 24438921.600705431 s in the future
 2030 02:11:26.296945  tar: ./gpio/config: time stamp 2024-11-04 18:27:53 is 24438921.476459431 s in the future
 2031 02:11:26.448176  tar: ./gpio/gpio-line-name: time stamp 2024-11-08 01:36:29 is 24723837.326470097 s in the future
 2032 02:11:26.589942  tar: ./gpio/gpio-sim.sh: time stamp 2024-11-04 18:27:53 is 24438921.183811264 s in the future
 2033 02:11:26.727602  tar: ./gpio/gpio-mockup.sh: time stamp 2024-11-04 18:27:53 is 24438921.046535764 s in the future
 2034 02:11:26.872478  tar: ./gpio/gpio-mockup-cdev: time stamp 2024-11-08 01:36:29 is 24723836.901317514 s in the future
 2035 02:11:26.927707  tar: ./gpio: time stamp 2024-11-08 01:38:13 is 24723940.846501347 s in the future
 2036 02:11:27.081071  tar: ./kselftest-list.txt: time stamp 2024-11-08 01:38:29 is 24723956.692889306 s in the future
 2037 02:11:27.224984  tar: ./pstore/pstore_tests: time stamp 2024-11-04 18:27:53 is 24438920.549889972 s in the future
 2038 02:11:27.347760  tar: ./pstore/config: time stamp 2024-11-04 18:27:53 is 24438920.425641597 s in the future
 2039 02:11:27.483320  tar: ./pstore/pstore_crash_test: time stamp 2024-11-04 18:27:53 is 24438920.292302639 s in the future
 2040 02:11:27.627211  tar: ./pstore/pstore_post_reboot_tests: time stamp 2024-11-04 18:27:53 is 24438920.148428722 s in the future
 2041 02:11:27.758572  tar: ./pstore/common_tests: time stamp 2024-11-04 18:27:53 is 24438920.015738056 s in the future
 2042 02:11:27.814650  tar: ./pstore: time stamp 2024-11-08 01:38:21 is 24723947.958811889 s in the future
 2043 02:11:27.983820  tar: ./vDSO/vdso_test_gettimeofday: time stamp 2024-11-08 01:37:46 is 24723912.791762389 s in the future
 2044 02:11:28.127779  tar: ./vDSO/vdso_test_getcpu: time stamp 2024-11-08 01:37:46 is 24723912.647888847 s in the future
 2045 02:11:28.279195  tar: ./vDSO/vdso_test_clock_getres: time stamp 2024-11-08 01:37:46 is 24723912.497473722 s in the future
 2046 02:11:28.413806  tar: ./vDSO/vdso_test_correctness: time stamp 2024-11-08 01:37:47 is 24723913.361370097 s in the future
 2047 02:11:28.554386  tar: ./vDSO/vdso_test_abi: time stamp 2024-11-08 01:37:46 is 24723912.220000722 s in the future
 2048 02:11:28.689009  tar: ./vDSO/vdso_test_getrandom: time stamp 2024-11-08 01:37:47 is 24723913.086225805 s in the future
 2049 02:11:28.834954  tar: ./vDSO/vdso_test_chacha: time stamp 2024-11-08 01:37:47 is 24723912.939508097 s in the future
 2050 02:11:28.895166  tar: ./vDSO: time stamp 2024-11-08 01:38:26 is 24723951.87753843 s in the future
 2051 02:11:29.054642  tar: ./mqueue/mq_open_tests: time stamp 2024-11-08 01:36:49 is 24723854.719401389 s in the future
 2052 02:11:29.210181  tar: ./mqueue/mq_perf_tests: time stamp 2024-11-08 01:36:50 is 24723855.56440968 s in the future
 2053 02:11:29.275924  tar: ./mqueue: time stamp 2024-11-08 01:38:18 is 24723943.496768472 s in the future
 2054 02:11:29.450428  tar: ./sync/sync_test: time stamp 2024-11-08 01:37:36 is 24723901.324162055 s in the future
 2055 02:11:29.605805  tar: ./sync/config: time stamp 2024-11-04 18:27:53 is 24438918.168483764 s in the future
 2056 02:11:29.685177  tar: ./sync: time stamp 2024-11-08 01:38:24 is 24723949.087922555 s in the future
 2057 02:11:29.846831  tar: ./ipc/msgque: time stamp 2024-11-08 01:36:33 is 24723837.92652093 s in the future
 2058 02:11:29.985519  tar: ./ipc/config: time stamp 2024-11-04 18:27:53 is 24438917.788615347 s in the future
 2059 02:11:30.042558  tar: ./ipc: time stamp 2024-11-08 01:38:14 is 24723938.730458805 s in the future
 2060 02:11:30.302527  tar: ./tdx/tdx_guest_test: time stamp 2024-11-08 01:37:37 is 24723901.471915555 s in the future
 2061 02:11:30.459011  tar: ./tdx/config: time stamp 2024-11-04 18:27:53 is 24438917.314479722 s in the future
 2062 02:11:30.519338  tar: ./tdx: time stamp 2024-11-08 01:38:25 is 24723949.253898764 s in the future
 2063 02:11:30.665147  tar: ./tpm2/test_async.sh: time stamp 2024-11-04 18:27:53 is 24438917.109226264 s in the future
 2064 02:11:30.815311  tar: ./tpm2/tpm2.py: time stamp 2024-11-04 18:27:53 is 24438916.95899168 s in the future
 2065 02:11:30.951674  tar: ./tpm2/tpm2_tests.py: time stamp 2024-11-04 18:27:53 is 24438916.822742889 s in the future
 2066 02:11:31.074561  tar: ./tpm2/test_smoke.sh: time stamp 2024-11-04 18:27:53 is 24438916.700466514 s in the future
 2067 02:11:31.212021  tar: ./tpm2/settings: time stamp 2024-11-04 18:27:53 is 24438916.561640722 s in the future
 2068 02:11:31.346464  tar: ./tpm2/test_space.sh: time stamp 2024-11-04 18:27:53 is 24438916.428141763 s in the future
 2069 02:11:31.408964  tar: ./tpm2: time stamp 2024-11-08 01:38:25 is 24723948.364144972 s in the future
 2070 02:11:31.595976  tar: ./ptrace/vmaccess: time stamp 2024-11-08 01:37:27 is 24723890.177623305 s in the future
 2071 02:11:31.746344  tar: ./ptrace/get_set_sud: time stamp 2024-11-08 01:37:27 is 24723890.028491222 s in the future
 2072 02:11:31.877650  tar: ./ptrace/peeksiginfo: time stamp 2024-11-08 01:37:27 is 24723889.89716993 s in the future
 2073 02:11:32.019698  tar: ./ptrace/get_syscall_info: time stamp 2024-11-08 01:37:27 is 24723889.75551993 s in the future
 2074 02:11:32.074697  tar: ./ptrace: time stamp 2024-11-08 01:38:21 is 24723943.699255305 s in the future
 2075 02:11:32.268419  tar: ./syscall_user_dispatch/sud_benchmark: time stamp 2024-11-08 01:37:37 is 24723899.507970347 s in the future
 2076 02:11:32.394474  tar: ./syscall_user_dispatch/config: time stamp 2024-11-04 18:27:53 is 24438915.380199305 s in the future
 2077 02:11:32.557599  tar: ./syscall_user_dispatch/sud_test: time stamp 2024-11-08 01:37:36 is 24723898.218401597 s in the future
 2078 02:11:32.627696  tar: ./syscall_user_dispatch: time stamp 2024-11-08 01:38:24 is 24723946.146057222 s in the future
 2079 02:11:32.817951  tar: ./resctrl/resctrl_tests: time stamp 2024-11-08 01:37:30 is 24723891.958986805 s in the future
 2080 02:11:32.994499  tar: ./resctrl/config: time stamp 2024-11-04 18:27:53 is 24438914.778380722 s in the future
 2081 02:11:33.143600  tar: ./resctrl/settings: time stamp 2024-11-04 18:27:53 is 24438914.630564805 s in the future
 2082 02:11:33.200912  tar: ./resctrl: time stamp 2024-11-08 01:38:22 is 24723943.572366263 s in the future
 2083 02:11:33.380955  tar: ./proc/setns-sysvipc: time stamp 2024-11-08 01:37:26 is 24723887.393263513 s in the future
 2084 02:11:33.537439  tar: ./proc/read: time stamp 2024-11-08 01:37:25 is 24723886.236093305 s in the future
 2085 02:11:33.855576  tar: ./proc/proc-subset-pid: time stamp 2024-11-08 01:37:24 is 24723884.917940763 s in the future
 2086 02:11:34.006178  tar: ./proc/proc-loadavg-001: time stamp 2024-11-08 01:37:23 is 24723883.768710097 s in the future
 2087 02:11:34.164954  tar: ./proc/proc-self-map-files-002: time stamp 2024-11-08 01:37:23 is 24723883.61036393 s in the future
 2088 02:11:34.306795  tar: ./proc/proc-empty-vm: time stamp 2024-11-08 01:37:23 is 24723883.467639096 s in the future
 2089 02:11:34.435325  tar: ./proc/proc-tid0: time stamp 2024-11-08 01:37:24 is 24723884.33764843 s in the future
 2090 02:11:34.555315  tar: ./proc/proc-pid-vm: time stamp 2024-11-08 01:37:23 is 24723883.21833868 s in the future
 2091 02:11:34.705749  tar: ./proc/proc-self-isnt-kthread: time stamp 2024-11-08 01:37:24 is 24723884.070181888 s in the future
 2092 02:11:34.856963  tar: ./proc/proc-2-is-kthread: time stamp 2024-11-08 01:37:22 is 24723881.917200846 s in the future
 2093 02:11:34.990452  tar: ./proc/proc-uptime-001: time stamp 2024-11-08 01:37:25 is 24723884.78456043 s in the future
 2094 02:11:35.123871  tar: ./proc/proc-uptime-002: time stamp 2024-11-08 01:37:25 is 24723884.650406555 s in the future
 2095 02:11:35.255211  tar: ./proc/proc-self-syscall: time stamp 2024-11-08 01:37:24 is 24723883.51938768 s in the future
 2096 02:11:35.407633  tar: ./proc/proc-multiple-procfs: time stamp 2024-11-08 01:37:26 is 24723885.367058805 s in the future
 2097 02:11:35.531325  tar: ./proc/config: time stamp 2024-11-04 18:27:53 is 24438912.242201888 s in the future
 2098 02:11:35.656073  tar: ./proc/thread-self: time stamp 2024-11-08 01:37:26 is 24723885.117789763 s in the future
 2099 02:11:35.790550  tar: ./proc/setns-dcache: time stamp 2024-11-08 01:37:26 is 24723884.983171638 s in the future
 2100 02:11:35.932452  tar: ./proc/proc-self-map-files-001: time stamp 2024-11-08 01:37:23 is 24723881.842669471 s in the future
 2101 02:11:36.080641  tar: ./proc/proc-self-wchan: time stamp 2024-11-08 01:37:24 is 24723882.693500013 s in the future
 2102 02:11:36.234191  tar: ./proc/proc-fsconfig-hidepid: time stamp 2024-11-08 01:37:26 is 24723884.541169388 s in the future
 2103 02:11:36.374838  tar: ./proc/fd-002-posix-eq: time stamp 2024-11-08 01:37:22 is 24723880.39929743 s in the future
 2104 02:11:36.605390  tar: ./proc/fd-001-lookup: time stamp 2024-11-08 01:37:22 is 24723880.16896718 s in the future
 2105 02:11:36.767243  tar: ./proc/fd-003-kthread: time stamp 2024-11-08 01:37:22 is 24723880.007544971 s in the future
 2106 02:11:36.916396  tar: ./proc/self: time stamp 2024-11-08 01:37:25 is 24723882.857463388 s in the future
 2107 02:11:36.964026  tar: ./proc: time stamp 2024-11-08 01:38:21 is 24723938.808530138 s in the future
 2108 02:11:37.164910  tar: ./core/close_range_test: time stamp 2024-11-08 01:35:29 is 24723766.608937596 s in the future
 2109 02:11:37.291891  tar: ./core/unshare_test: time stamp 2024-11-08 01:35:29 is 24723766.482046263 s in the future
 2110 02:11:37.340618  tar: ./core: time stamp 2024-11-08 01:38:09 is 24723926.432040596 s in the future
 2111 02:11:37.474873  tar: ./run_kselftest.sh: time stamp 2024-11-08 01:38:08 is 24723925.298470429 s in the future
 2112 02:11:37.659041  tar: ./futex/functional/futex_wait: time stamp 2024-11-08 01:36:28 is 24723825.115260679 s in the future
 2113 02:11:37.785085  tar: ./futex/functional/run.sh: time stamp 2024-11-04 18:27:53 is 24438909.989677554 s in the future
 2114 02:11:37.945014  tar: ./futex/functional/futex_wait_private_mapped_file: time stamp 2024-11-08 01:36:28 is 24723824.831551263 s in the future
 2115 02:11:38.093533  tar: ./futex/functional/futex_wait_wouldblock: time stamp 2024-11-08 01:36:26 is 24723822.681523971 s in the future
 2116 02:11:38.236589  tar: ./futex/functional/futex_wait_timeout: time stamp 2024-11-08 01:36:26 is 24723822.539485846 s in the future
 2117 02:11:38.384823  tar: ./futex/functional/futex_wait_uninitialized_heap: time stamp 2024-11-08 01:36:28 is 24723824.391171638 s in the future
 2118 02:11:38.523692  tar: ./futex/functional/futex_requeue: time stamp 2024-11-08 01:36:28 is 24723824.250727263 s in the future
 2119 02:11:38.660471  tar: ./futex/functional/futex_requeue_pi_signal_restart: time stamp 2024-11-08 01:36:27 is 24723823.115186554 s in the future
 2120 02:11:38.794266  tar: ./futex/functional/futex_waitv: time stamp 2024-11-08 01:36:29 is 24723824.981032179 s in the future
 2121 02:11:38.913270  tar: ./futex/functional/futex_requeue_pi_mismatched_ops: time stamp 2024-11-08 01:36:27 is 24723822.864002596 s in the future
 2122 02:11:39.070111  tar: ./futex/functional/futex_requeue_pi: time stamp 2024-11-08 01:36:27 is 24723822.705616721 s in the future
 2123 02:11:39.117665  tar: ./futex/functional: time stamp 2024-11-08 01:38:13 is 24723928.655857971 s in the future
 2124 02:11:39.242587  tar: ./futex/run.sh: time stamp 2024-11-08 01:38:13 is 24723928.530631929 s in the future
 2125 02:11:39.291455  tar: ./futex: time stamp 2024-11-08 01:38:13 is 24723928.480553638 s in the future
 2126 02:11:39.349565  tar: .: time stamp 2024-11-08 01:38:29 is 24723944.422261304 s in the future
 2127 02:11:39.631868  skiplist:
 2128 02:11:39.632328  ========================================
 2129 02:11:39.637340  ========================================
 2130 02:11:39.971539  dt:test_unprobed_devices.sh
 2131 02:11:40.114857  ============== Tests to run ===============
 2132 02:11:40.127564  dt:test_unprobed_devices.sh
 2133 02:11:40.131884  ===========End Tests to run ===============
 2134 02:11:40.175634  shardfile-dt pass
 2135 02:11:40.513136  <12>[  266.234834] kselftest: Running tests in dt
 2136 02:11:40.545395  TAP version 13
 2137 02:11:40.569881  1..1
 2138 02:11:40.626749  # timeout set to 45
 2139 02:11:40.627131  # selftests: dt: test_unprobed_devices.sh
 2140 02:11:41.468575  # TAP version 13
 2141 02:12:07.488738  # 1..257
 2142 02:12:07.675202  # ok 1 / # SKIP
 2143 02:12:07.692592  # ok 2 /clk_mcasp0
 2144 02:12:07.769220  # ok 3 /clk_mcasp0_fixed # SKIP
 2145 02:12:07.844967  # ok 4 /cpus/cpu@0 # SKIP
 2146 02:12:07.924420  # ok 5 /cpus/idle-states/mpu_gate # SKIP
 2147 02:12:07.941543  # ok 6 /fixedregulator0
 2148 02:12:07.964377  # ok 7 /leds
 2149 02:12:07.985827  # ok 8 /ocp
 2150 02:12:08.014455  # ok 9 /ocp/interconnect@44c00000
 2151 02:12:08.037588  # ok 10 /ocp/interconnect@44c00000/segment@0
 2152 02:12:08.064988  # ok 11 /ocp/interconnect@44c00000/segment@100000
 2153 02:12:08.086173  # ok 12 /ocp/interconnect@44c00000/segment@100000/target-module@0
 2154 02:12:08.164701  # not ok 13 /ocp/interconnect@44c00000/segment@100000/target-module@0/cpu@0
 2155 02:12:08.187118  # ok 14 /ocp/interconnect@44c00000/segment@200000
 2156 02:12:08.209606  # ok 15 /ocp/interconnect@44c00000/segment@200000/target-module@0
 2157 02:12:08.321804  # not ok 16 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0
 2158 02:12:08.401303  # ok 17 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0 # SKIP
 2159 02:12:08.476079  # ok 18 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@0 # SKIP
 2160 02:12:08.557046  # ok 19 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@120 # SKIP
 2161 02:12:08.628118  # ok 20 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@14c # SKIP
 2162 02:12:08.704338  # ok 21 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@18 # SKIP
 2163 02:12:08.780990  # ok 22 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@1c # SKIP
 2164 02:12:08.858700  # ok 23 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@24 # SKIP
 2165 02:12:08.936347  # ok 24 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@38 # SKIP
 2166 02:12:09.015480  # ok 25 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@0/clock@e8 # SKIP
 2167 02:12:09.087549  # ok 26 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400 # SKIP
 2168 02:12:09.165020  # ok 27 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@0 # SKIP
 2169 02:12:09.242027  # ok 28 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@14 # SKIP
 2170 02:12:09.317799  # ok 29 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@400/clock@b0 # SKIP
 2171 02:12:09.397507  # ok 30 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600 # SKIP
 2172 02:12:09.473183  # ok 31 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@600/clock@0 # SKIP
 2173 02:12:09.547637  # ok 32 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800 # SKIP
 2174 02:12:09.628489  # ok 33 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@800/clock@0 # SKIP
 2175 02:12:09.701926  # ok 34 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900 # SKIP
 2176 02:12:09.777390  # ok 35 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@900/clock@0 # SKIP
 2177 02:12:09.852716  # ok 36 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00 # SKIP
 2178 02:12:09.929709  # ok 37 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clock@a00/clock@0 # SKIP
 2179 02:12:10.006555  # ok 38 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-24mhz # SKIP
 2180 02:12:10.084584  # ok 39 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-32768 # SKIP
 2181 02:12:10.158219  # ok 40 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clk-rc32k # SKIP
 2182 02:12:10.235472  # ok 41 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-clkdiv32k # SKIP
 2183 02:12:10.313325  # ok 42 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-125mhz-gclk # SKIP
 2184 02:12:10.390272  # ok 43 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-cpsw-cpts-rft@520 # SKIP
 2185 02:12:10.465685  # ok 44 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4-div2 # SKIP
 2186 02:12:10.541340  # ok 45 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m4@480 # SKIP
 2187 02:12:10.620207  # ok 46 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m5@484 # SKIP
 2188 02:12:10.696717  # ok 47 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-m6@4d8 # SKIP
 2189 02:12:10.780314  # ok 48 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-core-x2 # SKIP
 2190 02:12:10.851948  # ok 49 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2-div2 # SKIP
 2191 02:12:10.928814  # ok 50 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-ddr-m2@4a0 # SKIP
 2192 02:12:11.004663  # ok 51 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-disp-m2@4a4 # SKIP
 2193 02:12:11.080455  # ok 52 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-mpu-m2@4a8 # SKIP
 2194 02:12:11.157129  # ok 53 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4 # SKIP
 2195 02:12:11.235200  # ok 54 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2-div4-wkupdm # SKIP
 2196 02:12:11.309779  # ok 55 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-dpll-per-m2@4ac # SKIP
 2197 02:12:11.389924  # ok 56 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-gpio0-dbclk-mux@53c # SKIP
 2198 02:12:11.463559  # ok 57 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-ieee5000-fck-1@e4 # SKIP
 2199 02:12:11.538119  # ok 58 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3-gclk # SKIP
 2200 02:12:11.618326  # ok 59 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l3s-gclk # SKIP
 2201 02:12:11.690016  # ok 60 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4-rtc-gclk # SKIP
 2202 02:12:11.766393  # ok 61 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4fw-gclk # SKIP
 2203 02:12:11.842029  # ok 62 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4hs-gclk # SKIP
 2204 02:12:11.917656  # ok 63 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-l4ls-gclk # SKIP
 2205 02:12:11.998635  # ok 64 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-lcd-gclk@534 # SKIP
 2206 02:12:12.072003  # ok 65 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmc # SKIP
 2207 02:12:12.151015  # ok 66 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-mmu-fck-1@914 # SKIP
 2208 02:12:12.223671  # ok 67 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-pruss-ocp-gclk@530 # SKIP
 2209 02:12:12.294857  # ok 68 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-sysclk-div # SKIP
 2210 02:12:12.369947  # ok 69 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-tclkin # SKIP
 2211 02:12:12.445285  # ok 70 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer1-fck@528 # SKIP
 2212 02:12:12.519896  # ok 71 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer2-fck@508 # SKIP
 2213 02:12:12.594654  # ok 72 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer3-fck@50c # SKIP
 2214 02:12:12.670155  # ok 73 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer4-fck@510 # SKIP
 2215 02:12:12.750011  # ok 74 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer5-fck@518 # SKIP
 2216 02:12:12.819555  # ok 75 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer6-fck@51c # SKIP
 2217 02:12:12.895493  # ok 76 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-timer7-fck@504 # SKIP
 2218 02:12:12.969659  # ok 77 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-usbotg-fck-8@47c # SKIP
 2219 02:12:13.043329  # ok 78 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-19200000 # SKIP
 2220 02:12:13.119232  # ok 79 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-24000000 # SKIP
 2221 02:12:13.194230  # ok 80 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-25000000 # SKIP
 2222 02:12:13.269815  # ok 81 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-virt-26000000 # SKIP
 2223 02:12:13.349716  # ok 82 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock-wdt1-fck@538 # SKIP
 2224 02:12:13.421026  # ok 83 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@488 # SKIP
 2225 02:12:13.494107  # ok 84 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@48c # SKIP
 2226 02:12:13.569675  # ok 85 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@490 # SKIP
 2227 02:12:13.645072  # ok 86 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@494 # SKIP
 2228 02:12:13.718531  # ok 87 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@498 # SKIP
 2229 02:12:13.793197  # ok 88 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c # SKIP
 2230 02:12:13.872334  # ok 89 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fck-div@0 # SKIP
 2231 02:12:13.945770  # ok 90 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@52c/clock-gfx-fclk-clksel@1 # SKIP
 2232 02:12:14.018113  # ok 91 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700 # SKIP
 2233 02:12:14.095862  # ok 92 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2-div@3 # SKIP
 2234 02:12:14.171692  # ok 93 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-clkout2@7 # SKIP
 2235 02:12:14.250770  # ok 94 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/clocks/clock@700/clock-sysclkout-pre@0 # SKIP
 2236 02:12:14.270208  # ok 95 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1000
 2237 02:12:14.296206  # ok 96 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1100
 2238 02:12:14.320795  # ok 97 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@1200
 2239 02:12:14.347070  # ok 98 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@c00
 2240 02:12:14.370479  # ok 99 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@d00
 2241 02:12:14.393939  # ok 100 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@e00
 2242 02:12:14.417566  # ok 101 /ocp/interconnect@44c00000/segment@200000/target-module@0/prcm@0/prm@f00
 2243 02:12:14.440191  # ok 102 /ocp/interconnect@44c00000/segment@200000/target-module@10000
 2244 02:12:14.549176  # not ok 103 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0
 2245 02:12:14.576082  # ok 104 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/control@620
 2246 02:12:14.599554  # ok 105 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/dma-router@f90
 2247 02:12:14.629040  # ok 106 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/pinmux@800
 2248 02:12:14.738383  # not ok 107 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0
 2249 02:12:14.813183  # ok 108 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-adc-tsc-fck # SKIP
 2250 02:12:14.885942  # ok 109 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-aes0-fck # SKIP
 2251 02:12:14.960778  # ok 110 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan0-fck # SKIP
 2252 02:12:15.038919  # ok 111 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-dcan1-fck # SKIP
 2253 02:12:15.109274  # ok 112 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp0-fck # SKIP
 2254 02:12:15.184406  # ok 113 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-mcasp1-fck # SKIP
 2255 02:12:15.256947  # ok 114 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-rng-fck # SKIP
 2256 02:12:15.332862  # ok 115 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sha0-fck # SKIP
 2257 02:12:15.408813  # ok 116 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex0-fck # SKIP
 2258 02:12:15.483692  # ok 117 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-smartreflex1-fck # SKIP
 2259 02:12:15.557401  # ok 118 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock-sys-clkin-22@40 # SKIP
 2260 02:12:15.631116  # ok 119 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664 # SKIP
 2261 02:12:15.707181  # ok 120 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm0-tbclk@0 # SKIP
 2262 02:12:15.782158  # ok 121 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm1-tbclk@1 # SKIP
 2263 02:12:15.860854  # ok 122 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/clocks/clock@664/clock-ehrpwm2-tbclk@2 # SKIP
 2264 02:12:15.882066  # ok 123 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/scm_conf@0/phy-gmii-sel
 2265 02:12:15.958190  # not ok 124 /ocp/interconnect@44c00000/segment@200000/target-module@10000/scm@0/wkup_m3_ipc@1324
 2266 02:12:16.029292  # not ok 125 /ocp/interconnect@44c00000/segment@200000/target-module@31000
 2267 02:12:16.107020  # ok 126 /ocp/interconnect@44c00000/segment@200000/target-module@31000/timer@0 # SKIP
 2268 02:12:16.123310  # ok 127 /ocp/interconnect@44c00000/segment@200000/target-module@35000
 2269 02:12:16.198405  # not ok 128 /ocp/interconnect@44c00000/segment@200000/target-module@35000/wdt@0
 2270 02:12:16.226310  # ok 129 /ocp/interconnect@44c00000/segment@200000/target-module@3e000
 2271 02:12:16.293863  # not ok 130 /ocp/interconnect@44c00000/segment@200000/target-module@3e000/rtc@0
 2272 02:12:16.319675  # ok 131 /ocp/interconnect@44c00000/segment@200000/target-module@7000
 2273 02:12:16.348634  # ok 132 /ocp/interconnect@44c00000/segment@200000/target-module@7000/gpio@0
 2274 02:12:16.369180  # ok 133 /ocp/interconnect@44c00000/segment@200000/target-module@9000
 2275 02:12:16.393742  # ok 134 /ocp/interconnect@44c00000/segment@200000/target-module@9000/serial@0
 2276 02:12:16.416173  # ok 135 /ocp/interconnect@44c00000/segment@200000/target-module@b000
 2277 02:12:16.441953  # ok 136 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0
 2278 02:12:16.471054  # ok 137 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50
 2279 02:12:16.543939  # ok 138 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/baseboard_eeprom@50/nvmem-layout # SKIP
 2280 02:12:16.568599  # ok 139 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tda19988@70
 2281 02:12:16.597838  # ok 140 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24
 2282 02:12:16.671276  # not ok 141 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/charger
 2283 02:12:16.740261  # not ok 142 /ocp/interconnect@44c00000/segment@200000/target-module@b000/i2c@0/tps@24/pwrbutton
 2284 02:12:16.767304  # ok 143 /ocp/interconnect@44c00000/segment@200000/target-module@d000
 2285 02:12:16.866218  # not ok 144 /ocp/interconnect@47c00000
 2286 02:12:16.944230  # not ok 145 /ocp/interconnect@47c00000/segment@0
 2287 02:12:16.965807  # ok 146 /ocp/interconnect@48000000
 2288 02:12:16.992099  # ok 147 /ocp/interconnect@48000000/segment@0
 2289 02:12:17.013427  # ok 148 /ocp/interconnect@48000000/segment@0/target-module@22000
 2290 02:12:17.039046  # ok 149 /ocp/interconnect@48000000/segment@0/target-module@24000
 2291 02:12:17.061219  # ok 150 /ocp/interconnect@48000000/segment@0/target-module@2a000
 2292 02:12:17.085918  # ok 151 /ocp/interconnect@48000000/segment@0/target-module@30000
 2293 02:12:17.113548  # ok 152 /ocp/interconnect@48000000/segment@0/target-module@38000
 2294 02:12:17.138172  # ok 153 /ocp/interconnect@48000000/segment@0/target-module@38000/mcasp@0
 2295 02:12:17.158423  # ok 154 /ocp/interconnect@48000000/segment@0/target-module@3c000
 2296 02:12:17.231187  # not ok 155 /ocp/interconnect@48000000/segment@0/target-module@40000
 2297 02:12:17.310752  # ok 156 /ocp/interconnect@48000000/segment@0/target-module@40000/timer@0 # SKIP
 2298 02:12:17.336910  # ok 157 /ocp/interconnect@48000000/segment@0/target-module@42000
 2299 02:12:17.354863  # ok 158 /ocp/interconnect@48000000/segment@0/target-module@42000/timer@0
 2300 02:12:17.379373  # ok 159 /ocp/interconnect@48000000/segment@0/target-module@44000
 2301 02:12:17.408474  # ok 160 /ocp/interconnect@48000000/segment@0/target-module@44000/timer@0
 2302 02:12:17.430030  # ok 161 /ocp/interconnect@48000000/segment@0/target-module@46000
 2303 02:12:17.452544  # ok 162 /ocp/interconnect@48000000/segment@0/target-module@46000/timer@0
 2304 02:12:17.476180  # ok 163 /ocp/interconnect@48000000/segment@0/target-module@48000
 2305 02:12:17.500518  # ok 164 /ocp/interconnect@48000000/segment@0/target-module@48000/timer@0
 2306 02:12:17.528304  # ok 165 /ocp/interconnect@48000000/segment@0/target-module@4a000
 2307 02:12:17.549450  # ok 166 /ocp/interconnect@48000000/segment@0/target-module@4a000/timer@0
 2308 02:12:17.577266  # ok 167 /ocp/interconnect@48000000/segment@0/target-module@4c000
 2309 02:12:17.598852  # ok 168 /ocp/interconnect@48000000/segment@0/target-module@4c000/gpio@0
 2310 02:12:17.621042  # ok 169 /ocp/interconnect@48000000/segment@0/target-module@60000
 2311 02:12:17.645524  # ok 170 /ocp/interconnect@48000000/segment@0/target-module@60000/mmc@0
 2312 02:12:17.674803  # ok 171 /ocp/interconnect@48000000/segment@0/target-module@c8000
 2313 02:12:17.694285  # ok 172 /ocp/interconnect@48000000/segment@0/target-module@c8000/mailbox@0
 2314 02:12:17.718178  # ok 173 /ocp/interconnect@48000000/segment@0/target-module@ca000
 2315 02:12:17.748362  # ok 174 /ocp/interconnect@48000000/segment@0/target-module@ca000/spinlock@0
 2316 02:12:17.767195  # ok 175 /ocp/interconnect@48000000/segment@100000
 2317 02:12:17.798525  # ok 176 /ocp/interconnect@48000000/segment@100000/target-module@9c000
 2318 02:12:17.820023  # ok 177 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0
 2319 02:12:17.898886  # not ok 178 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54
 2320 02:12:17.973742  # ok 179 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom0@54/nvmem-layout # SKIP
 2321 02:12:18.042917  # not ok 180 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55
 2322 02:12:18.119640  # ok 181 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom1@55/nvmem-layout # SKIP
 2323 02:12:18.191972  # not ok 182 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56
 2324 02:12:18.269950  # ok 183 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom2@56/nvmem-layout # SKIP
 2325 02:12:18.342250  # not ok 184 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57
 2326 02:12:18.419035  # ok 185 /ocp/interconnect@48000000/segment@100000/target-module@9c000/i2c@0/cape_eeprom3@57/nvmem-layout # SKIP
 2327 02:12:18.440433  # ok 186 /ocp/interconnect@48000000/segment@100000/target-module@a0000
 2328 02:12:18.464051  # ok 187 /ocp/interconnect@48000000/segment@100000/target-module@a6000
 2329 02:12:18.488552  # ok 188 /ocp/interconnect@48000000/segment@100000/target-module@a8000
 2330 02:12:18.517188  # ok 189 /ocp/interconnect@48000000/segment@100000/target-module@aa000
 2331 02:12:18.539863  # ok 190 /ocp/interconnect@48000000/segment@100000/target-module@ac000
 2332 02:12:18.562282  # ok 191 /ocp/interconnect@48000000/segment@100000/target-module@ac000/gpio@0
 2333 02:12:18.585180  # ok 192 /ocp/interconnect@48000000/segment@100000/target-module@ae000
 2334 02:12:18.611698  # ok 193 /ocp/interconnect@48000000/segment@100000/target-module@ae000/gpio@0
 2335 02:12:18.634152  # ok 194 /ocp/interconnect@48000000/segment@100000/target-module@cc000
 2336 02:12:18.662207  # ok 195 /ocp/interconnect@48000000/segment@100000/target-module@d0000
 2337 02:12:18.682216  # ok 196 /ocp/interconnect@48000000/segment@100000/target-module@d8000
 2338 02:12:18.708285  # ok 197 /ocp/interconnect@48000000/segment@100000/target-module@d8000/mmc@0
 2339 02:12:18.728829  # ok 198 /ocp/interconnect@48000000/segment@200000
 2340 02:12:18.755475  # ok 199 /ocp/interconnect@48000000/segment@200000/target-module@0
 2341 02:12:18.835185  # ok 200 /ocp/interconnect@48000000/segment@200000/target-module@0/mpu@0 # SKIP
 2342 02:12:18.856386  # ok 201 /ocp/interconnect@48000000/segment@300000
 2343 02:12:18.878026  # ok 202 /ocp/interconnect@48000000/segment@300000/target-module@0
 2344 02:12:18.902180  # ok 203 /ocp/interconnect@48000000/segment@300000/target-module@10000
 2345 02:12:18.930061  # ok 204 /ocp/interconnect@48000000/segment@300000/target-module@10000/rng@0
 2346 02:12:18.952621  # ok 205 /ocp/interconnect@48000000/segment@300000/target-module@2000
 2347 02:12:18.979241  # ok 206 /ocp/interconnect@48000000/segment@300000/target-module@4000
 2348 02:12:19.005195  # ok 207 /ocp/interconnect@48000000/segment@300000/target-module@e000
 2349 02:12:19.080937  # not ok 208 /ocp/interconnect@48000000/segment@300000/target-module@e000/lcdc@0
 2350 02:12:19.095425  # ok 209 /ocp/interconnect@4a000000
 2351 02:12:19.124030  # ok 210 /ocp/interconnect@4a000000/segment@0
 2352 02:12:19.145157  # ok 211 /ocp/interconnect@4a000000/segment@0/target-module@100000
 2353 02:12:19.176274  # ok 212 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0
 2354 02:12:19.200911  # ok 213 /ocp/interconnect@4a000000/segment@0/target-module@100000/switch@0/mdio@1000
 2355 02:12:19.219255  # ok 214 /ocp/interconnect@4a000000/segment@0/target-module@300000
 2356 02:12:19.294477  # not ok 215 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0
 2357 02:12:19.403466  # ok 216 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/cfg@26000 # SKIP
 2358 02:12:19.480091  # not ok 217 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/interrupt-controller@20000
 2359 02:12:19.588146  # ok 218 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/mii-rt@32000 # SKIP
 2360 02:12:19.662605  # not ok 219 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@34000
 2361 02:12:19.736040  # not ok 220 /ocp/interconnect@4a000000/segment@0/target-module@300000/pruss@0/pru@38000
 2362 02:12:19.838241  # not ok 221 /ocp/interconnect@4b140000
 2363 02:12:19.912405  # not ok 222 /ocp/interconnect@4b140000/segment@0
 2364 02:12:19.987198  # ok 223 /ocp/interrupt-controller@48200000 # SKIP
 2365 02:12:20.013595  # ok 224 /ocp/target-module@40300000
 2366 02:12:20.038027  # ok 225 /ocp/target-module@40300000/sram@0
 2367 02:12:20.114376  # ok 226 /ocp/target-module@40300000/sram@0/pm-code-sram@0 # SKIP
 2368 02:12:20.185516  # ok 227 /ocp/target-module@40300000/sram@0/pm-data-sram@1000 # SKIP
 2369 02:12:20.209895  # ok 228 /ocp/target-module@47400000
 2370 02:12:20.236065  # ok 229 /ocp/target-module@47400000/dma-controller@2000
 2371 02:12:20.257467  # ok 230 /ocp/target-module@47400000/usb-phy@1300
 2372 02:12:20.280816  # ok 231 /ocp/target-module@47400000/usb-phy@1b00
 2373 02:12:20.306240  # ok 232 /ocp/target-module@47400000/usb@1400
 2374 02:12:20.324965  # ok 233 /ocp/target-module@47400000/usb@1800
 2375 02:12:20.352332  # ok 234 /ocp/target-module@47810000
 2376 02:12:20.369917  # ok 235 /ocp/target-module@49000000
 2377 02:12:20.395396  # ok 236 /ocp/target-module@49000000/dma@0
 2378 02:12:20.422450  # ok 237 /ocp/target-module@49800000
 2379 02:12:20.445785  # ok 238 /ocp/target-module@49800000/dma@0
 2380 02:12:20.464490  # ok 239 /ocp/target-module@49900000
 2381 02:12:20.492017  # ok 240 /ocp/target-module@49900000/dma@0
 2382 02:12:20.510023  # ok 241 /ocp/target-module@49a00000
 2383 02:12:20.535923  # ok 242 /ocp/target-module@49a00000/dma@0
 2384 02:12:20.557967  # ok 243 /ocp/target-module@4c000000
 2385 02:12:20.637491  # not ok 244 /ocp/target-module@4c000000/emif@0
 2386 02:12:20.655331  # ok 245 /ocp/target-module@50000000
 2387 02:12:20.678178  # ok 246 /ocp/target-module@53100000
 2388 02:12:20.751688  # not ok 247 /ocp/target-module@53100000/sham@0
 2389 02:12:20.774894  # ok 248 /ocp/target-module@53500000
 2390 02:12:20.852845  # not ok 249 /ocp/target-module@53500000/aes@0
 2391 02:12:20.875122  # ok 250 /ocp/target-module@56000000
 2392 02:12:20.983391  # ok 251 /ocp/target-module@56000000/gpu@0 # SKIP
 2393 02:12:21.051558  # ok 252 /opp-table # SKIP
 2394 02:12:21.124012  # ok 253 /soc # SKIP
 2395 02:12:21.150014  # ok 254 /sound
 2396 02:12:21.169729  # ok 255 /target-module@4b000000
 2397 02:12:21.197225  # ok 256 /target-module@4b000000/target-module@140000
 2398 02:12:21.218375  # ok 257 /target-module@4b000000/target-module@140000/pmu@0
 2399 02:12:21.226339  # # Totals: pass:117 fail:27 xfail:0 xpass:0 skip:113 error:0
 2400 02:12:21.235789  not ok 1 selftests: dt: test_unprobed_devices.sh # exit=1
 2401 02:12:23.606477  dt_test_unprobed_devices_sh_ skip
 2402 02:12:23.611339  dt_test_unprobed_devices_sh_clk_mcasp0 pass
 2403 02:12:23.617462  dt_test_unprobed_devices_sh_clk_mcasp0_fixed skip
 2404 02:12:23.617615  dt_test_unprobed_devices_sh_cpus_cpu_0 skip
 2405 02:12:23.623587  dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate skip
 2406 02:12:23.628446  dt_test_unprobed_devices_sh_fixedregulator0 pass
 2407 02:12:23.633149  dt_test_unprobed_devices_sh_leds pass
 2408 02:12:23.633301  dt_test_unprobed_devices_sh_ocp pass
 2409 02:12:23.638161  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 pass
 2410 02:12:23.644276  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 pass
 2411 02:12:23.653953  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 pass
 2412 02:12:23.658959  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 pass
 2413 02:12:23.669947  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 fail
 2414 02:12:23.674698  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 pass
 2415 02:12:23.684845  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 pass
 2416 02:12:23.690893  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 fail
 2417 02:12:23.700744  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 skip
 2418 02:12:23.711736  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 skip
 2419 02:12:23.721557  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 skip
 2420 02:12:23.732743  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c skip
 2421 02:12:23.742496  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 skip
 2422 02:12:23.753683  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c skip
 2423 02:12:23.763489  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 skip
 2424 02:12:23.773739  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 skip
 2425 02:12:23.783739  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 skip
 2426 02:12:23.789866  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 skip
 2427 02:12:23.800917  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 skip
 2428 02:12:23.812409  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 skip
 2429 02:12:23.823782  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 skip
 2430 02:12:23.834902  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 skip
 2431 02:12:23.839888  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 skip
 2432 02:12:23.851141  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 skip
 2433 02:12:23.862033  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 skip
 2434 02:12:23.873145  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 skip
 2435 02:12:23.883139  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 skip
 2436 02:12:23.889420  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 skip
 2437 02:12:23.899260  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 skip
 2438 02:12:23.910386  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz skip
 2439 02:12:23.921515  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 skip
 2440 02:12:23.931758  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k skip
 2441 02:12:23.942974  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k skip
 2442 02:12:23.955261  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk skip
 2443 02:12:23.966288  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 skip
 2444 02:12:23.977386  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 skip
 2445 02:12:23.988512  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 skip
 2446 02:12:23.999511  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 skip
 2447 02:12:24.011923  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 skip
 2448 02:12:24.021584  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 skip
 2449 02:12:24.032903  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 skip
 2450 02:12:24.042922  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 skip
 2451 02:12:24.054048  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 skip
 2452 02:12:24.065380  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 skip
 2453 02:12:24.076636  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 skip
 2454 02:12:24.088888  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm skip
 2455 02:12:24.099759  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac skip
 2456 02:12:24.110889  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c skip
 2457 02:12:24.121888  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 skip
 2458 02:12:24.132895  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk skip
 2459 02:12:24.143923  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk skip
 2460 02:12:24.155005  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk skip
 2461 02:12:24.166010  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk skip
 2462 02:12:24.177008  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk skip
 2463 02:12:24.188238  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk skip
 2464 02:12:24.200379  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 skip
 2465 02:12:24.205378  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc skip
 2466 02:12:24.216280  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 skip
 2467 02:12:24.227748  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 skip
 2468 02:12:24.238985  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div skip
 2469 02:12:24.250137  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin skip
 2470 02:12:24.261231  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 skip
 2471 02:12:24.272359  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 skip
 2472 02:12:24.284861  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c skip
 2473 02:12:24.295863  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 skip
 2474 02:12:24.305880  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 skip
 2475 02:12:24.317231  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c skip
 2476 02:12:24.328352  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 skip
 2477 02:12:24.340628  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c skip
 2478 02:12:24.351732  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 skip
 2479 02:12:24.362857  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 skip
 2480 02:12:24.372874  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 skip
 2481 02:12:24.384105  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 skip
 2482 02:12:24.396607  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 skip
 2483 02:12:24.401607  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 skip
 2484 02:12:24.412607  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c skip
 2485 02:12:24.423617  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 skip
 2486 02:12:24.434982  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 skip
 2487 02:12:24.445791  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 skip
 2488 02:12:24.455853  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c skip
 2489 02:12:24.466352  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 skip
 2490 02:12:24.478352  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 skip
 2491 02:12:24.489729  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 skip
 2492 02:12:24.500868  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 skip
 2493 02:12:24.511982  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 skip
 2494 02:12:24.521753  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 skip
 2495 02:12:24.533986  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 pass
 2496 02:12:24.538860  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 pass
 2497 02:12:24.549855  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 pass
 2498 02:12:24.562107  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 pass
 2499 02:12:24.566998  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 pass
 2500 02:12:24.578110  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 pass
 2501 02:12:24.590322  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 pass
 2502 02:12:24.595230  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 pass
 2503 02:12:24.606356  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 fail
 2504 02:12:24.618561  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 pass
 2505 02:12:24.623426  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 pass
 2506 02:12:24.633230  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 pass
 2507 02:12:24.644131  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 fail
 2508 02:12:24.653923  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck skip
 2509 02:12:24.669714  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck skip
 2510 02:12:24.680758  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck skip
 2511 02:12:24.690430  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck skip
 2512 02:12:24.706481  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck skip
 2513 02:12:24.716236  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck skip
 2514 02:12:24.727293  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck skip
 2515 02:12:24.737061  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck skip
 2516 02:12:24.752978  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck skip
 2517 02:12:24.764093  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck skip
 2518 02:12:24.777728  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 skip
 2519 02:12:24.789871  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 skip
 2520 02:12:24.799725  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 skip
 2521 02:12:24.815426  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 skip
 2522 02:12:24.826558  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 skip
 2523 02:12:24.836179  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel pass
 2524 02:12:24.847361  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 fail
 2525 02:12:24.857044  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 fail
 2526 02:12:24.868176  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 skip
 2527 02:12:24.873079  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 pass
 2528 02:12:24.882855  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 fail
 2529 02:12:24.888971  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 pass
 2530 02:12:24.898638  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 fail
 2531 02:12:24.908646  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 pass
 2532 02:12:24.919723  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 pass
 2533 02:12:24.923349  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 pass
 2534 02:12:24.934301  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 pass
 2535 02:12:24.945312  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 pass
 2536 02:12:24.951472  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 pass
 2537 02:12:24.961091  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 pass
 2538 02:12:24.972177  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout skip
 2539 02:12:24.981863  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 pass
 2540 02:12:24.992980  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 pass
 2541 02:12:25.002651  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger fail
 2542 02:12:25.013756  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton fail
 2543 02:12:25.023424  dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 pass
 2544 02:12:25.028426  dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 fail
 2545 02:12:25.034601  dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 fail
 2546 02:12:25.039408  dt_test_unprobed_devices_sh_ocp_interconnect_48000000 pass
 2547 02:12:25.044187  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 pass
 2548 02:12:25.049183  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 pass
 2549 02:12:25.060303  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 pass
 2550 02:12:25.070226  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 pass
 2551 02:12:25.076226  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 pass
 2552 02:12:25.081035  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 pass
 2553 02:12:25.090847  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 pass
 2554 02:12:25.101977  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 pass
 2555 02:12:25.106788  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 fail
 2556 02:12:25.116853  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 skip
 2557 02:12:25.121851  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 pass
 2558 02:12:25.132856  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 pass
 2559 02:12:25.138849  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 pass
 2560 02:12:25.148516  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 pass
 2561 02:12:25.159642  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 pass
 2562 02:12:25.164554  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 pass
 2563 02:12:25.174285  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 pass
 2564 02:12:25.180410  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 pass
 2565 02:12:25.190096  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 pass
 2566 02:12:25.201177  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 pass
 2567 02:12:25.206092  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 pass
 2568 02:12:25.215853  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 pass
 2569 02:12:25.221970  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 pass
 2570 02:12:25.231751  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 pass
 2571 02:12:25.236867  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 pass
 2572 02:12:25.247849  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 pass
 2573 02:12:25.257598  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 pass
 2574 02:12:25.263622  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 pass
 2575 02:12:25.268473  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 pass
 2576 02:12:25.278462  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 pass
 2577 02:12:25.289655  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 pass
 2578 02:12:25.299404  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 fail
 2579 02:12:25.310461  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout skip
 2580 02:12:25.320171  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 fail
 2581 02:12:25.331217  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout skip
 2582 02:12:25.340966  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 fail
 2583 02:12:25.351994  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout skip
 2584 02:12:25.361863  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 fail
 2585 02:12:25.372827  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout skip
 2586 02:12:25.382862  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 pass
 2587 02:12:25.388867  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 pass
 2588 02:12:25.398533  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 pass
 2589 02:12:25.409736  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 pass
 2590 02:12:25.414553  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 pass
 2591 02:12:25.424318  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 pass
 2592 02:12:25.435366  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 pass
 2593 02:12:25.440106  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 pass
 2594 02:12:25.451207  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 pass
 2595 02:12:25.456070  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 pass
 2596 02:12:25.465881  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 pass
 2597 02:12:25.476872  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 pass
 2598 02:12:25.481776  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 pass
 2599 02:12:25.492993  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 pass
 2600 02:12:25.497821  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 skip
 2601 02:12:25.502757  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 pass
 2602 02:12:25.513883  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 pass
 2603 02:12:25.518777  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 pass
 2604 02:12:25.528560  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 pass
 2605 02:12:25.538484  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 pass
 2606 02:12:25.548145  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 pass
 2607 02:12:25.553065  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 pass
 2608 02:12:25.564233  dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 fail
 2609 02:12:25.570364  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 pass
 2610 02:12:25.575234  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 pass
 2611 02:12:25.585092  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 pass
 2612 02:12:25.591142  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 pass
 2613 02:12:25.600828  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 pass
 2614 02:12:25.611989  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 pass
 2615 02:12:25.616872  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 fail
 2616 02:12:25.626604  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 skip
 2617 02:12:25.637865  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 fail
 2618 02:12:25.647568  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 skip
 2619 02:12:25.658609  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 fail
 2620 02:12:25.668610  dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 fail
 2621 02:12:25.673640  dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 fail
 2622 02:12:25.678659  dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 fail
 2623 02:12:25.684873  dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 skip
 2624 02:12:25.690869  dt_test_unprobed_devices_sh_ocp_target-module_40300000 pass
 2625 02:12:25.695860  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 pass
 2626 02:12:25.701846  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 skip
 2627 02:12:25.712865  dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 skip
 2628 02:12:25.717862  dt_test_unprobed_devices_sh_ocp_target-module_47400000 pass
 2629 02:12:25.723993  dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 pass
 2630 02:12:25.730110  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 pass
 2631 02:12:25.735102  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 pass
 2632 02:12:25.741206  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 pass
 2633 02:12:25.746113  dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 pass
 2634 02:12:25.752191  dt_test_unprobed_devices_sh_ocp_target-module_47810000 pass
 2635 02:12:25.758316  dt_test_unprobed_devices_sh_ocp_target-module_49000000 pass
 2636 02:12:25.763230  dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 pass
 2637 02:12:25.769367  dt_test_unprobed_devices_sh_ocp_target-module_49800000 pass
 2638 02:12:25.774189  dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 pass
 2639 02:12:25.780308  dt_test_unprobed_devices_sh_ocp_target-module_49900000 pass
 2640 02:12:25.786439  dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 pass
 2641 02:12:25.791359  dt_test_unprobed_devices_sh_ocp_target-module_49a00000 pass
 2642 02:12:25.797488  dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 pass
 2643 02:12:25.802530  dt_test_unprobed_devices_sh_ocp_target-module_4c000000 pass
 2644 02:12:25.808736  dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 fail
 2645 02:12:25.814761  dt_test_unprobed_devices_sh_ocp_target-module_50000000 pass
 2646 02:12:25.819736  dt_test_unprobed_devices_sh_ocp_target-module_53100000 pass
 2647 02:12:25.825826  dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 fail
 2648 02:12:25.830737  dt_test_unprobed_devices_sh_ocp_target-module_53500000 pass
 2649 02:12:25.836873  dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 fail
 2650 02:12:25.842941  dt_test_unprobed_devices_sh_ocp_target-module_56000000 pass
 2651 02:12:25.847810  dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 skip
 2652 02:12:25.852901  dt_test_unprobed_devices_sh_opp-table skip
 2653 02:12:25.857866  dt_test_unprobed_devices_sh_soc skip
 2654 02:12:25.858020  dt_test_unprobed_devices_sh_sound pass
 2655 02:12:25.863987  dt_test_unprobed_devices_sh_target-module_4b000000 pass
 2656 02:12:25.870115  dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 pass
 2657 02:12:25.881199  dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 pass
 2658 02:12:25.881356  dt_test_unprobed_devices_sh fail
 2659 02:12:25.888176  + ../../utils/send-to-lava.sh ./output/result.txt
 2660 02:12:26.041977  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=shardfile-dt RESULT=pass>
 2661 02:12:26.042707  Received signal: <TESTCASE> TEST_CASE_ID=shardfile-dt RESULT=pass
 2663 02:12:26.248101  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip>
 2664 02:12:26.248531  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ RESULT=skip
 2666 02:12:26.432005  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass>
 2667 02:12:26.432432  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0 RESULT=pass
 2669 02:12:26.607394  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip>
 2670 02:12:26.607839  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_clk_mcasp0_fixed RESULT=skip
 2672 02:12:26.783932  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip>
 2673 02:12:26.784390  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_cpu_0 RESULT=skip
 2675 02:12:26.967955  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip>
 2676 02:12:26.968411  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate RESULT=skip
 2678 02:12:27.157495  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass>
 2679 02:12:27.157951  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_fixedregulator0 RESULT=pass
 2681 02:12:27.348926  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass>
 2682 02:12:27.349385  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_leds RESULT=pass
 2684 02:12:27.525288  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass>
 2685 02:12:27.525743  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp RESULT=pass
 2687 02:12:27.705962  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass>
 2688 02:12:27.706370  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000 RESULT=pass
 2690 02:12:28.451514  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass>
 2691 02:12:28.451964  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0 RESULT=pass
 2693 02:12:28.637836  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass>
 2694 02:12:28.638218  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000 RESULT=pass
 2696 02:12:28.848814  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass>
 2697 02:12:28.849216  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0 RESULT=pass
 2699 02:12:29.027947  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail>
 2700 02:12:29.028289  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0 RESULT=fail
 2702 02:12:29.186717  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass>
 2703 02:12:29.187057  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000 RESULT=pass
 2705 02:12:29.357433  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass>
 2706 02:12:29.357785  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0 RESULT=pass
 2708 02:12:29.521589  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail>
 2709 02:12:29.521936  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0 RESULT=fail
 2711 02:12:29.699201  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip>
 2712 02:12:29.699573  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0 RESULT=skip
 2714 02:12:29.870300  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip>
 2715 02:12:29.870659  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0 RESULT=skip
 2717 02:12:30.037068  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip>
 2718 02:12:30.037423  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120 RESULT=skip
 2720 02:12:30.204950  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip>
 2721 02:12:30.205306  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c RESULT=skip
 2723 02:12:30.380178  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip>
 2724 02:12:30.380541  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18 RESULT=skip
 2726 02:12:30.565839  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip>
 2727 02:12:30.566190  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c RESULT=skip
 2729 02:12:30.770831  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip>
 2730 02:12:30.771192  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24 RESULT=skip
 2732 02:12:30.937455  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip>
 2733 02:12:30.937796  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38 RESULT=skip
 2735 02:12:31.112744  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip>
 2736 02:12:31.113099  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8 RESULT=skip
 2738 02:12:31.296236  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip>
 2739 02:12:31.296581  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400 RESULT=skip
 2741 02:12:31.471444  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip>
 2742 02:12:31.471794  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0 RESULT=skip
 2744 02:12:31.640163  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip>
 2745 02:12:31.640504  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14 RESULT=skip
 2747 02:12:31.824836  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip>
 2748 02:12:31.825181  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0 RESULT=skip
 2750 02:12:32.010380  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip>
 2751 02:12:32.010723  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600 RESULT=skip
 2753 02:12:32.190149  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip>
 2754 02:12:32.190491  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0 RESULT=skip
 2756 02:12:32.364474  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip>
 2757 02:12:32.364824  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800 RESULT=skip
 2759 02:12:32.557697  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip>
 2760 02:12:32.558060  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0 RESULT=skip
 2762 02:12:32.752622  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip>
 2763 02:12:32.752987  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900 RESULT=skip
 2765 02:12:33.402339  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip>
 2766 02:12:33.402750  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0 RESULT=skip
 2768 02:12:33.572109  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip>
 2769 02:12:33.572474  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00 RESULT=skip
 2771 02:12:33.758918  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip>
 2772 02:12:33.759307  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0 RESULT=skip
 2774 02:12:33.929936  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip>
 2775 02:12:33.930305  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz RESULT=skip
 2777 02:12:34.125707  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip>
 2778 02:12:34.126116  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768 RESULT=skip
 2780 02:12:34.309606  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip>
 2781 02:12:34.309967  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k RESULT=skip
 2783 02:12:34.484811  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip>
 2784 02:12:34.485176  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k RESULT=skip
 2786 02:12:34.659211  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip>
 2787 02:12:34.659565  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk RESULT=skip
 2789 02:12:34.871679  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip>
 2790 02:12:34.872053  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520 RESULT=skip
 2792 02:12:35.035834  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip>
 2793 02:12:35.036199  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2 RESULT=skip
 2795 02:12:35.223185  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip>
 2796 02:12:35.223538  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480 RESULT=skip
 2798 02:12:35.407418  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip>
 2799 02:12:35.407770  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484 RESULT=skip
 2801 02:12:35.588997  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip>
 2802 02:12:35.589357  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8 RESULT=skip
 2804 02:12:35.778907  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip>
 2805 02:12:35.779273  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2 RESULT=skip
 2807 02:12:35.960545  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip>
 2808 02:12:35.960905  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2 RESULT=skip
 2810 02:12:36.133964  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip>
 2811 02:12:36.134315  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0 RESULT=skip
 2813 02:12:36.302659  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip>
 2814 02:12:36.303007  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4 RESULT=skip
 2816 02:12:36.481910  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip>
 2817 02:12:36.482272  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8 RESULT=skip
 2819 02:12:36.679858  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip>
 2820 02:12:36.680208  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4 RESULT=skip
 2822 02:12:36.854344  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip>
 2823 02:12:36.854688  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm RESULT=skip
 2825 02:12:37.047173  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip>
 2826 02:12:37.047531  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac RESULT=skip
 2828 02:12:37.225539  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip>
 2829 02:12:37.225893  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c RESULT=skip
 2831 02:12:37.409650  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip>
 2832 02:12:37.410005  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4 RESULT=skip
 2834 02:12:37.594519  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip>
 2835 02:12:37.594875  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk RESULT=skip
 2837 02:12:37.780405  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip>
 2838 02:12:37.780831  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk RESULT=skip
 2840 02:12:38.906980  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip>
 2841 02:12:38.907508  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk RESULT=skip
 2843 02:12:40.869901  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip>
 2844 02:12:40.870457  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk RESULT=skip
 2846 02:12:41.068757  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip>
 2847 02:12:41.069405  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk RESULT=skip
 2849 02:12:41.306268  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip>
 2850 02:12:41.306857  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk RESULT=skip
 2852 02:12:41.503921  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip>
 2853 02:12:41.504337  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534 RESULT=skip
 2855 02:12:41.680485  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip>
 2856 02:12:41.681082  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc RESULT=skip
 2858 02:12:41.903073  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip>
 2859 02:12:41.903701  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914 RESULT=skip
 2861 02:12:42.121299  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip>
 2862 02:12:42.121935  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530 RESULT=skip
 2864 02:12:42.301043  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip>
 2865 02:12:42.301707  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div RESULT=skip
 2867 02:12:42.473219  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip>
 2868 02:12:42.473838  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin RESULT=skip
 2870 02:12:42.649780  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip>
 2871 02:12:42.650424  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528 RESULT=skip
 2873 02:12:42.844480  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip>
 2874 02:12:42.845144  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508 RESULT=skip
 2876 02:12:43.044106  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip>
 2877 02:12:43.044581  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c RESULT=skip
 2879 02:12:43.254644  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip>
 2880 02:12:43.255271  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510 RESULT=skip
 2882 02:12:43.453283  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip>
 2883 02:12:43.453837  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518 RESULT=skip
 2885 02:12:43.652307  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip>
 2886 02:12:43.652917  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c RESULT=skip
 2888 02:12:43.855043  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip>
 2889 02:12:43.855669  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504 RESULT=skip
 2891 02:12:44.049450  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip>
 2892 02:12:44.049980  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c RESULT=skip
 2894 02:12:44.246048  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip>
 2895 02:12:44.246585  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000 RESULT=skip
 2897 02:12:44.439739  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip>
 2898 02:12:44.440359  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000 RESULT=skip
 2900 02:12:44.640532  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip>
 2901 02:12:44.641184  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000 RESULT=skip
 2903 02:12:44.813853  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip>
 2904 02:12:44.814473  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000 RESULT=skip
 2906 02:12:45.000105  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip>
 2907 02:12:45.000721  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538 RESULT=skip
 2909 02:12:45.193112  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip>
 2910 02:12:45.193576  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488 RESULT=skip
 2912 02:12:45.368872  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip>
 2913 02:12:45.369496  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c RESULT=skip
 2915 02:12:46.113214  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip>
 2916 02:12:46.113956  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490 RESULT=skip
 2918 02:12:46.309801  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip>
 2919 02:12:46.310438  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494 RESULT=skip
 2921 02:12:46.496714  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip>
 2922 02:12:46.497246  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498 RESULT=skip
 2924 02:12:46.697475  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip>
 2925 02:12:46.697908  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c RESULT=skip
 2927 02:12:46.883770  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip>
 2928 02:12:46.884465  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0 RESULT=skip
 2930 02:12:47.071271  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip>
 2931 02:12:47.071900  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1 RESULT=skip
 2933 02:12:47.268628  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip>
 2934 02:12:47.269010  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700 RESULT=skip
 2936 02:12:47.466447  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip>
 2937 02:12:47.467093  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3 RESULT=skip
 2939 02:12:47.658100  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip>
 2940 02:12:47.658729  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7 RESULT=skip
 2942 02:12:47.846263  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip>
 2943 02:12:47.846894  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0 RESULT=skip
 2945 02:12:48.027038  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass>
 2946 02:12:48.027673  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000 RESULT=pass
 2948 02:12:48.207626  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass>
 2949 02:12:48.208255  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100 RESULT=pass
 2951 02:12:48.388293  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass>
 2952 02:12:48.388926  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200 RESULT=pass
 2954 02:12:48.568705  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass>
 2955 02:12:48.569363  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00 RESULT=pass
 2957 02:12:48.743933  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass>
 2958 02:12:48.744557  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00 RESULT=pass
 2960 02:12:48.926308  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass>
 2961 02:12:48.926823  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00 RESULT=pass
 2963 02:12:49.105749  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass>
 2964 02:12:49.106314  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00 RESULT=pass
 2966 02:12:49.289269  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass>
 2967 02:12:49.289913  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000 RESULT=pass
 2969 02:12:49.472927  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail>
 2970 02:12:49.473554  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0 RESULT=fail
 2972 02:12:49.669158  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass>
 2973 02:12:49.669752  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620 RESULT=pass
 2975 02:12:49.849993  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass>
 2976 02:12:49.850634  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90 RESULT=pass
 2978 02:12:50.042099  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass>
 2979 02:12:50.042723  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800 RESULT=pass
 2981 02:12:50.229070  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail>
 2982 02:12:50.229697  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0 RESULT=fail
 2984 02:12:50.447881  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip>
 2985 02:12:50.448401  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck RESULT=skip
 2987 02:12:50.644872  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip>
 2988 02:12:50.645394  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck RESULT=skip
 2990 02:12:50.850923  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip>
 2991 02:12:50.851557  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck RESULT=skip
 2993 02:12:51.044128  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip>
 2994 02:12:51.044770  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck RESULT=skip
 2996 02:12:51.224023  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip>
 2997 02:12:51.224514  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck RESULT=skip
 2999 02:12:51.411319  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip>
 3000 02:12:51.411947  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck RESULT=skip
 3002 02:12:51.610039  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip>
 3003 02:12:51.610659  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck RESULT=skip
 3005 02:12:51.794925  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip>
 3006 02:12:51.795548  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck RESULT=skip
 3008 02:12:51.972865  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip>
 3009 02:12:51.973488  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck RESULT=skip
 3011 02:12:52.163945  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip>
 3012 02:12:52.164367  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck RESULT=skip
 3014 02:12:52.332174  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip>
 3015 02:12:52.332600  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40 RESULT=skip
 3017 02:12:52.502698  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip>
 3018 02:12:52.503135  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664 RESULT=skip
 3020 02:12:52.703552  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip
 3022 02:12:52.706383  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0 RESULT=skip>
 3023 02:12:52.877171  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip
 3025 02:12:52.880174  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1 RESULT=skip>
 3026 02:12:53.054976  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip
 3028 02:12:53.057903  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2 RESULT=skip>
 3029 02:12:53.228899  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass>
 3030 02:12:53.229520  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel RESULT=pass
 3032 02:12:53.411604  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail>
 3033 02:12:53.412133  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324 RESULT=fail
 3035 02:12:53.599771  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail>
 3036 02:12:53.600390  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000 RESULT=fail
 3038 02:12:53.793589  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip>
 3039 02:12:53.794211  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0 RESULT=skip
 3041 02:12:53.970905  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass>
 3042 02:12:53.971524  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000 RESULT=pass
 3044 02:12:54.148079  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail>
 3045 02:12:54.148544  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0 RESULT=fail
 3047 02:12:54.313813  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass>
 3048 02:12:54.314351  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000 RESULT=pass
 3050 02:12:54.502664  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail>
 3051 02:12:54.503144  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0 RESULT=fail
 3053 02:12:54.681065  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass>
 3054 02:12:54.681686  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000 RESULT=pass
 3056 02:12:54.861166  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass>
 3057 02:12:54.861696  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0 RESULT=pass
 3059 02:12:55.044653  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass>
 3060 02:12:55.045299  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000 RESULT=pass
 3062 02:12:55.222838  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass>
 3063 02:12:55.223458  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0 RESULT=pass
 3065 02:12:55.399804  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass>
 3066 02:12:55.400331  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000 RESULT=pass
 3068 02:12:55.578980  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass>
 3069 02:12:55.579560  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0 RESULT=pass
 3071 02:12:55.759440  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass>
 3072 02:12:55.759942  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50 RESULT=pass
 3074 02:12:56.126676  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip>
 3075 02:12:56.127229  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout RESULT=skip
 3077 02:12:56.958209  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass>
 3078 02:12:56.958666  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70 RESULT=pass
 3080 02:12:57.139664  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass>
 3081 02:12:57.140124  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24 RESULT=pass
 3083 02:12:57.309597  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail>
 3084 02:12:57.309968  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger RESULT=fail
 3086 02:12:57.481593  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail>
 3087 02:12:57.481971  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton RESULT=fail
 3089 02:12:57.671260  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass>
 3090 02:12:57.671600  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000 RESULT=pass
 3092 02:12:57.843723  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail>
 3093 02:12:57.844059  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000 RESULT=fail
 3095 02:12:58.011045  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail>
 3096 02:12:58.011385  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0 RESULT=fail
 3098 02:12:58.180290  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass>
 3099 02:12:58.180627  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000 RESULT=pass
 3101 02:12:58.387756  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass>
 3102 02:12:58.388092  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0 RESULT=pass
 3104 02:12:58.561844  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass>
 3105 02:12:58.562182  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000 RESULT=pass
 3107 02:12:58.755718  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass>
 3108 02:12:58.756055  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000 RESULT=pass
 3110 02:12:58.937840  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass>
 3111 02:12:58.938178  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000 RESULT=pass
 3113 02:12:59.108542  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass>
 3114 02:12:59.108877  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000 RESULT=pass
 3116 02:12:59.275062  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass>
 3117 02:12:59.275404  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000 RESULT=pass
 3119 02:12:59.449005  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass>
 3120 02:12:59.449341  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0 RESULT=pass
 3122 02:12:59.630705  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass>
 3123 02:12:59.631040  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000 RESULT=pass
 3125 02:12:59.797333  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail>
 3126 02:12:59.797670  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000 RESULT=fail
 3128 02:12:59.992328  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip>
 3129 02:12:59.992664  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0 RESULT=skip
 3131 02:13:00.172702  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass>
 3132 02:13:00.173052  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000 RESULT=pass
 3134 02:13:00.383995  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass>
 3135 02:13:00.384332  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0 RESULT=pass
 3137 02:13:00.567566  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass>
 3138 02:13:00.567909  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000 RESULT=pass
 3140 02:13:00.738144  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass>
 3141 02:13:00.738482  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0 RESULT=pass
 3143 02:13:00.904806  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass>
 3144 02:13:00.905144  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000 RESULT=pass
 3146 02:13:01.109327  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass>
 3147 02:13:01.109787  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0 RESULT=pass
 3149 02:13:01.293825  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass>
 3150 02:13:01.294274  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000 RESULT=pass
 3152 02:13:01.870810  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass>
 3153 02:13:01.871248  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0 RESULT=pass
 3155 02:13:02.064963  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass>
 3156 02:13:02.065319  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000 RESULT=pass
 3158 02:13:02.255899  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass>
 3159 02:13:02.256251  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0 RESULT=pass
 3161 02:13:02.489145  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass>
 3162 02:13:02.489506  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000 RESULT=pass
 3164 02:13:02.695776  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass>
 3165 02:13:02.696214  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0 RESULT=pass
 3167 02:13:02.900287  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass>
 3168 02:13:02.900715  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000 RESULT=pass
 3170 02:13:03.120840  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass>
 3171 02:13:03.121198  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0 RESULT=pass
 3173 02:13:03.314776  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass>
 3174 02:13:03.315159  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000 RESULT=pass
 3176 02:13:03.505927  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass>
 3177 02:13:03.506293  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0 RESULT=pass
 3179 02:13:03.694780  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass>
 3180 02:13:03.695233  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000 RESULT=pass
 3182 02:13:03.912025  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass>
 3183 02:13:03.912478  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0 RESULT=pass
 3185 02:13:04.110278  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass>
 3186 02:13:04.110729  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000 RESULT=pass
 3188 02:13:04.319158  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass>
 3189 02:13:04.319610  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000 RESULT=pass
 3191 02:13:04.489283  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass>
 3192 02:13:04.489735  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0 RESULT=pass
 3194 02:13:04.674243  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail>
 3195 02:13:04.674699  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54 RESULT=fail
 3197 02:13:04.878410  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip>
 3198 02:13:04.878864  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout RESULT=skip
 3200 02:13:05.051661  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail>
 3201 02:13:05.052115  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55 RESULT=fail
 3203 02:13:05.263118  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip>
 3204 02:13:05.263530  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout RESULT=skip
 3206 02:13:05.461614  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail>
 3207 02:13:05.462079  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56 RESULT=fail
 3209 02:13:05.659282  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip>
 3210 02:13:05.659691  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout RESULT=skip
 3212 02:13:05.860173  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail>
 3213 02:13:05.860835  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57 RESULT=fail
 3215 02:13:06.061909  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip>
 3216 02:13:06.062543  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout RESULT=skip
 3218 02:13:06.267521  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass>
 3219 02:13:06.268139  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000 RESULT=pass
 3221 02:13:06.464595  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass>
 3222 02:13:06.465249  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000 RESULT=pass
 3224 02:13:06.641732  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass>
 3225 02:13:06.642559  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000 RESULT=pass
 3227 02:13:07.066856  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass>
 3228 02:13:07.067917  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000 RESULT=pass
 3230 02:13:07.251375  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass>
 3231 02:13:07.252063  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000 RESULT=pass
 3233 02:13:07.433924  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass>
 3234 02:13:07.434623  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0 RESULT=pass
 3236 02:13:07.601733  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass>
 3237 02:13:07.602425  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000 RESULT=pass
 3239 02:13:07.779232  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass>
 3240 02:13:07.779924  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0 RESULT=pass
 3242 02:13:07.968279  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass>
 3243 02:13:07.969066  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000 RESULT=pass
 3245 02:13:08.149910  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass>
 3246 02:13:08.150725  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000 RESULT=pass
 3248 02:13:08.327024  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass>
 3249 02:13:08.327850  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000 RESULT=pass
 3251 02:13:08.509493  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass>
 3252 02:13:08.510370  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0 RESULT=pass
 3254 02:13:08.692655  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass>
 3255 02:13:08.693436  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000 RESULT=pass
 3257 02:13:08.877332  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass>
 3258 02:13:08.877986  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0 RESULT=pass
 3260 02:13:09.051326  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip>
 3261 02:13:09.052096  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0 RESULT=skip
 3263 02:13:09.241087  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass>
 3264 02:13:09.241964  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000 RESULT=pass
 3266 02:13:09.410956  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass>
 3267 02:13:09.411751  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0 RESULT=pass
 3269 02:13:09.576578  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass>
 3270 02:13:09.577356  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000 RESULT=pass
 3272 02:13:09.738980  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass>
 3273 02:13:09.739853  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0 RESULT=pass
 3275 02:13:09.907876  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass>
 3276 02:13:09.908693  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000 RESULT=pass
 3278 02:13:10.078381  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass>
 3279 02:13:10.079215  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000 RESULT=pass
 3281 02:13:10.250329  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass>
 3282 02:13:10.250798  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000 RESULT=pass
 3284 02:13:10.427387  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail>
 3285 02:13:10.428052  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0 RESULT=fail
 3287 02:13:10.605163  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass>
 3288 02:13:10.605669  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000 RESULT=pass
 3290 02:13:10.952885  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass>
 3291 02:13:10.953640  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0 RESULT=pass
 3293 02:13:11.144809  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass>
 3294 02:13:11.145259  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000 RESULT=pass
 3296 02:13:11.346131  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass>
 3297 02:13:11.346588  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0 RESULT=pass
 3299 02:13:11.556109  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass>
 3300 02:13:11.556534  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000 RESULT=pass
 3302 02:13:11.772152  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass>
 3303 02:13:11.772551  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000 RESULT=pass
 3305 02:13:13.009058  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail>
 3306 02:13:13.009465  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0 RESULT=fail
 3308 02:13:13.198001  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip>
 3309 02:13:13.198354  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000 RESULT=skip
 3311 02:13:13.375764  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail>
 3312 02:13:13.376104  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000 RESULT=fail
 3314 02:13:13.540625  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip>
 3315 02:13:13.541102  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000 RESULT=skip
 3317 02:13:13.723190  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail>
 3318 02:13:13.723529  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000 RESULT=fail
 3320 02:13:13.922619  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail>
 3321 02:13:13.922957  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000 RESULT=fail
 3323 02:13:14.092139  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail>
 3324 02:13:14.092477  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000 RESULT=fail
 3326 02:13:14.252186  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail>
 3327 02:13:14.252525  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0 RESULT=fail
 3329 02:13:14.420596  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip>
 3330 02:13:14.420932  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000 RESULT=skip
 3332 02:13:14.611015  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass>
 3333 02:13:14.611351  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000 RESULT=pass
 3335 02:13:14.802502  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass>
 3336 02:13:14.802840  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0 RESULT=pass
 3338 02:13:14.987086  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip>
 3339 02:13:14.987423  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0 RESULT=skip
 3341 02:13:15.167623  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip
 3343 02:13:15.170681  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000 RESULT=skip>
 3344 02:13:15.370424  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass>
 3345 02:13:15.370761  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000 RESULT=pass
 3347 02:13:15.553587  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass>
 3348 02:13:15.553923  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000 RESULT=pass
 3350 02:13:15.723175  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass>
 3351 02:13:15.723512  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300 RESULT=pass
 3353 02:13:15.903366  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass>
 3354 02:13:15.903702  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00 RESULT=pass
 3356 02:13:16.093807  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass>
 3357 02:13:16.094143  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400 RESULT=pass
 3359 02:13:16.261169  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass>
 3360 02:13:16.261507  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800 RESULT=pass
 3362 02:13:16.431694  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass>
 3363 02:13:16.432033  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_47810000 RESULT=pass
 3365 02:13:16.605311  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass>
 3366 02:13:16.605647  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000 RESULT=pass
 3368 02:13:16.794727  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass>
 3369 02:13:16.795067  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0 RESULT=pass
 3371 02:13:16.971493  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass>
 3372 02:13:16.971832  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000 RESULT=pass
 3374 02:13:17.142164  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass>
 3375 02:13:17.142505  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0 RESULT=pass
 3377 02:13:17.323133  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass>
 3378 02:13:17.323471  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000 RESULT=pass
 3380 02:13:17.497740  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass>
 3381 02:13:17.498075  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0 RESULT=pass
 3383 02:13:17.688240  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass>
 3384 02:13:17.688582  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000 RESULT=pass
 3386 02:13:17.853451  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass>
 3387 02:13:17.853787  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0 RESULT=pass
 3389 02:13:18.021997  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass>
 3390 02:13:18.022337  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000 RESULT=pass
 3392 02:13:18.229363  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail>
 3393 02:13:18.229701  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0 RESULT=fail
 3395 02:13:18.415798  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass>
 3396 02:13:18.416137  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_50000000 RESULT=pass
 3398 02:13:18.595533  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass>
 3399 02:13:18.595870  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000 RESULT=pass
 3401 02:13:18.807177  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail>
 3402 02:13:18.807518  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0 RESULT=fail
 3404 02:13:18.974358  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass>
 3405 02:13:18.974696  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000 RESULT=pass
 3407 02:13:19.163852  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail>
 3408 02:13:19.164189  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0 RESULT=fail
 3410 02:13:19.344827  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass>
 3411 02:13:19.345164  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000 RESULT=pass
 3413 02:13:19.509014  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip>
 3414 02:13:19.509350  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0 RESULT=skip
 3416 02:13:19.690799  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip>
 3417 02:13:19.691136  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_opp-table RESULT=skip
 3419 02:13:19.878962  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip>
 3420 02:13:19.879297  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_soc RESULT=skip
 3422 02:13:20.055443  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass>
 3423 02:13:20.055779  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_sound RESULT=pass
 3425 02:13:20.232247  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass>
 3426 02:13:20.232584  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000 RESULT=pass
 3428 02:13:20.418668  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass>
 3429 02:13:20.419004  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000 RESULT=pass
 3431 02:13:20.600068  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass>
 3432 02:13:20.600407  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0 RESULT=pass
 3434 02:13:20.781474  <LAVA_SIGNAL_TESTCASE TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail>
 3435 02:13:20.781630  + set +x
 3436 02:13:20.781940  Received signal: <TESTCASE> TEST_CASE_ID=dt_test_unprobed_devices_sh RESULT=fail
 3438 02:13:20.786934  <LAVA_SIGNAL_ENDRUN 1_kselftest-dt 1219052_1.6.2.4.5>
 3439 02:13:20.787272  Received signal: <ENDRUN> 1_kselftest-dt 1219052_1.6.2.4.5
 3440 02:13:20.787412  Ending use of test pattern.
 3441 02:13:20.787534  Ending test lava.1_kselftest-dt (1219052_1.6.2.4.5), duration 309.13
 3443 02:13:20.842263  <LAVA_TEST_RUNNER EXIT>
 3444 02:13:20.842599  ok: lava_test_shell seems to have completed
 3445 02:13:20.845604  dt_test_unprobed_devices_sh: fail
dt_test_unprobed_devices_sh_: skip
dt_test_unprobed_devices_sh_clk_mcasp0: pass
dt_test_unprobed_devices_sh_clk_mcasp0_fixed: skip
dt_test_unprobed_devices_sh_cpus_cpu_0: skip
dt_test_unprobed_devices_sh_cpus_idle-states_mpu_gate: skip
dt_test_unprobed_devices_sh_fixedregulator0: pass
dt_test_unprobed_devices_sh_leds: pass
dt_test_unprobed_devices_sh_ocp: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_100000_target-module_0_cpu_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_120: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_14c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_18: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_1c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_24: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_38: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_0_clock_e8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_14: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_400_clock_b0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_600_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_800_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_900_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clock_a00_clock_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-24mhz: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-32768: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clk-rc32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-clkdiv32k: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-125mhz-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-cpsw-cpts-rft_520: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m4_480: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m5_484: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-m6_4d8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-core-x2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2-div2: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-ddr-m2_4a0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-disp-m2_4a4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-mpu-m2_4a8: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2-div4-wkupdm: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-dpll-per-m2_4ac: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-gpio0-dbclk-mux_53c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-ieee5000-fck-1_e4: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l3s-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4-rtc-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4fw-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4hs-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-l4ls-gclk: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-lcd-gclk_534: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmc: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-mmu-fck-1_914: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-pruss-ocp-gclk_530: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-sysclk-div: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-tclkin: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer1-fck_528: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer2-fck_508: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer3-fck_50c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer4-fck_510: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer5-fck_518: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer6-fck_51c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-timer7-fck_504: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-usbotg-fck-8_47c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-19200000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-24000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-25000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-virt-26000000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock-wdt1-fck_538: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_488: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_48c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_490: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_494: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_498: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fck-div_0: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_52c_clock-gfx-fclk-clksel_1
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2-div_3: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-clkout2_7: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_clocks_clock_700_clock-sysclkout-pre_0
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1100: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_1200: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_c00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_d00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_e00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_0_prcm_0_prm_f00: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_control_620: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_dma-router_f90: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_pinmux_800: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0: fail
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-adc-tsc-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-aes0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan0-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-dcan1-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-mcasp1-fck
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-rng-fck: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sha0-fck: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex0-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-smartreflex1-fck
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock-sys-clkin-22_40
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm0-tbclk_0
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm1-tbclk_1
: skip
? dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_clocks_clock_664_clock-ehrpwm2-tbclk_2
: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_scm_conf_0_phy-gmii-sel: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_10000_scm_0_wkup_m3_ipc_1324: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_31000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_35000_wdt_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_3e000_rtc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_7000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_9000_serial_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_baseboard_eeprom_50_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tda19988_70: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24: pass
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_charger: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_b000_i2c_0_tps_24_pwrbutton: fail
dt_test_unprobed_devices_sh_ocp_interconnect_44c00000_segment_200000_target-module_d000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_47c00000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_22000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_24000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_2a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_30000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_38000_mcasp_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_3c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_40000_timer_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_42000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_44000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_46000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_48000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4a000_timer_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_4c000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_60000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_c8000_mailbox_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_0_target-module_ca000_spinlock_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom0_54_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom1_55_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom2_56_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57: fail
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_9c000_i2c_0_cape_eeprom3_57_nvmem-layout: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a6000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_a8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_aa000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ac000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_ae000_gpio_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_cc000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d0000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_100000_target-module_d8000_mmc_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_200000_target-module_0_mpu_0: skip
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_10000_rng_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_2000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_4000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_48000000_segment_300000_target-module_e000_lcdc_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_100000_switch_0_mdio_1000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000: pass
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_cfg_26000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_interrupt-controller_20000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_mii-rt_32000: skip
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_34000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4a000000_segment_0_target-module_300000_pruss_0_pru_38000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000: fail
dt_test_unprobed_devices_sh_ocp_interconnect_4b140000_segment_0: fail
dt_test_unprobed_devices_sh_ocp_interrupt-controller_48200000: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-code-sram_0: skip
dt_test_unprobed_devices_sh_ocp_target-module_40300000_sram_0_pm-data-sram_1000: skip
dt_test_unprobed_devices_sh_ocp_target-module_47400000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_dma-controller_2000: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1300: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb-phy_1b00: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1400: pass
dt_test_unprobed_devices_sh_ocp_target-module_47400000_usb_1800: pass
dt_test_unprobed_devices_sh_ocp_target-module_47810000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49000000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49800000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49900000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000: pass
dt_test_unprobed_devices_sh_ocp_target-module_49a00000_dma_0: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_4c000000_emif_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_50000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53100000_sham_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_53500000: pass
dt_test_unprobed_devices_sh_ocp_target-module_53500000_aes_0: fail
dt_test_unprobed_devices_sh_ocp_target-module_56000000: pass
dt_test_unprobed_devices_sh_ocp_target-module_56000000_gpu_0: skip
dt_test_unprobed_devices_sh_opp-table: skip
dt_test_unprobed_devices_sh_soc: skip
dt_test_unprobed_devices_sh_sound: pass
dt_test_unprobed_devices_sh_target-module_4b000000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000: pass
dt_test_unprobed_devices_sh_target-module_4b000000_target-module_140000_pmu_0: pass
shardfile-dt: pass

 3446 02:13:20.846199  end: 3.1 lava-test-shell (duration 00:05:11) [common]
 3447 02:13:20.846369  end: 3 lava-test-retry (duration 00:05:11) [common]
 3448 02:13:20.846539  start: 4 finalize (timeout 00:01:39) [common]
 3449 02:13:20.846706  start: 4.1 power-off (timeout 00:00:30) [common]
 3450 02:13:20.846909  Calling: 'drpm' 'lf-bbb-02' 'off'
 3451 02:13:21.172544  >> OFF

 3452 02:13:21.173239  Returned 0 in 0 seconds
 3453 02:13:21.273663  end: 4.1 power-off (duration 00:00:00) [common]
 3455 02:13:21.274131  start: 4.2 read-feedback (timeout 00:01:38) [common]
 3456 02:13:21.274499  Listened to connection for namespace 'common' for up to 1s
 3457 02:13:21.274859  Listened to connection for namespace 'common' for up to 1s
 3458 02:13:22.274818  Finalising connection for namespace 'common'
 3459 02:13:22.275072  Disconnecting from shell: Finalise
 3460 02:13:22.275227  / # 
 3461 02:13:22.375578  end: 4.2 read-feedback (duration 00:00:01) [common]
 3462 02:13:22.375783  end: 4 finalize (duration 00:00:02) [common]
 3463 02:13:22.375985  Cleaning after the job
 3464 02:13:22.376175  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/ramdisk
 3465 02:13:22.378950  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/kernel
 3466 02:13:22.381150  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/dtb
 3467 02:13:22.381440  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/nfsrootfs
 3468 02:13:22.461997  Cleaning up download directory: /var/lib/lava/dispatcher/tmp/1219052/tftp-deploy-k10r_dqk/modules
 3469 02:13:22.467686  Override tmp directory removed at /var/lib/lava/dispatcher/tmp/1219052
 3470 02:13:23.619367  Root tmp directory removed at /var/lib/lava/dispatcher/tmp/1219052
 3471 02:13:23.619653  Job finished correctly